1 /* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2015 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/vmalloc.h>
29 #include <linux/pagemap.h>
30 #include <linux/delay.h>
31 #include <linux/netdevice.h>
32 #include <linux/interrupt.h>
33 #include <linux/tcp.h>
34 #include <linux/ipv6.h>
35 #include <linux/slab.h>
36 #include <net/checksum.h>
37 #include <net/ip6_checksum.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/cpu.h>
41 #include <linux/smp.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/aer.h>
45 #include <linux/prefetch.h>
49 #define DRV_EXTRAVERSION "-k"
51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
52 char e1000e_driver_name[] = "e1000e";
53 const char e1000e_driver_version[] = DRV_VERSION;
55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
56 static int debug = -1;
57 module_param(debug, int, 0);
58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
60 static const struct e1000_info *e1000_info_tbl[] = {
61 [board_82571] = &e1000_82571_info,
62 [board_82572] = &e1000_82572_info,
63 [board_82573] = &e1000_82573_info,
64 [board_82574] = &e1000_82574_info,
65 [board_82583] = &e1000_82583_info,
66 [board_80003es2lan] = &e1000_es2_info,
67 [board_ich8lan] = &e1000_ich8_info,
68 [board_ich9lan] = &e1000_ich9_info,
69 [board_ich10lan] = &e1000_ich10_info,
70 [board_pchlan] = &e1000_pch_info,
71 [board_pch2lan] = &e1000_pch2_info,
72 [board_pch_lpt] = &e1000_pch_lpt_info,
73 [board_pch_spt] = &e1000_pch_spt_info,
74 [board_pch_cnp] = &e1000_pch_cnp_info,
77 struct e1000_reg_info {
82 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
83 /* General Registers */
85 {E1000_STATUS, "STATUS"},
86 {E1000_CTRL_EXT, "CTRL_EXT"},
88 /* Interrupt Registers */
93 {E1000_RDLEN(0), "RDLEN"},
94 {E1000_RDH(0), "RDH"},
95 {E1000_RDT(0), "RDT"},
97 {E1000_RXDCTL(0), "RXDCTL"},
99 {E1000_RDBAL(0), "RDBAL"},
100 {E1000_RDBAH(0), "RDBAH"},
101 {E1000_RDFH, "RDFH"},
102 {E1000_RDFT, "RDFT"},
103 {E1000_RDFHS, "RDFHS"},
104 {E1000_RDFTS, "RDFTS"},
105 {E1000_RDFPC, "RDFPC"},
108 {E1000_TCTL, "TCTL"},
109 {E1000_TDBAL(0), "TDBAL"},
110 {E1000_TDBAH(0), "TDBAH"},
111 {E1000_TDLEN(0), "TDLEN"},
112 {E1000_TDH(0), "TDH"},
113 {E1000_TDT(0), "TDT"},
114 {E1000_TIDV, "TIDV"},
115 {E1000_TXDCTL(0), "TXDCTL"},
116 {E1000_TADV, "TADV"},
117 {E1000_TARC(0), "TARC"},
118 {E1000_TDFH, "TDFH"},
119 {E1000_TDFT, "TDFT"},
120 {E1000_TDFHS, "TDFHS"},
121 {E1000_TDFTS, "TDFTS"},
122 {E1000_TDFPC, "TDFPC"},
124 /* List Terminator */
129 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
130 * @hw: pointer to the HW structure
132 * When updating the MAC CSR registers, the Manageability Engine (ME) could
133 * be accessing the registers at the same time. Normally, this is handled in
134 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
135 * accesses later than it should which could result in the register to have
136 * an incorrect value. Workaround this by checking the FWSM register which
137 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
138 * and try again a number of times.
140 static void __ew32_prepare(struct e1000_hw *hw)
142 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
144 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
148 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
150 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
153 writel(val, hw->hw_addr + reg);
157 * e1000_regdump - register printout routine
158 * @hw: pointer to the HW structure
159 * @reginfo: pointer to the register info table
161 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
167 switch (reginfo->ofs) {
168 case E1000_RXDCTL(0):
169 for (n = 0; n < 2; n++)
170 regs[n] = __er32(hw, E1000_RXDCTL(n));
172 case E1000_TXDCTL(0):
173 for (n = 0; n < 2; n++)
174 regs[n] = __er32(hw, E1000_TXDCTL(n));
177 for (n = 0; n < 2; n++)
178 regs[n] = __er32(hw, E1000_TARC(n));
181 pr_info("%-15s %08x\n",
182 reginfo->name, __er32(hw, reginfo->ofs));
186 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
187 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
190 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
191 struct e1000_buffer *bi)
194 struct e1000_ps_page *ps_page;
196 for (i = 0; i < adapter->rx_ps_pages; i++) {
197 ps_page = &bi->ps_pages[i];
200 pr_info("packet dump for ps_page %d:\n", i);
201 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
202 16, 1, page_address(ps_page->page),
209 * e1000e_dump - Print registers, Tx-ring and Rx-ring
210 * @adapter: board private structure
212 static void e1000e_dump(struct e1000_adapter *adapter)
214 struct net_device *netdev = adapter->netdev;
215 struct e1000_hw *hw = &adapter->hw;
216 struct e1000_reg_info *reginfo;
217 struct e1000_ring *tx_ring = adapter->tx_ring;
218 struct e1000_tx_desc *tx_desc;
223 struct e1000_buffer *buffer_info;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 union e1000_rx_desc_packet_split *rx_desc_ps;
226 union e1000_rx_desc_extended *rx_desc;
236 if (!netif_msg_hw(adapter))
239 /* Print netdevice Info */
241 dev_info(&adapter->pdev->dev, "Net device Info\n");
242 pr_info("Device Name state trans_start\n");
243 pr_info("%-15s %016lX %016lX\n", netdev->name,
244 netdev->state, dev_trans_start(netdev));
247 /* Print Registers */
248 dev_info(&adapter->pdev->dev, "Register Dump\n");
249 pr_info(" Register Name Value\n");
250 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
251 reginfo->name; reginfo++) {
252 e1000_regdump(hw, reginfo);
255 /* Print Tx Ring Summary */
256 if (!netdev || !netif_running(netdev))
259 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
260 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
261 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
262 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
263 0, tx_ring->next_to_use, tx_ring->next_to_clean,
264 (unsigned long long)buffer_info->dma,
266 buffer_info->next_to_watch,
267 (unsigned long long)buffer_info->time_stamp);
270 if (!netif_msg_tx_done(adapter))
271 goto rx_ring_summary;
273 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
275 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
277 * Legacy Transmit Descriptor
278 * +--------------------------------------------------------------+
279 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
280 * +--------------------------------------------------------------+
281 * 8 | Special | CSS | Status | CMD | CSO | Length |
282 * +--------------------------------------------------------------+
283 * 63 48 47 36 35 32 31 24 23 16 15 0
285 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
286 * 63 48 47 40 39 32 31 16 15 8 7 0
287 * +----------------------------------------------------------------+
288 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
289 * +----------------------------------------------------------------+
290 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
291 * +----------------------------------------------------------------+
292 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
294 * Extended Data Descriptor (DTYP=0x1)
295 * +----------------------------------------------------------------+
296 * 0 | Buffer Address [63:0] |
297 * +----------------------------------------------------------------+
298 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
299 * +----------------------------------------------------------------+
300 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
302 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
303 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
304 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
305 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
306 const char *next_desc;
307 tx_desc = E1000_TX_DESC(*tx_ring, i);
308 buffer_info = &tx_ring->buffer_info[i];
309 u0 = (struct my_u0 *)tx_desc;
310 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
311 next_desc = " NTC/U";
312 else if (i == tx_ring->next_to_use)
314 else if (i == tx_ring->next_to_clean)
318 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
319 (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
320 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
322 (unsigned long long)le64_to_cpu(u0->a),
323 (unsigned long long)le64_to_cpu(u0->b),
324 (unsigned long long)buffer_info->dma,
325 buffer_info->length, buffer_info->next_to_watch,
326 (unsigned long long)buffer_info->time_stamp,
327 buffer_info->skb, next_desc);
329 if (netif_msg_pktdata(adapter) && buffer_info->skb)
330 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
331 16, 1, buffer_info->skb->data,
332 buffer_info->skb->len, true);
335 /* Print Rx Ring Summary */
337 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
338 pr_info("Queue [NTU] [NTC]\n");
339 pr_info(" %5d %5X %5X\n",
340 0, rx_ring->next_to_use, rx_ring->next_to_clean);
343 if (!netif_msg_rx_status(adapter))
346 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
347 switch (adapter->rx_ps_pages) {
351 /* [Extended] Packet Split Receive Descriptor Format
353 * +-----------------------------------------------------+
354 * 0 | Buffer Address 0 [63:0] |
355 * +-----------------------------------------------------+
356 * 8 | Buffer Address 1 [63:0] |
357 * +-----------------------------------------------------+
358 * 16 | Buffer Address 2 [63:0] |
359 * +-----------------------------------------------------+
360 * 24 | Buffer Address 3 [63:0] |
361 * +-----------------------------------------------------+
363 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
364 /* [Extended] Receive Descriptor (Write-Back) Format
366 * 63 48 47 32 31 13 12 8 7 4 3 0
367 * +------------------------------------------------------+
368 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
369 * | Checksum | Ident | | Queue | | Type |
370 * +------------------------------------------------------+
371 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
372 * +------------------------------------------------------+
373 * 63 48 47 32 31 20 19 0
375 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
376 for (i = 0; i < rx_ring->count; i++) {
377 const char *next_desc;
378 buffer_info = &rx_ring->buffer_info[i];
379 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
380 u1 = (struct my_u1 *)rx_desc_ps;
382 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
384 if (i == rx_ring->next_to_use)
386 else if (i == rx_ring->next_to_clean)
391 if (staterr & E1000_RXD_STAT_DD) {
392 /* Descriptor Done */
393 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
395 (unsigned long long)le64_to_cpu(u1->a),
396 (unsigned long long)le64_to_cpu(u1->b),
397 (unsigned long long)le64_to_cpu(u1->c),
398 (unsigned long long)le64_to_cpu(u1->d),
399 buffer_info->skb, next_desc);
401 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
403 (unsigned long long)le64_to_cpu(u1->a),
404 (unsigned long long)le64_to_cpu(u1->b),
405 (unsigned long long)le64_to_cpu(u1->c),
406 (unsigned long long)le64_to_cpu(u1->d),
407 (unsigned long long)buffer_info->dma,
408 buffer_info->skb, next_desc);
410 if (netif_msg_pktdata(adapter))
411 e1000e_dump_ps_pages(adapter,
418 /* Extended Receive Descriptor (Read) Format
420 * +-----------------------------------------------------+
421 * 0 | Buffer Address [63:0] |
422 * +-----------------------------------------------------+
424 * +-----------------------------------------------------+
426 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
427 /* Extended Receive Descriptor (Write-Back) Format
429 * 63 48 47 32 31 24 23 4 3 0
430 * +------------------------------------------------------+
432 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
433 * | Packet | IP | | | Type |
434 * | Checksum | Ident | | | |
435 * +------------------------------------------------------+
436 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
437 * +------------------------------------------------------+
438 * 63 48 47 32 31 20 19 0
440 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
442 for (i = 0; i < rx_ring->count; i++) {
443 const char *next_desc;
445 buffer_info = &rx_ring->buffer_info[i];
446 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
447 u1 = (struct my_u1 *)rx_desc;
448 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
450 if (i == rx_ring->next_to_use)
452 else if (i == rx_ring->next_to_clean)
457 if (staterr & E1000_RXD_STAT_DD) {
458 /* Descriptor Done */
459 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
461 (unsigned long long)le64_to_cpu(u1->a),
462 (unsigned long long)le64_to_cpu(u1->b),
463 buffer_info->skb, next_desc);
465 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
467 (unsigned long long)le64_to_cpu(u1->a),
468 (unsigned long long)le64_to_cpu(u1->b),
469 (unsigned long long)buffer_info->dma,
470 buffer_info->skb, next_desc);
472 if (netif_msg_pktdata(adapter) &&
474 print_hex_dump(KERN_INFO, "",
475 DUMP_PREFIX_ADDRESS, 16,
477 buffer_info->skb->data,
478 adapter->rx_buffer_len,
486 * e1000_desc_unused - calculate if we have unused descriptors
488 static int e1000_desc_unused(struct e1000_ring *ring)
490 if (ring->next_to_clean > ring->next_to_use)
491 return ring->next_to_clean - ring->next_to_use - 1;
493 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
497 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
498 * @adapter: board private structure
499 * @hwtstamps: time stamp structure to update
500 * @systim: unsigned 64bit system time value.
502 * Convert the system time value stored in the RX/TXSTMP registers into a
503 * hwtstamp which can be used by the upper level time stamping functions.
505 * The 'systim_lock' spinlock is used to protect the consistency of the
506 * system time value. This is needed because reading the 64 bit time
507 * value involves reading two 32 bit registers. The first read latches the
510 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
511 struct skb_shared_hwtstamps *hwtstamps,
517 spin_lock_irqsave(&adapter->systim_lock, flags);
518 ns = timecounter_cyc2time(&adapter->tc, systim);
519 spin_unlock_irqrestore(&adapter->systim_lock, flags);
521 memset(hwtstamps, 0, sizeof(*hwtstamps));
522 hwtstamps->hwtstamp = ns_to_ktime(ns);
526 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
527 * @adapter: board private structure
528 * @status: descriptor extended error and status field
529 * @skb: particular skb to include time stamp
531 * If the time stamp is valid, convert it into the timecounter ns value
532 * and store that result into the shhwtstamps structure which is passed
533 * up the network stack.
535 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
538 struct e1000_hw *hw = &adapter->hw;
541 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
542 !(status & E1000_RXDEXT_STATERR_TST) ||
543 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
546 /* The Rx time stamp registers contain the time stamp. No other
547 * received packet will be time stamped until the Rx time stamp
548 * registers are read. Because only one packet can be time stamped
549 * at a time, the register values must belong to this packet and
550 * therefore none of the other additional attributes need to be
553 rxstmp = (u64)er32(RXSTMPL);
554 rxstmp |= (u64)er32(RXSTMPH) << 32;
555 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
557 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
561 * e1000_receive_skb - helper function to handle Rx indications
562 * @adapter: board private structure
563 * @staterr: descriptor extended error and status field as written by hardware
564 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
565 * @skb: pointer to sk_buff to be indicated to stack
567 static void e1000_receive_skb(struct e1000_adapter *adapter,
568 struct net_device *netdev, struct sk_buff *skb,
569 u32 staterr, __le16 vlan)
571 u16 tag = le16_to_cpu(vlan);
573 e1000e_rx_hwtstamp(adapter, staterr, skb);
575 skb->protocol = eth_type_trans(skb, netdev);
577 if (staterr & E1000_RXD_STAT_VP)
578 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
580 napi_gro_receive(&adapter->napi, skb);
584 * e1000_rx_checksum - Receive Checksum Offload
585 * @adapter: board private structure
586 * @status_err: receive descriptor status and error fields
587 * @csum: receive descriptor csum field
588 * @sk_buff: socket buffer with received data
590 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
593 u16 status = (u16)status_err;
594 u8 errors = (u8)(status_err >> 24);
596 skb_checksum_none_assert(skb);
598 /* Rx checksum disabled */
599 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
602 /* Ignore Checksum bit is set */
603 if (status & E1000_RXD_STAT_IXSM)
606 /* TCP/UDP checksum error bit or IP checksum error bit is set */
607 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
608 /* let the stack verify checksum errors */
609 adapter->hw_csum_err++;
613 /* TCP/UDP Checksum has not been calculated */
614 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
617 /* It must be a TCP or UDP packet with a valid checksum */
618 skb->ip_summed = CHECKSUM_UNNECESSARY;
619 adapter->hw_csum_good++;
622 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
624 struct e1000_adapter *adapter = rx_ring->adapter;
625 struct e1000_hw *hw = &adapter->hw;
628 writel(i, rx_ring->tail);
630 if (unlikely(i != readl(rx_ring->tail))) {
631 u32 rctl = er32(RCTL);
633 ew32(RCTL, rctl & ~E1000_RCTL_EN);
634 e_err("ME firmware caused invalid RDT - resetting\n");
635 schedule_work(&adapter->reset_task);
639 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
641 struct e1000_adapter *adapter = tx_ring->adapter;
642 struct e1000_hw *hw = &adapter->hw;
645 writel(i, tx_ring->tail);
647 if (unlikely(i != readl(tx_ring->tail))) {
648 u32 tctl = er32(TCTL);
650 ew32(TCTL, tctl & ~E1000_TCTL_EN);
651 e_err("ME firmware caused invalid TDT - resetting\n");
652 schedule_work(&adapter->reset_task);
657 * e1000_alloc_rx_buffers - Replace used receive buffers
658 * @rx_ring: Rx descriptor ring
660 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
661 int cleaned_count, gfp_t gfp)
663 struct e1000_adapter *adapter = rx_ring->adapter;
664 struct net_device *netdev = adapter->netdev;
665 struct pci_dev *pdev = adapter->pdev;
666 union e1000_rx_desc_extended *rx_desc;
667 struct e1000_buffer *buffer_info;
670 unsigned int bufsz = adapter->rx_buffer_len;
672 i = rx_ring->next_to_use;
673 buffer_info = &rx_ring->buffer_info[i];
675 while (cleaned_count--) {
676 skb = buffer_info->skb;
682 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
684 /* Better luck next round */
685 adapter->alloc_rx_buff_failed++;
689 buffer_info->skb = skb;
691 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
692 adapter->rx_buffer_len,
694 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
695 dev_err(&pdev->dev, "Rx DMA map failed\n");
696 adapter->rx_dma_failed++;
700 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
701 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
703 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
704 /* Force memory writes to complete before letting h/w
705 * know there are new descriptors to fetch. (Only
706 * applicable for weak-ordered memory model archs,
710 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
711 e1000e_update_rdt_wa(rx_ring, i);
713 writel(i, rx_ring->tail);
716 if (i == rx_ring->count)
718 buffer_info = &rx_ring->buffer_info[i];
721 rx_ring->next_to_use = i;
725 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
726 * @rx_ring: Rx descriptor ring
728 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
729 int cleaned_count, gfp_t gfp)
731 struct e1000_adapter *adapter = rx_ring->adapter;
732 struct net_device *netdev = adapter->netdev;
733 struct pci_dev *pdev = adapter->pdev;
734 union e1000_rx_desc_packet_split *rx_desc;
735 struct e1000_buffer *buffer_info;
736 struct e1000_ps_page *ps_page;
740 i = rx_ring->next_to_use;
741 buffer_info = &rx_ring->buffer_info[i];
743 while (cleaned_count--) {
744 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
746 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
747 ps_page = &buffer_info->ps_pages[j];
748 if (j >= adapter->rx_ps_pages) {
749 /* all unused desc entries get hw null ptr */
750 rx_desc->read.buffer_addr[j + 1] =
754 if (!ps_page->page) {
755 ps_page->page = alloc_page(gfp);
756 if (!ps_page->page) {
757 adapter->alloc_rx_buff_failed++;
760 ps_page->dma = dma_map_page(&pdev->dev,
764 if (dma_mapping_error(&pdev->dev,
766 dev_err(&adapter->pdev->dev,
767 "Rx DMA page map failed\n");
768 adapter->rx_dma_failed++;
772 /* Refresh the desc even if buffer_addrs
773 * didn't change because each write-back
776 rx_desc->read.buffer_addr[j + 1] =
777 cpu_to_le64(ps_page->dma);
780 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
784 adapter->alloc_rx_buff_failed++;
788 buffer_info->skb = skb;
789 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
790 adapter->rx_ps_bsize0,
792 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
793 dev_err(&pdev->dev, "Rx DMA map failed\n");
794 adapter->rx_dma_failed++;
796 dev_kfree_skb_any(skb);
797 buffer_info->skb = NULL;
801 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
803 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
804 /* Force memory writes to complete before letting h/w
805 * know there are new descriptors to fetch. (Only
806 * applicable for weak-ordered memory model archs,
810 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
811 e1000e_update_rdt_wa(rx_ring, i << 1);
813 writel(i << 1, rx_ring->tail);
817 if (i == rx_ring->count)
819 buffer_info = &rx_ring->buffer_info[i];
823 rx_ring->next_to_use = i;
827 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
828 * @rx_ring: Rx descriptor ring
829 * @cleaned_count: number of buffers to allocate this pass
832 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
833 int cleaned_count, gfp_t gfp)
835 struct e1000_adapter *adapter = rx_ring->adapter;
836 struct net_device *netdev = adapter->netdev;
837 struct pci_dev *pdev = adapter->pdev;
838 union e1000_rx_desc_extended *rx_desc;
839 struct e1000_buffer *buffer_info;
842 unsigned int bufsz = 256 - 16; /* for skb_reserve */
844 i = rx_ring->next_to_use;
845 buffer_info = &rx_ring->buffer_info[i];
847 while (cleaned_count--) {
848 skb = buffer_info->skb;
854 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
855 if (unlikely(!skb)) {
856 /* Better luck next round */
857 adapter->alloc_rx_buff_failed++;
861 buffer_info->skb = skb;
863 /* allocate a new page if necessary */
864 if (!buffer_info->page) {
865 buffer_info->page = alloc_page(gfp);
866 if (unlikely(!buffer_info->page)) {
867 adapter->alloc_rx_buff_failed++;
872 if (!buffer_info->dma) {
873 buffer_info->dma = dma_map_page(&pdev->dev,
874 buffer_info->page, 0,
877 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
878 adapter->alloc_rx_buff_failed++;
883 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
884 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
886 if (unlikely(++i == rx_ring->count))
888 buffer_info = &rx_ring->buffer_info[i];
891 if (likely(rx_ring->next_to_use != i)) {
892 rx_ring->next_to_use = i;
893 if (unlikely(i-- == 0))
894 i = (rx_ring->count - 1);
896 /* Force memory writes to complete before letting h/w
897 * know there are new descriptors to fetch. (Only
898 * applicable for weak-ordered memory model archs,
902 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
903 e1000e_update_rdt_wa(rx_ring, i);
905 writel(i, rx_ring->tail);
909 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
912 if (netdev->features & NETIF_F_RXHASH)
913 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
917 * e1000_clean_rx_irq - Send received data up the network stack
918 * @rx_ring: Rx descriptor ring
920 * the return value indicates whether actual cleaning was done, there
921 * is no guarantee that everything was cleaned
923 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
926 struct e1000_adapter *adapter = rx_ring->adapter;
927 struct net_device *netdev = adapter->netdev;
928 struct pci_dev *pdev = adapter->pdev;
929 struct e1000_hw *hw = &adapter->hw;
930 union e1000_rx_desc_extended *rx_desc, *next_rxd;
931 struct e1000_buffer *buffer_info, *next_buffer;
934 int cleaned_count = 0;
935 bool cleaned = false;
936 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
938 i = rx_ring->next_to_clean;
939 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
940 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
941 buffer_info = &rx_ring->buffer_info[i];
943 while (staterr & E1000_RXD_STAT_DD) {
946 if (*work_done >= work_to_do)
949 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
951 skb = buffer_info->skb;
952 buffer_info->skb = NULL;
954 prefetch(skb->data - NET_IP_ALIGN);
957 if (i == rx_ring->count)
959 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
962 next_buffer = &rx_ring->buffer_info[i];
966 dma_unmap_single(&pdev->dev, buffer_info->dma,
967 adapter->rx_buffer_len, DMA_FROM_DEVICE);
968 buffer_info->dma = 0;
970 length = le16_to_cpu(rx_desc->wb.upper.length);
972 /* !EOP means multiple descriptors were used to store a single
973 * packet, if that's the case we need to toss it. In fact, we
974 * need to toss every packet with the EOP bit clear and the
975 * next frame that _does_ have the EOP bit set, as it is by
976 * definition only a frame fragment
978 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
979 adapter->flags2 |= FLAG2_IS_DISCARDING;
981 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
982 /* All receives must fit into a single buffer */
983 e_dbg("Receive packet consumed multiple buffers\n");
985 buffer_info->skb = skb;
986 if (staterr & E1000_RXD_STAT_EOP)
987 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
991 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
992 !(netdev->features & NETIF_F_RXALL))) {
994 buffer_info->skb = skb;
998 /* adjust length to remove Ethernet CRC */
999 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1000 /* If configured to store CRC, don't subtract FCS,
1001 * but keep the FCS bytes out of the total_rx_bytes
1004 if (netdev->features & NETIF_F_RXFCS)
1005 total_rx_bytes -= 4;
1010 total_rx_bytes += length;
1013 /* code added for copybreak, this should improve
1014 * performance for small packets with large amounts
1015 * of reassembly being done in the stack
1017 if (length < copybreak) {
1018 struct sk_buff *new_skb =
1019 napi_alloc_skb(&adapter->napi, length);
1021 skb_copy_to_linear_data_offset(new_skb,
1027 /* save the skb in buffer_info as good */
1028 buffer_info->skb = skb;
1031 /* else just continue with the old one */
1033 /* end copybreak code */
1034 skb_put(skb, length);
1036 /* Receive Checksum Offload */
1037 e1000_rx_checksum(adapter, staterr, skb);
1039 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1041 e1000_receive_skb(adapter, netdev, skb, staterr,
1042 rx_desc->wb.upper.vlan);
1045 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1047 /* return some buffers to hardware, one at a time is too slow */
1048 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1049 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1054 /* use prefetched values */
1056 buffer_info = next_buffer;
1058 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1060 rx_ring->next_to_clean = i;
1062 cleaned_count = e1000_desc_unused(rx_ring);
1064 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1066 adapter->total_rx_bytes += total_rx_bytes;
1067 adapter->total_rx_packets += total_rx_packets;
1071 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1072 struct e1000_buffer *buffer_info)
1074 struct e1000_adapter *adapter = tx_ring->adapter;
1076 if (buffer_info->dma) {
1077 if (buffer_info->mapped_as_page)
1078 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1079 buffer_info->length, DMA_TO_DEVICE);
1081 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1082 buffer_info->length, DMA_TO_DEVICE);
1083 buffer_info->dma = 0;
1085 if (buffer_info->skb) {
1086 dev_kfree_skb_any(buffer_info->skb);
1087 buffer_info->skb = NULL;
1089 buffer_info->time_stamp = 0;
1092 static void e1000_print_hw_hang(struct work_struct *work)
1094 struct e1000_adapter *adapter = container_of(work,
1095 struct e1000_adapter,
1097 struct net_device *netdev = adapter->netdev;
1098 struct e1000_ring *tx_ring = adapter->tx_ring;
1099 unsigned int i = tx_ring->next_to_clean;
1100 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1101 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1102 struct e1000_hw *hw = &adapter->hw;
1103 u16 phy_status, phy_1000t_status, phy_ext_status;
1106 if (test_bit(__E1000_DOWN, &adapter->state))
1109 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1110 /* May be block on write-back, flush and detect again
1111 * flush pending descriptor writebacks to memory
1113 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1114 /* execute the writes immediately */
1116 /* Due to rare timing issues, write to TIDV again to ensure
1117 * the write is successful
1119 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1120 /* execute the writes immediately */
1122 adapter->tx_hang_recheck = true;
1125 adapter->tx_hang_recheck = false;
1127 if (er32(TDH(0)) == er32(TDT(0))) {
1128 e_dbg("false hang detected, ignoring\n");
1132 /* Real hang detected */
1133 netif_stop_queue(netdev);
1135 e1e_rphy(hw, MII_BMSR, &phy_status);
1136 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1137 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1139 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1141 /* detected Hardware unit hang */
1142 e_err("Detected Hardware Unit Hang:\n"
1145 " next_to_use <%x>\n"
1146 " next_to_clean <%x>\n"
1147 "buffer_info[next_to_clean]:\n"
1148 " time_stamp <%lx>\n"
1149 " next_to_watch <%x>\n"
1151 " next_to_watch.status <%x>\n"
1154 "PHY 1000BASE-T Status <%x>\n"
1155 "PHY Extended Status <%x>\n"
1156 "PCI Status <%x>\n",
1157 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1158 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1159 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1160 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1162 e1000e_dump(adapter);
1164 /* Suggest workaround for known h/w issue */
1165 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1166 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1170 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1171 * @work: pointer to work struct
1173 * This work function polls the TSYNCTXCTL valid bit to determine when a
1174 * timestamp has been taken for the current stored skb. The timestamp must
1175 * be for this skb because only one such packet is allowed in the queue.
1177 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1179 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1181 struct e1000_hw *hw = &adapter->hw;
1183 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1184 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1185 struct skb_shared_hwtstamps shhwtstamps;
1188 txstmp = er32(TXSTMPL);
1189 txstmp |= (u64)er32(TXSTMPH) << 32;
1191 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1193 /* Clear the global tx_hwtstamp_skb pointer and force writes
1194 * prior to notifying the stack of a Tx timestamp.
1196 adapter->tx_hwtstamp_skb = NULL;
1197 wmb(); /* force write prior to skb_tstamp_tx */
1199 skb_tstamp_tx(skb, &shhwtstamps);
1200 dev_kfree_skb_any(skb);
1201 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1202 + adapter->tx_timeout_factor * HZ)) {
1203 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1204 adapter->tx_hwtstamp_skb = NULL;
1205 adapter->tx_hwtstamp_timeouts++;
1206 e_warn("clearing Tx timestamp hang\n");
1208 /* reschedule to check later */
1209 schedule_work(&adapter->tx_hwtstamp_work);
1214 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1215 * @tx_ring: Tx descriptor ring
1217 * the return value indicates whether actual cleaning was done, there
1218 * is no guarantee that everything was cleaned
1220 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1222 struct e1000_adapter *adapter = tx_ring->adapter;
1223 struct net_device *netdev = adapter->netdev;
1224 struct e1000_hw *hw = &adapter->hw;
1225 struct e1000_tx_desc *tx_desc, *eop_desc;
1226 struct e1000_buffer *buffer_info;
1227 unsigned int i, eop;
1228 unsigned int count = 0;
1229 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1230 unsigned int bytes_compl = 0, pkts_compl = 0;
1232 i = tx_ring->next_to_clean;
1233 eop = tx_ring->buffer_info[i].next_to_watch;
1234 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1236 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1237 (count < tx_ring->count)) {
1238 bool cleaned = false;
1240 dma_rmb(); /* read buffer_info after eop_desc */
1241 for (; !cleaned; count++) {
1242 tx_desc = E1000_TX_DESC(*tx_ring, i);
1243 buffer_info = &tx_ring->buffer_info[i];
1244 cleaned = (i == eop);
1247 total_tx_packets += buffer_info->segs;
1248 total_tx_bytes += buffer_info->bytecount;
1249 if (buffer_info->skb) {
1250 bytes_compl += buffer_info->skb->len;
1255 e1000_put_txbuf(tx_ring, buffer_info);
1256 tx_desc->upper.data = 0;
1259 if (i == tx_ring->count)
1263 if (i == tx_ring->next_to_use)
1265 eop = tx_ring->buffer_info[i].next_to_watch;
1266 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1269 tx_ring->next_to_clean = i;
1271 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1273 #define TX_WAKE_THRESHOLD 32
1274 if (count && netif_carrier_ok(netdev) &&
1275 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1276 /* Make sure that anybody stopping the queue after this
1277 * sees the new next_to_clean.
1281 if (netif_queue_stopped(netdev) &&
1282 !(test_bit(__E1000_DOWN, &adapter->state))) {
1283 netif_wake_queue(netdev);
1284 ++adapter->restart_queue;
1288 if (adapter->detect_tx_hung) {
1289 /* Detect a transmit hang in hardware, this serializes the
1290 * check with the clearing of time_stamp and movement of i
1292 adapter->detect_tx_hung = false;
1293 if (tx_ring->buffer_info[i].time_stamp &&
1294 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1295 + (adapter->tx_timeout_factor * HZ)) &&
1296 !(er32(STATUS) & E1000_STATUS_TXOFF))
1297 schedule_work(&adapter->print_hang_task);
1299 adapter->tx_hang_recheck = false;
1301 adapter->total_tx_bytes += total_tx_bytes;
1302 adapter->total_tx_packets += total_tx_packets;
1303 return count < tx_ring->count;
1307 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1308 * @rx_ring: Rx descriptor ring
1310 * the return value indicates whether actual cleaning was done, there
1311 * is no guarantee that everything was cleaned
1313 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1316 struct e1000_adapter *adapter = rx_ring->adapter;
1317 struct e1000_hw *hw = &adapter->hw;
1318 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1319 struct net_device *netdev = adapter->netdev;
1320 struct pci_dev *pdev = adapter->pdev;
1321 struct e1000_buffer *buffer_info, *next_buffer;
1322 struct e1000_ps_page *ps_page;
1323 struct sk_buff *skb;
1325 u32 length, staterr;
1326 int cleaned_count = 0;
1327 bool cleaned = false;
1328 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1330 i = rx_ring->next_to_clean;
1331 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1332 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1333 buffer_info = &rx_ring->buffer_info[i];
1335 while (staterr & E1000_RXD_STAT_DD) {
1336 if (*work_done >= work_to_do)
1339 skb = buffer_info->skb;
1340 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1342 /* in the packet split case this is header only */
1343 prefetch(skb->data - NET_IP_ALIGN);
1346 if (i == rx_ring->count)
1348 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1351 next_buffer = &rx_ring->buffer_info[i];
1355 dma_unmap_single(&pdev->dev, buffer_info->dma,
1356 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1357 buffer_info->dma = 0;
1359 /* see !EOP comment in other Rx routine */
1360 if (!(staterr & E1000_RXD_STAT_EOP))
1361 adapter->flags2 |= FLAG2_IS_DISCARDING;
1363 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1364 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1365 dev_kfree_skb_irq(skb);
1366 if (staterr & E1000_RXD_STAT_EOP)
1367 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1371 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1372 !(netdev->features & NETIF_F_RXALL))) {
1373 dev_kfree_skb_irq(skb);
1377 length = le16_to_cpu(rx_desc->wb.middle.length0);
1380 e_dbg("Last part of the packet spanning multiple descriptors\n");
1381 dev_kfree_skb_irq(skb);
1386 skb_put(skb, length);
1389 /* this looks ugly, but it seems compiler issues make
1390 * it more efficient than reusing j
1392 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1394 /* page alloc/put takes too long and effects small
1395 * packet throughput, so unsplit small packets and
1396 * save the alloc/put only valid in softirq (napi)
1397 * context to call kmap_*
1399 if (l1 && (l1 <= copybreak) &&
1400 ((length + l1) <= adapter->rx_ps_bsize0)) {
1403 ps_page = &buffer_info->ps_pages[0];
1405 /* there is no documentation about how to call
1406 * kmap_atomic, so we can't hold the mapping
1409 dma_sync_single_for_cpu(&pdev->dev,
1413 vaddr = kmap_atomic(ps_page->page);
1414 memcpy(skb_tail_pointer(skb), vaddr, l1);
1415 kunmap_atomic(vaddr);
1416 dma_sync_single_for_device(&pdev->dev,
1421 /* remove the CRC */
1422 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1423 if (!(netdev->features & NETIF_F_RXFCS))
1432 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1433 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1437 ps_page = &buffer_info->ps_pages[j];
1438 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1441 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1442 ps_page->page = NULL;
1444 skb->data_len += length;
1445 skb->truesize += PAGE_SIZE;
1448 /* strip the ethernet crc, problem is we're using pages now so
1449 * this whole operation can get a little cpu intensive
1451 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1452 if (!(netdev->features & NETIF_F_RXFCS))
1453 pskb_trim(skb, skb->len - 4);
1457 total_rx_bytes += skb->len;
1460 e1000_rx_checksum(adapter, staterr, skb);
1462 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1464 if (rx_desc->wb.upper.header_status &
1465 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1466 adapter->rx_hdr_split++;
1468 e1000_receive_skb(adapter, netdev, skb, staterr,
1469 rx_desc->wb.middle.vlan);
1472 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1473 buffer_info->skb = NULL;
1475 /* return some buffers to hardware, one at a time is too slow */
1476 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1477 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1482 /* use prefetched values */
1484 buffer_info = next_buffer;
1486 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1488 rx_ring->next_to_clean = i;
1490 cleaned_count = e1000_desc_unused(rx_ring);
1492 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1494 adapter->total_rx_bytes += total_rx_bytes;
1495 adapter->total_rx_packets += total_rx_packets;
1500 * e1000_consume_page - helper function
1502 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1507 skb->data_len += length;
1508 skb->truesize += PAGE_SIZE;
1512 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1513 * @adapter: board private structure
1515 * the return value indicates whether actual cleaning was done, there
1516 * is no guarantee that everything was cleaned
1518 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1521 struct e1000_adapter *adapter = rx_ring->adapter;
1522 struct net_device *netdev = adapter->netdev;
1523 struct pci_dev *pdev = adapter->pdev;
1524 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1525 struct e1000_buffer *buffer_info, *next_buffer;
1526 u32 length, staterr;
1528 int cleaned_count = 0;
1529 bool cleaned = false;
1530 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1531 struct skb_shared_info *shinfo;
1533 i = rx_ring->next_to_clean;
1534 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1535 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1536 buffer_info = &rx_ring->buffer_info[i];
1538 while (staterr & E1000_RXD_STAT_DD) {
1539 struct sk_buff *skb;
1541 if (*work_done >= work_to_do)
1544 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1546 skb = buffer_info->skb;
1547 buffer_info->skb = NULL;
1550 if (i == rx_ring->count)
1552 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1555 next_buffer = &rx_ring->buffer_info[i];
1559 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1561 buffer_info->dma = 0;
1563 length = le16_to_cpu(rx_desc->wb.upper.length);
1565 /* errors is only valid for DD + EOP descriptors */
1566 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1567 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1568 !(netdev->features & NETIF_F_RXALL)))) {
1569 /* recycle both page and skb */
1570 buffer_info->skb = skb;
1571 /* an error means any chain goes out the window too */
1572 if (rx_ring->rx_skb_top)
1573 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1574 rx_ring->rx_skb_top = NULL;
1577 #define rxtop (rx_ring->rx_skb_top)
1578 if (!(staterr & E1000_RXD_STAT_EOP)) {
1579 /* this descriptor is only the beginning (or middle) */
1581 /* this is the beginning of a chain */
1583 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1586 /* this is the middle of a chain */
1587 shinfo = skb_shinfo(rxtop);
1588 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589 buffer_info->page, 0,
1591 /* re-use the skb, only consumed the page */
1592 buffer_info->skb = skb;
1594 e1000_consume_page(buffer_info, rxtop, length);
1598 /* end of the chain */
1599 shinfo = skb_shinfo(rxtop);
1600 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1601 buffer_info->page, 0,
1603 /* re-use the current skb, we only consumed the
1606 buffer_info->skb = skb;
1609 e1000_consume_page(buffer_info, skb, length);
1611 /* no chain, got EOP, this buf is the packet
1612 * copybreak to save the put_page/alloc_page
1614 if (length <= copybreak &&
1615 skb_tailroom(skb) >= length) {
1617 vaddr = kmap_atomic(buffer_info->page);
1618 memcpy(skb_tail_pointer(skb), vaddr,
1620 kunmap_atomic(vaddr);
1621 /* re-use the page, so don't erase
1624 skb_put(skb, length);
1626 skb_fill_page_desc(skb, 0,
1627 buffer_info->page, 0,
1629 e1000_consume_page(buffer_info, skb,
1635 /* Receive Checksum Offload */
1636 e1000_rx_checksum(adapter, staterr, skb);
1638 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1640 /* probably a little skewed due to removing CRC */
1641 total_rx_bytes += skb->len;
1644 /* eth type trans needs skb->data to point to something */
1645 if (!pskb_may_pull(skb, ETH_HLEN)) {
1646 e_err("pskb_may_pull failed.\n");
1647 dev_kfree_skb_irq(skb);
1651 e1000_receive_skb(adapter, netdev, skb, staterr,
1652 rx_desc->wb.upper.vlan);
1655 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1657 /* return some buffers to hardware, one at a time is too slow */
1658 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1659 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1664 /* use prefetched values */
1666 buffer_info = next_buffer;
1668 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1670 rx_ring->next_to_clean = i;
1672 cleaned_count = e1000_desc_unused(rx_ring);
1674 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1676 adapter->total_rx_bytes += total_rx_bytes;
1677 adapter->total_rx_packets += total_rx_packets;
1682 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1683 * @rx_ring: Rx descriptor ring
1685 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1687 struct e1000_adapter *adapter = rx_ring->adapter;
1688 struct e1000_buffer *buffer_info;
1689 struct e1000_ps_page *ps_page;
1690 struct pci_dev *pdev = adapter->pdev;
1693 /* Free all the Rx ring sk_buffs */
1694 for (i = 0; i < rx_ring->count; i++) {
1695 buffer_info = &rx_ring->buffer_info[i];
1696 if (buffer_info->dma) {
1697 if (adapter->clean_rx == e1000_clean_rx_irq)
1698 dma_unmap_single(&pdev->dev, buffer_info->dma,
1699 adapter->rx_buffer_len,
1701 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1702 dma_unmap_page(&pdev->dev, buffer_info->dma,
1703 PAGE_SIZE, DMA_FROM_DEVICE);
1704 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1705 dma_unmap_single(&pdev->dev, buffer_info->dma,
1706 adapter->rx_ps_bsize0,
1708 buffer_info->dma = 0;
1711 if (buffer_info->page) {
1712 put_page(buffer_info->page);
1713 buffer_info->page = NULL;
1716 if (buffer_info->skb) {
1717 dev_kfree_skb(buffer_info->skb);
1718 buffer_info->skb = NULL;
1721 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1722 ps_page = &buffer_info->ps_pages[j];
1725 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1728 put_page(ps_page->page);
1729 ps_page->page = NULL;
1733 /* there also may be some cached data from a chained receive */
1734 if (rx_ring->rx_skb_top) {
1735 dev_kfree_skb(rx_ring->rx_skb_top);
1736 rx_ring->rx_skb_top = NULL;
1739 /* Zero out the descriptor ring */
1740 memset(rx_ring->desc, 0, rx_ring->size);
1742 rx_ring->next_to_clean = 0;
1743 rx_ring->next_to_use = 0;
1744 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1747 static void e1000e_downshift_workaround(struct work_struct *work)
1749 struct e1000_adapter *adapter = container_of(work,
1750 struct e1000_adapter,
1753 if (test_bit(__E1000_DOWN, &adapter->state))
1756 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1760 * e1000_intr_msi - Interrupt Handler
1761 * @irq: interrupt number
1762 * @data: pointer to a network interface device structure
1764 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1766 struct net_device *netdev = data;
1767 struct e1000_adapter *adapter = netdev_priv(netdev);
1768 struct e1000_hw *hw = &adapter->hw;
1769 u32 icr = er32(ICR);
1771 /* read ICR disables interrupts using IAM */
1772 if (icr & E1000_ICR_LSC) {
1773 hw->mac.get_link_status = true;
1774 /* ICH8 workaround-- Call gig speed drop workaround on cable
1775 * disconnect (LSC) before accessing any PHY registers
1777 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1778 (!(er32(STATUS) & E1000_STATUS_LU)))
1779 schedule_work(&adapter->downshift_task);
1781 /* 80003ES2LAN workaround-- For packet buffer work-around on
1782 * link down event; disable receives here in the ISR and reset
1783 * adapter in watchdog
1785 if (netif_carrier_ok(netdev) &&
1786 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1787 /* disable receives */
1788 u32 rctl = er32(RCTL);
1790 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1791 adapter->flags |= FLAG_RESTART_NOW;
1793 /* guard against interrupt when we're going down */
1794 if (!test_bit(__E1000_DOWN, &adapter->state))
1795 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1798 /* Reset on uncorrectable ECC error */
1799 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1800 u32 pbeccsts = er32(PBECCSTS);
1802 adapter->corr_errors +=
1803 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1804 adapter->uncorr_errors +=
1805 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1806 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1808 /* Do the reset outside of interrupt context */
1809 schedule_work(&adapter->reset_task);
1811 /* return immediately since reset is imminent */
1815 if (napi_schedule_prep(&adapter->napi)) {
1816 adapter->total_tx_bytes = 0;
1817 adapter->total_tx_packets = 0;
1818 adapter->total_rx_bytes = 0;
1819 adapter->total_rx_packets = 0;
1820 __napi_schedule(&adapter->napi);
1827 * e1000_intr - Interrupt Handler
1828 * @irq: interrupt number
1829 * @data: pointer to a network interface device structure
1831 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1833 struct net_device *netdev = data;
1834 struct e1000_adapter *adapter = netdev_priv(netdev);
1835 struct e1000_hw *hw = &adapter->hw;
1836 u32 rctl, icr = er32(ICR);
1838 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1839 return IRQ_NONE; /* Not our interrupt */
1841 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1842 * not set, then the adapter didn't send an interrupt
1844 if (!(icr & E1000_ICR_INT_ASSERTED))
1847 /* Interrupt Auto-Mask...upon reading ICR,
1848 * interrupts are masked. No need for the
1852 if (icr & E1000_ICR_LSC) {
1853 hw->mac.get_link_status = true;
1854 /* ICH8 workaround-- Call gig speed drop workaround on cable
1855 * disconnect (LSC) before accessing any PHY registers
1857 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1858 (!(er32(STATUS) & E1000_STATUS_LU)))
1859 schedule_work(&adapter->downshift_task);
1861 /* 80003ES2LAN workaround--
1862 * For packet buffer work-around on link down event;
1863 * disable receives here in the ISR and
1864 * reset adapter in watchdog
1866 if (netif_carrier_ok(netdev) &&
1867 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1868 /* disable receives */
1870 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1871 adapter->flags |= FLAG_RESTART_NOW;
1873 /* guard against interrupt when we're going down */
1874 if (!test_bit(__E1000_DOWN, &adapter->state))
1875 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1878 /* Reset on uncorrectable ECC error */
1879 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1880 u32 pbeccsts = er32(PBECCSTS);
1882 adapter->corr_errors +=
1883 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1884 adapter->uncorr_errors +=
1885 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1886 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1888 /* Do the reset outside of interrupt context */
1889 schedule_work(&adapter->reset_task);
1891 /* return immediately since reset is imminent */
1895 if (napi_schedule_prep(&adapter->napi)) {
1896 adapter->total_tx_bytes = 0;
1897 adapter->total_tx_packets = 0;
1898 adapter->total_rx_bytes = 0;
1899 adapter->total_rx_packets = 0;
1900 __napi_schedule(&adapter->napi);
1906 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1908 struct net_device *netdev = data;
1909 struct e1000_adapter *adapter = netdev_priv(netdev);
1910 struct e1000_hw *hw = &adapter->hw;
1911 u32 icr = er32(ICR);
1913 if (icr & adapter->eiac_mask)
1914 ew32(ICS, (icr & adapter->eiac_mask));
1916 if (icr & E1000_ICR_LSC) {
1917 hw->mac.get_link_status = true;
1918 /* guard against interrupt when we're going down */
1919 if (!test_bit(__E1000_DOWN, &adapter->state))
1920 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1923 if (!test_bit(__E1000_DOWN, &adapter->state))
1924 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1929 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1931 struct net_device *netdev = data;
1932 struct e1000_adapter *adapter = netdev_priv(netdev);
1933 struct e1000_hw *hw = &adapter->hw;
1934 struct e1000_ring *tx_ring = adapter->tx_ring;
1936 adapter->total_tx_bytes = 0;
1937 adapter->total_tx_packets = 0;
1939 if (!e1000_clean_tx_irq(tx_ring))
1940 /* Ring was not completely cleaned, so fire another interrupt */
1941 ew32(ICS, tx_ring->ims_val);
1943 if (!test_bit(__E1000_DOWN, &adapter->state))
1944 ew32(IMS, adapter->tx_ring->ims_val);
1949 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1951 struct net_device *netdev = data;
1952 struct e1000_adapter *adapter = netdev_priv(netdev);
1953 struct e1000_ring *rx_ring = adapter->rx_ring;
1955 /* Write the ITR value calculated at the end of the
1956 * previous interrupt.
1958 if (rx_ring->set_itr) {
1959 u32 itr = rx_ring->itr_val ?
1960 1000000000 / (rx_ring->itr_val * 256) : 0;
1962 writel(itr, rx_ring->itr_register);
1963 rx_ring->set_itr = 0;
1966 if (napi_schedule_prep(&adapter->napi)) {
1967 adapter->total_rx_bytes = 0;
1968 adapter->total_rx_packets = 0;
1969 __napi_schedule(&adapter->napi);
1975 * e1000_configure_msix - Configure MSI-X hardware
1977 * e1000_configure_msix sets up the hardware to properly
1978 * generate MSI-X interrupts.
1980 static void e1000_configure_msix(struct e1000_adapter *adapter)
1982 struct e1000_hw *hw = &adapter->hw;
1983 struct e1000_ring *rx_ring = adapter->rx_ring;
1984 struct e1000_ring *tx_ring = adapter->tx_ring;
1986 u32 ctrl_ext, ivar = 0;
1988 adapter->eiac_mask = 0;
1990 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1991 if (hw->mac.type == e1000_82574) {
1992 u32 rfctl = er32(RFCTL);
1994 rfctl |= E1000_RFCTL_ACK_DIS;
1998 /* Configure Rx vector */
1999 rx_ring->ims_val = E1000_IMS_RXQ0;
2000 adapter->eiac_mask |= rx_ring->ims_val;
2001 if (rx_ring->itr_val)
2002 writel(1000000000 / (rx_ring->itr_val * 256),
2003 rx_ring->itr_register);
2005 writel(1, rx_ring->itr_register);
2006 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2008 /* Configure Tx vector */
2009 tx_ring->ims_val = E1000_IMS_TXQ0;
2011 if (tx_ring->itr_val)
2012 writel(1000000000 / (tx_ring->itr_val * 256),
2013 tx_ring->itr_register);
2015 writel(1, tx_ring->itr_register);
2016 adapter->eiac_mask |= tx_ring->ims_val;
2017 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2019 /* set vector for Other Causes, e.g. link changes */
2021 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2022 if (rx_ring->itr_val)
2023 writel(1000000000 / (rx_ring->itr_val * 256),
2024 hw->hw_addr + E1000_EITR_82574(vector));
2026 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2028 /* Cause Tx interrupts on every write back */
2033 /* enable MSI-X PBA support */
2034 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2035 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2036 ew32(CTRL_EXT, ctrl_ext);
2040 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2042 if (adapter->msix_entries) {
2043 pci_disable_msix(adapter->pdev);
2044 kfree(adapter->msix_entries);
2045 adapter->msix_entries = NULL;
2046 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2047 pci_disable_msi(adapter->pdev);
2048 adapter->flags &= ~FLAG_MSI_ENABLED;
2053 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2055 * Attempt to configure interrupts using the best available
2056 * capabilities of the hardware and kernel.
2058 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2063 switch (adapter->int_mode) {
2064 case E1000E_INT_MODE_MSIX:
2065 if (adapter->flags & FLAG_HAS_MSIX) {
2066 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2067 adapter->msix_entries = kcalloc(adapter->num_vectors,
2071 if (adapter->msix_entries) {
2072 struct e1000_adapter *a = adapter;
2074 for (i = 0; i < adapter->num_vectors; i++)
2075 adapter->msix_entries[i].entry = i;
2077 err = pci_enable_msix_range(a->pdev,
2084 /* MSI-X failed, so fall through and try MSI */
2085 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2086 e1000e_reset_interrupt_capability(adapter);
2088 adapter->int_mode = E1000E_INT_MODE_MSI;
2090 case E1000E_INT_MODE_MSI:
2091 if (!pci_enable_msi(adapter->pdev)) {
2092 adapter->flags |= FLAG_MSI_ENABLED;
2094 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2095 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2098 case E1000E_INT_MODE_LEGACY:
2099 /* Don't do anything; this is the system default */
2103 /* store the number of vectors being used */
2104 adapter->num_vectors = 1;
2108 * e1000_request_msix - Initialize MSI-X interrupts
2110 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2113 static int e1000_request_msix(struct e1000_adapter *adapter)
2115 struct net_device *netdev = adapter->netdev;
2116 int err = 0, vector = 0;
2118 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2119 snprintf(adapter->rx_ring->name,
2120 sizeof(adapter->rx_ring->name) - 1,
2121 "%.14s-rx-0", netdev->name);
2123 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2124 err = request_irq(adapter->msix_entries[vector].vector,
2125 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2129 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2130 E1000_EITR_82574(vector);
2131 adapter->rx_ring->itr_val = adapter->itr;
2134 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2135 snprintf(adapter->tx_ring->name,
2136 sizeof(adapter->tx_ring->name) - 1,
2137 "%.14s-tx-0", netdev->name);
2139 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2140 err = request_irq(adapter->msix_entries[vector].vector,
2141 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2145 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2146 E1000_EITR_82574(vector);
2147 adapter->tx_ring->itr_val = adapter->itr;
2150 err = request_irq(adapter->msix_entries[vector].vector,
2151 e1000_msix_other, 0, netdev->name, netdev);
2155 e1000_configure_msix(adapter);
2161 * e1000_request_irq - initialize interrupts
2163 * Attempts to configure interrupts using the best available
2164 * capabilities of the hardware and kernel.
2166 static int e1000_request_irq(struct e1000_adapter *adapter)
2168 struct net_device *netdev = adapter->netdev;
2171 if (adapter->msix_entries) {
2172 err = e1000_request_msix(adapter);
2175 /* fall back to MSI */
2176 e1000e_reset_interrupt_capability(adapter);
2177 adapter->int_mode = E1000E_INT_MODE_MSI;
2178 e1000e_set_interrupt_capability(adapter);
2180 if (adapter->flags & FLAG_MSI_ENABLED) {
2181 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2182 netdev->name, netdev);
2186 /* fall back to legacy interrupt */
2187 e1000e_reset_interrupt_capability(adapter);
2188 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2191 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2192 netdev->name, netdev);
2194 e_err("Unable to allocate interrupt, Error: %d\n", err);
2199 static void e1000_free_irq(struct e1000_adapter *adapter)
2201 struct net_device *netdev = adapter->netdev;
2203 if (adapter->msix_entries) {
2206 free_irq(adapter->msix_entries[vector].vector, netdev);
2209 free_irq(adapter->msix_entries[vector].vector, netdev);
2212 /* Other Causes interrupt vector */
2213 free_irq(adapter->msix_entries[vector].vector, netdev);
2217 free_irq(adapter->pdev->irq, netdev);
2221 * e1000_irq_disable - Mask off interrupt generation on the NIC
2223 static void e1000_irq_disable(struct e1000_adapter *adapter)
2225 struct e1000_hw *hw = &adapter->hw;
2228 if (adapter->msix_entries)
2229 ew32(EIAC_82574, 0);
2232 if (adapter->msix_entries) {
2235 for (i = 0; i < adapter->num_vectors; i++)
2236 synchronize_irq(adapter->msix_entries[i].vector);
2238 synchronize_irq(adapter->pdev->irq);
2243 * e1000_irq_enable - Enable default interrupt generation settings
2245 static void e1000_irq_enable(struct e1000_adapter *adapter)
2247 struct e1000_hw *hw = &adapter->hw;
2249 if (adapter->msix_entries) {
2250 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2251 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2253 } else if (hw->mac.type >= e1000_pch_lpt) {
2254 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2256 ew32(IMS, IMS_ENABLE_MASK);
2262 * e1000e_get_hw_control - get control of the h/w from f/w
2263 * @adapter: address of board private structure
2265 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2266 * For ASF and Pass Through versions of f/w this means that
2267 * the driver is loaded. For AMT version (only with 82573)
2268 * of the f/w this means that the network i/f is open.
2270 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2272 struct e1000_hw *hw = &adapter->hw;
2276 /* Let firmware know the driver has taken over */
2277 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2279 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2280 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2281 ctrl_ext = er32(CTRL_EXT);
2282 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2287 * e1000e_release_hw_control - release control of the h/w to f/w
2288 * @adapter: address of board private structure
2290 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2291 * For ASF and Pass Through versions of f/w this means that the
2292 * driver is no longer loaded. For AMT version (only with 82573) i
2293 * of the f/w this means that the network i/f is closed.
2296 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2298 struct e1000_hw *hw = &adapter->hw;
2302 /* Let firmware taken over control of h/w */
2303 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2305 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2306 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2307 ctrl_ext = er32(CTRL_EXT);
2308 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2313 * e1000_alloc_ring_dma - allocate memory for a ring structure
2315 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2316 struct e1000_ring *ring)
2318 struct pci_dev *pdev = adapter->pdev;
2320 ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2329 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2330 * @tx_ring: Tx descriptor ring
2332 * Return 0 on success, negative on failure
2334 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2336 struct e1000_adapter *adapter = tx_ring->adapter;
2337 int err = -ENOMEM, size;
2339 size = sizeof(struct e1000_buffer) * tx_ring->count;
2340 tx_ring->buffer_info = vzalloc(size);
2341 if (!tx_ring->buffer_info)
2344 /* round up to nearest 4K */
2345 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2346 tx_ring->size = ALIGN(tx_ring->size, 4096);
2348 err = e1000_alloc_ring_dma(adapter, tx_ring);
2352 tx_ring->next_to_use = 0;
2353 tx_ring->next_to_clean = 0;
2357 vfree(tx_ring->buffer_info);
2358 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2363 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2364 * @rx_ring: Rx descriptor ring
2366 * Returns 0 on success, negative on failure
2368 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2370 struct e1000_adapter *adapter = rx_ring->adapter;
2371 struct e1000_buffer *buffer_info;
2372 int i, size, desc_len, err = -ENOMEM;
2374 size = sizeof(struct e1000_buffer) * rx_ring->count;
2375 rx_ring->buffer_info = vzalloc(size);
2376 if (!rx_ring->buffer_info)
2379 for (i = 0; i < rx_ring->count; i++) {
2380 buffer_info = &rx_ring->buffer_info[i];
2381 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2382 sizeof(struct e1000_ps_page),
2384 if (!buffer_info->ps_pages)
2388 desc_len = sizeof(union e1000_rx_desc_packet_split);
2390 /* Round up to nearest 4K */
2391 rx_ring->size = rx_ring->count * desc_len;
2392 rx_ring->size = ALIGN(rx_ring->size, 4096);
2394 err = e1000_alloc_ring_dma(adapter, rx_ring);
2398 rx_ring->next_to_clean = 0;
2399 rx_ring->next_to_use = 0;
2400 rx_ring->rx_skb_top = NULL;
2405 for (i = 0; i < rx_ring->count; i++) {
2406 buffer_info = &rx_ring->buffer_info[i];
2407 kfree(buffer_info->ps_pages);
2410 vfree(rx_ring->buffer_info);
2411 e_err("Unable to allocate memory for the receive descriptor ring\n");
2416 * e1000_clean_tx_ring - Free Tx Buffers
2417 * @tx_ring: Tx descriptor ring
2419 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2421 struct e1000_adapter *adapter = tx_ring->adapter;
2422 struct e1000_buffer *buffer_info;
2426 for (i = 0; i < tx_ring->count; i++) {
2427 buffer_info = &tx_ring->buffer_info[i];
2428 e1000_put_txbuf(tx_ring, buffer_info);
2431 netdev_reset_queue(adapter->netdev);
2432 size = sizeof(struct e1000_buffer) * tx_ring->count;
2433 memset(tx_ring->buffer_info, 0, size);
2435 memset(tx_ring->desc, 0, tx_ring->size);
2437 tx_ring->next_to_use = 0;
2438 tx_ring->next_to_clean = 0;
2442 * e1000e_free_tx_resources - Free Tx Resources per Queue
2443 * @tx_ring: Tx descriptor ring
2445 * Free all transmit software resources
2447 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2449 struct e1000_adapter *adapter = tx_ring->adapter;
2450 struct pci_dev *pdev = adapter->pdev;
2452 e1000_clean_tx_ring(tx_ring);
2454 vfree(tx_ring->buffer_info);
2455 tx_ring->buffer_info = NULL;
2457 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2459 tx_ring->desc = NULL;
2463 * e1000e_free_rx_resources - Free Rx Resources
2464 * @rx_ring: Rx descriptor ring
2466 * Free all receive software resources
2468 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2470 struct e1000_adapter *adapter = rx_ring->adapter;
2471 struct pci_dev *pdev = adapter->pdev;
2474 e1000_clean_rx_ring(rx_ring);
2476 for (i = 0; i < rx_ring->count; i++)
2477 kfree(rx_ring->buffer_info[i].ps_pages);
2479 vfree(rx_ring->buffer_info);
2480 rx_ring->buffer_info = NULL;
2482 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2484 rx_ring->desc = NULL;
2488 * e1000_update_itr - update the dynamic ITR value based on statistics
2489 * @adapter: pointer to adapter
2490 * @itr_setting: current adapter->itr
2491 * @packets: the number of packets during this measurement interval
2492 * @bytes: the number of bytes during this measurement interval
2494 * Stores a new ITR value based on packets and byte
2495 * counts during the last interrupt. The advantage of per interrupt
2496 * computation is faster updates and more accurate ITR for the current
2497 * traffic pattern. Constants in this function were computed
2498 * based on theoretical maximum wire speed and thresholds were set based
2499 * on testing data as well as attempting to minimize response time
2500 * while increasing bulk throughput. This functionality is controlled
2501 * by the InterruptThrottleRate module parameter.
2503 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2505 unsigned int retval = itr_setting;
2510 switch (itr_setting) {
2511 case lowest_latency:
2512 /* handle TSO and jumbo frames */
2513 if (bytes / packets > 8000)
2514 retval = bulk_latency;
2515 else if ((packets < 5) && (bytes > 512))
2516 retval = low_latency;
2518 case low_latency: /* 50 usec aka 20000 ints/s */
2519 if (bytes > 10000) {
2520 /* this if handles the TSO accounting */
2521 if (bytes / packets > 8000)
2522 retval = bulk_latency;
2523 else if ((packets < 10) || ((bytes / packets) > 1200))
2524 retval = bulk_latency;
2525 else if ((packets > 35))
2526 retval = lowest_latency;
2527 } else if (bytes / packets > 2000) {
2528 retval = bulk_latency;
2529 } else if (packets <= 2 && bytes < 512) {
2530 retval = lowest_latency;
2533 case bulk_latency: /* 250 usec aka 4000 ints/s */
2534 if (bytes > 25000) {
2536 retval = low_latency;
2537 } else if (bytes < 6000) {
2538 retval = low_latency;
2546 static void e1000_set_itr(struct e1000_adapter *adapter)
2549 u32 new_itr = adapter->itr;
2551 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2552 if (adapter->link_speed != SPEED_1000) {
2558 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2563 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2564 adapter->total_tx_packets,
2565 adapter->total_tx_bytes);
2566 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2567 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2568 adapter->tx_itr = low_latency;
2570 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2571 adapter->total_rx_packets,
2572 adapter->total_rx_bytes);
2573 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2574 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2575 adapter->rx_itr = low_latency;
2577 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2579 /* counts and packets in update_itr are dependent on these numbers */
2580 switch (current_itr) {
2581 case lowest_latency:
2585 new_itr = 20000; /* aka hwitr = ~200 */
2595 if (new_itr != adapter->itr) {
2596 /* this attempts to bias the interrupt rate towards Bulk
2597 * by adding intermediate steps when interrupt rate is
2600 new_itr = new_itr > adapter->itr ?
2601 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2602 adapter->itr = new_itr;
2603 adapter->rx_ring->itr_val = new_itr;
2604 if (adapter->msix_entries)
2605 adapter->rx_ring->set_itr = 1;
2607 e1000e_write_itr(adapter, new_itr);
2612 * e1000e_write_itr - write the ITR value to the appropriate registers
2613 * @adapter: address of board private structure
2614 * @itr: new ITR value to program
2616 * e1000e_write_itr determines if the adapter is in MSI-X mode
2617 * and, if so, writes the EITR registers with the ITR value.
2618 * Otherwise, it writes the ITR value into the ITR register.
2620 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2622 struct e1000_hw *hw = &adapter->hw;
2623 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2625 if (adapter->msix_entries) {
2628 for (vector = 0; vector < adapter->num_vectors; vector++)
2629 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2636 * e1000_alloc_queues - Allocate memory for all rings
2637 * @adapter: board private structure to initialize
2639 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2641 int size = sizeof(struct e1000_ring);
2643 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2644 if (!adapter->tx_ring)
2646 adapter->tx_ring->count = adapter->tx_ring_count;
2647 adapter->tx_ring->adapter = adapter;
2649 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2650 if (!adapter->rx_ring)
2652 adapter->rx_ring->count = adapter->rx_ring_count;
2653 adapter->rx_ring->adapter = adapter;
2657 e_err("Unable to allocate memory for queues\n");
2658 kfree(adapter->rx_ring);
2659 kfree(adapter->tx_ring);
2664 * e1000e_poll - NAPI Rx polling callback
2665 * @napi: struct associated with this polling callback
2666 * @weight: number of packets driver is allowed to process this poll
2668 static int e1000e_poll(struct napi_struct *napi, int weight)
2670 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2672 struct e1000_hw *hw = &adapter->hw;
2673 struct net_device *poll_dev = adapter->netdev;
2674 int tx_cleaned = 1, work_done = 0;
2676 adapter = netdev_priv(poll_dev);
2678 if (!adapter->msix_entries ||
2679 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2680 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2682 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2687 /* If weight not fully consumed, exit the polling mode */
2688 if (work_done < weight) {
2689 if (adapter->itr_setting & 3)
2690 e1000_set_itr(adapter);
2691 napi_complete_done(napi, work_done);
2692 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2693 if (adapter->msix_entries)
2694 ew32(IMS, adapter->rx_ring->ims_val);
2696 e1000_irq_enable(adapter);
2703 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2704 __always_unused __be16 proto, u16 vid)
2706 struct e1000_adapter *adapter = netdev_priv(netdev);
2707 struct e1000_hw *hw = &adapter->hw;
2710 /* don't update vlan cookie if already programmed */
2711 if ((adapter->hw.mng_cookie.status &
2712 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2713 (vid == adapter->mng_vlan_id))
2716 /* add VID to filter table */
2717 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2718 index = (vid >> 5) & 0x7F;
2719 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2720 vfta |= BIT((vid & 0x1F));
2721 hw->mac.ops.write_vfta(hw, index, vfta);
2724 set_bit(vid, adapter->active_vlans);
2729 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2730 __always_unused __be16 proto, u16 vid)
2732 struct e1000_adapter *adapter = netdev_priv(netdev);
2733 struct e1000_hw *hw = &adapter->hw;
2736 if ((adapter->hw.mng_cookie.status &
2737 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2738 (vid == adapter->mng_vlan_id)) {
2739 /* release control to f/w */
2740 e1000e_release_hw_control(adapter);
2744 /* remove VID from filter table */
2745 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2746 index = (vid >> 5) & 0x7F;
2747 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2748 vfta &= ~BIT((vid & 0x1F));
2749 hw->mac.ops.write_vfta(hw, index, vfta);
2752 clear_bit(vid, adapter->active_vlans);
2758 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2759 * @adapter: board private structure to initialize
2761 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2763 struct net_device *netdev = adapter->netdev;
2764 struct e1000_hw *hw = &adapter->hw;
2767 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2768 /* disable VLAN receive filtering */
2770 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2773 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2774 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2775 adapter->mng_vlan_id);
2776 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2782 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2783 * @adapter: board private structure to initialize
2785 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2787 struct e1000_hw *hw = &adapter->hw;
2790 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2791 /* enable VLAN receive filtering */
2793 rctl |= E1000_RCTL_VFE;
2794 rctl &= ~E1000_RCTL_CFIEN;
2800 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2801 * @adapter: board private structure to initialize
2803 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2805 struct e1000_hw *hw = &adapter->hw;
2808 /* disable VLAN tag insert/strip */
2810 ctrl &= ~E1000_CTRL_VME;
2815 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2816 * @adapter: board private structure to initialize
2818 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2820 struct e1000_hw *hw = &adapter->hw;
2823 /* enable VLAN tag insert/strip */
2825 ctrl |= E1000_CTRL_VME;
2829 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2831 struct net_device *netdev = adapter->netdev;
2832 u16 vid = adapter->hw.mng_cookie.vlan_id;
2833 u16 old_vid = adapter->mng_vlan_id;
2835 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2836 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2837 adapter->mng_vlan_id = vid;
2840 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2841 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2844 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2848 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2850 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2851 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2854 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2856 struct e1000_hw *hw = &adapter->hw;
2857 u32 manc, manc2h, mdef, i, j;
2859 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2864 /* enable receiving management packets to the host. this will probably
2865 * generate destination unreachable messages from the host OS, but
2866 * the packets will be handled on SMBUS
2868 manc |= E1000_MANC_EN_MNG2HOST;
2869 manc2h = er32(MANC2H);
2871 switch (hw->mac.type) {
2873 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2877 /* Check if IPMI pass-through decision filter already exists;
2880 for (i = 0, j = 0; i < 8; i++) {
2881 mdef = er32(MDEF(i));
2883 /* Ignore filters with anything other than IPMI ports */
2884 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887 /* Enable this decision filter in MANC2H */
2894 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2897 /* Create new decision filter in an empty filter */
2898 for (i = 0, j = 0; i < 8; i++)
2899 if (er32(MDEF(i)) == 0) {
2900 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2901 E1000_MDEF_PORT_664));
2908 e_warn("Unable to create IPMI pass-through filter\n");
2912 ew32(MANC2H, manc2h);
2917 * e1000_configure_tx - Configure Transmit Unit after Reset
2918 * @adapter: board private structure
2920 * Configure the Tx unit of the MAC after a reset.
2922 static void e1000_configure_tx(struct e1000_adapter *adapter)
2924 struct e1000_hw *hw = &adapter->hw;
2925 struct e1000_ring *tx_ring = adapter->tx_ring;
2927 u32 tdlen, tctl, tarc;
2929 /* Setup the HW Tx Head and Tail descriptor pointers */
2930 tdba = tx_ring->dma;
2931 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2932 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2933 ew32(TDBAH(0), (tdba >> 32));
2934 ew32(TDLEN(0), tdlen);
2937 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2938 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2940 writel(0, tx_ring->head);
2941 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2942 e1000e_update_tdt_wa(tx_ring, 0);
2944 writel(0, tx_ring->tail);
2946 /* Set the Tx Interrupt Delay register */
2947 ew32(TIDV, adapter->tx_int_delay);
2948 /* Tx irq moderation */
2949 ew32(TADV, adapter->tx_abs_int_delay);
2951 if (adapter->flags2 & FLAG2_DMA_BURST) {
2952 u32 txdctl = er32(TXDCTL(0));
2954 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2955 E1000_TXDCTL_WTHRESH);
2956 /* set up some performance related parameters to encourage the
2957 * hardware to use the bus more efficiently in bursts, depends
2958 * on the tx_int_delay to be enabled,
2959 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2960 * hthresh = 1 ==> prefetch when one or more available
2961 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2962 * BEWARE: this seems to work but should be considered first if
2963 * there are Tx hangs or other Tx related bugs
2965 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2966 ew32(TXDCTL(0), txdctl);
2968 /* erratum work around: set txdctl the same for both queues */
2969 ew32(TXDCTL(1), er32(TXDCTL(0)));
2971 /* Program the Transmit Control Register */
2973 tctl &= ~E1000_TCTL_CT;
2974 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2975 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2977 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2978 tarc = er32(TARC(0));
2979 /* set the speed mode bit, we'll clear it if we're not at
2980 * gigabit link later
2982 #define SPEED_MODE_BIT BIT(21)
2983 tarc |= SPEED_MODE_BIT;
2984 ew32(TARC(0), tarc);
2987 /* errata: program both queues to unweighted RR */
2988 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2989 tarc = er32(TARC(0));
2991 ew32(TARC(0), tarc);
2992 tarc = er32(TARC(1));
2994 ew32(TARC(1), tarc);
2997 /* Setup Transmit Descriptor Settings for eop descriptor */
2998 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3000 /* only set IDE if we are delaying interrupts using the timers */
3001 if (adapter->tx_int_delay)
3002 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3004 /* enable Report Status bit */
3005 adapter->txd_cmd |= E1000_TXD_CMD_RS;
3009 hw->mac.ops.config_collision_dist(hw);
3011 /* SPT and KBL Si errata workaround to avoid data corruption */
3012 if (hw->mac.type == e1000_pch_spt) {
3015 reg_val = er32(IOSFPC);
3016 reg_val |= E1000_RCTL_RDMTS_HEX;
3017 ew32(IOSFPC, reg_val);
3019 reg_val = er32(TARC(0));
3020 /* SPT and KBL Si errata workaround to avoid Tx hang.
3021 * Dropping the number of outstanding requests from
3022 * 3 to 2 in order to avoid a buffer overrun.
3024 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3025 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3026 ew32(TARC(0), reg_val);
3031 * e1000_setup_rctl - configure the receive control registers
3032 * @adapter: Board private structure
3034 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3035 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3036 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3038 struct e1000_hw *hw = &adapter->hw;
3042 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3043 * If jumbo frames not set, program related MAC/PHY registers
3046 if (hw->mac.type >= e1000_pch2lan) {
3049 if (adapter->netdev->mtu > ETH_DATA_LEN)
3050 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3052 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3055 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3058 /* Program MC offset vector base */
3060 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3061 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3062 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3063 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3065 /* Do not Store bad packets */
3066 rctl &= ~E1000_RCTL_SBP;
3068 /* Enable Long Packet receive */
3069 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3070 rctl &= ~E1000_RCTL_LPE;
3072 rctl |= E1000_RCTL_LPE;
3074 /* Some systems expect that the CRC is included in SMBUS traffic. The
3075 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3076 * host memory when this is enabled
3078 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3079 rctl |= E1000_RCTL_SECRC;
3081 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3082 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3085 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3088 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3090 e1e_rphy(hw, 22, &phy_data);
3092 phy_data |= BIT(14);
3093 e1e_wphy(hw, 0x10, 0x2823);
3094 e1e_wphy(hw, 0x11, 0x0003);
3095 e1e_wphy(hw, 22, phy_data);
3098 /* Setup buffer sizes */
3099 rctl &= ~E1000_RCTL_SZ_4096;
3100 rctl |= E1000_RCTL_BSEX;
3101 switch (adapter->rx_buffer_len) {
3104 rctl |= E1000_RCTL_SZ_2048;
3105 rctl &= ~E1000_RCTL_BSEX;
3108 rctl |= E1000_RCTL_SZ_4096;
3111 rctl |= E1000_RCTL_SZ_8192;
3114 rctl |= E1000_RCTL_SZ_16384;
3118 /* Enable Extended Status in all Receive Descriptors */
3119 rfctl = er32(RFCTL);
3120 rfctl |= E1000_RFCTL_EXTEN;
3123 /* 82571 and greater support packet-split where the protocol
3124 * header is placed in skb->data and the packet data is
3125 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3126 * In the case of a non-split, skb->data is linearly filled,
3127 * followed by the page buffers. Therefore, skb->data is
3128 * sized to hold the largest protocol header.
3130 * allocations using alloc_page take too long for regular MTU
3131 * so only enable packet split for jumbo frames
3133 * Using pages when the page size is greater than 16k wastes
3134 * a lot of memory, since we allocate 3 pages at all times
3137 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3138 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3139 adapter->rx_ps_pages = pages;
3141 adapter->rx_ps_pages = 0;
3143 if (adapter->rx_ps_pages) {
3146 /* Enable Packet split descriptors */
3147 rctl |= E1000_RCTL_DTYP_PS;
3149 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3151 switch (adapter->rx_ps_pages) {
3153 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3156 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3159 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3163 ew32(PSRCTL, psrctl);
3166 /* This is useful for sniffing bad packets. */
3167 if (adapter->netdev->features & NETIF_F_RXALL) {
3168 /* UPE and MPE will be handled by normal PROMISC logic
3169 * in e1000e_set_rx_mode
3171 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3172 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3173 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3175 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3176 E1000_RCTL_DPF | /* Allow filtered pause */
3177 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3178 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3179 * and that breaks VLANs.
3184 /* just started the receive unit, no need to restart */
3185 adapter->flags &= ~FLAG_RESTART_NOW;
3189 * e1000_configure_rx - Configure Receive Unit after Reset
3190 * @adapter: board private structure
3192 * Configure the Rx unit of the MAC after a reset.
3194 static void e1000_configure_rx(struct e1000_adapter *adapter)
3196 struct e1000_hw *hw = &adapter->hw;
3197 struct e1000_ring *rx_ring = adapter->rx_ring;
3199 u32 rdlen, rctl, rxcsum, ctrl_ext;
3201 if (adapter->rx_ps_pages) {
3202 /* this is a 32 byte descriptor */
3203 rdlen = rx_ring->count *
3204 sizeof(union e1000_rx_desc_packet_split);
3205 adapter->clean_rx = e1000_clean_rx_irq_ps;
3206 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3207 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3208 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3209 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3210 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3212 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3213 adapter->clean_rx = e1000_clean_rx_irq;
3214 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3217 /* disable receives while setting up the descriptors */
3219 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3220 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3222 usleep_range(10000, 20000);
3224 if (adapter->flags2 & FLAG2_DMA_BURST) {
3225 /* set the writeback threshold (only takes effect if the RDTR
3226 * is set). set GRAN=1 and write back up to 0x4 worth, and
3227 * enable prefetching of 0x20 Rx descriptors
3233 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3234 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3236 /* override the delay timers for enabling bursting, only if
3237 * the value was not set by the user via module options
3239 if (adapter->rx_int_delay == DEFAULT_RDTR)
3240 adapter->rx_int_delay = BURST_RDTR;
3241 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3242 adapter->rx_abs_int_delay = BURST_RADV;
3245 /* set the Receive Delay Timer Register */
3246 ew32(RDTR, adapter->rx_int_delay);
3248 /* irq moderation */
3249 ew32(RADV, adapter->rx_abs_int_delay);
3250 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3251 e1000e_write_itr(adapter, adapter->itr);
3253 ctrl_ext = er32(CTRL_EXT);
3254 /* Auto-Mask interrupts upon ICR access */
3255 ctrl_ext |= E1000_CTRL_EXT_IAME;
3256 ew32(IAM, 0xffffffff);
3257 ew32(CTRL_EXT, ctrl_ext);
3260 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3261 * the Base and Length of the Rx Descriptor Ring
3263 rdba = rx_ring->dma;
3264 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3265 ew32(RDBAH(0), (rdba >> 32));
3266 ew32(RDLEN(0), rdlen);
3269 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3270 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3272 writel(0, rx_ring->head);
3273 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3274 e1000e_update_rdt_wa(rx_ring, 0);
3276 writel(0, rx_ring->tail);
3278 /* Enable Receive Checksum Offload for TCP and UDP */
3279 rxcsum = er32(RXCSUM);
3280 if (adapter->netdev->features & NETIF_F_RXCSUM)
3281 rxcsum |= E1000_RXCSUM_TUOFL;
3283 rxcsum &= ~E1000_RXCSUM_TUOFL;
3284 ew32(RXCSUM, rxcsum);
3286 /* With jumbo frames, excessive C-state transition latencies result
3287 * in dropped transactions.
3289 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3291 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3292 adapter->max_frame_size) * 8 / 1000;
3294 if (adapter->flags & FLAG_IS_ICH) {
3295 u32 rxdctl = er32(RXDCTL(0));
3297 ew32(RXDCTL(0), rxdctl | 0x3);
3300 pm_qos_update_request(&adapter->pm_qos_req, lat);
3302 pm_qos_update_request(&adapter->pm_qos_req,
3303 PM_QOS_DEFAULT_VALUE);
3306 /* Enable Receives */
3311 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3312 * @netdev: network interface device structure
3314 * Writes multicast address list to the MTA hash table.
3315 * Returns: -ENOMEM on failure
3316 * 0 on no addresses written
3317 * X on writing X addresses to MTA
3319 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3321 struct e1000_adapter *adapter = netdev_priv(netdev);
3322 struct e1000_hw *hw = &adapter->hw;
3323 struct netdev_hw_addr *ha;
3327 if (netdev_mc_empty(netdev)) {
3328 /* nothing to program, so clear mc list */
3329 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3333 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3337 /* update_mc_addr_list expects a packed array of only addresses. */
3339 netdev_for_each_mc_addr(ha, netdev)
3340 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3342 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3345 return netdev_mc_count(netdev);
3349 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3350 * @netdev: network interface device structure
3352 * Writes unicast address list to the RAR table.
3353 * Returns: -ENOMEM on failure/insufficient address space
3354 * 0 on no addresses written
3355 * X on writing X addresses to the RAR table
3357 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3359 struct e1000_adapter *adapter = netdev_priv(netdev);
3360 struct e1000_hw *hw = &adapter->hw;
3361 unsigned int rar_entries;
3364 rar_entries = hw->mac.ops.rar_get_count(hw);
3366 /* save a rar entry for our hardware address */
3369 /* save a rar entry for the LAA workaround */
3370 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3373 /* return ENOMEM indicating insufficient memory for addresses */
3374 if (netdev_uc_count(netdev) > rar_entries)
3377 if (!netdev_uc_empty(netdev) && rar_entries) {
3378 struct netdev_hw_addr *ha;
3380 /* write the addresses in reverse order to avoid write
3383 netdev_for_each_uc_addr(ha, netdev) {
3388 ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3395 /* zero out the remaining RAR entries not used above */
3396 for (; rar_entries > 0; rar_entries--) {
3397 ew32(RAH(rar_entries), 0);
3398 ew32(RAL(rar_entries), 0);
3406 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3407 * @netdev: network interface device structure
3409 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3410 * address list or the network interface flags are updated. This routine is
3411 * responsible for configuring the hardware for proper unicast, multicast,
3412 * promiscuous mode, and all-multi behavior.
3414 static void e1000e_set_rx_mode(struct net_device *netdev)
3416 struct e1000_adapter *adapter = netdev_priv(netdev);
3417 struct e1000_hw *hw = &adapter->hw;
3420 if (pm_runtime_suspended(netdev->dev.parent))
3423 /* Check for Promiscuous and All Multicast modes */
3426 /* clear the affected bits */
3427 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3429 if (netdev->flags & IFF_PROMISC) {
3430 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3431 /* Do not hardware filter VLANs in promisc mode */
3432 e1000e_vlan_filter_disable(adapter);
3436 if (netdev->flags & IFF_ALLMULTI) {
3437 rctl |= E1000_RCTL_MPE;
3439 /* Write addresses to the MTA, if the attempt fails
3440 * then we should just turn on promiscuous mode so
3441 * that we can at least receive multicast traffic
3443 count = e1000e_write_mc_addr_list(netdev);
3445 rctl |= E1000_RCTL_MPE;
3447 e1000e_vlan_filter_enable(adapter);
3448 /* Write addresses to available RAR registers, if there is not
3449 * sufficient space to store all the addresses then enable
3450 * unicast promiscuous mode
3452 count = e1000e_write_uc_addr_list(netdev);
3454 rctl |= E1000_RCTL_UPE;
3459 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3460 e1000e_vlan_strip_enable(adapter);
3462 e1000e_vlan_strip_disable(adapter);
3465 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3467 struct e1000_hw *hw = &adapter->hw;
3472 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3473 for (i = 0; i < 10; i++)
3474 ew32(RSSRK(i), rss_key[i]);
3476 /* Direct all traffic to queue 0 */
3477 for (i = 0; i < 32; i++)
3480 /* Disable raw packet checksumming so that RSS hash is placed in
3481 * descriptor on writeback.
3483 rxcsum = er32(RXCSUM);
3484 rxcsum |= E1000_RXCSUM_PCSD;
3486 ew32(RXCSUM, rxcsum);
3488 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3489 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3490 E1000_MRQC_RSS_FIELD_IPV6 |
3491 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3492 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3498 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3499 * @adapter: board private structure
3500 * @timinca: pointer to returned time increment attributes
3502 * Get attributes for incrementing the System Time Register SYSTIML/H at
3503 * the default base frequency, and set the cyclecounter shift value.
3505 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3507 struct e1000_hw *hw = &adapter->hw;
3508 u32 incvalue, incperiod, shift;
3510 /* Make sure clock is enabled on I217/I218/I219 before checking
3513 if ((hw->mac.type >= e1000_pch_lpt) &&
3514 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3515 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3516 u32 fextnvm7 = er32(FEXTNVM7);
3518 if (!(fextnvm7 & BIT(0))) {
3519 ew32(FEXTNVM7, fextnvm7 | BIT(0));
3524 switch (hw->mac.type) {
3526 /* Stable 96MHz frequency */
3527 incperiod = INCPERIOD_96MHZ;
3528 incvalue = INCVALUE_96MHZ;
3529 shift = INCVALUE_SHIFT_96MHZ;
3530 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3533 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3534 /* Stable 96MHz frequency */
3535 incperiod = INCPERIOD_96MHZ;
3536 incvalue = INCVALUE_96MHZ;
3537 shift = INCVALUE_SHIFT_96MHZ;
3538 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3540 /* Stable 25MHz frequency */
3541 incperiod = INCPERIOD_25MHZ;
3542 incvalue = INCVALUE_25MHZ;
3543 shift = INCVALUE_SHIFT_25MHZ;
3544 adapter->cc.shift = shift;
3548 /* Stable 24MHz frequency */
3549 incperiod = INCPERIOD_24MHZ;
3550 incvalue = INCVALUE_24MHZ;
3551 shift = INCVALUE_SHIFT_24MHZ;
3552 adapter->cc.shift = shift;
3555 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3556 /* Stable 24MHz frequency */
3557 incperiod = INCPERIOD_24MHZ;
3558 incvalue = INCVALUE_24MHZ;
3559 shift = INCVALUE_SHIFT_24MHZ;
3560 adapter->cc.shift = shift;
3562 /* Stable 38400KHz frequency */
3563 incperiod = INCPERIOD_38400KHZ;
3564 incvalue = INCVALUE_38400KHZ;
3565 shift = INCVALUE_SHIFT_38400KHZ;
3566 adapter->cc.shift = shift;
3571 /* Stable 25MHz frequency */
3572 incperiod = INCPERIOD_25MHZ;
3573 incvalue = INCVALUE_25MHZ;
3574 shift = INCVALUE_SHIFT_25MHZ;
3575 adapter->cc.shift = shift;
3581 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3582 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3588 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3589 * @adapter: board private structure
3591 * Outgoing time stamping can be enabled and disabled. Play nice and
3592 * disable it when requested, although it shouldn't cause any overhead
3593 * when no packet needs it. At most one packet in the queue may be
3594 * marked for time stamping, otherwise it would be impossible to tell
3595 * for sure to which packet the hardware time stamp belongs.
3597 * Incoming time stamping has to be configured via the hardware filters.
3598 * Not all combinations are supported, in particular event type has to be
3599 * specified. Matching the kind of event packet is not supported, with the
3600 * exception of "all V2 events regardless of level 2 or 4".
3602 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3603 struct hwtstamp_config *config)
3605 struct e1000_hw *hw = &adapter->hw;
3606 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3607 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3614 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3617 /* flags reserved for future extensions - must be zero */
3621 switch (config->tx_type) {
3622 case HWTSTAMP_TX_OFF:
3625 case HWTSTAMP_TX_ON:
3631 switch (config->rx_filter) {
3632 case HWTSTAMP_FILTER_NONE:
3635 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3636 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3637 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3640 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3641 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3642 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3645 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3646 /* Also time stamps V2 L2 Path Delay Request/Response */
3647 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3648 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3651 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3652 /* Also time stamps V2 L2 Path Delay Request/Response. */
3653 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3654 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3657 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3658 /* Hardware cannot filter just V2 L4 Sync messages;
3659 * fall-through to V2 (both L2 and L4) Sync.
3661 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3662 /* Also time stamps V2 Path Delay Request/Response. */
3663 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3664 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3668 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3669 /* Hardware cannot filter just V2 L4 Delay Request messages;
3670 * fall-through to V2 (both L2 and L4) Delay Request.
3672 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3673 /* Also time stamps V2 Path Delay Request/Response. */
3674 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3675 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3679 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3680 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3681 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3682 * fall-through to all V2 (both L2 and L4) Events.
3684 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3685 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3686 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3690 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3691 /* For V1, the hardware can only filter Sync messages or
3692 * Delay Request messages but not both so fall-through to
3693 * time stamp all packets.
3695 case HWTSTAMP_FILTER_NTP_ALL:
3696 case HWTSTAMP_FILTER_ALL:
3699 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3700 config->rx_filter = HWTSTAMP_FILTER_ALL;
3706 adapter->hwtstamp_config = *config;
3708 /* enable/disable Tx h/w time stamping */
3709 regval = er32(TSYNCTXCTL);
3710 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3711 regval |= tsync_tx_ctl;
3712 ew32(TSYNCTXCTL, regval);
3713 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3714 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3715 e_err("Timesync Tx Control register not set as expected\n");
3719 /* enable/disable Rx h/w time stamping */
3720 regval = er32(TSYNCRXCTL);
3721 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3722 regval |= tsync_rx_ctl;
3723 ew32(TSYNCRXCTL, regval);
3724 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3725 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3726 (regval & (E1000_TSYNCRXCTL_ENABLED |
3727 E1000_TSYNCRXCTL_TYPE_MASK))) {
3728 e_err("Timesync Rx Control register not set as expected\n");
3732 /* L2: define ethertype filter for time stamped packets */
3734 rxmtrl |= ETH_P_1588;
3736 /* define which PTP packets get time stamped */
3737 ew32(RXMTRL, rxmtrl);
3739 /* Filter by destination port */
3741 rxudp = PTP_EV_PORT;
3742 cpu_to_be16s(&rxudp);
3748 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3756 * e1000_configure - configure the hardware for Rx and Tx
3757 * @adapter: private board structure
3759 static void e1000_configure(struct e1000_adapter *adapter)
3761 struct e1000_ring *rx_ring = adapter->rx_ring;
3763 e1000e_set_rx_mode(adapter->netdev);
3765 e1000_restore_vlan(adapter);
3766 e1000_init_manageability_pt(adapter);
3768 e1000_configure_tx(adapter);
3770 if (adapter->netdev->features & NETIF_F_RXHASH)
3771 e1000e_setup_rss_hash(adapter);
3772 e1000_setup_rctl(adapter);
3773 e1000_configure_rx(adapter);
3774 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3778 * e1000e_power_up_phy - restore link in case the phy was powered down
3779 * @adapter: address of board private structure
3781 * The phy may be powered down to save power and turn off link when the
3782 * driver is unloaded and wake on lan is not enabled (among others)
3783 * *** this routine MUST be followed by a call to e1000e_reset ***
3785 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3787 if (adapter->hw.phy.ops.power_up)
3788 adapter->hw.phy.ops.power_up(&adapter->hw);
3790 adapter->hw.mac.ops.setup_link(&adapter->hw);
3794 * e1000_power_down_phy - Power down the PHY
3796 * Power down the PHY so no link is implied when interface is down.
3797 * The PHY cannot be powered down if management or WoL is active.
3799 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3801 if (adapter->hw.phy.ops.power_down)
3802 adapter->hw.phy.ops.power_down(&adapter->hw);
3806 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3808 * We want to clear all pending descriptors from the TX ring.
3809 * zeroing happens when the HW reads the regs. We assign the ring itself as
3810 * the data of the next descriptor. We don't care about the data we are about
3813 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3815 struct e1000_hw *hw = &adapter->hw;
3816 struct e1000_ring *tx_ring = adapter->tx_ring;
3817 struct e1000_tx_desc *tx_desc = NULL;
3818 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3822 ew32(TCTL, tctl | E1000_TCTL_EN);
3824 BUG_ON(tdt != tx_ring->next_to_use);
3825 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3826 tx_desc->buffer_addr = tx_ring->dma;
3828 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3829 tx_desc->upper.data = 0;
3830 /* flush descriptors to memory before notifying the HW */
3832 tx_ring->next_to_use++;
3833 if (tx_ring->next_to_use == tx_ring->count)
3834 tx_ring->next_to_use = 0;
3835 ew32(TDT(0), tx_ring->next_to_use);
3837 usleep_range(200, 250);
3841 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3843 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3845 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3848 struct e1000_hw *hw = &adapter->hw;
3851 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3853 usleep_range(100, 150);
3855 rxdctl = er32(RXDCTL(0));
3856 /* zero the lower 14 bits (prefetch and host thresholds) */
3857 rxdctl &= 0xffffc000;
3859 /* update thresholds: prefetch threshold to 31, host threshold to 1
3860 * and make sure the granularity is "descriptors" and not "cache lines"
3862 rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3864 ew32(RXDCTL(0), rxdctl);
3865 /* momentarily enable the RX ring for the changes to take effect */
3866 ew32(RCTL, rctl | E1000_RCTL_EN);
3868 usleep_range(100, 150);
3869 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3873 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3875 * In i219, the descriptor rings must be emptied before resetting the HW
3876 * or before changing the device state to D3 during runtime (runtime PM).
3878 * Failure to do this will cause the HW to enter a unit hang state which can
3879 * only be released by PCI reset on the device
3883 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3886 u32 fext_nvm11, tdlen;
3887 struct e1000_hw *hw = &adapter->hw;
3889 /* First, disable MULR fix in FEXTNVM11 */
3890 fext_nvm11 = er32(FEXTNVM11);
3891 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3892 ew32(FEXTNVM11, fext_nvm11);
3893 /* do nothing if we're not in faulty state, or if the queue is empty */
3894 tdlen = er32(TDLEN(0));
3895 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3897 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3899 e1000_flush_tx_ring(adapter);
3900 /* recheck, maybe the fault is caused by the rx ring */
3901 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3903 if (hang_state & FLUSH_DESC_REQUIRED)
3904 e1000_flush_rx_ring(adapter);
3908 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3909 * @adapter: board private structure
3911 * When the MAC is reset, all hardware bits for timesync will be reset to the
3912 * default values. This function will restore the settings last in place.
3913 * Since the clock SYSTIME registers are reset, we will simply restore the
3914 * cyclecounter to the kernel real clock time.
3916 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3918 struct ptp_clock_info *info = &adapter->ptp_clock_info;
3919 struct e1000_hw *hw = &adapter->hw;
3920 unsigned long flags;
3924 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3927 if (info->adjfreq) {
3928 /* restore the previous ptp frequency delta */
3929 ret_val = info->adjfreq(info, adapter->ptp_delta);
3931 /* set the default base frequency if no adjustment possible */
3932 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3934 ew32(TIMINCA, timinca);
3938 dev_warn(&adapter->pdev->dev,
3939 "Failed to restore TIMINCA clock rate delta: %d\n",
3944 /* reset the systim ns time counter */
3945 spin_lock_irqsave(&adapter->systim_lock, flags);
3946 timecounter_init(&adapter->tc, &adapter->cc,
3947 ktime_to_ns(ktime_get_real()));
3948 spin_unlock_irqrestore(&adapter->systim_lock, flags);
3950 /* restore the previous hwtstamp configuration settings */
3951 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3955 * e1000e_reset - bring the hardware into a known good state
3957 * This function boots the hardware and enables some settings that
3958 * require a configuration cycle of the hardware - those cannot be
3959 * set/changed during runtime. After reset the device needs to be
3960 * properly configured for Rx, Tx etc.
3962 void e1000e_reset(struct e1000_adapter *adapter)
3964 struct e1000_mac_info *mac = &adapter->hw.mac;
3965 struct e1000_fc_info *fc = &adapter->hw.fc;
3966 struct e1000_hw *hw = &adapter->hw;
3967 u32 tx_space, min_tx_space, min_rx_space;
3968 u32 pba = adapter->pba;
3971 /* reset Packet Buffer Allocation to default */
3974 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3975 /* To maintain wire speed transmits, the Tx FIFO should be
3976 * large enough to accommodate two full transmit packets,
3977 * rounded up to the next 1KB and expressed in KB. Likewise,
3978 * the Rx FIFO should be large enough to accommodate at least
3979 * one full receive packet and is similarly rounded up and
3983 /* upper 16 bits has Tx packet buffer allocation size in KB */
3984 tx_space = pba >> 16;
3985 /* lower 16 bits has Rx packet buffer allocation size in KB */
3987 /* the Tx fifo also stores 16 bytes of information about the Tx
3988 * but don't include ethernet FCS because hardware appends it
3990 min_tx_space = (adapter->max_frame_size +
3991 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3992 min_tx_space = ALIGN(min_tx_space, 1024);
3993 min_tx_space >>= 10;
3994 /* software strips receive CRC, so leave room for it */
3995 min_rx_space = adapter->max_frame_size;
3996 min_rx_space = ALIGN(min_rx_space, 1024);
3997 min_rx_space >>= 10;
3999 /* If current Tx allocation is less than the min Tx FIFO size,
4000 * and the min Tx FIFO size is less than the current Rx FIFO
4001 * allocation, take space away from current Rx allocation
4003 if ((tx_space < min_tx_space) &&
4004 ((min_tx_space - tx_space) < pba)) {
4005 pba -= min_tx_space - tx_space;
4007 /* if short on Rx space, Rx wins and must trump Tx
4010 if (pba < min_rx_space)
4017 /* flow control settings
4019 * The high water mark must be low enough to fit one full frame
4020 * (or the size used for early receive) above it in the Rx FIFO.
4021 * Set it to the lower of:
4022 * - 90% of the Rx FIFO size, and
4023 * - the full Rx FIFO size minus one full frame
4025 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4026 fc->pause_time = 0xFFFF;
4028 fc->pause_time = E1000_FC_PAUSE_TIME;
4029 fc->send_xon = true;
4030 fc->current_mode = fc->requested_mode;
4032 switch (hw->mac.type) {
4034 case e1000_ich10lan:
4035 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4038 fc->high_water = 0x2800;
4039 fc->low_water = fc->high_water - 8;
4044 hwm = min(((pba << 10) * 9 / 10),
4045 ((pba << 10) - adapter->max_frame_size));
4047 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4048 fc->low_water = fc->high_water - 8;
4051 /* Workaround PCH LOM adapter hangs with certain network
4052 * loads. If hangs persist, try disabling Tx flow control.
4054 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4055 fc->high_water = 0x3500;
4056 fc->low_water = 0x1500;
4058 fc->high_water = 0x5000;
4059 fc->low_water = 0x3000;
4061 fc->refresh_time = 0x1000;
4067 fc->refresh_time = 0x0400;
4069 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4070 fc->high_water = 0x05C20;
4071 fc->low_water = 0x05048;
4072 fc->pause_time = 0x0650;
4078 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4079 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4083 /* Alignment of Tx data is on an arbitrary byte boundary with the
4084 * maximum size per Tx descriptor limited only to the transmit
4085 * allocation of the packet buffer minus 96 bytes with an upper
4086 * limit of 24KB due to receive synchronization limitations.
4088 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4091 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4092 * fit in receive buffer.
4094 if (adapter->itr_setting & 0x3) {
4095 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4096 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4097 dev_info(&adapter->pdev->dev,
4098 "Interrupt Throttle Rate off\n");
4099 adapter->flags2 |= FLAG2_DISABLE_AIM;
4100 e1000e_write_itr(adapter, 0);
4102 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4103 dev_info(&adapter->pdev->dev,
4104 "Interrupt Throttle Rate on\n");
4105 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4106 adapter->itr = 20000;
4107 e1000e_write_itr(adapter, adapter->itr);
4111 if (hw->mac.type >= e1000_pch_spt)
4112 e1000_flush_desc_rings(adapter);
4113 /* Allow time for pending master requests to run */
4114 mac->ops.reset_hw(hw);
4116 /* For parts with AMT enabled, let the firmware know
4117 * that the network interface is in control
4119 if (adapter->flags & FLAG_HAS_AMT)
4120 e1000e_get_hw_control(adapter);
4124 if (mac->ops.init_hw(hw))
4125 e_err("Hardware Error\n");
4127 e1000_update_mng_vlan(adapter);
4129 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4130 ew32(VET, ETH_P_8021Q);
4132 e1000e_reset_adaptive(hw);
4134 /* restore systim and hwtstamp settings */
4135 e1000e_systim_reset(adapter);
4137 /* Set EEE advertisement as appropriate */
4138 if (adapter->flags2 & FLAG2_HAS_EEE) {
4142 switch (hw->phy.type) {
4143 case e1000_phy_82579:
4144 adv_addr = I82579_EEE_ADVERTISEMENT;
4146 case e1000_phy_i217:
4147 adv_addr = I217_EEE_ADVERTISEMENT;
4150 dev_err(&adapter->pdev->dev,
4151 "Invalid PHY type setting EEE advertisement\n");
4155 ret_val = hw->phy.ops.acquire(hw);
4157 dev_err(&adapter->pdev->dev,
4158 "EEE advertisement - unable to acquire PHY\n");
4162 e1000_write_emi_reg_locked(hw, adv_addr,
4163 hw->dev_spec.ich8lan.eee_disable ?
4164 0 : adapter->eee_advert);
4166 hw->phy.ops.release(hw);
4169 if (!netif_running(adapter->netdev) &&
4170 !test_bit(__E1000_TESTING, &adapter->state))
4171 e1000_power_down_phy(adapter);
4173 e1000_get_phy_info(hw);
4175 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4176 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4178 /* speed up time to link by disabling smart power down, ignore
4179 * the return value of this function because there is nothing
4180 * different we would do if it failed
4182 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4183 phy_data &= ~IGP02E1000_PM_SPD;
4184 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4186 if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4189 /* Fextnvm7 @ 0xe4[2] = 1 */
4190 reg = er32(FEXTNVM7);
4191 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4192 ew32(FEXTNVM7, reg);
4193 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4194 reg = er32(FEXTNVM9);
4195 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4196 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4197 ew32(FEXTNVM9, reg);
4203 * e1000e_trigger_lsc - trigger an LSC interrupt
4206 * Fire a link status change interrupt to start the watchdog.
4208 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4210 struct e1000_hw *hw = &adapter->hw;
4212 if (adapter->msix_entries)
4213 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4215 ew32(ICS, E1000_ICS_LSC);
4218 void e1000e_up(struct e1000_adapter *adapter)
4220 /* hardware has been reset, we need to reload some things */
4221 e1000_configure(adapter);
4223 clear_bit(__E1000_DOWN, &adapter->state);
4225 if (adapter->msix_entries)
4226 e1000_configure_msix(adapter);
4227 e1000_irq_enable(adapter);
4229 /* Tx queue started by watchdog timer when link is up */
4231 e1000e_trigger_lsc(adapter);
4234 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4236 struct e1000_hw *hw = &adapter->hw;
4238 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4241 /* flush pending descriptor writebacks to memory */
4242 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4243 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4245 /* execute the writes immediately */
4248 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4249 * write is successful
4251 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4252 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4254 /* execute the writes immediately */
4258 static void e1000e_update_stats(struct e1000_adapter *adapter);
4261 * e1000e_down - quiesce the device and optionally reset the hardware
4262 * @adapter: board private structure
4263 * @reset: boolean flag to reset the hardware or not
4265 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4267 struct net_device *netdev = adapter->netdev;
4268 struct e1000_hw *hw = &adapter->hw;
4271 /* signal that we're down so the interrupt handler does not
4272 * reschedule our watchdog timer
4274 set_bit(__E1000_DOWN, &adapter->state);
4276 netif_carrier_off(netdev);
4278 /* disable receives in the hardware */
4280 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4281 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4282 /* flush and sleep below */
4284 netif_stop_queue(netdev);
4286 /* disable transmits in the hardware */
4288 tctl &= ~E1000_TCTL_EN;
4291 /* flush both disables and wait for them to finish */
4293 usleep_range(10000, 20000);
4295 e1000_irq_disable(adapter);
4297 napi_synchronize(&adapter->napi);
4299 del_timer_sync(&adapter->watchdog_timer);
4300 del_timer_sync(&adapter->phy_info_timer);
4302 spin_lock(&adapter->stats64_lock);
4303 e1000e_update_stats(adapter);
4304 spin_unlock(&adapter->stats64_lock);
4306 e1000e_flush_descriptors(adapter);
4308 adapter->link_speed = 0;
4309 adapter->link_duplex = 0;
4311 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4312 if ((hw->mac.type >= e1000_pch2lan) &&
4313 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4314 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4315 e_dbg("failed to disable jumbo frame workaround mode\n");
4317 if (!pci_channel_offline(adapter->pdev)) {
4319 e1000e_reset(adapter);
4320 else if (hw->mac.type >= e1000_pch_spt)
4321 e1000_flush_desc_rings(adapter);
4323 e1000_clean_tx_ring(adapter->tx_ring);
4324 e1000_clean_rx_ring(adapter->rx_ring);
4327 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4330 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4331 usleep_range(1000, 2000);
4332 e1000e_down(adapter, true);
4334 clear_bit(__E1000_RESETTING, &adapter->state);
4338 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4339 * @hw: pointer to the HW structure
4340 * @systim: time value read, sanitized and returned
4342 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4343 * check to see that the time is incrementing at a reasonable
4344 * rate and is a multiple of incvalue.
4346 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
4348 u64 time_delta, rem, temp;
4353 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4354 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4355 /* latch SYSTIMH on read of SYSTIML */
4356 systim_next = (u64)er32(SYSTIML);
4357 systim_next |= (u64)er32(SYSTIMH) << 32;
4359 time_delta = systim_next - systim;
4361 /* VMWare users have seen incvalue of zero, don't div / 0 */
4362 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4364 systim = systim_next;
4366 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4374 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4375 * @cc: cyclecounter structure
4377 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4379 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4381 struct e1000_hw *hw = &adapter->hw;
4382 u32 systimel, systimeh;
4384 /* SYSTIMH latching upon SYSTIML read does not work well.
4385 * This means that if SYSTIML overflows after we read it but before
4386 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4387 * will experience a huge non linear increment in the systime value
4388 * to fix that we test for overflow and if true, we re-read systime.
4390 systimel = er32(SYSTIML);
4391 systimeh = er32(SYSTIMH);
4392 /* Is systimel is so large that overflow is possible? */
4393 if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4394 u32 systimel_2 = er32(SYSTIML);
4395 if (systimel > systimel_2) {
4396 /* There was an overflow, read again SYSTIMH, and use
4399 systimeh = er32(SYSTIMH);
4400 systimel = systimel_2;
4403 systim = (u64)systimel;
4404 systim |= (u64)systimeh << 32;
4406 if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4407 systim = e1000e_sanitize_systim(hw, systim);
4413 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4414 * @adapter: board private structure to initialize
4416 * e1000_sw_init initializes the Adapter private data structure.
4417 * Fields are initialized based on PCI device information and
4418 * OS network device settings (MTU size).
4420 static int e1000_sw_init(struct e1000_adapter *adapter)
4422 struct net_device *netdev = adapter->netdev;
4424 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4425 adapter->rx_ps_bsize0 = 128;
4426 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4427 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4428 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4429 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4431 spin_lock_init(&adapter->stats64_lock);
4433 e1000e_set_interrupt_capability(adapter);
4435 if (e1000_alloc_queues(adapter))
4438 /* Setup hardware time stamping cyclecounter */
4439 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4440 adapter->cc.read = e1000e_cyclecounter_read;
4441 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4442 adapter->cc.mult = 1;
4443 /* cc.shift set in e1000e_get_base_tininca() */
4445 spin_lock_init(&adapter->systim_lock);
4446 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4449 /* Explicitly disable IRQ since the NIC can be in any state. */
4450 e1000_irq_disable(adapter);
4452 set_bit(__E1000_DOWN, &adapter->state);
4457 * e1000_intr_msi_test - Interrupt Handler
4458 * @irq: interrupt number
4459 * @data: pointer to a network interface device structure
4461 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4463 struct net_device *netdev = data;
4464 struct e1000_adapter *adapter = netdev_priv(netdev);
4465 struct e1000_hw *hw = &adapter->hw;
4466 u32 icr = er32(ICR);
4468 e_dbg("icr is %08X\n", icr);
4469 if (icr & E1000_ICR_RXSEQ) {
4470 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4471 /* Force memory writes to complete before acknowledging the
4472 * interrupt is handled.
4481 * e1000_test_msi_interrupt - Returns 0 for successful test
4482 * @adapter: board private struct
4484 * code flow taken from tg3.c
4486 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4488 struct net_device *netdev = adapter->netdev;
4489 struct e1000_hw *hw = &adapter->hw;
4492 /* poll_enable hasn't been called yet, so don't need disable */
4493 /* clear any pending events */
4496 /* free the real vector and request a test handler */
4497 e1000_free_irq(adapter);
4498 e1000e_reset_interrupt_capability(adapter);
4500 /* Assume that the test fails, if it succeeds then the test
4501 * MSI irq handler will unset this flag
4503 adapter->flags |= FLAG_MSI_TEST_FAILED;
4505 err = pci_enable_msi(adapter->pdev);
4507 goto msi_test_failed;
4509 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4510 netdev->name, netdev);
4512 pci_disable_msi(adapter->pdev);
4513 goto msi_test_failed;
4516 /* Force memory writes to complete before enabling and firing an
4521 e1000_irq_enable(adapter);
4523 /* fire an unusual interrupt on the test handler */
4524 ew32(ICS, E1000_ICS_RXSEQ);
4528 e1000_irq_disable(adapter);
4530 rmb(); /* read flags after interrupt has been fired */
4532 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4533 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4534 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4536 e_dbg("MSI interrupt test succeeded!\n");
4539 free_irq(adapter->pdev->irq, netdev);
4540 pci_disable_msi(adapter->pdev);
4543 e1000e_set_interrupt_capability(adapter);
4544 return e1000_request_irq(adapter);
4548 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4549 * @adapter: board private struct
4551 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4553 static int e1000_test_msi(struct e1000_adapter *adapter)
4558 if (!(adapter->flags & FLAG_MSI_ENABLED))
4561 /* disable SERR in case the MSI write causes a master abort */
4562 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4563 if (pci_cmd & PCI_COMMAND_SERR)
4564 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4565 pci_cmd & ~PCI_COMMAND_SERR);
4567 err = e1000_test_msi_interrupt(adapter);
4569 /* re-enable SERR */
4570 if (pci_cmd & PCI_COMMAND_SERR) {
4571 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4572 pci_cmd |= PCI_COMMAND_SERR;
4573 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4580 * e1000e_open - Called when a network interface is made active
4581 * @netdev: network interface device structure
4583 * Returns 0 on success, negative value on failure
4585 * The open entry point is called when a network interface is made
4586 * active by the system (IFF_UP). At this point all resources needed
4587 * for transmit and receive operations are allocated, the interrupt
4588 * handler is registered with the OS, the watchdog timer is started,
4589 * and the stack is notified that the interface is ready.
4591 int e1000e_open(struct net_device *netdev)
4593 struct e1000_adapter *adapter = netdev_priv(netdev);
4594 struct e1000_hw *hw = &adapter->hw;
4595 struct pci_dev *pdev = adapter->pdev;
4598 /* disallow open during test */
4599 if (test_bit(__E1000_TESTING, &adapter->state))
4602 pm_runtime_get_sync(&pdev->dev);
4604 netif_carrier_off(netdev);
4605 netif_stop_queue(netdev);
4607 /* allocate transmit descriptors */
4608 err = e1000e_setup_tx_resources(adapter->tx_ring);
4612 /* allocate receive descriptors */
4613 err = e1000e_setup_rx_resources(adapter->rx_ring);
4617 /* If AMT is enabled, let the firmware know that the network
4618 * interface is now open and reset the part to a known state.
4620 if (adapter->flags & FLAG_HAS_AMT) {
4621 e1000e_get_hw_control(adapter);
4622 e1000e_reset(adapter);
4625 e1000e_power_up_phy(adapter);
4627 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4628 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4629 e1000_update_mng_vlan(adapter);
4631 /* DMA latency requirement to workaround jumbo issue */
4632 pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4633 PM_QOS_DEFAULT_VALUE);
4635 /* before we allocate an interrupt, we must be ready to handle it.
4636 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4637 * as soon as we call pci_request_irq, so we have to setup our
4638 * clean_rx handler before we do so.
4640 e1000_configure(adapter);
4642 err = e1000_request_irq(adapter);
4646 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4647 * ignore e1000e MSI messages, which means we need to test our MSI
4650 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4651 err = e1000_test_msi(adapter);
4653 e_err("Interrupt allocation failed\n");
4658 /* From here on the code is the same as e1000e_up() */
4659 clear_bit(__E1000_DOWN, &adapter->state);
4661 napi_enable(&adapter->napi);
4663 e1000_irq_enable(adapter);
4665 adapter->tx_hang_recheck = false;
4667 hw->mac.get_link_status = true;
4668 pm_runtime_put(&pdev->dev);
4670 e1000e_trigger_lsc(adapter);
4675 pm_qos_remove_request(&adapter->pm_qos_req);
4676 e1000e_release_hw_control(adapter);
4677 e1000_power_down_phy(adapter);
4678 e1000e_free_rx_resources(adapter->rx_ring);
4680 e1000e_free_tx_resources(adapter->tx_ring);
4682 e1000e_reset(adapter);
4683 pm_runtime_put_sync(&pdev->dev);
4689 * e1000e_close - Disables a network interface
4690 * @netdev: network interface device structure
4692 * Returns 0, this is not allowed to fail
4694 * The close entry point is called when an interface is de-activated
4695 * by the OS. The hardware is still under the drivers control, but
4696 * needs to be disabled. A global MAC reset is issued to stop the
4697 * hardware, and all transmit and receive resources are freed.
4699 int e1000e_close(struct net_device *netdev)
4701 struct e1000_adapter *adapter = netdev_priv(netdev);
4702 struct pci_dev *pdev = adapter->pdev;
4703 int count = E1000_CHECK_RESET_COUNT;
4705 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4706 usleep_range(10000, 20000);
4708 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4710 pm_runtime_get_sync(&pdev->dev);
4712 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4713 e1000e_down(adapter, true);
4714 e1000_free_irq(adapter);
4716 /* Link status message must follow this format */
4717 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4720 napi_disable(&adapter->napi);
4722 e1000e_free_tx_resources(adapter->tx_ring);
4723 e1000e_free_rx_resources(adapter->rx_ring);
4725 /* kill manageability vlan ID if supported, but not if a vlan with
4726 * the same ID is registered on the host OS (let 8021q kill it)
4728 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4729 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4730 adapter->mng_vlan_id);
4732 /* If AMT is enabled, let the firmware know that the network
4733 * interface is now closed
4735 if ((adapter->flags & FLAG_HAS_AMT) &&
4736 !test_bit(__E1000_TESTING, &adapter->state))
4737 e1000e_release_hw_control(adapter);
4739 pm_qos_remove_request(&adapter->pm_qos_req);
4741 pm_runtime_put_sync(&pdev->dev);
4747 * e1000_set_mac - Change the Ethernet Address of the NIC
4748 * @netdev: network interface device structure
4749 * @p: pointer to an address structure
4751 * Returns 0 on success, negative on failure
4753 static int e1000_set_mac(struct net_device *netdev, void *p)
4755 struct e1000_adapter *adapter = netdev_priv(netdev);
4756 struct e1000_hw *hw = &adapter->hw;
4757 struct sockaddr *addr = p;
4759 if (!is_valid_ether_addr(addr->sa_data))
4760 return -EADDRNOTAVAIL;
4762 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4763 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4765 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4767 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4768 /* activate the work around */
4769 e1000e_set_laa_state_82571(&adapter->hw, 1);
4771 /* Hold a copy of the LAA in RAR[14] This is done so that
4772 * between the time RAR[0] gets clobbered and the time it
4773 * gets fixed (in e1000_watchdog), the actual LAA is in one
4774 * of the RARs and no incoming packets directed to this port
4775 * are dropped. Eventually the LAA will be in RAR[0] and
4778 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4779 adapter->hw.mac.rar_entry_count - 1);
4786 * e1000e_update_phy_task - work thread to update phy
4787 * @work: pointer to our work struct
4789 * this worker thread exists because we must acquire a
4790 * semaphore to read the phy, which we could msleep while
4791 * waiting for it, and we can't msleep in a timer.
4793 static void e1000e_update_phy_task(struct work_struct *work)
4795 struct e1000_adapter *adapter = container_of(work,
4796 struct e1000_adapter,
4798 struct e1000_hw *hw = &adapter->hw;
4800 if (test_bit(__E1000_DOWN, &adapter->state))
4803 e1000_get_phy_info(hw);
4805 /* Enable EEE on 82579 after link up */
4806 if (hw->phy.type >= e1000_phy_82579)
4807 e1000_set_eee_pchlan(hw);
4811 * e1000_update_phy_info - timre call-back to update PHY info
4812 * @data: pointer to adapter cast into an unsigned long
4814 * Need to wait a few seconds after link up to get diagnostic information from
4817 static void e1000_update_phy_info(unsigned long data)
4819 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4821 if (test_bit(__E1000_DOWN, &adapter->state))
4824 schedule_work(&adapter->update_phy_task);
4828 * e1000e_update_phy_stats - Update the PHY statistics counters
4829 * @adapter: board private structure
4831 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4833 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4835 struct e1000_hw *hw = &adapter->hw;
4839 ret_val = hw->phy.ops.acquire(hw);
4843 /* A page set is expensive so check if already on desired page.
4844 * If not, set to the page with the PHY status registers.
4847 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4851 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4852 ret_val = hw->phy.ops.set_page(hw,
4853 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4858 /* Single Collision Count */
4859 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4860 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4862 adapter->stats.scc += phy_data;
4864 /* Excessive Collision Count */
4865 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4866 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4868 adapter->stats.ecol += phy_data;
4870 /* Multiple Collision Count */
4871 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4872 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4874 adapter->stats.mcc += phy_data;
4876 /* Late Collision Count */
4877 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4878 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4880 adapter->stats.latecol += phy_data;
4882 /* Collision Count - also used for adaptive IFS */
4883 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4884 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4886 hw->mac.collision_delta = phy_data;
4889 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4890 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4892 adapter->stats.dc += phy_data;
4894 /* Transmit with no CRS */
4895 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4896 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4898 adapter->stats.tncrs += phy_data;
4901 hw->phy.ops.release(hw);
4905 * e1000e_update_stats - Update the board statistics counters
4906 * @adapter: board private structure
4908 static void e1000e_update_stats(struct e1000_adapter *adapter)
4910 struct net_device *netdev = adapter->netdev;
4911 struct e1000_hw *hw = &adapter->hw;
4912 struct pci_dev *pdev = adapter->pdev;
4914 /* Prevent stats update while adapter is being reset, or if the pci
4915 * connection is down.
4917 if (adapter->link_speed == 0)
4919 if (pci_channel_offline(pdev))
4922 adapter->stats.crcerrs += er32(CRCERRS);
4923 adapter->stats.gprc += er32(GPRC);
4924 adapter->stats.gorc += er32(GORCL);
4925 er32(GORCH); /* Clear gorc */
4926 adapter->stats.bprc += er32(BPRC);
4927 adapter->stats.mprc += er32(MPRC);
4928 adapter->stats.roc += er32(ROC);
4930 adapter->stats.mpc += er32(MPC);
4932 /* Half-duplex statistics */
4933 if (adapter->link_duplex == HALF_DUPLEX) {
4934 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4935 e1000e_update_phy_stats(adapter);
4937 adapter->stats.scc += er32(SCC);
4938 adapter->stats.ecol += er32(ECOL);
4939 adapter->stats.mcc += er32(MCC);
4940 adapter->stats.latecol += er32(LATECOL);
4941 adapter->stats.dc += er32(DC);
4943 hw->mac.collision_delta = er32(COLC);
4945 if ((hw->mac.type != e1000_82574) &&
4946 (hw->mac.type != e1000_82583))
4947 adapter->stats.tncrs += er32(TNCRS);
4949 adapter->stats.colc += hw->mac.collision_delta;
4952 adapter->stats.xonrxc += er32(XONRXC);
4953 adapter->stats.xontxc += er32(XONTXC);
4954 adapter->stats.xoffrxc += er32(XOFFRXC);
4955 adapter->stats.xofftxc += er32(XOFFTXC);
4956 adapter->stats.gptc += er32(GPTC);
4957 adapter->stats.gotc += er32(GOTCL);
4958 er32(GOTCH); /* Clear gotc */
4959 adapter->stats.rnbc += er32(RNBC);
4960 adapter->stats.ruc += er32(RUC);
4962 adapter->stats.mptc += er32(MPTC);
4963 adapter->stats.bptc += er32(BPTC);
4965 /* used for adaptive IFS */
4967 hw->mac.tx_packet_delta = er32(TPT);
4968 adapter->stats.tpt += hw->mac.tx_packet_delta;
4970 adapter->stats.algnerrc += er32(ALGNERRC);
4971 adapter->stats.rxerrc += er32(RXERRC);
4972 adapter->stats.cexterr += er32(CEXTERR);
4973 adapter->stats.tsctc += er32(TSCTC);
4974 adapter->stats.tsctfc += er32(TSCTFC);
4976 /* Fill out the OS statistics structure */
4977 netdev->stats.multicast = adapter->stats.mprc;
4978 netdev->stats.collisions = adapter->stats.colc;
4982 /* RLEC on some newer hardware can be incorrect so build
4983 * our own version based on RUC and ROC
4985 netdev->stats.rx_errors = adapter->stats.rxerrc +
4986 adapter->stats.crcerrs + adapter->stats.algnerrc +
4987 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4988 netdev->stats.rx_length_errors = adapter->stats.ruc +
4990 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4991 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4992 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4995 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4996 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4997 netdev->stats.tx_window_errors = adapter->stats.latecol;
4998 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5000 /* Tx Dropped needs to be maintained elsewhere */
5002 /* Management Stats */
5003 adapter->stats.mgptc += er32(MGTPTC);
5004 adapter->stats.mgprc += er32(MGTPRC);
5005 adapter->stats.mgpdc += er32(MGTPDC);
5007 /* Correctable ECC Errors */
5008 if (hw->mac.type >= e1000_pch_lpt) {
5009 u32 pbeccsts = er32(PBECCSTS);
5011 adapter->corr_errors +=
5012 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5013 adapter->uncorr_errors +=
5014 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5015 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5020 * e1000_phy_read_status - Update the PHY register status snapshot
5021 * @adapter: board private structure
5023 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5025 struct e1000_hw *hw = &adapter->hw;
5026 struct e1000_phy_regs *phy = &adapter->phy_regs;
5028 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5029 (er32(STATUS) & E1000_STATUS_LU) &&
5030 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5033 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5034 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5035 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5036 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5037 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5038 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5039 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5040 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5042 e_warn("Error reading PHY register\n");
5044 /* Do not read PHY registers if link is not up
5045 * Set values to typical power-on defaults
5047 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5048 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5049 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5051 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5052 ADVERTISE_ALL | ADVERTISE_CSMA);
5054 phy->expansion = EXPANSION_ENABLENPAGE;
5055 phy->ctrl1000 = ADVERTISE_1000FULL;
5057 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5061 static void e1000_print_link_info(struct e1000_adapter *adapter)
5063 struct e1000_hw *hw = &adapter->hw;
5064 u32 ctrl = er32(CTRL);
5066 /* Link status message must follow this format for user tools */
5067 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5068 adapter->netdev->name, adapter->link_speed,
5069 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5070 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5071 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5072 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5075 static bool e1000e_has_link(struct e1000_adapter *adapter)
5077 struct e1000_hw *hw = &adapter->hw;
5078 bool link_active = false;
5081 /* get_link_status is set on LSC (link status) interrupt or
5082 * Rx sequence error interrupt. get_link_status will stay
5083 * false until the check_for_link establishes link
5084 * for copper adapters ONLY
5086 switch (hw->phy.media_type) {
5087 case e1000_media_type_copper:
5088 if (hw->mac.get_link_status) {
5089 ret_val = hw->mac.ops.check_for_link(hw);
5090 link_active = !hw->mac.get_link_status;
5095 case e1000_media_type_fiber:
5096 ret_val = hw->mac.ops.check_for_link(hw);
5097 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5099 case e1000_media_type_internal_serdes:
5100 ret_val = hw->mac.ops.check_for_link(hw);
5101 link_active = adapter->hw.mac.serdes_has_link;
5104 case e1000_media_type_unknown:
5108 if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5109 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5110 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5111 e_info("Gigabit has been disabled, downgrading speed\n");
5117 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5119 /* make sure the receive unit is started */
5120 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5121 (adapter->flags & FLAG_RESTART_NOW)) {
5122 struct e1000_hw *hw = &adapter->hw;
5123 u32 rctl = er32(RCTL);
5125 ew32(RCTL, rctl | E1000_RCTL_EN);
5126 adapter->flags &= ~FLAG_RESTART_NOW;
5130 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5132 struct e1000_hw *hw = &adapter->hw;
5134 /* With 82574 controllers, PHY needs to be checked periodically
5135 * for hung state and reset, if two calls return true
5137 if (e1000_check_phy_82574(hw))
5138 adapter->phy_hang_count++;
5140 adapter->phy_hang_count = 0;
5142 if (adapter->phy_hang_count > 1) {
5143 adapter->phy_hang_count = 0;
5144 e_dbg("PHY appears hung - resetting\n");
5145 schedule_work(&adapter->reset_task);
5150 * e1000_watchdog - Timer Call-back
5151 * @data: pointer to adapter cast into an unsigned long
5153 static void e1000_watchdog(unsigned long data)
5155 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5157 /* Do the rest outside of interrupt context */
5158 schedule_work(&adapter->watchdog_task);
5160 /* TODO: make this use queue_delayed_work() */
5163 static void e1000_watchdog_task(struct work_struct *work)
5165 struct e1000_adapter *adapter = container_of(work,
5166 struct e1000_adapter,
5168 struct net_device *netdev = adapter->netdev;
5169 struct e1000_mac_info *mac = &adapter->hw.mac;
5170 struct e1000_phy_info *phy = &adapter->hw.phy;
5171 struct e1000_ring *tx_ring = adapter->tx_ring;
5172 struct e1000_hw *hw = &adapter->hw;
5175 if (test_bit(__E1000_DOWN, &adapter->state))
5178 link = e1000e_has_link(adapter);
5179 if ((netif_carrier_ok(netdev)) && link) {
5180 /* Cancel scheduled suspend requests. */
5181 pm_runtime_resume(netdev->dev.parent);
5183 e1000e_enable_receives(adapter);
5187 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5188 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5189 e1000_update_mng_vlan(adapter);
5192 if (!netif_carrier_ok(netdev)) {
5195 /* Cancel scheduled suspend requests. */
5196 pm_runtime_resume(netdev->dev.parent);
5198 /* update snapshot of PHY registers on LSC */
5199 e1000_phy_read_status(adapter);
5200 mac->ops.get_link_up_info(&adapter->hw,
5201 &adapter->link_speed,
5202 &adapter->link_duplex);
5203 e1000_print_link_info(adapter);
5205 /* check if SmartSpeed worked */
5206 e1000e_check_downshift(hw);
5207 if (phy->speed_downgraded)
5209 "Link Speed was downgraded by SmartSpeed\n");
5211 /* On supported PHYs, check for duplex mismatch only
5212 * if link has autonegotiated at 10/100 half
5214 if ((hw->phy.type == e1000_phy_igp_3 ||
5215 hw->phy.type == e1000_phy_bm) &&
5217 (adapter->link_speed == SPEED_10 ||
5218 adapter->link_speed == SPEED_100) &&
5219 (adapter->link_duplex == HALF_DUPLEX)) {
5222 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5224 if (!(autoneg_exp & EXPANSION_NWAY))
5225 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5228 /* adjust timeout factor according to speed/duplex */
5229 adapter->tx_timeout_factor = 1;
5230 switch (adapter->link_speed) {
5233 adapter->tx_timeout_factor = 16;
5237 adapter->tx_timeout_factor = 10;
5241 /* workaround: re-program speed mode bit after
5244 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5248 tarc0 = er32(TARC(0));
5249 tarc0 &= ~SPEED_MODE_BIT;
5250 ew32(TARC(0), tarc0);
5253 /* enable transmits in the hardware, need to do this
5254 * after setting TARC(0)
5257 tctl |= E1000_TCTL_EN;
5260 /* Perform any post-link-up configuration before
5261 * reporting link up.
5263 if (phy->ops.cfg_on_link_up)
5264 phy->ops.cfg_on_link_up(hw);
5266 netif_wake_queue(netdev);
5267 netif_carrier_on(netdev);
5269 if (!test_bit(__E1000_DOWN, &adapter->state))
5270 mod_timer(&adapter->phy_info_timer,
5271 round_jiffies(jiffies + 2 * HZ));
5274 if (netif_carrier_ok(netdev)) {
5275 adapter->link_speed = 0;
5276 adapter->link_duplex = 0;
5277 /* Link status message must follow this format */
5278 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5279 netif_carrier_off(netdev);
5280 netif_stop_queue(netdev);
5281 if (!test_bit(__E1000_DOWN, &adapter->state))
5282 mod_timer(&adapter->phy_info_timer,
5283 round_jiffies(jiffies + 2 * HZ));
5285 /* 8000ES2LAN requires a Rx packet buffer work-around
5286 * on link down event; reset the controller to flush
5287 * the Rx packet buffer.
5289 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5290 adapter->flags |= FLAG_RESTART_NOW;
5292 pm_schedule_suspend(netdev->dev.parent,
5298 spin_lock(&adapter->stats64_lock);
5299 e1000e_update_stats(adapter);
5301 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5302 adapter->tpt_old = adapter->stats.tpt;
5303 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5304 adapter->colc_old = adapter->stats.colc;
5306 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5307 adapter->gorc_old = adapter->stats.gorc;
5308 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5309 adapter->gotc_old = adapter->stats.gotc;
5310 spin_unlock(&adapter->stats64_lock);
5312 /* If the link is lost the controller stops DMA, but
5313 * if there is queued Tx work it cannot be done. So
5314 * reset the controller to flush the Tx packet buffers.
5316 if (!netif_carrier_ok(netdev) &&
5317 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5318 adapter->flags |= FLAG_RESTART_NOW;
5320 /* If reset is necessary, do it outside of interrupt context. */
5321 if (adapter->flags & FLAG_RESTART_NOW) {
5322 schedule_work(&adapter->reset_task);
5323 /* return immediately since reset is imminent */
5327 e1000e_update_adaptive(&adapter->hw);
5329 /* Simple mode for Interrupt Throttle Rate (ITR) */
5330 if (adapter->itr_setting == 4) {
5331 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5332 * Total asymmetrical Tx or Rx gets ITR=8000;
5333 * everyone else is between 2000-8000.
5335 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5336 u32 dif = (adapter->gotc > adapter->gorc ?
5337 adapter->gotc - adapter->gorc :
5338 adapter->gorc - adapter->gotc) / 10000;
5339 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5341 e1000e_write_itr(adapter, itr);
5344 /* Cause software interrupt to ensure Rx ring is cleaned */
5345 if (adapter->msix_entries)
5346 ew32(ICS, adapter->rx_ring->ims_val);
5348 ew32(ICS, E1000_ICS_RXDMT0);
5350 /* flush pending descriptors to memory before detecting Tx hang */
5351 e1000e_flush_descriptors(adapter);
5353 /* Force detection of hung controller every watchdog period */
5354 adapter->detect_tx_hung = true;
5356 /* With 82571 controllers, LAA may be overwritten due to controller
5357 * reset from the other port. Set the appropriate LAA in RAR[0]
5359 if (e1000e_get_laa_state_82571(hw))
5360 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5362 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5363 e1000e_check_82574_phy_workaround(adapter);
5365 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5366 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5367 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5368 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5370 adapter->rx_hwtstamp_cleared++;
5372 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5376 /* Reset the timer */
5377 if (!test_bit(__E1000_DOWN, &adapter->state))
5378 mod_timer(&adapter->watchdog_timer,
5379 round_jiffies(jiffies + 2 * HZ));
5382 #define E1000_TX_FLAGS_CSUM 0x00000001
5383 #define E1000_TX_FLAGS_VLAN 0x00000002
5384 #define E1000_TX_FLAGS_TSO 0x00000004
5385 #define E1000_TX_FLAGS_IPV4 0x00000008
5386 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5387 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5388 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5389 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5391 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5394 struct e1000_context_desc *context_desc;
5395 struct e1000_buffer *buffer_info;
5399 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5402 if (!skb_is_gso(skb))
5405 err = skb_cow_head(skb, 0);
5409 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5410 mss = skb_shinfo(skb)->gso_size;
5411 if (protocol == htons(ETH_P_IP)) {
5412 struct iphdr *iph = ip_hdr(skb);
5415 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5417 cmd_length = E1000_TXD_CMD_IP;
5418 ipcse = skb_transport_offset(skb) - 1;
5419 } else if (skb_is_gso_v6(skb)) {
5420 ipv6_hdr(skb)->payload_len = 0;
5421 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5422 &ipv6_hdr(skb)->daddr,
5426 ipcss = skb_network_offset(skb);
5427 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5428 tucss = skb_transport_offset(skb);
5429 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5431 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5432 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5434 i = tx_ring->next_to_use;
5435 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5436 buffer_info = &tx_ring->buffer_info[i];
5438 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5439 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5440 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5441 context_desc->upper_setup.tcp_fields.tucss = tucss;
5442 context_desc->upper_setup.tcp_fields.tucso = tucso;
5443 context_desc->upper_setup.tcp_fields.tucse = 0;
5444 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5445 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5446 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5448 buffer_info->time_stamp = jiffies;
5449 buffer_info->next_to_watch = i;
5452 if (i == tx_ring->count)
5454 tx_ring->next_to_use = i;
5459 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5462 struct e1000_adapter *adapter = tx_ring->adapter;
5463 struct e1000_context_desc *context_desc;
5464 struct e1000_buffer *buffer_info;
5467 u32 cmd_len = E1000_TXD_CMD_DEXT;
5469 if (skb->ip_summed != CHECKSUM_PARTIAL)
5473 case cpu_to_be16(ETH_P_IP):
5474 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5475 cmd_len |= E1000_TXD_CMD_TCP;
5477 case cpu_to_be16(ETH_P_IPV6):
5478 /* XXX not handling all IPV6 headers */
5479 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5480 cmd_len |= E1000_TXD_CMD_TCP;
5483 if (unlikely(net_ratelimit()))
5484 e_warn("checksum_partial proto=%x!\n",
5485 be16_to_cpu(protocol));
5489 css = skb_checksum_start_offset(skb);
5491 i = tx_ring->next_to_use;
5492 buffer_info = &tx_ring->buffer_info[i];
5493 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5495 context_desc->lower_setup.ip_config = 0;
5496 context_desc->upper_setup.tcp_fields.tucss = css;
5497 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5498 context_desc->upper_setup.tcp_fields.tucse = 0;
5499 context_desc->tcp_seg_setup.data = 0;
5500 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5502 buffer_info->time_stamp = jiffies;
5503 buffer_info->next_to_watch = i;
5506 if (i == tx_ring->count)
5508 tx_ring->next_to_use = i;
5513 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5514 unsigned int first, unsigned int max_per_txd,
5515 unsigned int nr_frags)
5517 struct e1000_adapter *adapter = tx_ring->adapter;
5518 struct pci_dev *pdev = adapter->pdev;
5519 struct e1000_buffer *buffer_info;
5520 unsigned int len = skb_headlen(skb);
5521 unsigned int offset = 0, size, count = 0, i;
5522 unsigned int f, bytecount, segs;
5524 i = tx_ring->next_to_use;
5527 buffer_info = &tx_ring->buffer_info[i];
5528 size = min(len, max_per_txd);
5530 buffer_info->length = size;
5531 buffer_info->time_stamp = jiffies;
5532 buffer_info->next_to_watch = i;
5533 buffer_info->dma = dma_map_single(&pdev->dev,
5535 size, DMA_TO_DEVICE);
5536 buffer_info->mapped_as_page = false;
5537 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5546 if (i == tx_ring->count)
5551 for (f = 0; f < nr_frags; f++) {
5552 const struct skb_frag_struct *frag;
5554 frag = &skb_shinfo(skb)->frags[f];
5555 len = skb_frag_size(frag);
5560 if (i == tx_ring->count)
5563 buffer_info = &tx_ring->buffer_info[i];
5564 size = min(len, max_per_txd);
5566 buffer_info->length = size;
5567 buffer_info->time_stamp = jiffies;
5568 buffer_info->next_to_watch = i;
5569 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5572 buffer_info->mapped_as_page = true;
5573 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5582 segs = skb_shinfo(skb)->gso_segs ? : 1;
5583 /* multiply data chunks by size of headers */
5584 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5586 tx_ring->buffer_info[i].skb = skb;
5587 tx_ring->buffer_info[i].segs = segs;
5588 tx_ring->buffer_info[i].bytecount = bytecount;
5589 tx_ring->buffer_info[first].next_to_watch = i;
5594 dev_err(&pdev->dev, "Tx DMA map failed\n");
5595 buffer_info->dma = 0;
5601 i += tx_ring->count;
5603 buffer_info = &tx_ring->buffer_info[i];
5604 e1000_put_txbuf(tx_ring, buffer_info);
5610 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5612 struct e1000_adapter *adapter = tx_ring->adapter;
5613 struct e1000_tx_desc *tx_desc = NULL;
5614 struct e1000_buffer *buffer_info;
5615 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5618 if (tx_flags & E1000_TX_FLAGS_TSO) {
5619 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5621 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5623 if (tx_flags & E1000_TX_FLAGS_IPV4)
5624 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5627 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5628 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5629 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5632 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5633 txd_lower |= E1000_TXD_CMD_VLE;
5634 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5637 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5638 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5640 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5641 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5642 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5645 i = tx_ring->next_to_use;
5648 buffer_info = &tx_ring->buffer_info[i];
5649 tx_desc = E1000_TX_DESC(*tx_ring, i);
5650 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5651 tx_desc->lower.data = cpu_to_le32(txd_lower |
5652 buffer_info->length);
5653 tx_desc->upper.data = cpu_to_le32(txd_upper);
5656 if (i == tx_ring->count)
5658 } while (--count > 0);
5660 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5662 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5663 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5664 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5666 /* Force memory writes to complete before letting h/w
5667 * know there are new descriptors to fetch. (Only
5668 * applicable for weak-ordered memory model archs,
5673 tx_ring->next_to_use = i;
5676 #define MINIMUM_DHCP_PACKET_SIZE 282
5677 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5678 struct sk_buff *skb)
5680 struct e1000_hw *hw = &adapter->hw;
5683 if (skb_vlan_tag_present(skb) &&
5684 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5685 (adapter->hw.mng_cookie.status &
5686 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5689 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5692 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5696 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5699 if (ip->protocol != IPPROTO_UDP)
5702 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5703 if (ntohs(udp->dest) != 67)
5706 offset = (u8 *)udp + 8 - skb->data;
5707 length = skb->len - offset;
5708 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5714 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5716 struct e1000_adapter *adapter = tx_ring->adapter;
5718 netif_stop_queue(adapter->netdev);
5719 /* Herbert's original patch had:
5720 * smp_mb__after_netif_stop_queue();
5721 * but since that doesn't exist yet, just open code it.
5725 /* We need to check again in a case another CPU has just
5726 * made room available.
5728 if (e1000_desc_unused(tx_ring) < size)
5732 netif_start_queue(adapter->netdev);
5733 ++adapter->restart_queue;
5737 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5739 BUG_ON(size > tx_ring->count);
5741 if (e1000_desc_unused(tx_ring) >= size)
5743 return __e1000_maybe_stop_tx(tx_ring, size);
5746 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5747 struct net_device *netdev)
5749 struct e1000_adapter *adapter = netdev_priv(netdev);
5750 struct e1000_ring *tx_ring = adapter->tx_ring;
5752 unsigned int tx_flags = 0;
5753 unsigned int len = skb_headlen(skb);
5754 unsigned int nr_frags;
5759 __be16 protocol = vlan_get_protocol(skb);
5761 if (test_bit(__E1000_DOWN, &adapter->state)) {
5762 dev_kfree_skb_any(skb);
5763 return NETDEV_TX_OK;
5766 if (skb->len <= 0) {
5767 dev_kfree_skb_any(skb);
5768 return NETDEV_TX_OK;
5771 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5772 * pad skb in order to meet this minimum size requirement
5774 if (skb_put_padto(skb, 17))
5775 return NETDEV_TX_OK;
5777 mss = skb_shinfo(skb)->gso_size;
5781 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5782 * points to just header, pull a few bytes of payload from
5783 * frags into skb->data
5785 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5786 /* we do this workaround for ES2LAN, but it is un-necessary,
5787 * avoiding it could save a lot of cycles
5789 if (skb->data_len && (hdr_len == len)) {
5790 unsigned int pull_size;
5792 pull_size = min_t(unsigned int, 4, skb->data_len);
5793 if (!__pskb_pull_tail(skb, pull_size)) {
5794 e_err("__pskb_pull_tail failed.\n");
5795 dev_kfree_skb_any(skb);
5796 return NETDEV_TX_OK;
5798 len = skb_headlen(skb);
5802 /* reserve a descriptor for the offload context */
5803 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5807 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5809 nr_frags = skb_shinfo(skb)->nr_frags;
5810 for (f = 0; f < nr_frags; f++)
5811 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5812 adapter->tx_fifo_limit);
5814 if (adapter->hw.mac.tx_pkt_filtering)
5815 e1000_transfer_dhcp_info(adapter, skb);
5817 /* need: count + 2 desc gap to keep tail from touching
5818 * head, otherwise try next time
5820 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5821 return NETDEV_TX_BUSY;
5823 if (skb_vlan_tag_present(skb)) {
5824 tx_flags |= E1000_TX_FLAGS_VLAN;
5825 tx_flags |= (skb_vlan_tag_get(skb) <<
5826 E1000_TX_FLAGS_VLAN_SHIFT);
5829 first = tx_ring->next_to_use;
5831 tso = e1000_tso(tx_ring, skb, protocol);
5833 dev_kfree_skb_any(skb);
5834 return NETDEV_TX_OK;
5838 tx_flags |= E1000_TX_FLAGS_TSO;
5839 else if (e1000_tx_csum(tx_ring, skb, protocol))
5840 tx_flags |= E1000_TX_FLAGS_CSUM;
5842 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5843 * 82571 hardware supports TSO capabilities for IPv6 as well...
5844 * no longer assume, we must.
5846 if (protocol == htons(ETH_P_IP))
5847 tx_flags |= E1000_TX_FLAGS_IPV4;
5849 if (unlikely(skb->no_fcs))
5850 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5852 /* if count is 0 then mapping error has occurred */
5853 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5856 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5857 (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5858 if (!adapter->tx_hwtstamp_skb) {
5859 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5860 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5861 adapter->tx_hwtstamp_skb = skb_get(skb);
5862 adapter->tx_hwtstamp_start = jiffies;
5863 schedule_work(&adapter->tx_hwtstamp_work);
5865 adapter->tx_hwtstamp_skipped++;
5869 skb_tx_timestamp(skb);
5871 netdev_sent_queue(netdev, skb->len);
5872 e1000_tx_queue(tx_ring, tx_flags, count);
5873 /* Make sure there is space in the ring for the next send. */
5874 e1000_maybe_stop_tx(tx_ring,
5875 ((MAX_SKB_FRAGS + 1) *
5876 DIV_ROUND_UP(PAGE_SIZE,
5877 adapter->tx_fifo_limit) + 4));
5879 if (!skb->xmit_more ||
5880 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5881 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5882 e1000e_update_tdt_wa(tx_ring,
5883 tx_ring->next_to_use);
5885 writel(tx_ring->next_to_use, tx_ring->tail);
5887 /* we need this if more than one processor can write
5888 * to our tail at a time, it synchronizes IO on
5894 dev_kfree_skb_any(skb);
5895 tx_ring->buffer_info[first].time_stamp = 0;
5896 tx_ring->next_to_use = first;
5899 return NETDEV_TX_OK;
5903 * e1000_tx_timeout - Respond to a Tx Hang
5904 * @netdev: network interface device structure
5906 static void e1000_tx_timeout(struct net_device *netdev)
5908 struct e1000_adapter *adapter = netdev_priv(netdev);
5910 /* Do the reset outside of interrupt context */
5911 adapter->tx_timeout_count++;
5912 schedule_work(&adapter->reset_task);
5915 static void e1000_reset_task(struct work_struct *work)
5917 struct e1000_adapter *adapter;
5918 adapter = container_of(work, struct e1000_adapter, reset_task);
5921 /* don't run the task if already down */
5922 if (test_bit(__E1000_DOWN, &adapter->state)) {
5927 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5928 e1000e_dump(adapter);
5929 e_err("Reset adapter unexpectedly\n");
5931 e1000e_reinit_locked(adapter);
5936 * e1000_get_stats64 - Get System Network Statistics
5937 * @netdev: network interface device structure
5938 * @stats: rtnl_link_stats64 pointer
5940 * Returns the address of the device statistics structure.
5942 void e1000e_get_stats64(struct net_device *netdev,
5943 struct rtnl_link_stats64 *stats)
5945 struct e1000_adapter *adapter = netdev_priv(netdev);
5947 spin_lock(&adapter->stats64_lock);
5948 e1000e_update_stats(adapter);
5949 /* Fill out the OS statistics structure */
5950 stats->rx_bytes = adapter->stats.gorc;
5951 stats->rx_packets = adapter->stats.gprc;
5952 stats->tx_bytes = adapter->stats.gotc;
5953 stats->tx_packets = adapter->stats.gptc;
5954 stats->multicast = adapter->stats.mprc;
5955 stats->collisions = adapter->stats.colc;
5959 /* RLEC on some newer hardware can be incorrect so build
5960 * our own version based on RUC and ROC
5962 stats->rx_errors = adapter->stats.rxerrc +
5963 adapter->stats.crcerrs + adapter->stats.algnerrc +
5964 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5965 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5966 stats->rx_crc_errors = adapter->stats.crcerrs;
5967 stats->rx_frame_errors = adapter->stats.algnerrc;
5968 stats->rx_missed_errors = adapter->stats.mpc;
5971 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5972 stats->tx_aborted_errors = adapter->stats.ecol;
5973 stats->tx_window_errors = adapter->stats.latecol;
5974 stats->tx_carrier_errors = adapter->stats.tncrs;
5976 /* Tx Dropped needs to be maintained elsewhere */
5978 spin_unlock(&adapter->stats64_lock);
5982 * e1000_change_mtu - Change the Maximum Transfer Unit
5983 * @netdev: network interface device structure
5984 * @new_mtu: new value for maximum frame size
5986 * Returns 0 on success, negative on failure
5988 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5990 struct e1000_adapter *adapter = netdev_priv(netdev);
5991 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5993 /* Jumbo frame support */
5994 if ((new_mtu > ETH_DATA_LEN) &&
5995 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5996 e_err("Jumbo Frames not supported.\n");
6000 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6001 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6002 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6003 (new_mtu > ETH_DATA_LEN)) {
6004 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6008 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6009 usleep_range(1000, 2000);
6010 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6011 adapter->max_frame_size = max_frame;
6012 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6013 netdev->mtu = new_mtu;
6015 pm_runtime_get_sync(netdev->dev.parent);
6017 if (netif_running(netdev))
6018 e1000e_down(adapter, true);
6020 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6021 * means we reserve 2 more, this pushes us to allocate from the next
6023 * i.e. RXBUFFER_2048 --> size-4096 slab
6024 * However with the new *_jumbo_rx* routines, jumbo receives will use
6028 if (max_frame <= 2048)
6029 adapter->rx_buffer_len = 2048;
6031 adapter->rx_buffer_len = 4096;
6033 /* adjust allocation if LPE protects us, and we aren't using SBP */
6034 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6035 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6037 if (netif_running(netdev))
6040 e1000e_reset(adapter);
6042 pm_runtime_put_sync(netdev->dev.parent);
6044 clear_bit(__E1000_RESETTING, &adapter->state);
6049 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6052 struct e1000_adapter *adapter = netdev_priv(netdev);
6053 struct mii_ioctl_data *data = if_mii(ifr);
6055 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6060 data->phy_id = adapter->hw.phy.addr;
6063 e1000_phy_read_status(adapter);
6065 switch (data->reg_num & 0x1F) {
6067 data->val_out = adapter->phy_regs.bmcr;
6070 data->val_out = adapter->phy_regs.bmsr;
6073 data->val_out = (adapter->hw.phy.id >> 16);
6076 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6079 data->val_out = adapter->phy_regs.advertise;
6082 data->val_out = adapter->phy_regs.lpa;
6085 data->val_out = adapter->phy_regs.expansion;
6088 data->val_out = adapter->phy_regs.ctrl1000;
6091 data->val_out = adapter->phy_regs.stat1000;
6094 data->val_out = adapter->phy_regs.estatus;
6108 * e1000e_hwtstamp_ioctl - control hardware time stamping
6109 * @netdev: network interface device structure
6110 * @ifreq: interface request
6112 * Outgoing time stamping can be enabled and disabled. Play nice and
6113 * disable it when requested, although it shouldn't cause any overhead
6114 * when no packet needs it. At most one packet in the queue may be
6115 * marked for time stamping, otherwise it would be impossible to tell
6116 * for sure to which packet the hardware time stamp belongs.
6118 * Incoming time stamping has to be configured via the hardware filters.
6119 * Not all combinations are supported, in particular event type has to be
6120 * specified. Matching the kind of event packet is not supported, with the
6121 * exception of "all V2 events regardless of level 2 or 4".
6123 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6125 struct e1000_adapter *adapter = netdev_priv(netdev);
6126 struct hwtstamp_config config;
6129 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6132 ret_val = e1000e_config_hwtstamp(adapter, &config);
6136 switch (config.rx_filter) {
6137 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6138 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6139 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6140 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6141 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6142 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6143 /* With V2 type filters which specify a Sync or Delay Request,
6144 * Path Delay Request/Response messages are also time stamped
6145 * by hardware so notify the caller the requested packets plus
6146 * some others are time stamped.
6148 config.rx_filter = HWTSTAMP_FILTER_SOME;
6154 return copy_to_user(ifr->ifr_data, &config,
6155 sizeof(config)) ? -EFAULT : 0;
6158 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6160 struct e1000_adapter *adapter = netdev_priv(netdev);
6162 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6163 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6166 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6172 return e1000_mii_ioctl(netdev, ifr, cmd);
6174 return e1000e_hwtstamp_set(netdev, ifr);
6176 return e1000e_hwtstamp_get(netdev, ifr);
6182 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6184 struct e1000_hw *hw = &adapter->hw;
6185 u32 i, mac_reg, wuc;
6186 u16 phy_reg, wuc_enable;
6189 /* copy MAC RARs to PHY RARs */
6190 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6192 retval = hw->phy.ops.acquire(hw);
6194 e_err("Could not acquire PHY\n");
6198 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6199 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6203 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6204 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6205 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6206 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6207 (u16)(mac_reg & 0xFFFF));
6208 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6209 (u16)((mac_reg >> 16) & 0xFFFF));
6212 /* configure PHY Rx Control register */
6213 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6214 mac_reg = er32(RCTL);
6215 if (mac_reg & E1000_RCTL_UPE)
6216 phy_reg |= BM_RCTL_UPE;
6217 if (mac_reg & E1000_RCTL_MPE)
6218 phy_reg |= BM_RCTL_MPE;
6219 phy_reg &= ~(BM_RCTL_MO_MASK);
6220 if (mac_reg & E1000_RCTL_MO_3)
6221 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6222 << BM_RCTL_MO_SHIFT);
6223 if (mac_reg & E1000_RCTL_BAM)
6224 phy_reg |= BM_RCTL_BAM;
6225 if (mac_reg & E1000_RCTL_PMCF)
6226 phy_reg |= BM_RCTL_PMCF;
6227 mac_reg = er32(CTRL);
6228 if (mac_reg & E1000_CTRL_RFCE)
6229 phy_reg |= BM_RCTL_RFCE;
6230 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6232 wuc = E1000_WUC_PME_EN;
6233 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6234 wuc |= E1000_WUC_APME;
6236 /* enable PHY wakeup in MAC register */
6238 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6239 E1000_WUC_PME_STATUS | wuc));
6241 /* configure and enable PHY wakeup in PHY registers */
6242 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6243 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6245 /* activate PHY wakeup */
6246 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6247 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6249 e_err("Could not set PHY Host Wakeup bit\n");
6251 hw->phy.ops.release(hw);
6256 static void e1000e_flush_lpic(struct pci_dev *pdev)
6258 struct net_device *netdev = pci_get_drvdata(pdev);
6259 struct e1000_adapter *adapter = netdev_priv(netdev);
6260 struct e1000_hw *hw = &adapter->hw;
6263 pm_runtime_get_sync(netdev->dev.parent);
6265 ret_val = hw->phy.ops.acquire(hw);
6269 pr_info("EEE TX LPI TIMER: %08X\n",
6270 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6272 hw->phy.ops.release(hw);
6275 pm_runtime_put_sync(netdev->dev.parent);
6278 static int e1000e_pm_freeze(struct device *dev)
6280 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6281 struct e1000_adapter *adapter = netdev_priv(netdev);
6283 netif_device_detach(netdev);
6285 if (netif_running(netdev)) {
6286 int count = E1000_CHECK_RESET_COUNT;
6288 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6289 usleep_range(10000, 20000);
6291 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6293 /* Quiesce the device without resetting the hardware */
6294 e1000e_down(adapter, false);
6295 e1000_free_irq(adapter);
6297 e1000e_reset_interrupt_capability(adapter);
6299 /* Allow time for pending master requests to run */
6300 e1000e_disable_pcie_master(&adapter->hw);
6305 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6307 struct net_device *netdev = pci_get_drvdata(pdev);
6308 struct e1000_adapter *adapter = netdev_priv(netdev);
6309 struct e1000_hw *hw = &adapter->hw;
6310 u32 ctrl, ctrl_ext, rctl, status, wufc;
6313 /* Runtime suspend should only enable wakeup for link changes */
6315 wufc = E1000_WUFC_LNKC;
6316 else if (device_may_wakeup(&pdev->dev))
6317 wufc = adapter->wol;
6321 status = er32(STATUS);
6322 if (status & E1000_STATUS_LU)
6323 wufc &= ~E1000_WUFC_LNKC;
6326 e1000_setup_rctl(adapter);
6327 e1000e_set_rx_mode(netdev);
6329 /* turn on all-multi mode if wake on multicast is enabled */
6330 if (wufc & E1000_WUFC_MC) {
6332 rctl |= E1000_RCTL_MPE;
6337 ctrl |= E1000_CTRL_ADVD3WUC;
6338 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6339 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6342 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6343 adapter->hw.phy.media_type ==
6344 e1000_media_type_internal_serdes) {
6345 /* keep the laser running in D3 */
6346 ctrl_ext = er32(CTRL_EXT);
6347 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6348 ew32(CTRL_EXT, ctrl_ext);
6352 e1000e_power_up_phy(adapter);
6354 if (adapter->flags & FLAG_IS_ICH)
6355 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6357 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6358 /* enable wakeup by the PHY */
6359 retval = e1000_init_phy_wakeup(adapter, wufc);
6363 /* enable wakeup by the MAC */
6365 ew32(WUC, E1000_WUC_PME_EN);
6371 e1000_power_down_phy(adapter);
6374 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6375 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6376 } else if (hw->mac.type >= e1000_pch_lpt) {
6377 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6378 /* ULP does not support wake from unicast, multicast
6381 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6387 /* Ensure that the appropriate bits are set in LPI_CTRL
6390 if ((hw->phy.type >= e1000_phy_i217) &&
6391 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6394 retval = hw->phy.ops.acquire(hw);
6396 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6399 if (adapter->eee_advert &
6400 hw->dev_spec.ich8lan.eee_lp_ability &
6401 I82579_EEE_100_SUPPORTED)
6402 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6403 if (adapter->eee_advert &
6404 hw->dev_spec.ich8lan.eee_lp_ability &
6405 I82579_EEE_1000_SUPPORTED)
6406 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6408 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6412 hw->phy.ops.release(hw);
6415 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6416 * would have already happened in close and is redundant.
6418 e1000e_release_hw_control(adapter);
6420 pci_clear_master(pdev);
6422 /* The pci-e switch on some quad port adapters will report a
6423 * correctable error when the MAC transitions from D0 to D3. To
6424 * prevent this we need to mask off the correctable errors on the
6425 * downstream port of the pci-e switch.
6427 * We don't have the associated upstream bridge while assigning
6428 * the PCI device into guest. For example, the KVM on power is
6431 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6432 struct pci_dev *us_dev = pdev->bus->self;
6438 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6439 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6440 (devctl & ~PCI_EXP_DEVCTL_CERE));
6442 pci_save_state(pdev);
6443 pci_prepare_to_sleep(pdev);
6445 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6452 * __e1000e_disable_aspm - Disable ASPM states
6453 * @pdev: pointer to PCI device struct
6454 * @state: bit-mask of ASPM states to disable
6455 * @locked: indication if this context holds pci_bus_sem locked.
6457 * Some devices *must* have certain ASPM states disabled per hardware errata.
6459 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6461 struct pci_dev *parent = pdev->bus->self;
6462 u16 aspm_dis_mask = 0;
6463 u16 pdev_aspmc, parent_aspmc;
6466 case PCIE_LINK_STATE_L0S:
6467 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6468 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6469 /* fall-through - can't have L1 without L0s */
6470 case PCIE_LINK_STATE_L1:
6471 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6477 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6478 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6481 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6483 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6486 /* Nothing to do if the ASPM states to be disabled already are */
6487 if (!(pdev_aspmc & aspm_dis_mask) &&
6488 (!parent || !(parent_aspmc & aspm_dis_mask)))
6491 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6492 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6494 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6497 #ifdef CONFIG_PCIEASPM
6499 pci_disable_link_state_locked(pdev, state);
6501 pci_disable_link_state(pdev, state);
6503 /* Double-check ASPM control. If not disabled by the above, the
6504 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6505 * not enabled); override by writing PCI config space directly.
6507 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6508 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6510 if (!(aspm_dis_mask & pdev_aspmc))
6514 /* Both device and parent should have the same ASPM setting.
6515 * Disable ASPM in downstream component first and then upstream.
6517 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6520 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6525 * e1000e_disable_aspm - Disable ASPM states.
6526 * @pdev: pointer to PCI device struct
6527 * @state: bit-mask of ASPM states to disable
6529 * This function acquires the pci_bus_sem!
6530 * Some devices *must* have certain ASPM states disabled per hardware errata.
6532 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6534 __e1000e_disable_aspm(pdev, state, 0);
6538 * e1000e_disable_aspm_locked Disable ASPM states.
6539 * @pdev: pointer to PCI device struct
6540 * @state: bit-mask of ASPM states to disable
6542 * This function must be called with pci_bus_sem acquired!
6543 * Some devices *must* have certain ASPM states disabled per hardware errata.
6545 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6547 __e1000e_disable_aspm(pdev, state, 1);
6551 static int __e1000_resume(struct pci_dev *pdev)
6553 struct net_device *netdev = pci_get_drvdata(pdev);
6554 struct e1000_adapter *adapter = netdev_priv(netdev);
6555 struct e1000_hw *hw = &adapter->hw;
6556 u16 aspm_disable_flag = 0;
6558 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6559 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6560 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6561 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6562 if (aspm_disable_flag)
6563 e1000e_disable_aspm(pdev, aspm_disable_flag);
6565 pci_set_master(pdev);
6567 if (hw->mac.type >= e1000_pch2lan)
6568 e1000_resume_workarounds_pchlan(&adapter->hw);
6570 e1000e_power_up_phy(adapter);
6572 /* report the system wakeup cause from S3/S4 */
6573 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6576 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6578 e_info("PHY Wakeup cause - %s\n",
6579 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6580 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6581 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6582 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6583 phy_data & E1000_WUS_LNKC ?
6584 "Link Status Change" : "other");
6586 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6588 u32 wus = er32(WUS);
6591 e_info("MAC Wakeup cause - %s\n",
6592 wus & E1000_WUS_EX ? "Unicast Packet" :
6593 wus & E1000_WUS_MC ? "Multicast Packet" :
6594 wus & E1000_WUS_BC ? "Broadcast Packet" :
6595 wus & E1000_WUS_MAG ? "Magic Packet" :
6596 wus & E1000_WUS_LNKC ? "Link Status Change" :
6602 e1000e_reset(adapter);
6604 e1000_init_manageability_pt(adapter);
6606 /* If the controller has AMT, do not set DRV_LOAD until the interface
6607 * is up. For all other cases, let the f/w know that the h/w is now
6608 * under the control of the driver.
6610 if (!(adapter->flags & FLAG_HAS_AMT))
6611 e1000e_get_hw_control(adapter);
6616 #ifdef CONFIG_PM_SLEEP
6617 static int e1000e_pm_thaw(struct device *dev)
6619 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6620 struct e1000_adapter *adapter = netdev_priv(netdev);
6622 e1000e_set_interrupt_capability(adapter);
6623 if (netif_running(netdev)) {
6624 u32 err = e1000_request_irq(adapter);
6632 netif_device_attach(netdev);
6637 static int e1000e_pm_suspend(struct device *dev)
6639 struct pci_dev *pdev = to_pci_dev(dev);
6642 e1000e_flush_lpic(pdev);
6644 e1000e_pm_freeze(dev);
6646 rc = __e1000_shutdown(pdev, false);
6648 e1000e_pm_thaw(dev);
6653 static int e1000e_pm_resume(struct device *dev)
6655 struct pci_dev *pdev = to_pci_dev(dev);
6658 rc = __e1000_resume(pdev);
6662 return e1000e_pm_thaw(dev);
6664 #endif /* CONFIG_PM_SLEEP */
6666 static int e1000e_pm_runtime_idle(struct device *dev)
6668 struct pci_dev *pdev = to_pci_dev(dev);
6669 struct net_device *netdev = pci_get_drvdata(pdev);
6670 struct e1000_adapter *adapter = netdev_priv(netdev);
6673 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6675 if (!e1000e_has_link(adapter)) {
6676 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6677 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6683 static int e1000e_pm_runtime_resume(struct device *dev)
6685 struct pci_dev *pdev = to_pci_dev(dev);
6686 struct net_device *netdev = pci_get_drvdata(pdev);
6687 struct e1000_adapter *adapter = netdev_priv(netdev);
6690 rc = __e1000_resume(pdev);
6694 if (netdev->flags & IFF_UP)
6700 static int e1000e_pm_runtime_suspend(struct device *dev)
6702 struct pci_dev *pdev = to_pci_dev(dev);
6703 struct net_device *netdev = pci_get_drvdata(pdev);
6704 struct e1000_adapter *adapter = netdev_priv(netdev);
6706 if (netdev->flags & IFF_UP) {
6707 int count = E1000_CHECK_RESET_COUNT;
6709 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6710 usleep_range(10000, 20000);
6712 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6714 /* Down the device without resetting the hardware */
6715 e1000e_down(adapter, false);
6718 if (__e1000_shutdown(pdev, true)) {
6719 e1000e_pm_runtime_resume(dev);
6725 #endif /* CONFIG_PM */
6727 static void e1000_shutdown(struct pci_dev *pdev)
6729 e1000e_flush_lpic(pdev);
6731 e1000e_pm_freeze(&pdev->dev);
6733 __e1000_shutdown(pdev, false);
6736 #ifdef CONFIG_NET_POLL_CONTROLLER
6738 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6740 struct net_device *netdev = data;
6741 struct e1000_adapter *adapter = netdev_priv(netdev);
6743 if (adapter->msix_entries) {
6744 int vector, msix_irq;
6747 msix_irq = adapter->msix_entries[vector].vector;
6748 if (disable_hardirq(msix_irq))
6749 e1000_intr_msix_rx(msix_irq, netdev);
6750 enable_irq(msix_irq);
6753 msix_irq = adapter->msix_entries[vector].vector;
6754 if (disable_hardirq(msix_irq))
6755 e1000_intr_msix_tx(msix_irq, netdev);
6756 enable_irq(msix_irq);
6759 msix_irq = adapter->msix_entries[vector].vector;
6760 if (disable_hardirq(msix_irq))
6761 e1000_msix_other(msix_irq, netdev);
6762 enable_irq(msix_irq);
6770 * @netdev: network interface device structure
6772 * Polling 'interrupt' - used by things like netconsole to send skbs
6773 * without having to re-enable interrupts. It's not called while
6774 * the interrupt routine is executing.
6776 static void e1000_netpoll(struct net_device *netdev)
6778 struct e1000_adapter *adapter = netdev_priv(netdev);
6780 switch (adapter->int_mode) {
6781 case E1000E_INT_MODE_MSIX:
6782 e1000_intr_msix(adapter->pdev->irq, netdev);
6784 case E1000E_INT_MODE_MSI:
6785 if (disable_hardirq(adapter->pdev->irq))
6786 e1000_intr_msi(adapter->pdev->irq, netdev);
6787 enable_irq(adapter->pdev->irq);
6789 default: /* E1000E_INT_MODE_LEGACY */
6790 if (disable_hardirq(adapter->pdev->irq))
6791 e1000_intr(adapter->pdev->irq, netdev);
6792 enable_irq(adapter->pdev->irq);
6799 * e1000_io_error_detected - called when PCI error is detected
6800 * @pdev: Pointer to PCI device
6801 * @state: The current pci connection state
6803 * This function is called after a PCI bus error affecting
6804 * this device has been detected.
6806 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6807 pci_channel_state_t state)
6809 struct net_device *netdev = pci_get_drvdata(pdev);
6810 struct e1000_adapter *adapter = netdev_priv(netdev);
6812 netif_device_detach(netdev);
6814 if (state == pci_channel_io_perm_failure)
6815 return PCI_ERS_RESULT_DISCONNECT;
6817 if (netif_running(netdev))
6818 e1000e_down(adapter, true);
6819 pci_disable_device(pdev);
6821 /* Request a slot slot reset. */
6822 return PCI_ERS_RESULT_NEED_RESET;
6826 * e1000_io_slot_reset - called after the pci bus has been reset.
6827 * @pdev: Pointer to PCI device
6829 * Restart the card from scratch, as if from a cold-boot. Implementation
6830 * resembles the first-half of the e1000e_pm_resume routine.
6832 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6834 struct net_device *netdev = pci_get_drvdata(pdev);
6835 struct e1000_adapter *adapter = netdev_priv(netdev);
6836 struct e1000_hw *hw = &adapter->hw;
6837 u16 aspm_disable_flag = 0;
6839 pci_ers_result_t result;
6841 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6842 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6843 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6844 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6845 if (aspm_disable_flag)
6846 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6848 err = pci_enable_device_mem(pdev);
6851 "Cannot re-enable PCI device after reset.\n");
6852 result = PCI_ERS_RESULT_DISCONNECT;
6854 pdev->state_saved = true;
6855 pci_restore_state(pdev);
6856 pci_set_master(pdev);
6858 pci_enable_wake(pdev, PCI_D3hot, 0);
6859 pci_enable_wake(pdev, PCI_D3cold, 0);
6861 e1000e_reset(adapter);
6863 result = PCI_ERS_RESULT_RECOVERED;
6866 pci_cleanup_aer_uncorrect_error_status(pdev);
6872 * e1000_io_resume - called when traffic can start flowing again.
6873 * @pdev: Pointer to PCI device
6875 * This callback is called when the error recovery driver tells us that
6876 * its OK to resume normal operation. Implementation resembles the
6877 * second-half of the e1000e_pm_resume routine.
6879 static void e1000_io_resume(struct pci_dev *pdev)
6881 struct net_device *netdev = pci_get_drvdata(pdev);
6882 struct e1000_adapter *adapter = netdev_priv(netdev);
6884 e1000_init_manageability_pt(adapter);
6886 if (netif_running(netdev))
6889 netif_device_attach(netdev);
6891 /* If the controller has AMT, do not set DRV_LOAD until the interface
6892 * is up. For all other cases, let the f/w know that the h/w is now
6893 * under the control of the driver.
6895 if (!(adapter->flags & FLAG_HAS_AMT))
6896 e1000e_get_hw_control(adapter);
6899 static void e1000_print_device_info(struct e1000_adapter *adapter)
6901 struct e1000_hw *hw = &adapter->hw;
6902 struct net_device *netdev = adapter->netdev;
6904 u8 pba_str[E1000_PBANUM_LENGTH];
6906 /* print bus type/speed/width info */
6907 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6909 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6913 e_info("Intel(R) PRO/%s Network Connection\n",
6914 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6915 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6916 E1000_PBANUM_LENGTH);
6918 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6919 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6920 hw->mac.type, hw->phy.type, pba_str);
6923 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6925 struct e1000_hw *hw = &adapter->hw;
6929 if (hw->mac.type != e1000_82573)
6932 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6934 if (!ret_val && (!(buf & BIT(0)))) {
6935 /* Deep Smart Power Down (DSPD) */
6936 dev_warn(&adapter->pdev->dev,
6937 "Warning: detected DSPD enabled in EEPROM\n");
6941 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6942 netdev_features_t features)
6944 struct e1000_adapter *adapter = netdev_priv(netdev);
6945 struct e1000_hw *hw = &adapter->hw;
6947 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6948 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6949 features &= ~NETIF_F_RXFCS;
6951 /* Since there is no support for separate Rx/Tx vlan accel
6952 * enable/disable make sure Tx flag is always in same state as Rx.
6954 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6955 features |= NETIF_F_HW_VLAN_CTAG_TX;
6957 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6962 static int e1000_set_features(struct net_device *netdev,
6963 netdev_features_t features)
6965 struct e1000_adapter *adapter = netdev_priv(netdev);
6966 netdev_features_t changed = features ^ netdev->features;
6968 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6969 adapter->flags |= FLAG_TSO_FORCE;
6971 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6972 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6976 if (changed & NETIF_F_RXFCS) {
6977 if (features & NETIF_F_RXFCS) {
6978 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6980 /* We need to take it back to defaults, which might mean
6981 * stripping is still disabled at the adapter level.
6983 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6984 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6986 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6990 netdev->features = features;
6992 if (netif_running(netdev))
6993 e1000e_reinit_locked(adapter);
6995 e1000e_reset(adapter);
7000 static const struct net_device_ops e1000e_netdev_ops = {
7001 .ndo_open = e1000e_open,
7002 .ndo_stop = e1000e_close,
7003 .ndo_start_xmit = e1000_xmit_frame,
7004 .ndo_get_stats64 = e1000e_get_stats64,
7005 .ndo_set_rx_mode = e1000e_set_rx_mode,
7006 .ndo_set_mac_address = e1000_set_mac,
7007 .ndo_change_mtu = e1000_change_mtu,
7008 .ndo_do_ioctl = e1000_ioctl,
7009 .ndo_tx_timeout = e1000_tx_timeout,
7010 .ndo_validate_addr = eth_validate_addr,
7012 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
7013 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
7014 #ifdef CONFIG_NET_POLL_CONTROLLER
7015 .ndo_poll_controller = e1000_netpoll,
7017 .ndo_set_features = e1000_set_features,
7018 .ndo_fix_features = e1000_fix_features,
7019 .ndo_features_check = passthru_features_check,
7023 * e1000_probe - Device Initialization Routine
7024 * @pdev: PCI device information struct
7025 * @ent: entry in e1000_pci_tbl
7027 * Returns 0 on success, negative on failure
7029 * e1000_probe initializes an adapter identified by a pci_dev structure.
7030 * The OS initialization, configuring of the adapter private structure,
7031 * and a hardware reset occur.
7033 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7035 struct net_device *netdev;
7036 struct e1000_adapter *adapter;
7037 struct e1000_hw *hw;
7038 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7039 resource_size_t mmio_start, mmio_len;
7040 resource_size_t flash_start, flash_len;
7041 static int cards_found;
7042 u16 aspm_disable_flag = 0;
7043 int bars, i, err, pci_using_dac;
7044 u16 eeprom_data = 0;
7045 u16 eeprom_apme_mask = E1000_EEPROM_APME;
7048 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7049 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7050 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7051 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7052 if (aspm_disable_flag)
7053 e1000e_disable_aspm(pdev, aspm_disable_flag);
7055 err = pci_enable_device_mem(pdev);
7060 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7064 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7067 "No usable DMA configuration, aborting\n");
7072 bars = pci_select_bars(pdev, IORESOURCE_MEM);
7073 err = pci_request_selected_regions_exclusive(pdev, bars,
7074 e1000e_driver_name);
7078 /* AER (Advanced Error Reporting) hooks */
7079 pci_enable_pcie_error_reporting(pdev);
7081 pci_set_master(pdev);
7082 /* PCI config space info */
7083 err = pci_save_state(pdev);
7085 goto err_alloc_etherdev;
7088 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7090 goto err_alloc_etherdev;
7092 SET_NETDEV_DEV(netdev, &pdev->dev);
7094 netdev->irq = pdev->irq;
7096 pci_set_drvdata(pdev, netdev);
7097 adapter = netdev_priv(netdev);
7099 adapter->netdev = netdev;
7100 adapter->pdev = pdev;
7102 adapter->pba = ei->pba;
7103 adapter->flags = ei->flags;
7104 adapter->flags2 = ei->flags2;
7105 adapter->hw.adapter = adapter;
7106 adapter->hw.mac.type = ei->mac;
7107 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7108 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7110 mmio_start = pci_resource_start(pdev, 0);
7111 mmio_len = pci_resource_len(pdev, 0);
7114 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7115 if (!adapter->hw.hw_addr)
7118 if ((adapter->flags & FLAG_HAS_FLASH) &&
7119 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7120 (hw->mac.type < e1000_pch_spt)) {
7121 flash_start = pci_resource_start(pdev, 1);
7122 flash_len = pci_resource_len(pdev, 1);
7123 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7124 if (!adapter->hw.flash_address)
7128 /* Set default EEE advertisement */
7129 if (adapter->flags2 & FLAG2_HAS_EEE)
7130 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7132 /* construct the net_device struct */
7133 netdev->netdev_ops = &e1000e_netdev_ops;
7134 e1000e_set_ethtool_ops(netdev);
7135 netdev->watchdog_timeo = 5 * HZ;
7136 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7137 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7139 netdev->mem_start = mmio_start;
7140 netdev->mem_end = mmio_start + mmio_len;
7142 adapter->bd_number = cards_found++;
7144 e1000e_check_options(adapter);
7146 /* setup adapter struct */
7147 err = e1000_sw_init(adapter);
7151 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7152 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7153 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7155 err = ei->get_variants(adapter);
7159 if ((adapter->flags & FLAG_IS_ICH) &&
7160 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7161 (hw->mac.type < e1000_pch_spt))
7162 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7164 hw->mac.ops.get_bus_info(&adapter->hw);
7166 adapter->hw.phy.autoneg_wait_to_complete = 0;
7168 /* Copper options */
7169 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7170 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7171 adapter->hw.phy.disable_polarity_correction = 0;
7172 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7175 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7176 dev_info(&pdev->dev,
7177 "PHY reset is blocked due to SOL/IDER session.\n");
7179 /* Set initial default active device features */
7180 netdev->features = (NETIF_F_SG |
7181 NETIF_F_HW_VLAN_CTAG_RX |
7182 NETIF_F_HW_VLAN_CTAG_TX |
7189 /* disable TSO for pcie and 10/100 speeds to avoid
7190 * some hardware issues and for i219 to fix transfer
7191 * speed being capped at 60%
7193 if (!(adapter->flags & FLAG_TSO_FORCE)) {
7194 switch (adapter->link_speed) {
7197 e_info("10/100 speed: disabling TSO\n");
7198 netdev->features &= ~NETIF_F_TSO;
7199 netdev->features &= ~NETIF_F_TSO6;
7202 netdev->features |= NETIF_F_TSO;
7203 netdev->features |= NETIF_F_TSO6;
7209 if (hw->mac.type == e1000_pch_spt) {
7210 netdev->features &= ~NETIF_F_TSO;
7211 netdev->features &= ~NETIF_F_TSO6;
7215 /* Set user-changeable features (subset of all device features) */
7216 netdev->hw_features = netdev->features;
7217 netdev->hw_features |= NETIF_F_RXFCS;
7218 netdev->priv_flags |= IFF_SUPP_NOFCS;
7219 netdev->hw_features |= NETIF_F_RXALL;
7221 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7222 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7224 netdev->vlan_features |= (NETIF_F_SG |
7229 netdev->priv_flags |= IFF_UNICAST_FLT;
7231 if (pci_using_dac) {
7232 netdev->features |= NETIF_F_HIGHDMA;
7233 netdev->vlan_features |= NETIF_F_HIGHDMA;
7236 /* MTU range: 68 - max_hw_frame_size */
7237 netdev->min_mtu = ETH_MIN_MTU;
7238 netdev->max_mtu = adapter->max_hw_frame_size -
7239 (VLAN_ETH_HLEN + ETH_FCS_LEN);
7241 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7242 adapter->flags |= FLAG_MNG_PT_ENABLED;
7244 /* before reading the NVM, reset the controller to
7245 * put the device in a known good starting state
7247 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7249 /* systems with ASPM and others may see the checksum fail on the first
7250 * attempt. Let's give it a few tries
7253 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7256 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7262 e1000_eeprom_checks(adapter);
7264 /* copy the MAC address */
7265 if (e1000e_read_mac_addr(&adapter->hw))
7267 "NVM Read Error while reading MAC address\n");
7269 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7271 if (!is_valid_ether_addr(netdev->dev_addr)) {
7272 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7278 init_timer(&adapter->watchdog_timer);
7279 adapter->watchdog_timer.function = e1000_watchdog;
7280 adapter->watchdog_timer.data = (unsigned long)adapter;
7282 init_timer(&adapter->phy_info_timer);
7283 adapter->phy_info_timer.function = e1000_update_phy_info;
7284 adapter->phy_info_timer.data = (unsigned long)adapter;
7286 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7287 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7288 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7289 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7290 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7292 /* Initialize link parameters. User can change them with ethtool */
7293 adapter->hw.mac.autoneg = 1;
7294 adapter->fc_autoneg = true;
7295 adapter->hw.fc.requested_mode = e1000_fc_default;
7296 adapter->hw.fc.current_mode = e1000_fc_default;
7297 adapter->hw.phy.autoneg_advertised = 0x2f;
7299 /* Initial Wake on LAN setting - If APM wake is enabled in
7300 * the EEPROM, enable the ACPI Magic Packet filter
7302 if (adapter->flags & FLAG_APME_IN_WUC) {
7303 /* APME bit in EEPROM is mapped to WUC.APME */
7304 eeprom_data = er32(WUC);
7305 eeprom_apme_mask = E1000_WUC_APME;
7306 if ((hw->mac.type > e1000_ich10lan) &&
7307 (eeprom_data & E1000_WUC_PHY_WAKE))
7308 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7309 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7310 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7311 (adapter->hw.bus.func == 1))
7312 ret_val = e1000_read_nvm(&adapter->hw,
7313 NVM_INIT_CONTROL3_PORT_B,
7316 ret_val = e1000_read_nvm(&adapter->hw,
7317 NVM_INIT_CONTROL3_PORT_A,
7321 /* fetch WoL from EEPROM */
7323 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7324 else if (eeprom_data & eeprom_apme_mask)
7325 adapter->eeprom_wol |= E1000_WUFC_MAG;
7327 /* now that we have the eeprom settings, apply the special cases
7328 * where the eeprom may be wrong or the board simply won't support
7329 * wake on lan on a particular port
7331 if (!(adapter->flags & FLAG_HAS_WOL))
7332 adapter->eeprom_wol = 0;
7334 /* initialize the wol settings based on the eeprom settings */
7335 adapter->wol = adapter->eeprom_wol;
7337 /* make sure adapter isn't asleep if manageability is enabled */
7338 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7339 (hw->mac.ops.check_mng_mode(hw)))
7340 device_wakeup_enable(&pdev->dev);
7342 /* save off EEPROM version number */
7343 ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7346 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7347 adapter->eeprom_vers = 0;
7350 /* init PTP hardware clock */
7351 e1000e_ptp_init(adapter);
7353 /* reset the hardware with the new settings */
7354 e1000e_reset(adapter);
7356 /* If the controller has AMT, do not set DRV_LOAD until the interface
7357 * is up. For all other cases, let the f/w know that the h/w is now
7358 * under the control of the driver.
7360 if (!(adapter->flags & FLAG_HAS_AMT))
7361 e1000e_get_hw_control(adapter);
7363 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7364 err = register_netdev(netdev);
7368 /* carrier off reporting is important to ethtool even BEFORE open */
7369 netif_carrier_off(netdev);
7371 e1000_print_device_info(adapter);
7373 if (pci_dev_run_wake(pdev))
7374 pm_runtime_put_noidle(&pdev->dev);
7379 if (!(adapter->flags & FLAG_HAS_AMT))
7380 e1000e_release_hw_control(adapter);
7382 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7383 e1000_phy_hw_reset(&adapter->hw);
7385 kfree(adapter->tx_ring);
7386 kfree(adapter->rx_ring);
7388 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7389 iounmap(adapter->hw.flash_address);
7390 e1000e_reset_interrupt_capability(adapter);
7392 iounmap(adapter->hw.hw_addr);
7394 free_netdev(netdev);
7396 pci_disable_pcie_error_reporting(pdev);
7397 pci_release_mem_regions(pdev);
7400 pci_disable_device(pdev);
7405 * e1000_remove - Device Removal Routine
7406 * @pdev: PCI device information struct
7408 * e1000_remove is called by the PCI subsystem to alert the driver
7409 * that it should release a PCI device. The could be caused by a
7410 * Hot-Plug event, or because the driver is going to be removed from
7413 static void e1000_remove(struct pci_dev *pdev)
7415 struct net_device *netdev = pci_get_drvdata(pdev);
7416 struct e1000_adapter *adapter = netdev_priv(netdev);
7417 bool down = test_bit(__E1000_DOWN, &adapter->state);
7419 e1000e_ptp_remove(adapter);
7421 /* The timers may be rescheduled, so explicitly disable them
7422 * from being rescheduled.
7425 set_bit(__E1000_DOWN, &adapter->state);
7426 del_timer_sync(&adapter->watchdog_timer);
7427 del_timer_sync(&adapter->phy_info_timer);
7429 cancel_work_sync(&adapter->reset_task);
7430 cancel_work_sync(&adapter->watchdog_task);
7431 cancel_work_sync(&adapter->downshift_task);
7432 cancel_work_sync(&adapter->update_phy_task);
7433 cancel_work_sync(&adapter->print_hang_task);
7435 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7436 cancel_work_sync(&adapter->tx_hwtstamp_work);
7437 if (adapter->tx_hwtstamp_skb) {
7438 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7439 adapter->tx_hwtstamp_skb = NULL;
7443 /* Don't lie to e1000_close() down the road. */
7445 clear_bit(__E1000_DOWN, &adapter->state);
7446 unregister_netdev(netdev);
7448 if (pci_dev_run_wake(pdev))
7449 pm_runtime_get_noresume(&pdev->dev);
7451 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7452 * would have already happened in close and is redundant.
7454 e1000e_release_hw_control(adapter);
7456 e1000e_reset_interrupt_capability(adapter);
7457 kfree(adapter->tx_ring);
7458 kfree(adapter->rx_ring);
7460 iounmap(adapter->hw.hw_addr);
7461 if ((adapter->hw.flash_address) &&
7462 (adapter->hw.mac.type < e1000_pch_spt))
7463 iounmap(adapter->hw.flash_address);
7464 pci_release_mem_regions(pdev);
7466 free_netdev(netdev);
7469 pci_disable_pcie_error_reporting(pdev);
7471 pci_disable_device(pdev);
7474 /* PCI Error Recovery (ERS) */
7475 static const struct pci_error_handlers e1000_err_handler = {
7476 .error_detected = e1000_io_error_detected,
7477 .slot_reset = e1000_io_slot_reset,
7478 .resume = e1000_io_resume,
7481 static const struct pci_device_id e1000_pci_tbl[] = {
7482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7483 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7484 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7493 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7496 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7507 board_80003es2lan },
7508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7509 board_80003es2lan },
7510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7511 board_80003es2lan },
7512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7513 board_80003es2lan },
7515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7516 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7522 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7524 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7525 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7526 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7527 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7528 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7529 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7530 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7531 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7532 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7534 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7535 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7536 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7538 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7539 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7540 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7542 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7543 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7544 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7545 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7547 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7548 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7550 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7551 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7552 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7553 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7554 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7555 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7556 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7557 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7558 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7562 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7563 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7564 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7565 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7566 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7567 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7568 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7569 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7570 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7571 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7572 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7573 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7574 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7576 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7578 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7580 static const struct dev_pm_ops e1000_pm_ops = {
7581 #ifdef CONFIG_PM_SLEEP
7582 .suspend = e1000e_pm_suspend,
7583 .resume = e1000e_pm_resume,
7584 .freeze = e1000e_pm_freeze,
7585 .thaw = e1000e_pm_thaw,
7586 .poweroff = e1000e_pm_suspend,
7587 .restore = e1000e_pm_resume,
7589 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7590 e1000e_pm_runtime_idle)
7593 /* PCI Device API Driver */
7594 static struct pci_driver e1000_driver = {
7595 .name = e1000e_driver_name,
7596 .id_table = e1000_pci_tbl,
7597 .probe = e1000_probe,
7598 .remove = e1000_remove,
7600 .pm = &e1000_pm_ops,
7602 .shutdown = e1000_shutdown,
7603 .err_handler = &e1000_err_handler
7607 * e1000_init_module - Driver Registration Routine
7609 * e1000_init_module is the first routine called when the driver is
7610 * loaded. All it does is register with the PCI subsystem.
7612 static int __init e1000_init_module(void)
7614 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7615 e1000e_driver_version);
7616 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7618 return pci_register_driver(&e1000_driver);
7620 module_init(e1000_init_module);
7623 * e1000_exit_module - Driver Exit Cleanup Routine
7625 * e1000_exit_module is called just before the driver is removed
7628 static void __exit e1000_exit_module(void)
7630 pci_unregister_driver(&e1000_driver);
7632 module_exit(e1000_exit_module);
7634 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7635 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7636 MODULE_LICENSE("GPL");
7637 MODULE_VERSION(DRV_VERSION);