drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46
  47 #include "e1000.h"
  48
  49 #define DRV_EXTRAVERSION "-k"
  50
  51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  52 char e1000e_driver_name[] = "e1000e";
  53 const char e1000e_driver_version[] = DRV_VERSION;
  54
  55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  56 static int debug = -1;
  57 module_param(debug, int, 0);
  58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  59
  60 static const struct e1000_info *e1000_info_tbl[] = {
  61         [board_82571]           = &e1000_82571_info,
  62         [board_82572]           = &e1000_82572_info,
  63         [board_82573]           = &e1000_82573_info,
  64         [board_82574]           = &e1000_82574_info,
  65         [board_82583]           = &e1000_82583_info,
  66         [board_80003es2lan]     = &e1000_es2_info,
  67         [board_ich8lan]         = &e1000_ich8_info,
  68         [board_ich9lan]         = &e1000_ich9_info,
  69         [board_ich10lan]        = &e1000_ich10_info,
  70         [board_pchlan]          = &e1000_pch_info,
  71         [board_pch2lan]         = &e1000_pch2_info,
  72         [board_pch_lpt]         = &e1000_pch_lpt_info,
  73         [board_pch_spt]         = &e1000_pch_spt_info,
  74 };
  75
  76 struct e1000_reg_info {
  77         u32 ofs;
  78         char *name;
  79 };
  80
  81 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  82         /* General Registers */
  83         {E1000_CTRL, "CTRL"},
  84         {E1000_STATUS, "STATUS"},
  85         {E1000_CTRL_EXT, "CTRL_EXT"},
  86
  87         /* Interrupt Registers */
  88         {E1000_ICR, "ICR"},
  89
  90         /* Rx Registers */
  91         {E1000_RCTL, "RCTL"},
  92         {E1000_RDLEN(0), "RDLEN"},
  93         {E1000_RDH(0), "RDH"},
  94         {E1000_RDT(0), "RDT"},
  95         {E1000_RDTR, "RDTR"},
  96         {E1000_RXDCTL(0), "RXDCTL"},
  97         {E1000_ERT, "ERT"},
  98         {E1000_RDBAL(0), "RDBAL"},
  99         {E1000_RDBAH(0), "RDBAH"},
 100         {E1000_RDFH, "RDFH"},
 101         {E1000_RDFT, "RDFT"},
 102         {E1000_RDFHS, "RDFHS"},
 103         {E1000_RDFTS, "RDFTS"},
 104         {E1000_RDFPC, "RDFPC"},
 105
 106         /* Tx Registers */
 107         {E1000_TCTL, "TCTL"},
 108         {E1000_TDBAL(0), "TDBAL"},
 109         {E1000_TDBAH(0), "TDBAH"},
 110         {E1000_TDLEN(0), "TDLEN"},
 111         {E1000_TDH(0), "TDH"},
 112         {E1000_TDT(0), "TDT"},
 113         {E1000_TIDV, "TIDV"},
 114         {E1000_TXDCTL(0), "TXDCTL"},
 115         {E1000_TADV, "TADV"},
 116         {E1000_TARC(0), "TARC"},
 117         {E1000_TDFH, "TDFH"},
 118         {E1000_TDFT, "TDFT"},
 119         {E1000_TDFHS, "TDFHS"},
 120         {E1000_TDFTS, "TDFTS"},
 121         {E1000_TDFPC, "TDFPC"},
 122
 123         /* List Terminator */
 124         {0, NULL}
 125 };
 126
 127 /**
 128  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 129  * @hw: pointer to the HW structure
 130  *
 131  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 132  * be accessing the registers at the same time.  Normally, this is handled in
 133  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 134  * accesses later than it should which could result in the register to have
 135  * an incorrect value.  Workaround this by checking the FWSM register which
 136  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 137  * and try again a number of times.
 138  **/
 139 static void __ew32_prepare(struct e1000_hw *hw)
 140 {
 141         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 142
 143         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 144                 udelay(50);
 145 }
 146
 147 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 148 {
 149         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 150                 __ew32_prepare(hw);
 151
 152         writel(val, hw->hw_addr + reg);
 153 }
 154
 155 /**
 156  * e1000_regdump - register printout routine
 157  * @hw: pointer to the HW structure
 158  * @reginfo: pointer to the register info table
 159  **/
 160 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 161 {
 162         int n = 0;
 163         char rname[16];
 164         u32 regs[8];
 165
 166         switch (reginfo->ofs) {
 167         case E1000_RXDCTL(0):
 168                 for (n = 0; n < 2; n++)
 169                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 170                 break;
 171         case E1000_TXDCTL(0):
 172                 for (n = 0; n < 2; n++)
 173                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 174                 break;
 175         case E1000_TARC(0):
 176                 for (n = 0; n < 2; n++)
 177                         regs[n] = __er32(hw, E1000_TARC(n));
 178                 break;
 179         default:
 180                 pr_info("%-15s %08x\n",
 181                         reginfo->name, __er32(hw, reginfo->ofs));
 182                 return;
 183         }
 184
 185         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 186         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 187 }
 188
 189 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 190                                  struct e1000_buffer *bi)
 191 {
 192         int i;
 193         struct e1000_ps_page *ps_page;
 194
 195         for (i = 0; i < adapter->rx_ps_pages; i++) {
 196                 ps_page = &bi->ps_pages[i];
 197
 198                 if (ps_page->page) {
 199                         pr_info("packet dump for ps_page %d:\n", i);
 200                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 201                                        16, 1, page_address(ps_page->page),
 202                                        PAGE_SIZE, true);
 203                 }
 204         }
 205 }
 206
 207 /**
 208  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 209  * @adapter: board private structure
 210  **/
 211 static void e1000e_dump(struct e1000_adapter *adapter)
 212 {
 213         struct net_device *netdev = adapter->netdev;
 214         struct e1000_hw *hw = &adapter->hw;
 215         struct e1000_reg_info *reginfo;
 216         struct e1000_ring *tx_ring = adapter->tx_ring;
 217         struct e1000_tx_desc *tx_desc;
 218         struct my_u0 {
 219                 __le64 a;
 220                 __le64 b;
 221         } *u0;
 222         struct e1000_buffer *buffer_info;
 223         struct e1000_ring *rx_ring = adapter->rx_ring;
 224         union e1000_rx_desc_packet_split *rx_desc_ps;
 225         union e1000_rx_desc_extended *rx_desc;
 226         struct my_u1 {
 227                 __le64 a;
 228                 __le64 b;
 229                 __le64 c;
 230                 __le64 d;
 231         } *u1;
 232         u32 staterr;
 233         int i = 0;
 234
 235         if (!netif_msg_hw(adapter))
 236                 return;
 237
 238         /* Print netdevice Info */
 239         if (netdev) {
 240                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 241                 pr_info("Device Name     state            trans_start      last_rx\n");
 242                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 243                         netdev->state, netdev->trans_start, netdev->last_rx);
 244         }
 245
 246         /* Print Registers */
 247         dev_info(&adapter->pdev->dev, "Register Dump\n");
 248         pr_info(" Register Name   Value\n");
 249         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 250              reginfo->name; reginfo++) {
 251                 e1000_regdump(hw, reginfo);
 252         }
 253
 254         /* Print Tx Ring Summary */
 255         if (!netdev || !netif_running(netdev))
 256                 return;
 257
 258         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 259         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 260         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 261         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 262                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 263                 (unsigned long long)buffer_info->dma,
 264                 buffer_info->length,
 265                 buffer_info->next_to_watch,
 266                 (unsigned long long)buffer_info->time_stamp);
 267
 268         /* Print Tx Ring */
 269         if (!netif_msg_tx_done(adapter))
 270                 goto rx_ring_summary;
 271
 272         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 273
 274         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 275          *
 276          * Legacy Transmit Descriptor
 277          *   +--------------------------------------------------------------+
 278          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 279          *   +--------------------------------------------------------------+
 280          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 281          *   +--------------------------------------------------------------+
 282          *   63       48 47        36 35    32 31     24 23    16 15        0
 283          *
 284          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 285          *   63      48 47    40 39       32 31             16 15    8 7      0
 286          *   +----------------------------------------------------------------+
 287          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 288          *   +----------------------------------------------------------------+
 289          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 290          *   +----------------------------------------------------------------+
 291          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 292          *
 293          * Extended Data Descriptor (DTYP=0x1)
 294          *   +----------------------------------------------------------------+
 295          * 0 |                     Buffer Address [63:0]                      |
 296          *   +----------------------------------------------------------------+
 297          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 298          *   +----------------------------------------------------------------+
 299          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 300          */
 301         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 302         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 303         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 304         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 305                 const char *next_desc;
 306                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 307                 buffer_info = &tx_ring->buffer_info[i];
 308                 u0 = (struct my_u0 *)tx_desc;
 309                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 310                         next_desc = " NTC/U";
 311                 else if (i == tx_ring->next_to_use)
 312                         next_desc = " NTU";
 313                 else if (i == tx_ring->next_to_clean)
 314                         next_desc = " NTC";
 315                 else
 316                         next_desc = "";
 317                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 318                         (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
 319                          ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
 320                         i,
 321                         (unsigned long long)le64_to_cpu(u0->a),
 322                         (unsigned long long)le64_to_cpu(u0->b),
 323                         (unsigned long long)buffer_info->dma,
 324                         buffer_info->length, buffer_info->next_to_watch,
 325                         (unsigned long long)buffer_info->time_stamp,
 326                         buffer_info->skb, next_desc);
 327
 328                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 329                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 330                                        16, 1, buffer_info->skb->data,
 331                                        buffer_info->skb->len, true);
 332         }
 333
 334         /* Print Rx Ring Summary */
 335 rx_ring_summary:
 336         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 337         pr_info("Queue [NTU] [NTC]\n");
 338         pr_info(" %5d %5X %5X\n",
 339                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 340
 341         /* Print Rx Ring */
 342         if (!netif_msg_rx_status(adapter))
 343                 return;
 344
 345         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 346         switch (adapter->rx_ps_pages) {
 347         case 1:
 348         case 2:
 349         case 3:
 350                 /* [Extended] Packet Split Receive Descriptor Format
 351                  *
 352                  *    +-----------------------------------------------------+
 353                  *  0 |                Buffer Address 0 [63:0]              |
 354                  *    +-----------------------------------------------------+
 355                  *  8 |                Buffer Address 1 [63:0]              |
 356                  *    +-----------------------------------------------------+
 357                  * 16 |                Buffer Address 2 [63:0]              |
 358                  *    +-----------------------------------------------------+
 359                  * 24 |                Buffer Address 3 [63:0]              |
 360                  *    +-----------------------------------------------------+
 361                  */
 362                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 363                 /* [Extended] Receive Descriptor (Write-Back) Format
 364                  *
 365                  *   63       48 47    32 31     13 12    8 7    4 3        0
 366                  *   +------------------------------------------------------+
 367                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 368                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 369                  *   +------------------------------------------------------+
 370                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 371                  *   +------------------------------------------------------+
 372                  *   63       48 47    32 31            20 19               0
 373                  */
 374                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 375                 for (i = 0; i < rx_ring->count; i++) {
 376                         const char *next_desc;
 377                         buffer_info = &rx_ring->buffer_info[i];
 378                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 379                         u1 = (struct my_u1 *)rx_desc_ps;
 380                         staterr =
 381                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 382
 383                         if (i == rx_ring->next_to_use)
 384                                 next_desc = " NTU";
 385                         else if (i == rx_ring->next_to_clean)
 386                                 next_desc = " NTC";
 387                         else
 388                                 next_desc = "";
 389
 390                         if (staterr & E1000_RXD_STAT_DD) {
 391                                 /* Descriptor Done */
 392                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 393                                         "RWB", i,
 394                                         (unsigned long long)le64_to_cpu(u1->a),
 395                                         (unsigned long long)le64_to_cpu(u1->b),
 396                                         (unsigned long long)le64_to_cpu(u1->c),
 397                                         (unsigned long long)le64_to_cpu(u1->d),
 398                                         buffer_info->skb, next_desc);
 399                         } else {
 400                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 401                                         "R  ", i,
 402                                         (unsigned long long)le64_to_cpu(u1->a),
 403                                         (unsigned long long)le64_to_cpu(u1->b),
 404                                         (unsigned long long)le64_to_cpu(u1->c),
 405                                         (unsigned long long)le64_to_cpu(u1->d),
 406                                         (unsigned long long)buffer_info->dma,
 407                                         buffer_info->skb, next_desc);
 408
 409                                 if (netif_msg_pktdata(adapter))
 410                                         e1000e_dump_ps_pages(adapter,
 411                                                              buffer_info);
 412                         }
 413                 }
 414                 break;
 415         default:
 416         case 0:
 417                 /* Extended Receive Descriptor (Read) Format
 418                  *
 419                  *   +-----------------------------------------------------+
 420                  * 0 |                Buffer Address [63:0]                |
 421                  *   +-----------------------------------------------------+
 422                  * 8 |                      Reserved                       |
 423                  *   +-----------------------------------------------------+
 424                  */
 425                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 426                 /* Extended Receive Descriptor (Write-Back) Format
 427                  *
 428                  *   63       48 47    32 31    24 23            4 3        0
 429                  *   +------------------------------------------------------+
 430                  *   |     RSS Hash      |        |               |         |
 431                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 432                  *   | Packet   | IP     |        |               |  Type   |
 433                  *   | Checksum | Ident  |        |               |         |
 434                  *   +------------------------------------------------------+
 435                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 436                  *   +------------------------------------------------------+
 437                  *   63       48 47    32 31            20 19               0
 438                  */
 439                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 440
 441                 for (i = 0; i < rx_ring->count; i++) {
 442                         const char *next_desc;
 443
 444                         buffer_info = &rx_ring->buffer_info[i];
 445                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 446                         u1 = (struct my_u1 *)rx_desc;
 447                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 448
 449                         if (i == rx_ring->next_to_use)
 450                                 next_desc = " NTU";
 451                         else if (i == rx_ring->next_to_clean)
 452                                 next_desc = " NTC";
 453                         else
 454                                 next_desc = "";
 455
 456                         if (staterr & E1000_RXD_STAT_DD) {
 457                                 /* Descriptor Done */
 458                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 459                                         "RWB", i,
 460                                         (unsigned long long)le64_to_cpu(u1->a),
 461                                         (unsigned long long)le64_to_cpu(u1->b),
 462                                         buffer_info->skb, next_desc);
 463                         } else {
 464                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 465                                         "R  ", i,
 466                                         (unsigned long long)le64_to_cpu(u1->a),
 467                                         (unsigned long long)le64_to_cpu(u1->b),
 468                                         (unsigned long long)buffer_info->dma,
 469                                         buffer_info->skb, next_desc);
 470
 471                                 if (netif_msg_pktdata(adapter) &&
 472                                     buffer_info->skb)
 473                                         print_hex_dump(KERN_INFO, "",
 474                                                        DUMP_PREFIX_ADDRESS, 16,
 475                                                        1,
 476                                                        buffer_info->skb->data,
 477                                                        adapter->rx_buffer_len,
 478                                                        true);
 479                         }
 480                 }
 481         }
 482 }
 483
 484 /**
 485  * e1000_desc_unused - calculate if we have unused descriptors
 486  **/
 487 static int e1000_desc_unused(struct e1000_ring *ring)
 488 {
 489         if (ring->next_to_clean > ring->next_to_use)
 490                 return ring->next_to_clean - ring->next_to_use - 1;
 491
 492         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 493 }
 494
 495 /**
 496  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 497  * @adapter: board private structure
 498  * @hwtstamps: time stamp structure to update
 499  * @systim: unsigned 64bit system time value.
 500  *
 501  * Convert the system time value stored in the RX/TXSTMP registers into a
 502  * hwtstamp which can be used by the upper level time stamping functions.
 503  *
 504  * The 'systim_lock' spinlock is used to protect the consistency of the
 505  * system time value. This is needed because reading the 64 bit time
 506  * value involves reading two 32 bit registers. The first read latches the
 507  * value.
 508  **/
 509 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 510                                       struct skb_shared_hwtstamps *hwtstamps,
 511                                       u64 systim)
 512 {
 513         u64 ns;
 514         unsigned long flags;
 515
 516         spin_lock_irqsave(&adapter->systim_lock, flags);
 517         ns = timecounter_cyc2time(&adapter->tc, systim);
 518         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 519
 520         memset(hwtstamps, 0, sizeof(*hwtstamps));
 521         hwtstamps->hwtstamp = ns_to_ktime(ns);
 522 }
 523
 524 /**
 525  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 526  * @adapter: board private structure
 527  * @status: descriptor extended error and status field
 528  * @skb: particular skb to include time stamp
 529  *
 530  * If the time stamp is valid, convert it into the timecounter ns value
 531  * and store that result into the shhwtstamps structure which is passed
 532  * up the network stack.
 533  **/
 534 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 535                                struct sk_buff *skb)
 536 {
 537         struct e1000_hw *hw = &adapter->hw;
 538         u64 rxstmp;
 539
 540         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 541             !(status & E1000_RXDEXT_STATERR_TST) ||
 542             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 543                 return;
 544
 545         /* The Rx time stamp registers contain the time stamp.  No other
 546          * received packet will be time stamped until the Rx time stamp
 547          * registers are read.  Because only one packet can be time stamped
 548          * at a time, the register values must belong to this packet and
 549          * therefore none of the other additional attributes need to be
 550          * compared.
 551          */
 552         rxstmp = (u64)er32(RXSTMPL);
 553         rxstmp |= (u64)er32(RXSTMPH) << 32;
 554         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 555
 556         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 557 }
 558
 559 /**
 560  * e1000_receive_skb - helper function to handle Rx indications
 561  * @adapter: board private structure
 562  * @staterr: descriptor extended error and status field as written by hardware
 563  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 564  * @skb: pointer to sk_buff to be indicated to stack
 565  **/
 566 static void e1000_receive_skb(struct e1000_adapter *adapter,
 567                               struct net_device *netdev, struct sk_buff *skb,
 568                               u32 staterr, __le16 vlan)
 569 {
 570         u16 tag = le16_to_cpu(vlan);
 571
 572         e1000e_rx_hwtstamp(adapter, staterr, skb);
 573
 574         skb->protocol = eth_type_trans(skb, netdev);
 575
 576         if (staterr & E1000_RXD_STAT_VP)
 577                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 578
 579         napi_gro_receive(&adapter->napi, skb);
 580 }
 581
 582 /**
 583  * e1000_rx_checksum - Receive Checksum Offload
 584  * @adapter: board private structure
 585  * @status_err: receive descriptor status and error fields
 586  * @csum: receive descriptor csum field
 587  * @sk_buff: socket buffer with received data
 588  **/
 589 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 590                               struct sk_buff *skb)
 591 {
 592         u16 status = (u16)status_err;
 593         u8 errors = (u8)(status_err >> 24);
 594
 595         skb_checksum_none_assert(skb);
 596
 597         /* Rx checksum disabled */
 598         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 599                 return;
 600
 601         /* Ignore Checksum bit is set */
 602         if (status & E1000_RXD_STAT_IXSM)
 603                 return;
 604
 605         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 606         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 607                 /* let the stack verify checksum errors */
 608                 adapter->hw_csum_err++;
 609                 return;
 610         }
 611
 612         /* TCP/UDP Checksum has not been calculated */
 613         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 614                 return;
 615
 616         /* It must be a TCP or UDP packet with a valid checksum */
 617         skb->ip_summed = CHECKSUM_UNNECESSARY;
 618         adapter->hw_csum_good++;
 619 }
 620
 621 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 622 {
 623         struct e1000_adapter *adapter = rx_ring->adapter;
 624         struct e1000_hw *hw = &adapter->hw;
 625
 626         __ew32_prepare(hw);
 627         writel(i, rx_ring->tail);
 628
 629         if (unlikely(i != readl(rx_ring->tail))) {
 630                 u32 rctl = er32(RCTL);
 631
 632                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 633                 e_err("ME firmware caused invalid RDT - resetting\n");
 634                 schedule_work(&adapter->reset_task);
 635         }
 636 }
 637
 638 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 639 {
 640         struct e1000_adapter *adapter = tx_ring->adapter;
 641         struct e1000_hw *hw = &adapter->hw;
 642
 643         __ew32_prepare(hw);
 644         writel(i, tx_ring->tail);
 645
 646         if (unlikely(i != readl(tx_ring->tail))) {
 647                 u32 tctl = er32(TCTL);
 648
 649                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 650                 e_err("ME firmware caused invalid TDT - resetting\n");
 651                 schedule_work(&adapter->reset_task);
 652         }
 653 }
 654
 655 /**
 656  * e1000_alloc_rx_buffers - Replace used receive buffers
 657  * @rx_ring: Rx descriptor ring
 658  **/
 659 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 660                                    int cleaned_count, gfp_t gfp)
 661 {
 662         struct e1000_adapter *adapter = rx_ring->adapter;
 663         struct net_device *netdev = adapter->netdev;
 664         struct pci_dev *pdev = adapter->pdev;
 665         union e1000_rx_desc_extended *rx_desc;
 666         struct e1000_buffer *buffer_info;
 667         struct sk_buff *skb;
 668         unsigned int i;
 669         unsigned int bufsz = adapter->rx_buffer_len;
 670
 671         i = rx_ring->next_to_use;
 672         buffer_info = &rx_ring->buffer_info[i];
 673
 674         while (cleaned_count--) {
 675                 skb = buffer_info->skb;
 676                 if (skb) {
 677                         skb_trim(skb, 0);
 678                         goto map_skb;
 679                 }
 680
 681                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 682                 if (!skb) {
 683                         /* Better luck next round */
 684                         adapter->alloc_rx_buff_failed++;
 685                         break;
 686                 }
 687
 688                 buffer_info->skb = skb;
 689 map_skb:
 690                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 691                                                   adapter->rx_buffer_len,
 692                                                   DMA_FROM_DEVICE);
 693                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 694                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 695                         adapter->rx_dma_failed++;
 696                         break;
 697                 }
 698
 699                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 700                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 701
 702                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 703                         /* Force memory writes to complete before letting h/w
 704                          * know there are new descriptors to fetch.  (Only
 705                          * applicable for weak-ordered memory model archs,
 706                          * such as IA-64).
 707                          */
 708                         wmb();
 709                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 710                                 e1000e_update_rdt_wa(rx_ring, i);
 711                         else
 712                                 writel(i, rx_ring->tail);
 713                 }
 714                 i++;
 715                 if (i == rx_ring->count)
 716                         i = 0;
 717                 buffer_info = &rx_ring->buffer_info[i];
 718         }
 719
 720         rx_ring->next_to_use = i;
 721 }
 722
 723 /**
 724  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 725  * @rx_ring: Rx descriptor ring
 726  **/
 727 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 728                                       int cleaned_count, gfp_t gfp)
 729 {
 730         struct e1000_adapter *adapter = rx_ring->adapter;
 731         struct net_device *netdev = adapter->netdev;
 732         struct pci_dev *pdev = adapter->pdev;
 733         union e1000_rx_desc_packet_split *rx_desc;
 734         struct e1000_buffer *buffer_info;
 735         struct e1000_ps_page *ps_page;
 736         struct sk_buff *skb;
 737         unsigned int i, j;
 738
 739         i = rx_ring->next_to_use;
 740         buffer_info = &rx_ring->buffer_info[i];
 741
 742         while (cleaned_count--) {
 743                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 744
 745                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 746                         ps_page = &buffer_info->ps_pages[j];
 747                         if (j >= adapter->rx_ps_pages) {
 748                                 /* all unused desc entries get hw null ptr */
 749                                 rx_desc->read.buffer_addr[j + 1] =
 750                                     ~cpu_to_le64(0);
 751                                 continue;
 752                         }
 753                         if (!ps_page->page) {
 754                                 ps_page->page = alloc_page(gfp);
 755                                 if (!ps_page->page) {
 756                                         adapter->alloc_rx_buff_failed++;
 757                                         goto no_buffers;
 758                                 }
 759                                 ps_page->dma = dma_map_page(&pdev->dev,
 760                                                             ps_page->page,
 761                                                             0, PAGE_SIZE,
 762                                                             DMA_FROM_DEVICE);
 763                                 if (dma_mapping_error(&pdev->dev,
 764                                                       ps_page->dma)) {
 765                                         dev_err(&adapter->pdev->dev,
 766                                                 "Rx DMA page map failed\n");
 767                                         adapter->rx_dma_failed++;
 768                                         goto no_buffers;
 769                                 }
 770                         }
 771                         /* Refresh the desc even if buffer_addrs
 772                          * didn't change because each write-back
 773                          * erases this info.
 774                          */
 775                         rx_desc->read.buffer_addr[j + 1] =
 776                             cpu_to_le64(ps_page->dma);
 777                 }
 778
 779                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 780                                                   gfp);
 781
 782                 if (!skb) {
 783                         adapter->alloc_rx_buff_failed++;
 784                         break;
 785                 }
 786
 787                 buffer_info->skb = skb;
 788                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 789                                                   adapter->rx_ps_bsize0,
 790                                                   DMA_FROM_DEVICE);
 791                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 792                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 793                         adapter->rx_dma_failed++;
 794                         /* cleanup skb */
 795                         dev_kfree_skb_any(skb);
 796                         buffer_info->skb = NULL;
 797                         break;
 798                 }
 799
 800                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 801
 802                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 803                         /* Force memory writes to complete before letting h/w
 804                          * know there are new descriptors to fetch.  (Only
 805                          * applicable for weak-ordered memory model archs,
 806                          * such as IA-64).
 807                          */
 808                         wmb();
 809                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 810                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 811                         else
 812                                 writel(i << 1, rx_ring->tail);
 813                 }
 814
 815                 i++;
 816                 if (i == rx_ring->count)
 817                         i = 0;
 818                 buffer_info = &rx_ring->buffer_info[i];
 819         }
 820
 821 no_buffers:
 822         rx_ring->next_to_use = i;
 823 }
 824
 825 /**
 826  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 827  * @rx_ring: Rx descriptor ring
 828  * @cleaned_count: number of buffers to allocate this pass
 829  **/
 830
 831 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 832                                          int cleaned_count, gfp_t gfp)
 833 {
 834         struct e1000_adapter *adapter = rx_ring->adapter;
 835         struct net_device *netdev = adapter->netdev;
 836         struct pci_dev *pdev = adapter->pdev;
 837         union e1000_rx_desc_extended *rx_desc;
 838         struct e1000_buffer *buffer_info;
 839         struct sk_buff *skb;
 840         unsigned int i;
 841         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 842
 843         i = rx_ring->next_to_use;
 844         buffer_info = &rx_ring->buffer_info[i];
 845
 846         while (cleaned_count--) {
 847                 skb = buffer_info->skb;
 848                 if (skb) {
 849                         skb_trim(skb, 0);
 850                         goto check_page;
 851                 }
 852
 853                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 854                 if (unlikely(!skb)) {
 855                         /* Better luck next round */
 856                         adapter->alloc_rx_buff_failed++;
 857                         break;
 858                 }
 859
 860                 buffer_info->skb = skb;
 861 check_page:
 862                 /* allocate a new page if necessary */
 863                 if (!buffer_info->page) {
 864                         buffer_info->page = alloc_page(gfp);
 865                         if (unlikely(!buffer_info->page)) {
 866                                 adapter->alloc_rx_buff_failed++;
 867                                 break;
 868                         }
 869                 }
 870
 871                 if (!buffer_info->dma) {
 872                         buffer_info->dma = dma_map_page(&pdev->dev,
 873                                                         buffer_info->page, 0,
 874                                                         PAGE_SIZE,
 875                                                         DMA_FROM_DEVICE);
 876                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 877                                 adapter->alloc_rx_buff_failed++;
 878                                 break;
 879                         }
 880                 }
 881
 882                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 883                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 884
 885                 if (unlikely(++i == rx_ring->count))
 886                         i = 0;
 887                 buffer_info = &rx_ring->buffer_info[i];
 888         }
 889
 890         if (likely(rx_ring->next_to_use != i)) {
 891                 rx_ring->next_to_use = i;
 892                 if (unlikely(i-- == 0))
 893                         i = (rx_ring->count - 1);
 894
 895                 /* Force memory writes to complete before letting h/w
 896                  * know there are new descriptors to fetch.  (Only
 897                  * applicable for weak-ordered memory model archs,
 898                  * such as IA-64).
 899                  */
 900                 wmb();
 901                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 902                         e1000e_update_rdt_wa(rx_ring, i);
 903                 else
 904                         writel(i, rx_ring->tail);
 905         }
 906 }
 907
 908 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 909                                  struct sk_buff *skb)
 910 {
 911         if (netdev->features & NETIF_F_RXHASH)
 912                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 913 }
 914
 915 /**
 916  * e1000_clean_rx_irq - Send received data up the network stack
 917  * @rx_ring: Rx descriptor ring
 918  *
 919  * the return value indicates whether actual cleaning was done, there
 920  * is no guarantee that everything was cleaned
 921  **/
 922 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 923                                int work_to_do)
 924 {
 925         struct e1000_adapter *adapter = rx_ring->adapter;
 926         struct net_device *netdev = adapter->netdev;
 927         struct pci_dev *pdev = adapter->pdev;
 928         struct e1000_hw *hw = &adapter->hw;
 929         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 930         struct e1000_buffer *buffer_info, *next_buffer;
 931         u32 length, staterr;
 932         unsigned int i;
 933         int cleaned_count = 0;
 934         bool cleaned = false;
 935         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 936
 937         i = rx_ring->next_to_clean;
 938         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 939         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 940         buffer_info = &rx_ring->buffer_info[i];
 941
 942         while (staterr & E1000_RXD_STAT_DD) {
 943                 struct sk_buff *skb;
 944
 945                 if (*work_done >= work_to_do)
 946                         break;
 947                 (*work_done)++;
 948                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 949
 950                 skb = buffer_info->skb;
 951                 buffer_info->skb = NULL;
 952
 953                 prefetch(skb->data - NET_IP_ALIGN);
 954
 955                 i++;
 956                 if (i == rx_ring->count)
 957                         i = 0;
 958                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 959                 prefetch(next_rxd);
 960
 961                 next_buffer = &rx_ring->buffer_info[i];
 962
 963                 cleaned = true;
 964                 cleaned_count++;
 965                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 966                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 967                 buffer_info->dma = 0;
 968
 969                 length = le16_to_cpu(rx_desc->wb.upper.length);
 970
 971                 /* !EOP means multiple descriptors were used to store a single
 972                  * packet, if that's the case we need to toss it.  In fact, we
 973                  * need to toss every packet with the EOP bit clear and the
 974                  * next frame that _does_ have the EOP bit set, as it is by
 975                  * definition only a frame fragment
 976                  */
 977                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 978                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 979
 980                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 981                         /* All receives must fit into a single buffer */
 982                         e_dbg("Receive packet consumed multiple buffers\n");
 983                         /* recycle */
 984                         buffer_info->skb = skb;
 985                         if (staterr & E1000_RXD_STAT_EOP)
 986                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 987                         goto next_desc;
 988                 }
 989
 990                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 991                              !(netdev->features & NETIF_F_RXALL))) {
 992                         /* recycle */
 993                         buffer_info->skb = skb;
 994                         goto next_desc;
 995                 }
 996
 997                 /* adjust length to remove Ethernet CRC */
 998                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 999                         /* If configured to store CRC, don't subtract FCS,
1000                          * but keep the FCS bytes out of the total_rx_bytes
1001                          * counter
1002                          */
1003                         if (netdev->features & NETIF_F_RXFCS)
1004                                 total_rx_bytes -= 4;
1005                         else
1006                                 length -= 4;
1007                 }
1008
1009                 total_rx_bytes += length;
1010                 total_rx_packets++;
1011
1012                 /* code added for copybreak, this should improve
1013                  * performance for small packets with large amounts
1014                  * of reassembly being done in the stack
1015                  */
1016                 if (length < copybreak) {
1017                         struct sk_buff *new_skb =
1018                                 napi_alloc_skb(&adapter->napi, length);
1019                         if (new_skb) {
1020                                 skb_copy_to_linear_data_offset(new_skb,
1021                                                                -NET_IP_ALIGN,
1022                                                                (skb->data -
1023                                                                 NET_IP_ALIGN),
1024                                                                (length +
1025                                                                 NET_IP_ALIGN));
1026                                 /* save the skb in buffer_info as good */
1027                                 buffer_info->skb = skb;
1028                                 skb = new_skb;
1029                         }
1030                         /* else just continue with the old one */
1031                 }
1032                 /* end copybreak code */
1033                 skb_put(skb, length);
1034
1035                 /* Receive Checksum Offload */
1036                 e1000_rx_checksum(adapter, staterr, skb);
1037
1038                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1039
1040                 e1000_receive_skb(adapter, netdev, skb, staterr,
1041                                   rx_desc->wb.upper.vlan);
1042
1043 next_desc:
1044                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1045
1046                 /* return some buffers to hardware, one at a time is too slow */
1047                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1048                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1049                                               GFP_ATOMIC);
1050                         cleaned_count = 0;
1051                 }
1052
1053                 /* use prefetched values */
1054                 rx_desc = next_rxd;
1055                 buffer_info = next_buffer;
1056
1057                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1058         }
1059         rx_ring->next_to_clean = i;
1060
1061         cleaned_count = e1000_desc_unused(rx_ring);
1062         if (cleaned_count)
1063                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1064
1065         adapter->total_rx_bytes += total_rx_bytes;
1066         adapter->total_rx_packets += total_rx_packets;
1067         return cleaned;
1068 }
1069
1070 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1071                             struct e1000_buffer *buffer_info)
1072 {
1073         struct e1000_adapter *adapter = tx_ring->adapter;
1074
1075         if (buffer_info->dma) {
1076                 if (buffer_info->mapped_as_page)
1077                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1078                                        buffer_info->length, DMA_TO_DEVICE);
1079                 else
1080                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1081                                          buffer_info->length, DMA_TO_DEVICE);
1082                 buffer_info->dma = 0;
1083         }
1084         if (buffer_info->skb) {
1085                 dev_kfree_skb_any(buffer_info->skb);
1086                 buffer_info->skb = NULL;
1087         }
1088         buffer_info->time_stamp = 0;
1089 }
1090
1091 static void e1000_print_hw_hang(struct work_struct *work)
1092 {
1093         struct e1000_adapter *adapter = container_of(work,
1094                                                      struct e1000_adapter,
1095                                                      print_hang_task);
1096         struct net_device *netdev = adapter->netdev;
1097         struct e1000_ring *tx_ring = adapter->tx_ring;
1098         unsigned int i = tx_ring->next_to_clean;
1099         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1100         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1101         struct e1000_hw *hw = &adapter->hw;
1102         u16 phy_status, phy_1000t_status, phy_ext_status;
1103         u16 pci_status;
1104
1105         if (test_bit(__E1000_DOWN, &adapter->state))
1106                 return;
1107
1108         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1109                 /* May be block on write-back, flush and detect again
1110                  * flush pending descriptor writebacks to memory
1111                  */
1112                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1113                 /* execute the writes immediately */
1114                 e1e_flush();
1115                 /* Due to rare timing issues, write to TIDV again to ensure
1116                  * the write is successful
1117                  */
1118                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1119                 /* execute the writes immediately */
1120                 e1e_flush();
1121                 adapter->tx_hang_recheck = true;
1122                 return;
1123         }
1124         adapter->tx_hang_recheck = false;
1125
1126         if (er32(TDH(0)) == er32(TDT(0))) {
1127                 e_dbg("false hang detected, ignoring\n");
1128                 return;
1129         }
1130
1131         /* Real hang detected */
1132         netif_stop_queue(netdev);
1133
1134         e1e_rphy(hw, MII_BMSR, &phy_status);
1135         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1136         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1137
1138         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1139
1140         /* detected Hardware unit hang */
1141         e_err("Detected Hardware Unit Hang:\n"
1142               "  TDH                  <%x>\n"
1143               "  TDT                  <%x>\n"
1144               "  next_to_use          <%x>\n"
1145               "  next_to_clean        <%x>\n"
1146               "buffer_info[next_to_clean]:\n"
1147               "  time_stamp           <%lx>\n"
1148               "  next_to_watch        <%x>\n"
1149               "  jiffies              <%lx>\n"
1150               "  next_to_watch.status <%x>\n"
1151               "MAC Status             <%x>\n"
1152               "PHY Status             <%x>\n"
1153               "PHY 1000BASE-T Status  <%x>\n"
1154               "PHY Extended Status    <%x>\n"
1155               "PCI Status             <%x>\n",
1156               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1157               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1158               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1159               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1160
1161         e1000e_dump(adapter);
1162
1163         /* Suggest workaround for known h/w issue */
1164         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1165                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1166 }
1167
1168 /**
1169  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1170  * @work: pointer to work struct
1171  *
1172  * This work function polls the TSYNCTXCTL valid bit to determine when a
1173  * timestamp has been taken for the current stored skb.  The timestamp must
1174  * be for this skb because only one such packet is allowed in the queue.
1175  */
1176 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1177 {
1178         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1179                                                      tx_hwtstamp_work);
1180         struct e1000_hw *hw = &adapter->hw;
1181
1182         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1183                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1184                 struct skb_shared_hwtstamps shhwtstamps;
1185                 u64 txstmp;
1186
1187                 txstmp = er32(TXSTMPL);
1188                 txstmp |= (u64)er32(TXSTMPH) << 32;
1189
1190                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1191
1192                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1193                  * prior to notifying the stack of a Tx timestamp.
1194                  */
1195                 adapter->tx_hwtstamp_skb = NULL;
1196                 wmb(); /* force write prior to skb_tstamp_tx */
1197
1198                 skb_tstamp_tx(skb, &shhwtstamps);
1199                 dev_kfree_skb_any(skb);
1200         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1201                               + adapter->tx_timeout_factor * HZ)) {
1202                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1203                 adapter->tx_hwtstamp_skb = NULL;
1204                 adapter->tx_hwtstamp_timeouts++;
1205                 e_warn("clearing Tx timestamp hang\n");
1206         } else {
1207                 /* reschedule to check later */
1208                 schedule_work(&adapter->tx_hwtstamp_work);
1209         }
1210 }
1211
1212 /**
1213  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1214  * @tx_ring: Tx descriptor ring
1215  *
1216  * the return value indicates whether actual cleaning was done, there
1217  * is no guarantee that everything was cleaned
1218  **/
1219 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1220 {
1221         struct e1000_adapter *adapter = tx_ring->adapter;
1222         struct net_device *netdev = adapter->netdev;
1223         struct e1000_hw *hw = &adapter->hw;
1224         struct e1000_tx_desc *tx_desc, *eop_desc;
1225         struct e1000_buffer *buffer_info;
1226         unsigned int i, eop;
1227         unsigned int count = 0;
1228         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1229         unsigned int bytes_compl = 0, pkts_compl = 0;
1230
1231         i = tx_ring->next_to_clean;
1232         eop = tx_ring->buffer_info[i].next_to_watch;
1233         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1234
1235         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1236                (count < tx_ring->count)) {
1237                 bool cleaned = false;
1238
1239                 dma_rmb();              /* read buffer_info after eop_desc */
1240                 for (; !cleaned; count++) {
1241                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1242                         buffer_info = &tx_ring->buffer_info[i];
1243                         cleaned = (i == eop);
1244
1245                         if (cleaned) {
1246                                 total_tx_packets += buffer_info->segs;
1247                                 total_tx_bytes += buffer_info->bytecount;
1248                                 if (buffer_info->skb) {
1249                                         bytes_compl += buffer_info->skb->len;
1250                                         pkts_compl++;
1251                                 }
1252                         }
1253
1254                         e1000_put_txbuf(tx_ring, buffer_info);
1255                         tx_desc->upper.data = 0;
1256
1257                         i++;
1258                         if (i == tx_ring->count)
1259                                 i = 0;
1260                 }
1261
1262                 if (i == tx_ring->next_to_use)
1263                         break;
1264                 eop = tx_ring->buffer_info[i].next_to_watch;
1265                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1266         }
1267
1268         tx_ring->next_to_clean = i;
1269
1270         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1271
1272 #define TX_WAKE_THRESHOLD 32
1273         if (count && netif_carrier_ok(netdev) &&
1274             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1275                 /* Make sure that anybody stopping the queue after this
1276                  * sees the new next_to_clean.
1277                  */
1278                 smp_mb();
1279
1280                 if (netif_queue_stopped(netdev) &&
1281                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1282                         netif_wake_queue(netdev);
1283                         ++adapter->restart_queue;
1284                 }
1285         }
1286
1287         if (adapter->detect_tx_hung) {
1288                 /* Detect a transmit hang in hardware, this serializes the
1289                  * check with the clearing of time_stamp and movement of i
1290                  */
1291                 adapter->detect_tx_hung = false;
1292                 if (tx_ring->buffer_info[i].time_stamp &&
1293                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1294                                + (adapter->tx_timeout_factor * HZ)) &&
1295                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1296                         schedule_work(&adapter->print_hang_task);
1297                 else
1298                         adapter->tx_hang_recheck = false;
1299         }
1300         adapter->total_tx_bytes += total_tx_bytes;
1301         adapter->total_tx_packets += total_tx_packets;
1302         return count < tx_ring->count;
1303 }
1304
1305 /**
1306  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1307  * @rx_ring: Rx descriptor ring
1308  *
1309  * the return value indicates whether actual cleaning was done, there
1310  * is no guarantee that everything was cleaned
1311  **/
1312 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1313                                   int work_to_do)
1314 {
1315         struct e1000_adapter *adapter = rx_ring->adapter;
1316         struct e1000_hw *hw = &adapter->hw;
1317         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1318         struct net_device *netdev = adapter->netdev;
1319         struct pci_dev *pdev = adapter->pdev;
1320         struct e1000_buffer *buffer_info, *next_buffer;
1321         struct e1000_ps_page *ps_page;
1322         struct sk_buff *skb;
1323         unsigned int i, j;
1324         u32 length, staterr;
1325         int cleaned_count = 0;
1326         bool cleaned = false;
1327         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1328
1329         i = rx_ring->next_to_clean;
1330         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1331         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1332         buffer_info = &rx_ring->buffer_info[i];
1333
1334         while (staterr & E1000_RXD_STAT_DD) {
1335                 if (*work_done >= work_to_do)
1336                         break;
1337                 (*work_done)++;
1338                 skb = buffer_info->skb;
1339                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1340
1341                 /* in the packet split case this is header only */
1342                 prefetch(skb->data - NET_IP_ALIGN);
1343
1344                 i++;
1345                 if (i == rx_ring->count)
1346                         i = 0;
1347                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1348                 prefetch(next_rxd);
1349
1350                 next_buffer = &rx_ring->buffer_info[i];
1351
1352                 cleaned = true;
1353                 cleaned_count++;
1354                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1355                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1356                 buffer_info->dma = 0;
1357
1358                 /* see !EOP comment in other Rx routine */
1359                 if (!(staterr & E1000_RXD_STAT_EOP))
1360                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1361
1362                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1363                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1364                         dev_kfree_skb_irq(skb);
1365                         if (staterr & E1000_RXD_STAT_EOP)
1366                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1367                         goto next_desc;
1368                 }
1369
1370                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1371                              !(netdev->features & NETIF_F_RXALL))) {
1372                         dev_kfree_skb_irq(skb);
1373                         goto next_desc;
1374                 }
1375
1376                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1377
1378                 if (!length) {
1379                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1380                         dev_kfree_skb_irq(skb);
1381                         goto next_desc;
1382                 }
1383
1384                 /* Good Receive */
1385                 skb_put(skb, length);
1386
1387                 {
1388                         /* this looks ugly, but it seems compiler issues make
1389                          * it more efficient than reusing j
1390                          */
1391                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1392
1393                         /* page alloc/put takes too long and effects small
1394                          * packet throughput, so unsplit small packets and
1395                          * save the alloc/put only valid in softirq (napi)
1396                          * context to call kmap_*
1397                          */
1398                         if (l1 && (l1 <= copybreak) &&
1399                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1400                                 u8 *vaddr;
1401
1402                                 ps_page = &buffer_info->ps_pages[0];
1403
1404                                 /* there is no documentation about how to call
1405                                  * kmap_atomic, so we can't hold the mapping
1406                                  * very long
1407                                  */
1408                                 dma_sync_single_for_cpu(&pdev->dev,
1409                                                         ps_page->dma,
1410                                                         PAGE_SIZE,
1411                                                         DMA_FROM_DEVICE);
1412                                 vaddr = kmap_atomic(ps_page->page);
1413                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1414                                 kunmap_atomic(vaddr);
1415                                 dma_sync_single_for_device(&pdev->dev,
1416                                                            ps_page->dma,
1417                                                            PAGE_SIZE,
1418                                                            DMA_FROM_DEVICE);
1419
1420                                 /* remove the CRC */
1421                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1422                                         if (!(netdev->features & NETIF_F_RXFCS))
1423                                                 l1 -= 4;
1424                                 }
1425
1426                                 skb_put(skb, l1);
1427                                 goto copydone;
1428                         }       /* if */
1429                 }
1430
1431                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1432                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1433                         if (!length)
1434                                 break;
1435
1436                         ps_page = &buffer_info->ps_pages[j];
1437                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1438                                        DMA_FROM_DEVICE);
1439                         ps_page->dma = 0;
1440                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1441                         ps_page->page = NULL;
1442                         skb->len += length;
1443                         skb->data_len += length;
1444                         skb->truesize += PAGE_SIZE;
1445                 }
1446
1447                 /* strip the ethernet crc, problem is we're using pages now so
1448                  * this whole operation can get a little cpu intensive
1449                  */
1450                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1451                         if (!(netdev->features & NETIF_F_RXFCS))
1452                                 pskb_trim(skb, skb->len - 4);
1453                 }
1454
1455 copydone:
1456                 total_rx_bytes += skb->len;
1457                 total_rx_packets++;
1458
1459                 e1000_rx_checksum(adapter, staterr, skb);
1460
1461                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1462
1463                 if (rx_desc->wb.upper.header_status &
1464                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1465                         adapter->rx_hdr_split++;
1466
1467                 e1000_receive_skb(adapter, netdev, skb, staterr,
1468                                   rx_desc->wb.middle.vlan);
1469
1470 next_desc:
1471                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1472                 buffer_info->skb = NULL;
1473
1474                 /* return some buffers to hardware, one at a time is too slow */
1475                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1476                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1477                                               GFP_ATOMIC);
1478                         cleaned_count = 0;
1479                 }
1480
1481                 /* use prefetched values */
1482                 rx_desc = next_rxd;
1483                 buffer_info = next_buffer;
1484
1485                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1486         }
1487         rx_ring->next_to_clean = i;
1488
1489         cleaned_count = e1000_desc_unused(rx_ring);
1490         if (cleaned_count)
1491                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1492
1493         adapter->total_rx_bytes += total_rx_bytes;
1494         adapter->total_rx_packets += total_rx_packets;
1495         return cleaned;
1496 }
1497
1498 /**
1499  * e1000_consume_page - helper function
1500  **/
1501 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1502                                u16 length)
1503 {
1504         bi->page = NULL;
1505         skb->len += length;
1506         skb->data_len += length;
1507         skb->truesize += PAGE_SIZE;
1508 }
1509
1510 /**
1511  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1512  * @adapter: board private structure
1513  *
1514  * the return value indicates whether actual cleaning was done, there
1515  * is no guarantee that everything was cleaned
1516  **/
1517 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1518                                      int work_to_do)
1519 {
1520         struct e1000_adapter *adapter = rx_ring->adapter;
1521         struct net_device *netdev = adapter->netdev;
1522         struct pci_dev *pdev = adapter->pdev;
1523         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1524         struct e1000_buffer *buffer_info, *next_buffer;
1525         u32 length, staterr;
1526         unsigned int i;
1527         int cleaned_count = 0;
1528         bool cleaned = false;
1529         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1530         struct skb_shared_info *shinfo;
1531
1532         i = rx_ring->next_to_clean;
1533         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1534         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1535         buffer_info = &rx_ring->buffer_info[i];
1536
1537         while (staterr & E1000_RXD_STAT_DD) {
1538                 struct sk_buff *skb;
1539
1540                 if (*work_done >= work_to_do)
1541                         break;
1542                 (*work_done)++;
1543                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1544
1545                 skb = buffer_info->skb;
1546                 buffer_info->skb = NULL;
1547
1548                 ++i;
1549                 if (i == rx_ring->count)
1550                         i = 0;
1551                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1552                 prefetch(next_rxd);
1553
1554                 next_buffer = &rx_ring->buffer_info[i];
1555
1556                 cleaned = true;
1557                 cleaned_count++;
1558                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1559                                DMA_FROM_DEVICE);
1560                 buffer_info->dma = 0;
1561
1562                 length = le16_to_cpu(rx_desc->wb.upper.length);
1563
1564                 /* errors is only valid for DD + EOP descriptors */
1565                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1566                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1567                               !(netdev->features & NETIF_F_RXALL)))) {
1568                         /* recycle both page and skb */
1569                         buffer_info->skb = skb;
1570                         /* an error means any chain goes out the window too */
1571                         if (rx_ring->rx_skb_top)
1572                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1573                         rx_ring->rx_skb_top = NULL;
1574                         goto next_desc;
1575                 }
1576 #define rxtop (rx_ring->rx_skb_top)
1577                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1578                         /* this descriptor is only the beginning (or middle) */
1579                         if (!rxtop) {
1580                                 /* this is the beginning of a chain */
1581                                 rxtop = skb;
1582                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1583                                                    0, length);
1584                         } else {
1585                                 /* this is the middle of a chain */
1586                                 shinfo = skb_shinfo(rxtop);
1587                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1588                                                    buffer_info->page, 0,
1589                                                    length);
1590                                 /* re-use the skb, only consumed the page */
1591                                 buffer_info->skb = skb;
1592                         }
1593                         e1000_consume_page(buffer_info, rxtop, length);
1594                         goto next_desc;
1595                 } else {
1596                         if (rxtop) {
1597                                 /* end of the chain */
1598                                 shinfo = skb_shinfo(rxtop);
1599                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1600                                                    buffer_info->page, 0,
1601                                                    length);
1602                                 /* re-use the current skb, we only consumed the
1603                                  * page
1604                                  */
1605                                 buffer_info->skb = skb;
1606                                 skb = rxtop;
1607                                 rxtop = NULL;
1608                                 e1000_consume_page(buffer_info, skb, length);
1609                         } else {
1610                                 /* no chain, got EOP, this buf is the packet
1611                                  * copybreak to save the put_page/alloc_page
1612                                  */
1613                                 if (length <= copybreak &&
1614                                     skb_tailroom(skb) >= length) {
1615                                         u8 *vaddr;
1616                                         vaddr = kmap_atomic(buffer_info->page);
1617                                         memcpy(skb_tail_pointer(skb), vaddr,
1618                                                length);
1619                                         kunmap_atomic(vaddr);
1620                                         /* re-use the page, so don't erase
1621                                          * buffer_info->page
1622                                          */
1623                                         skb_put(skb, length);
1624                                 } else {
1625                                         skb_fill_page_desc(skb, 0,
1626                                                            buffer_info->page, 0,
1627                                                            length);
1628                                         e1000_consume_page(buffer_info, skb,
1629                                                            length);
1630                                 }
1631                         }
1632                 }
1633
1634                 /* Receive Checksum Offload */
1635                 e1000_rx_checksum(adapter, staterr, skb);
1636
1637                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1638
1639                 /* probably a little skewed due to removing CRC */
1640                 total_rx_bytes += skb->len;
1641                 total_rx_packets++;
1642
1643                 /* eth type trans needs skb->data to point to something */
1644                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1645                         e_err("pskb_may_pull failed.\n");
1646                         dev_kfree_skb_irq(skb);
1647                         goto next_desc;
1648                 }
1649
1650                 e1000_receive_skb(adapter, netdev, skb, staterr,
1651                                   rx_desc->wb.upper.vlan);
1652
1653 next_desc:
1654                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1655
1656                 /* return some buffers to hardware, one at a time is too slow */
1657                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1658                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1659                                               GFP_ATOMIC);
1660                         cleaned_count = 0;
1661                 }
1662
1663                 /* use prefetched values */
1664                 rx_desc = next_rxd;
1665                 buffer_info = next_buffer;
1666
1667                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1668         }
1669         rx_ring->next_to_clean = i;
1670
1671         cleaned_count = e1000_desc_unused(rx_ring);
1672         if (cleaned_count)
1673                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1674
1675         adapter->total_rx_bytes += total_rx_bytes;
1676         adapter->total_rx_packets += total_rx_packets;
1677         return cleaned;
1678 }
1679
1680 /**
1681  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1682  * @rx_ring: Rx descriptor ring
1683  **/
1684 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1685 {
1686         struct e1000_adapter *adapter = rx_ring->adapter;
1687         struct e1000_buffer *buffer_info;
1688         struct e1000_ps_page *ps_page;
1689         struct pci_dev *pdev = adapter->pdev;
1690         unsigned int i, j;
1691
1692         /* Free all the Rx ring sk_buffs */
1693         for (i = 0; i < rx_ring->count; i++) {
1694                 buffer_info = &rx_ring->buffer_info[i];
1695                 if (buffer_info->dma) {
1696                         if (adapter->clean_rx == e1000_clean_rx_irq)
1697                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1698                                                  adapter->rx_buffer_len,
1699                                                  DMA_FROM_DEVICE);
1700                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1701                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1702                                                PAGE_SIZE, DMA_FROM_DEVICE);
1703                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1704                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1705                                                  adapter->rx_ps_bsize0,
1706                                                  DMA_FROM_DEVICE);
1707                         buffer_info->dma = 0;
1708                 }
1709
1710                 if (buffer_info->page) {
1711                         put_page(buffer_info->page);
1712                         buffer_info->page = NULL;
1713                 }
1714
1715                 if (buffer_info->skb) {
1716                         dev_kfree_skb(buffer_info->skb);
1717                         buffer_info->skb = NULL;
1718                 }
1719
1720                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1721                         ps_page = &buffer_info->ps_pages[j];
1722                         if (!ps_page->page)
1723                                 break;
1724                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1725                                        DMA_FROM_DEVICE);
1726                         ps_page->dma = 0;
1727                         put_page(ps_page->page);
1728                         ps_page->page = NULL;
1729                 }
1730         }
1731
1732         /* there also may be some cached data from a chained receive */
1733         if (rx_ring->rx_skb_top) {
1734                 dev_kfree_skb(rx_ring->rx_skb_top);
1735                 rx_ring->rx_skb_top = NULL;
1736         }
1737
1738         /* Zero out the descriptor ring */
1739         memset(rx_ring->desc, 0, rx_ring->size);
1740
1741         rx_ring->next_to_clean = 0;
1742         rx_ring->next_to_use = 0;
1743         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1744 }
1745
1746 static void e1000e_downshift_workaround(struct work_struct *work)
1747 {
1748         struct e1000_adapter *adapter = container_of(work,
1749                                                      struct e1000_adapter,
1750                                                      downshift_task);
1751
1752         if (test_bit(__E1000_DOWN, &adapter->state))
1753                 return;
1754
1755         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1756 }
1757
1758 /**
1759  * e1000_intr_msi - Interrupt Handler
1760  * @irq: interrupt number
1761  * @data: pointer to a network interface device structure
1762  **/
1763 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1764 {
1765         struct net_device *netdev = data;
1766         struct e1000_adapter *adapter = netdev_priv(netdev);
1767         struct e1000_hw *hw = &adapter->hw;
1768         u32 icr = er32(ICR);
1769
1770         /* read ICR disables interrupts using IAM */
1771         if (icr & E1000_ICR_LSC) {
1772                 hw->mac.get_link_status = true;
1773                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1774                  * disconnect (LSC) before accessing any PHY registers
1775                  */
1776                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1777                     (!(er32(STATUS) & E1000_STATUS_LU)))
1778                         schedule_work(&adapter->downshift_task);
1779
1780                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1781                  * link down event; disable receives here in the ISR and reset
1782                  * adapter in watchdog
1783                  */
1784                 if (netif_carrier_ok(netdev) &&
1785                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1786                         /* disable receives */
1787                         u32 rctl = er32(RCTL);
1788
1789                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1790                         adapter->flags |= FLAG_RESTART_NOW;
1791                 }
1792                 /* guard against interrupt when we're going down */
1793                 if (!test_bit(__E1000_DOWN, &adapter->state))
1794                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1795         }
1796
1797         /* Reset on uncorrectable ECC error */
1798         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1799                                         (hw->mac.type == e1000_pch_spt))) {
1800                 u32 pbeccsts = er32(PBECCSTS);
1801
1802                 adapter->corr_errors +=
1803                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1804                 adapter->uncorr_errors +=
1805                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1806                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1807
1808                 /* Do the reset outside of interrupt context */
1809                 schedule_work(&adapter->reset_task);
1810
1811                 /* return immediately since reset is imminent */
1812                 return IRQ_HANDLED;
1813         }
1814
1815         if (napi_schedule_prep(&adapter->napi)) {
1816                 adapter->total_tx_bytes = 0;
1817                 adapter->total_tx_packets = 0;
1818                 adapter->total_rx_bytes = 0;
1819                 adapter->total_rx_packets = 0;
1820                 __napi_schedule(&adapter->napi);
1821         }
1822
1823         return IRQ_HANDLED;
1824 }
1825
1826 /**
1827  * e1000_intr - Interrupt Handler
1828  * @irq: interrupt number
1829  * @data: pointer to a network interface device structure
1830  **/
1831 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1832 {
1833         struct net_device *netdev = data;
1834         struct e1000_adapter *adapter = netdev_priv(netdev);
1835         struct e1000_hw *hw = &adapter->hw;
1836         u32 rctl, icr = er32(ICR);
1837
1838         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1839                 return IRQ_NONE;        /* Not our interrupt */
1840
1841         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1842          * not set, then the adapter didn't send an interrupt
1843          */
1844         if (!(icr & E1000_ICR_INT_ASSERTED))
1845                 return IRQ_NONE;
1846
1847         /* Interrupt Auto-Mask...upon reading ICR,
1848          * interrupts are masked.  No need for the
1849          * IMC write
1850          */
1851
1852         if (icr & E1000_ICR_LSC) {
1853                 hw->mac.get_link_status = true;
1854                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1855                  * disconnect (LSC) before accessing any PHY registers
1856                  */
1857                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1858                     (!(er32(STATUS) & E1000_STATUS_LU)))
1859                         schedule_work(&adapter->downshift_task);
1860
1861                 /* 80003ES2LAN workaround--
1862                  * For packet buffer work-around on link down event;
1863                  * disable receives here in the ISR and
1864                  * reset adapter in watchdog
1865                  */
1866                 if (netif_carrier_ok(netdev) &&
1867                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1868                         /* disable receives */
1869                         rctl = er32(RCTL);
1870                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1871                         adapter->flags |= FLAG_RESTART_NOW;
1872                 }
1873                 /* guard against interrupt when we're going down */
1874                 if (!test_bit(__E1000_DOWN, &adapter->state))
1875                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1876         }
1877
1878         /* Reset on uncorrectable ECC error */
1879         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1880                                         (hw->mac.type == e1000_pch_spt))) {
1881                 u32 pbeccsts = er32(PBECCSTS);
1882
1883                 adapter->corr_errors +=
1884                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1885                 adapter->uncorr_errors +=
1886                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1887                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1888
1889                 /* Do the reset outside of interrupt context */
1890                 schedule_work(&adapter->reset_task);
1891
1892                 /* return immediately since reset is imminent */
1893                 return IRQ_HANDLED;
1894         }
1895
1896         if (napi_schedule_prep(&adapter->napi)) {
1897                 adapter->total_tx_bytes = 0;
1898                 adapter->total_tx_packets = 0;
1899                 adapter->total_rx_bytes = 0;
1900                 adapter->total_rx_packets = 0;
1901                 __napi_schedule(&adapter->napi);
1902         }
1903
1904         return IRQ_HANDLED;
1905 }
1906
1907 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1908 {
1909         struct net_device *netdev = data;
1910         struct e1000_adapter *adapter = netdev_priv(netdev);
1911         struct e1000_hw *hw = &adapter->hw;
1912         u32 icr = er32(ICR);
1913
1914         if (!(icr & E1000_ICR_INT_ASSERTED)) {
1915                 if (!test_bit(__E1000_DOWN, &adapter->state))
1916                         ew32(IMS, E1000_IMS_OTHER);
1917                 return IRQ_NONE;
1918         }
1919
1920         if (icr & adapter->eiac_mask)
1921                 ew32(ICS, (icr & adapter->eiac_mask));
1922
1923         if (icr & E1000_ICR_OTHER) {
1924                 if (!(icr & E1000_ICR_LSC))
1925                         goto no_link_interrupt;
1926                 hw->mac.get_link_status = true;
1927                 /* guard against interrupt when we're going down */
1928                 if (!test_bit(__E1000_DOWN, &adapter->state))
1929                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1930         }
1931
1932 no_link_interrupt:
1933         if (!test_bit(__E1000_DOWN, &adapter->state))
1934                 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1935
1936         return IRQ_HANDLED;
1937 }
1938
1939 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1940 {
1941         struct net_device *netdev = data;
1942         struct e1000_adapter *adapter = netdev_priv(netdev);
1943         struct e1000_hw *hw = &adapter->hw;
1944         struct e1000_ring *tx_ring = adapter->tx_ring;
1945
1946         adapter->total_tx_bytes = 0;
1947         adapter->total_tx_packets = 0;
1948
1949         if (!e1000_clean_tx_irq(tx_ring))
1950                 /* Ring was not completely cleaned, so fire another interrupt */
1951                 ew32(ICS, tx_ring->ims_val);
1952
1953         return IRQ_HANDLED;
1954 }
1955
1956 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1957 {
1958         struct net_device *netdev = data;
1959         struct e1000_adapter *adapter = netdev_priv(netdev);
1960         struct e1000_ring *rx_ring = adapter->rx_ring;
1961
1962         /* Write the ITR value calculated at the end of the
1963          * previous interrupt.
1964          */
1965         if (rx_ring->set_itr) {
1966                 u32 itr = rx_ring->itr_val ?
1967                           1000000000 / (rx_ring->itr_val * 256) : 0;
1968
1969                 writel(itr, rx_ring->itr_register);
1970                 rx_ring->set_itr = 0;
1971         }
1972
1973         if (napi_schedule_prep(&adapter->napi)) {
1974                 adapter->total_rx_bytes = 0;
1975                 adapter->total_rx_packets = 0;
1976                 __napi_schedule(&adapter->napi);
1977         }
1978         return IRQ_HANDLED;
1979 }
1980
1981 /**
1982  * e1000_configure_msix - Configure MSI-X hardware
1983  *
1984  * e1000_configure_msix sets up the hardware to properly
1985  * generate MSI-X interrupts.
1986  **/
1987 static void e1000_configure_msix(struct e1000_adapter *adapter)
1988 {
1989         struct e1000_hw *hw = &adapter->hw;
1990         struct e1000_ring *rx_ring = adapter->rx_ring;
1991         struct e1000_ring *tx_ring = adapter->tx_ring;
1992         int vector = 0;
1993         u32 ctrl_ext, ivar = 0;
1994
1995         adapter->eiac_mask = 0;
1996
1997         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1998         if (hw->mac.type == e1000_82574) {
1999                 u32 rfctl = er32(RFCTL);
2000
2001                 rfctl |= E1000_RFCTL_ACK_DIS;
2002                 ew32(RFCTL, rfctl);
2003         }
2004
2005         /* Configure Rx vector */
2006         rx_ring->ims_val = E1000_IMS_RXQ0;
2007         adapter->eiac_mask |= rx_ring->ims_val;
2008         if (rx_ring->itr_val)
2009                 writel(1000000000 / (rx_ring->itr_val * 256),
2010                        rx_ring->itr_register);
2011         else
2012                 writel(1, rx_ring->itr_register);
2013         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2014
2015         /* Configure Tx vector */
2016         tx_ring->ims_val = E1000_IMS_TXQ0;
2017         vector++;
2018         if (tx_ring->itr_val)
2019                 writel(1000000000 / (tx_ring->itr_val * 256),
2020                        tx_ring->itr_register);
2021         else
2022                 writel(1, tx_ring->itr_register);
2023         adapter->eiac_mask |= tx_ring->ims_val;
2024         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2025
2026         /* set vector for Other Causes, e.g. link changes */
2027         vector++;
2028         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2029         if (rx_ring->itr_val)
2030                 writel(1000000000 / (rx_ring->itr_val * 256),
2031                        hw->hw_addr + E1000_EITR_82574(vector));
2032         else
2033                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2034
2035         /* Cause Tx interrupts on every write back */
2036         ivar |= (1 << 31);
2037
2038         ew32(IVAR, ivar);
2039
2040         /* enable MSI-X PBA support */
2041         ctrl_ext = er32(CTRL_EXT);
2042         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2043
2044         /* Auto-Mask Other interrupts upon ICR read */
2045         ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2046         ctrl_ext |= E1000_CTRL_EXT_EIAME;
2047         ew32(CTRL_EXT, ctrl_ext);
2048         e1e_flush();
2049 }
2050
2051 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2052 {
2053         if (adapter->msix_entries) {
2054                 pci_disable_msix(adapter->pdev);
2055                 kfree(adapter->msix_entries);
2056                 adapter->msix_entries = NULL;
2057         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2058                 pci_disable_msi(adapter->pdev);
2059                 adapter->flags &= ~FLAG_MSI_ENABLED;
2060         }
2061 }
2062
2063 /**
2064  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2065  *
2066  * Attempt to configure interrupts using the best available
2067  * capabilities of the hardware and kernel.
2068  **/
2069 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2070 {
2071         int err;
2072         int i;
2073
2074         switch (adapter->int_mode) {
2075         case E1000E_INT_MODE_MSIX:
2076                 if (adapter->flags & FLAG_HAS_MSIX) {
2077                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2078                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2079                                                         sizeof(struct
2080                                                                msix_entry),
2081                                                         GFP_KERNEL);
2082                         if (adapter->msix_entries) {
2083                                 struct e1000_adapter *a = adapter;
2084
2085                                 for (i = 0; i < adapter->num_vectors; i++)
2086                                         adapter->msix_entries[i].entry = i;
2087
2088                                 err = pci_enable_msix_range(a->pdev,
2089                                                             a->msix_entries,
2090                                                             a->num_vectors,
2091                                                             a->num_vectors);
2092                                 if (err > 0)
2093                                         return;
2094                         }
2095                         /* MSI-X failed, so fall through and try MSI */
2096                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2097                         e1000e_reset_interrupt_capability(adapter);
2098                 }
2099                 adapter->int_mode = E1000E_INT_MODE_MSI;
2100                 /* Fall through */
2101         case E1000E_INT_MODE_MSI:
2102                 if (!pci_enable_msi(adapter->pdev)) {
2103                         adapter->flags |= FLAG_MSI_ENABLED;
2104                 } else {
2105                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2106                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2107                 }
2108                 /* Fall through */
2109         case E1000E_INT_MODE_LEGACY:
2110                 /* Don't do anything; this is the system default */
2111                 break;
2112         }
2113
2114         /* store the number of vectors being used */
2115         adapter->num_vectors = 1;
2116 }
2117
2118 /**
2119  * e1000_request_msix - Initialize MSI-X interrupts
2120  *
2121  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2122  * kernel.
2123  **/
2124 static int e1000_request_msix(struct e1000_adapter *adapter)
2125 {
2126         struct net_device *netdev = adapter->netdev;
2127         int err = 0, vector = 0;
2128
2129         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2130                 snprintf(adapter->rx_ring->name,
2131                          sizeof(adapter->rx_ring->name) - 1,
2132                          "%.14s-rx-0", netdev->name);
2133         else
2134                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2135         err = request_irq(adapter->msix_entries[vector].vector,
2136                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2137                           netdev);
2138         if (err)
2139                 return err;
2140         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2141             E1000_EITR_82574(vector);
2142         adapter->rx_ring->itr_val = adapter->itr;
2143         vector++;
2144
2145         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2146                 snprintf(adapter->tx_ring->name,
2147                          sizeof(adapter->tx_ring->name) - 1,
2148                          "%.14s-tx-0", netdev->name);
2149         else
2150                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2151         err = request_irq(adapter->msix_entries[vector].vector,
2152                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2153                           netdev);
2154         if (err)
2155                 return err;
2156         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2157             E1000_EITR_82574(vector);
2158         adapter->tx_ring->itr_val = adapter->itr;
2159         vector++;
2160
2161         err = request_irq(adapter->msix_entries[vector].vector,
2162                           e1000_msix_other, 0, netdev->name, netdev);
2163         if (err)
2164                 return err;
2165
2166         e1000_configure_msix(adapter);
2167
2168         return 0;
2169 }
2170
2171 /**
2172  * e1000_request_irq - initialize interrupts
2173  *
2174  * Attempts to configure interrupts using the best available
2175  * capabilities of the hardware and kernel.
2176  **/
2177 static int e1000_request_irq(struct e1000_adapter *adapter)
2178 {
2179         struct net_device *netdev = adapter->netdev;
2180         int err;
2181
2182         if (adapter->msix_entries) {
2183                 err = e1000_request_msix(adapter);
2184                 if (!err)
2185                         return err;
2186                 /* fall back to MSI */
2187                 e1000e_reset_interrupt_capability(adapter);
2188                 adapter->int_mode = E1000E_INT_MODE_MSI;
2189                 e1000e_set_interrupt_capability(adapter);
2190         }
2191         if (adapter->flags & FLAG_MSI_ENABLED) {
2192                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2193                                   netdev->name, netdev);
2194                 if (!err)
2195                         return err;
2196
2197                 /* fall back to legacy interrupt */
2198                 e1000e_reset_interrupt_capability(adapter);
2199                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2200         }
2201
2202         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2203                           netdev->name, netdev);
2204         if (err)
2205                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2206
2207         return err;
2208 }
2209
2210 static void e1000_free_irq(struct e1000_adapter *adapter)
2211 {
2212         struct net_device *netdev = adapter->netdev;
2213
2214         if (adapter->msix_entries) {
2215                 int vector = 0;
2216
2217                 free_irq(adapter->msix_entries[vector].vector, netdev);
2218                 vector++;
2219
2220                 free_irq(adapter->msix_entries[vector].vector, netdev);
2221                 vector++;
2222
2223                 /* Other Causes interrupt vector */
2224                 free_irq(adapter->msix_entries[vector].vector, netdev);
2225                 return;
2226         }
2227
2228         free_irq(adapter->pdev->irq, netdev);
2229 }
2230
2231 /**
2232  * e1000_irq_disable - Mask off interrupt generation on the NIC
2233  **/
2234 static void e1000_irq_disable(struct e1000_adapter *adapter)
2235 {
2236         struct e1000_hw *hw = &adapter->hw;
2237
2238         ew32(IMC, ~0);
2239         if (adapter->msix_entries)
2240                 ew32(EIAC_82574, 0);
2241         e1e_flush();
2242
2243         if (adapter->msix_entries) {
2244                 int i;
2245
2246                 for (i = 0; i < adapter->num_vectors; i++)
2247                         synchronize_irq(adapter->msix_entries[i].vector);
2248         } else {
2249                 synchronize_irq(adapter->pdev->irq);
2250         }
2251 }
2252
2253 /**
2254  * e1000_irq_enable - Enable default interrupt generation settings
2255  **/
2256 static void e1000_irq_enable(struct e1000_adapter *adapter)
2257 {
2258         struct e1000_hw *hw = &adapter->hw;
2259
2260         if (adapter->msix_entries) {
2261                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2262                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2263         } else if ((hw->mac.type == e1000_pch_lpt) ||
2264                    (hw->mac.type == e1000_pch_spt)) {
2265                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2266         } else {
2267                 ew32(IMS, IMS_ENABLE_MASK);
2268         }
2269         e1e_flush();
2270 }
2271
2272 /**
2273  * e1000e_get_hw_control - get control of the h/w from f/w
2274  * @adapter: address of board private structure
2275  *
2276  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2277  * For ASF and Pass Through versions of f/w this means that
2278  * the driver is loaded. For AMT version (only with 82573)
2279  * of the f/w this means that the network i/f is open.
2280  **/
2281 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2282 {
2283         struct e1000_hw *hw = &adapter->hw;
2284         u32 ctrl_ext;
2285         u32 swsm;
2286
2287         /* Let firmware know the driver has taken over */
2288         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2289                 swsm = er32(SWSM);
2290                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2291         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2292                 ctrl_ext = er32(CTRL_EXT);
2293                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2294         }
2295 }
2296
2297 /**
2298  * e1000e_release_hw_control - release control of the h/w to f/w
2299  * @adapter: address of board private structure
2300  *
2301  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2302  * For ASF and Pass Through versions of f/w this means that the
2303  * driver is no longer loaded. For AMT version (only with 82573) i
2304  * of the f/w this means that the network i/f is closed.
2305  *
2306  **/
2307 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2308 {
2309         struct e1000_hw *hw = &adapter->hw;
2310         u32 ctrl_ext;
2311         u32 swsm;
2312
2313         /* Let firmware taken over control of h/w */
2314         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2315                 swsm = er32(SWSM);
2316                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2317         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2318                 ctrl_ext = er32(CTRL_EXT);
2319                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2320         }
2321 }
2322
2323 /**
2324  * e1000_alloc_ring_dma - allocate memory for a ring structure
2325  **/
2326 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2327                                 struct e1000_ring *ring)
2328 {
2329         struct pci_dev *pdev = adapter->pdev;
2330
2331         ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2332                                          GFP_KERNEL);
2333         if (!ring->desc)
2334                 return -ENOMEM;
2335
2336         return 0;
2337 }
2338
2339 /**
2340  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2341  * @tx_ring: Tx descriptor ring
2342  *
2343  * Return 0 on success, negative on failure
2344  **/
2345 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2346 {
2347         struct e1000_adapter *adapter = tx_ring->adapter;
2348         int err = -ENOMEM, size;
2349
2350         size = sizeof(struct e1000_buffer) * tx_ring->count;
2351         tx_ring->buffer_info = vzalloc(size);
2352         if (!tx_ring->buffer_info)
2353                 goto err;
2354
2355         /* round up to nearest 4K */
2356         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2357         tx_ring->size = ALIGN(tx_ring->size, 4096);
2358
2359         err = e1000_alloc_ring_dma(adapter, tx_ring);
2360         if (err)
2361                 goto err;
2362
2363         tx_ring->next_to_use = 0;
2364         tx_ring->next_to_clean = 0;
2365
2366         return 0;
2367 err:
2368         vfree(tx_ring->buffer_info);
2369         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2370         return err;
2371 }
2372
2373 /**
2374  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2375  * @rx_ring: Rx descriptor ring
2376  *
2377  * Returns 0 on success, negative on failure
2378  **/
2379 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2380 {
2381         struct e1000_adapter *adapter = rx_ring->adapter;
2382         struct e1000_buffer *buffer_info;
2383         int i, size, desc_len, err = -ENOMEM;
2384
2385         size = sizeof(struct e1000_buffer) * rx_ring->count;
2386         rx_ring->buffer_info = vzalloc(size);
2387         if (!rx_ring->buffer_info)
2388                 goto err;
2389
2390         for (i = 0; i < rx_ring->count; i++) {
2391                 buffer_info = &rx_ring->buffer_info[i];
2392                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2393                                                 sizeof(struct e1000_ps_page),
2394                                                 GFP_KERNEL);
2395                 if (!buffer_info->ps_pages)
2396                         goto err_pages;
2397         }
2398
2399         desc_len = sizeof(union e1000_rx_desc_packet_split);
2400
2401         /* Round up to nearest 4K */
2402         rx_ring->size = rx_ring->count * desc_len;
2403         rx_ring->size = ALIGN(rx_ring->size, 4096);
2404
2405         err = e1000_alloc_ring_dma(adapter, rx_ring);
2406         if (err)
2407                 goto err_pages;
2408
2409         rx_ring->next_to_clean = 0;
2410         rx_ring->next_to_use = 0;
2411         rx_ring->rx_skb_top = NULL;
2412
2413         return 0;
2414
2415 err_pages:
2416         for (i = 0; i < rx_ring->count; i++) {
2417                 buffer_info = &rx_ring->buffer_info[i];
2418                 kfree(buffer_info->ps_pages);
2419         }
2420 err:
2421         vfree(rx_ring->buffer_info);
2422         e_err("Unable to allocate memory for the receive descriptor ring\n");
2423         return err;
2424 }
2425
2426 /**
2427  * e1000_clean_tx_ring - Free Tx Buffers
2428  * @tx_ring: Tx descriptor ring
2429  **/
2430 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2431 {
2432         struct e1000_adapter *adapter = tx_ring->adapter;
2433         struct e1000_buffer *buffer_info;
2434         unsigned long size;
2435         unsigned int i;
2436
2437         for (i = 0; i < tx_ring->count; i++) {
2438                 buffer_info = &tx_ring->buffer_info[i];
2439                 e1000_put_txbuf(tx_ring, buffer_info);
2440         }
2441
2442         netdev_reset_queue(adapter->netdev);
2443         size = sizeof(struct e1000_buffer) * tx_ring->count;
2444         memset(tx_ring->buffer_info, 0, size);
2445
2446         memset(tx_ring->desc, 0, tx_ring->size);
2447
2448         tx_ring->next_to_use = 0;
2449         tx_ring->next_to_clean = 0;
2450 }
2451
2452 /**
2453  * e1000e_free_tx_resources - Free Tx Resources per Queue
2454  * @tx_ring: Tx descriptor ring
2455  *
2456  * Free all transmit software resources
2457  **/
2458 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2459 {
2460         struct e1000_adapter *adapter = tx_ring->adapter;
2461         struct pci_dev *pdev = adapter->pdev;
2462
2463         e1000_clean_tx_ring(tx_ring);
2464
2465         vfree(tx_ring->buffer_info);
2466         tx_ring->buffer_info = NULL;
2467
2468         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2469                           tx_ring->dma);
2470         tx_ring->desc = NULL;
2471 }
2472
2473 /**
2474  * e1000e_free_rx_resources - Free Rx Resources
2475  * @rx_ring: Rx descriptor ring
2476  *
2477  * Free all receive software resources
2478  **/
2479 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2480 {
2481         struct e1000_adapter *adapter = rx_ring->adapter;
2482         struct pci_dev *pdev = adapter->pdev;
2483         int i;
2484
2485         e1000_clean_rx_ring(rx_ring);
2486
2487         for (i = 0; i < rx_ring->count; i++)
2488                 kfree(rx_ring->buffer_info[i].ps_pages);
2489
2490         vfree(rx_ring->buffer_info);
2491         rx_ring->buffer_info = NULL;
2492
2493         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2494                           rx_ring->dma);
2495         rx_ring->desc = NULL;
2496 }
2497
2498 /**
2499  * e1000_update_itr - update the dynamic ITR value based on statistics
2500  * @adapter: pointer to adapter
2501  * @itr_setting: current adapter->itr
2502  * @packets: the number of packets during this measurement interval
2503  * @bytes: the number of bytes during this measurement interval
2504  *
2505  *      Stores a new ITR value based on packets and byte
2506  *      counts during the last interrupt.  The advantage of per interrupt
2507  *      computation is faster updates and more accurate ITR for the current
2508  *      traffic pattern.  Constants in this function were computed
2509  *      based on theoretical maximum wire speed and thresholds were set based
2510  *      on testing data as well as attempting to minimize response time
2511  *      while increasing bulk throughput.  This functionality is controlled
2512  *      by the InterruptThrottleRate module parameter.
2513  **/
2514 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2515 {
2516         unsigned int retval = itr_setting;
2517
2518         if (packets == 0)
2519                 return itr_setting;
2520
2521         switch (itr_setting) {
2522         case lowest_latency:
2523                 /* handle TSO and jumbo frames */
2524                 if (bytes / packets > 8000)
2525                         retval = bulk_latency;
2526                 else if ((packets < 5) && (bytes > 512))
2527                         retval = low_latency;
2528                 break;
2529         case low_latency:       /* 50 usec aka 20000 ints/s */
2530                 if (bytes > 10000) {
2531                         /* this if handles the TSO accounting */
2532                         if (bytes / packets > 8000)
2533                                 retval = bulk_latency;
2534                         else if ((packets < 10) || ((bytes / packets) > 1200))
2535                                 retval = bulk_latency;
2536                         else if ((packets > 35))
2537                                 retval = lowest_latency;
2538                 } else if (bytes / packets > 2000) {
2539                         retval = bulk_latency;
2540                 } else if (packets <= 2 && bytes < 512) {
2541                         retval = lowest_latency;
2542                 }
2543                 break;
2544         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2545                 if (bytes > 25000) {
2546                         if (packets > 35)
2547                                 retval = low_latency;
2548                 } else if (bytes < 6000) {
2549                         retval = low_latency;
2550                 }
2551                 break;
2552         }
2553
2554         return retval;
2555 }
2556
2557 static void e1000_set_itr(struct e1000_adapter *adapter)
2558 {
2559         u16 current_itr;
2560         u32 new_itr = adapter->itr;
2561
2562         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2563         if (adapter->link_speed != SPEED_1000) {
2564                 current_itr = 0;
2565                 new_itr = 4000;
2566                 goto set_itr_now;
2567         }
2568
2569         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2570                 new_itr = 0;
2571                 goto set_itr_now;
2572         }
2573
2574         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2575                                            adapter->total_tx_packets,
2576                                            adapter->total_tx_bytes);
2577         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2578         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2579                 adapter->tx_itr = low_latency;
2580
2581         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2582                                            adapter->total_rx_packets,
2583                                            adapter->total_rx_bytes);
2584         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2585         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2586                 adapter->rx_itr = low_latency;
2587
2588         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2589
2590         /* counts and packets in update_itr are dependent on these numbers */
2591         switch (current_itr) {
2592         case lowest_latency:
2593                 new_itr = 70000;
2594                 break;
2595         case low_latency:
2596                 new_itr = 20000;        /* aka hwitr = ~200 */
2597                 break;
2598         case bulk_latency:
2599                 new_itr = 4000;
2600                 break;
2601         default:
2602                 break;
2603         }
2604
2605 set_itr_now:
2606         if (new_itr != adapter->itr) {
2607                 /* this attempts to bias the interrupt rate towards Bulk
2608                  * by adding intermediate steps when interrupt rate is
2609                  * increasing
2610                  */
2611                 new_itr = new_itr > adapter->itr ?
2612                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2613                 adapter->itr = new_itr;
2614                 adapter->rx_ring->itr_val = new_itr;
2615                 if (adapter->msix_entries)
2616                         adapter->rx_ring->set_itr = 1;
2617                 else
2618                         e1000e_write_itr(adapter, new_itr);
2619         }
2620 }
2621
2622 /**
2623  * e1000e_write_itr - write the ITR value to the appropriate registers
2624  * @adapter: address of board private structure
2625  * @itr: new ITR value to program
2626  *
2627  * e1000e_write_itr determines if the adapter is in MSI-X mode
2628  * and, if so, writes the EITR registers with the ITR value.
2629  * Otherwise, it writes the ITR value into the ITR register.
2630  **/
2631 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2632 {
2633         struct e1000_hw *hw = &adapter->hw;
2634         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2635
2636         if (adapter->msix_entries) {
2637                 int vector;
2638
2639                 for (vector = 0; vector < adapter->num_vectors; vector++)
2640                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2641         } else {
2642                 ew32(ITR, new_itr);
2643         }
2644 }
2645
2646 /**
2647  * e1000_alloc_queues - Allocate memory for all rings
2648  * @adapter: board private structure to initialize
2649  **/
2650 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2651 {
2652         int size = sizeof(struct e1000_ring);
2653
2654         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2655         if (!adapter->tx_ring)
2656                 goto err;
2657         adapter->tx_ring->count = adapter->tx_ring_count;
2658         adapter->tx_ring->adapter = adapter;
2659
2660         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2661         if (!adapter->rx_ring)
2662                 goto err;
2663         adapter->rx_ring->count = adapter->rx_ring_count;
2664         adapter->rx_ring->adapter = adapter;
2665
2666         return 0;
2667 err:
2668         e_err("Unable to allocate memory for queues\n");
2669         kfree(adapter->rx_ring);
2670         kfree(adapter->tx_ring);
2671         return -ENOMEM;
2672 }
2673
2674 /**
2675  * e1000e_poll - NAPI Rx polling callback
2676  * @napi: struct associated with this polling callback
2677  * @weight: number of packets driver is allowed to process this poll
2678  **/
2679 static int e1000e_poll(struct napi_struct *napi, int weight)
2680 {
2681         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2682                                                      napi);
2683         struct e1000_hw *hw = &adapter->hw;
2684         struct net_device *poll_dev = adapter->netdev;
2685         int tx_cleaned = 1, work_done = 0;
2686
2687         adapter = netdev_priv(poll_dev);
2688
2689         if (!adapter->msix_entries ||
2690             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2691                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2692
2693         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2694
2695         if (!tx_cleaned)
2696                 work_done = weight;
2697
2698         /* If weight not fully consumed, exit the polling mode */
2699         if (work_done < weight) {
2700                 if (adapter->itr_setting & 3)
2701                         e1000_set_itr(adapter);
2702                 napi_complete_done(napi, work_done);
2703                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2704                         if (adapter->msix_entries)
2705                                 ew32(IMS, adapter->rx_ring->ims_val);
2706                         else
2707                                 e1000_irq_enable(adapter);
2708                 }
2709         }
2710
2711         return work_done;
2712 }
2713
2714 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2715                                  __always_unused __be16 proto, u16 vid)
2716 {
2717         struct e1000_adapter *adapter = netdev_priv(netdev);
2718         struct e1000_hw *hw = &adapter->hw;
2719         u32 vfta, index;
2720
2721         /* don't update vlan cookie if already programmed */
2722         if ((adapter->hw.mng_cookie.status &
2723              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2724             (vid == adapter->mng_vlan_id))
2725                 return 0;
2726
2727         /* add VID to filter table */
2728         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2729                 index = (vid >> 5) & 0x7F;
2730                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2731                 vfta |= (1 << (vid & 0x1F));
2732                 hw->mac.ops.write_vfta(hw, index, vfta);
2733         }
2734
2735         set_bit(vid, adapter->active_vlans);
2736
2737         return 0;
2738 }
2739
2740 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2741                                   __always_unused __be16 proto, u16 vid)
2742 {
2743         struct e1000_adapter *adapter = netdev_priv(netdev);
2744         struct e1000_hw *hw = &adapter->hw;
2745         u32 vfta, index;
2746
2747         if ((adapter->hw.mng_cookie.status &
2748              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2749             (vid == adapter->mng_vlan_id)) {
2750                 /* release control to f/w */
2751                 e1000e_release_hw_control(adapter);
2752                 return 0;
2753         }
2754
2755         /* remove VID from filter table */
2756         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2757                 index = (vid >> 5) & 0x7F;
2758                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2759                 vfta &= ~(1 << (vid & 0x1F));
2760                 hw->mac.ops.write_vfta(hw, index, vfta);
2761         }
2762
2763         clear_bit(vid, adapter->active_vlans);
2764
2765         return 0;
2766 }
2767
2768 /**
2769  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2770  * @adapter: board private structure to initialize
2771  **/
2772 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2773 {
2774         struct net_device *netdev = adapter->netdev;
2775         struct e1000_hw *hw = &adapter->hw;
2776         u32 rctl;
2777
2778         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2779                 /* disable VLAN receive filtering */
2780                 rctl = er32(RCTL);
2781                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2782                 ew32(RCTL, rctl);
2783
2784                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2785                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2786                                                adapter->mng_vlan_id);
2787                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2788                 }
2789         }
2790 }
2791
2792 /**
2793  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2794  * @adapter: board private structure to initialize
2795  **/
2796 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2797 {
2798         struct e1000_hw *hw = &adapter->hw;
2799         u32 rctl;
2800
2801         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2802                 /* enable VLAN receive filtering */
2803                 rctl = er32(RCTL);
2804                 rctl |= E1000_RCTL_VFE;
2805                 rctl &= ~E1000_RCTL_CFIEN;
2806                 ew32(RCTL, rctl);
2807         }
2808 }
2809
2810 /**
2811  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2812  * @adapter: board private structure to initialize
2813  **/
2814 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2815 {
2816         struct e1000_hw *hw = &adapter->hw;
2817         u32 ctrl;
2818
2819         /* disable VLAN tag insert/strip */
2820         ctrl = er32(CTRL);
2821         ctrl &= ~E1000_CTRL_VME;
2822         ew32(CTRL, ctrl);
2823 }
2824
2825 /**
2826  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2827  * @adapter: board private structure to initialize
2828  **/
2829 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2830 {
2831         struct e1000_hw *hw = &adapter->hw;
2832         u32 ctrl;
2833
2834         /* enable VLAN tag insert/strip */
2835         ctrl = er32(CTRL);
2836         ctrl |= E1000_CTRL_VME;
2837         ew32(CTRL, ctrl);
2838 }
2839
2840 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2841 {
2842         struct net_device *netdev = adapter->netdev;
2843         u16 vid = adapter->hw.mng_cookie.vlan_id;
2844         u16 old_vid = adapter->mng_vlan_id;
2845
2846         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2847                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2848                 adapter->mng_vlan_id = vid;
2849         }
2850
2851         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2852                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2853 }
2854
2855 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2856 {
2857         u16 vid;
2858
2859         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2860
2861         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2862             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2863 }
2864
2865 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2866 {
2867         struct e1000_hw *hw = &adapter->hw;
2868         u32 manc, manc2h, mdef, i, j;
2869
2870         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2871                 return;
2872
2873         manc = er32(MANC);
2874
2875         /* enable receiving management packets to the host. this will probably
2876          * generate destination unreachable messages from the host OS, but
2877          * the packets will be handled on SMBUS
2878          */
2879         manc |= E1000_MANC_EN_MNG2HOST;
2880         manc2h = er32(MANC2H);
2881
2882         switch (hw->mac.type) {
2883         default:
2884                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2885                 break;
2886         case e1000_82574:
2887         case e1000_82583:
2888                 /* Check if IPMI pass-through decision filter already exists;
2889                  * if so, enable it.
2890                  */
2891                 for (i = 0, j = 0; i < 8; i++) {
2892                         mdef = er32(MDEF(i));
2893
2894                         /* Ignore filters with anything other than IPMI ports */
2895                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2896                                 continue;
2897
2898                         /* Enable this decision filter in MANC2H */
2899                         if (mdef)
2900                                 manc2h |= (1 << i);
2901
2902                         j |= mdef;
2903                 }
2904
2905                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2906                         break;
2907
2908                 /* Create new decision filter in an empty filter */
2909                 for (i = 0, j = 0; i < 8; i++)
2910                         if (er32(MDEF(i)) == 0) {
2911                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2912                                                E1000_MDEF_PORT_664));
2913                                 manc2h |= (1 << 1);
2914                                 j++;
2915                                 break;
2916                         }
2917
2918                 if (!j)
2919                         e_warn("Unable to create IPMI pass-through filter\n");
2920                 break;
2921         }
2922
2923         ew32(MANC2H, manc2h);
2924         ew32(MANC, manc);
2925 }
2926
2927 /**
2928  * e1000_configure_tx - Configure Transmit Unit after Reset
2929  * @adapter: board private structure
2930  *
2931  * Configure the Tx unit of the MAC after a reset.
2932  **/
2933 static void e1000_configure_tx(struct e1000_adapter *adapter)
2934 {
2935         struct e1000_hw *hw = &adapter->hw;
2936         struct e1000_ring *tx_ring = adapter->tx_ring;
2937         u64 tdba;
2938         u32 tdlen, tctl, tarc;
2939
2940         /* Setup the HW Tx Head and Tail descriptor pointers */
2941         tdba = tx_ring->dma;
2942         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2943         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2944         ew32(TDBAH(0), (tdba >> 32));
2945         ew32(TDLEN(0), tdlen);
2946         ew32(TDH(0), 0);
2947         ew32(TDT(0), 0);
2948         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2949         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2950
2951         writel(0, tx_ring->head);
2952         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2953                 e1000e_update_tdt_wa(tx_ring, 0);
2954         else
2955                 writel(0, tx_ring->tail);
2956
2957         /* Set the Tx Interrupt Delay register */
2958         ew32(TIDV, adapter->tx_int_delay);
2959         /* Tx irq moderation */
2960         ew32(TADV, adapter->tx_abs_int_delay);
2961
2962         if (adapter->flags2 & FLAG2_DMA_BURST) {
2963                 u32 txdctl = er32(TXDCTL(0));
2964
2965                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2966                             E1000_TXDCTL_WTHRESH);
2967                 /* set up some performance related parameters to encourage the
2968                  * hardware to use the bus more efficiently in bursts, depends
2969                  * on the tx_int_delay to be enabled,
2970                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2971                  * hthresh = 1 ==> prefetch when one or more available
2972                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2973                  * BEWARE: this seems to work but should be considered first if
2974                  * there are Tx hangs or other Tx related bugs
2975                  */
2976                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2977                 ew32(TXDCTL(0), txdctl);
2978         }
2979         /* erratum work around: set txdctl the same for both queues */
2980         ew32(TXDCTL(1), er32(TXDCTL(0)));
2981
2982         /* Program the Transmit Control Register */
2983         tctl = er32(TCTL);
2984         tctl &= ~E1000_TCTL_CT;
2985         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2986                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2987
2988         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2989                 tarc = er32(TARC(0));
2990                 /* set the speed mode bit, we'll clear it if we're not at
2991                  * gigabit link later
2992                  */
2993 #define SPEED_MODE_BIT (1 << 21)
2994                 tarc |= SPEED_MODE_BIT;
2995                 ew32(TARC(0), tarc);
2996         }
2997
2998         /* errata: program both queues to unweighted RR */
2999         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
3000                 tarc = er32(TARC(0));
3001                 tarc |= 1;
3002                 ew32(TARC(0), tarc);
3003                 tarc = er32(TARC(1));
3004                 tarc |= 1;
3005                 ew32(TARC(1), tarc);
3006         }
3007
3008         /* Setup Transmit Descriptor Settings for eop descriptor */
3009         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3010
3011         /* only set IDE if we are delaying interrupts using the timers */
3012         if (adapter->tx_int_delay)
3013                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3014
3015         /* enable Report Status bit */
3016         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3017
3018         ew32(TCTL, tctl);
3019
3020         hw->mac.ops.config_collision_dist(hw);
3021
3022         /* SPT Si errata workaround to avoid data corruption */
3023         if (hw->mac.type == e1000_pch_spt) {
3024                 u32 reg_val;
3025
3026                 reg_val = er32(IOSFPC);
3027                 reg_val |= E1000_RCTL_RDMTS_HEX;
3028                 ew32(IOSFPC, reg_val);
3029
3030                 reg_val = er32(TARC(0));
3031                 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ;
3032                 ew32(TARC(0), reg_val);
3033         }
3034 }
3035
3036 /**
3037  * e1000_setup_rctl - configure the receive control registers
3038  * @adapter: Board private structure
3039  **/
3040 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3041                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3042 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3043 {
3044         struct e1000_hw *hw = &adapter->hw;
3045         u32 rctl, rfctl;
3046         u32 pages = 0;
3047
3048         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3049          * If jumbo frames not set, program related MAC/PHY registers
3050          * to h/w defaults
3051          */
3052         if (hw->mac.type >= e1000_pch2lan) {
3053                 s32 ret_val;
3054
3055                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3056                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3057                 else
3058                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3059
3060                 if (ret_val)
3061                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3062         }
3063
3064         /* Program MC offset vector base */
3065         rctl = er32(RCTL);
3066         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3067         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3068             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3069             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3070
3071         /* Do not Store bad packets */
3072         rctl &= ~E1000_RCTL_SBP;
3073
3074         /* Enable Long Packet receive */
3075         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3076                 rctl &= ~E1000_RCTL_LPE;
3077         else
3078                 rctl |= E1000_RCTL_LPE;
3079
3080         /* Some systems expect that the CRC is included in SMBUS traffic. The
3081          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3082          * host memory when this is enabled
3083          */
3084         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3085                 rctl |= E1000_RCTL_SECRC;
3086
3087         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3088         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3089                 u16 phy_data;
3090
3091                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3092                 phy_data &= 0xfff8;
3093                 phy_data |= (1 << 2);
3094                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3095
3096                 e1e_rphy(hw, 22, &phy_data);
3097                 phy_data &= 0x0fff;
3098                 phy_data |= (1 << 14);
3099                 e1e_wphy(hw, 0x10, 0x2823);
3100                 e1e_wphy(hw, 0x11, 0x0003);
3101                 e1e_wphy(hw, 22, phy_data);
3102         }
3103
3104         /* Setup buffer sizes */
3105         rctl &= ~E1000_RCTL_SZ_4096;
3106         rctl |= E1000_RCTL_BSEX;
3107         switch (adapter->rx_buffer_len) {
3108         case 2048:
3109         default:
3110                 rctl |= E1000_RCTL_SZ_2048;
3111                 rctl &= ~E1000_RCTL_BSEX;
3112                 break;
3113         case 4096:
3114                 rctl |= E1000_RCTL_SZ_4096;
3115                 break;
3116         case 8192:
3117                 rctl |= E1000_RCTL_SZ_8192;
3118                 break;
3119         case 16384:
3120                 rctl |= E1000_RCTL_SZ_16384;
3121                 break;
3122         }
3123
3124         /* Enable Extended Status in all Receive Descriptors */
3125         rfctl = er32(RFCTL);
3126         rfctl |= E1000_RFCTL_EXTEN;
3127         ew32(RFCTL, rfctl);
3128
3129         /* 82571 and greater support packet-split where the protocol
3130          * header is placed in skb->data and the packet data is
3131          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3132          * In the case of a non-split, skb->data is linearly filled,
3133          * followed by the page buffers.  Therefore, skb->data is
3134          * sized to hold the largest protocol header.
3135          *
3136          * allocations using alloc_page take too long for regular MTU
3137          * so only enable packet split for jumbo frames
3138          *
3139          * Using pages when the page size is greater than 16k wastes
3140          * a lot of memory, since we allocate 3 pages at all times
3141          * per packet.
3142          */
3143         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3144         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3145                 adapter->rx_ps_pages = pages;
3146         else
3147                 adapter->rx_ps_pages = 0;
3148
3149         if (adapter->rx_ps_pages) {
3150                 u32 psrctl = 0;
3151
3152                 /* Enable Packet split descriptors */
3153                 rctl |= E1000_RCTL_DTYP_PS;
3154
3155                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3156
3157                 switch (adapter->rx_ps_pages) {
3158                 case 3:
3159                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3160                         /* fall-through */
3161                 case 2:
3162                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3163                         /* fall-through */
3164                 case 1:
3165                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3166                         break;
3167                 }
3168
3169                 ew32(PSRCTL, psrctl);
3170         }
3171
3172         /* This is useful for sniffing bad packets. */
3173         if (adapter->netdev->features & NETIF_F_RXALL) {
3174                 /* UPE and MPE will be handled by normal PROMISC logic
3175                  * in e1000e_set_rx_mode
3176                  */
3177                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3178                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3179                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3180
3181                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3182                           E1000_RCTL_DPF |      /* Allow filtered pause */
3183                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3184                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3185                  * and that breaks VLANs.
3186                  */
3187         }
3188
3189         ew32(RCTL, rctl);
3190         /* just started the receive unit, no need to restart */
3191         adapter->flags &= ~FLAG_RESTART_NOW;
3192 }
3193
3194 /**
3195  * e1000_configure_rx - Configure Receive Unit after Reset
3196  * @adapter: board private structure
3197  *
3198  * Configure the Rx unit of the MAC after a reset.
3199  **/
3200 static void e1000_configure_rx(struct e1000_adapter *adapter)
3201 {
3202         struct e1000_hw *hw = &adapter->hw;
3203         struct e1000_ring *rx_ring = adapter->rx_ring;
3204         u64 rdba;
3205         u32 rdlen, rctl, rxcsum, ctrl_ext;
3206
3207         if (adapter->rx_ps_pages) {
3208                 /* this is a 32 byte descriptor */
3209                 rdlen = rx_ring->count *
3210                     sizeof(union e1000_rx_desc_packet_split);
3211                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3212                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3213         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3214                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3215                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3216                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3217         } else {
3218                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3219                 adapter->clean_rx = e1000_clean_rx_irq;
3220                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3221         }
3222
3223         /* disable receives while setting up the descriptors */
3224         rctl = er32(RCTL);
3225         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3226                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3227         e1e_flush();
3228         usleep_range(10000, 20000);
3229
3230         if (adapter->flags2 & FLAG2_DMA_BURST) {
3231                 /* set the writeback threshold (only takes effect if the RDTR
3232                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3233                  * enable prefetching of 0x20 Rx descriptors
3234                  * granularity = 01
3235                  * wthresh = 04,
3236                  * hthresh = 04,
3237                  * pthresh = 0x20
3238                  */
3239                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3240                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3241
3242                 /* override the delay timers for enabling bursting, only if
3243                  * the value was not set by the user via module options
3244                  */
3245                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3246                         adapter->rx_int_delay = BURST_RDTR;
3247                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3248                         adapter->rx_abs_int_delay = BURST_RADV;
3249         }
3250
3251         /* set the Receive Delay Timer Register */
3252         ew32(RDTR, adapter->rx_int_delay);
3253
3254         /* irq moderation */
3255         ew32(RADV, adapter->rx_abs_int_delay);
3256         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3257                 e1000e_write_itr(adapter, adapter->itr);
3258
3259         ctrl_ext = er32(CTRL_EXT);
3260         /* Auto-Mask interrupts upon ICR access */
3261         ctrl_ext |= E1000_CTRL_EXT_IAME;
3262         ew32(IAM, 0xffffffff);
3263         ew32(CTRL_EXT, ctrl_ext);
3264         e1e_flush();
3265
3266         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3267          * the Base and Length of the Rx Descriptor Ring
3268          */
3269         rdba = rx_ring->dma;
3270         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3271         ew32(RDBAH(0), (rdba >> 32));
3272         ew32(RDLEN(0), rdlen);
3273         ew32(RDH(0), 0);
3274         ew32(RDT(0), 0);
3275         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3276         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3277
3278         writel(0, rx_ring->head);
3279         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3280                 e1000e_update_rdt_wa(rx_ring, 0);
3281         else
3282                 writel(0, rx_ring->tail);
3283
3284         /* Enable Receive Checksum Offload for TCP and UDP */
3285         rxcsum = er32(RXCSUM);
3286         if (adapter->netdev->features & NETIF_F_RXCSUM)
3287                 rxcsum |= E1000_RXCSUM_TUOFL;
3288         else
3289                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3290         ew32(RXCSUM, rxcsum);
3291
3292         /* With jumbo frames, excessive C-state transition latencies result
3293          * in dropped transactions.
3294          */
3295         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3296                 u32 lat =
3297                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3298                      adapter->max_frame_size) * 8 / 1000;
3299
3300                 if (adapter->flags & FLAG_IS_ICH) {
3301                         u32 rxdctl = er32(RXDCTL(0));
3302
3303                         ew32(RXDCTL(0), rxdctl | 0x3);
3304                 }
3305
3306                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3307         } else {
3308                 pm_qos_update_request(&adapter->pm_qos_req,
3309                                       PM_QOS_DEFAULT_VALUE);
3310         }
3311
3312         /* Enable Receives */
3313         ew32(RCTL, rctl);
3314 }
3315
3316 /**
3317  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3318  * @netdev: network interface device structure
3319  *
3320  * Writes multicast address list to the MTA hash table.
3321  * Returns: -ENOMEM on failure
3322  *                0 on no addresses written
3323  *                X on writing X addresses to MTA
3324  */
3325 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3326 {
3327         struct e1000_adapter *adapter = netdev_priv(netdev);
3328         struct e1000_hw *hw = &adapter->hw;
3329         struct netdev_hw_addr *ha;
3330         u8 *mta_list;
3331         int i;
3332
3333         if (netdev_mc_empty(netdev)) {
3334                 /* nothing to program, so clear mc list */
3335                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3336                 return 0;
3337         }
3338
3339         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3340         if (!mta_list)
3341                 return -ENOMEM;
3342
3343         /* update_mc_addr_list expects a packed array of only addresses. */
3344         i = 0;
3345         netdev_for_each_mc_addr(ha, netdev)
3346             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3347
3348         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3349         kfree(mta_list);
3350
3351         return netdev_mc_count(netdev);
3352 }
3353
3354 /**
3355  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3356  * @netdev: network interface device structure
3357  *
3358  * Writes unicast address list to the RAR table.
3359  * Returns: -ENOMEM on failure/insufficient address space
3360  *                0 on no addresses written
3361  *                X on writing X addresses to the RAR table
3362  **/
3363 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3364 {
3365         struct e1000_adapter *adapter = netdev_priv(netdev);
3366         struct e1000_hw *hw = &adapter->hw;
3367         unsigned int rar_entries;
3368         int count = 0;
3369
3370         rar_entries = hw->mac.ops.rar_get_count(hw);
3371
3372         /* save a rar entry for our hardware address */
3373         rar_entries--;
3374
3375         /* save a rar entry for the LAA workaround */
3376         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3377                 rar_entries--;
3378
3379         /* return ENOMEM indicating insufficient memory for addresses */
3380         if (netdev_uc_count(netdev) > rar_entries)
3381                 return -ENOMEM;
3382
3383         if (!netdev_uc_empty(netdev) && rar_entries) {
3384                 struct netdev_hw_addr *ha;
3385
3386                 /* write the addresses in reverse order to avoid write
3387                  * combining
3388                  */
3389                 netdev_for_each_uc_addr(ha, netdev) {
3390                         int rval;
3391
3392                         if (!rar_entries)
3393                                 break;
3394                         rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3395                         if (rval < 0)
3396                                 return -ENOMEM;
3397                         count++;
3398                 }
3399         }
3400
3401         /* zero out the remaining RAR entries not used above */
3402         for (; rar_entries > 0; rar_entries--) {
3403                 ew32(RAH(rar_entries), 0);
3404                 ew32(RAL(rar_entries), 0);
3405         }
3406         e1e_flush();
3407
3408         return count;
3409 }
3410
3411 /**
3412  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3413  * @netdev: network interface device structure
3414  *
3415  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3416  * address list or the network interface flags are updated.  This routine is
3417  * responsible for configuring the hardware for proper unicast, multicast,
3418  * promiscuous mode, and all-multi behavior.
3419  **/
3420 static void e1000e_set_rx_mode(struct net_device *netdev)
3421 {
3422         struct e1000_adapter *adapter = netdev_priv(netdev);
3423         struct e1000_hw *hw = &adapter->hw;
3424         u32 rctl;
3425
3426         if (pm_runtime_suspended(netdev->dev.parent))
3427                 return;
3428
3429         /* Check for Promiscuous and All Multicast modes */
3430         rctl = er32(RCTL);
3431
3432         /* clear the affected bits */
3433         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3434
3435         if (netdev->flags & IFF_PROMISC) {
3436                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3437                 /* Do not hardware filter VLANs in promisc mode */
3438                 e1000e_vlan_filter_disable(adapter);
3439         } else {
3440                 int count;
3441
3442                 if (netdev->flags & IFF_ALLMULTI) {
3443                         rctl |= E1000_RCTL_MPE;
3444                 } else {
3445                         /* Write addresses to the MTA, if the attempt fails
3446                          * then we should just turn on promiscuous mode so
3447                          * that we can at least receive multicast traffic
3448                          */
3449                         count = e1000e_write_mc_addr_list(netdev);
3450                         if (count < 0)
3451                                 rctl |= E1000_RCTL_MPE;
3452                 }
3453                 e1000e_vlan_filter_enable(adapter);
3454                 /* Write addresses to available RAR registers, if there is not
3455                  * sufficient space to store all the addresses then enable
3456                  * unicast promiscuous mode
3457                  */
3458                 count = e1000e_write_uc_addr_list(netdev);
3459                 if (count < 0)
3460                         rctl |= E1000_RCTL_UPE;
3461         }
3462
3463         ew32(RCTL, rctl);
3464
3465         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3466                 e1000e_vlan_strip_enable(adapter);
3467         else
3468                 e1000e_vlan_strip_disable(adapter);
3469 }
3470
3471 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3472 {
3473         struct e1000_hw *hw = &adapter->hw;
3474         u32 mrqc, rxcsum;
3475         u32 rss_key[10];
3476         int i;
3477
3478         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3479         for (i = 0; i < 10; i++)
3480                 ew32(RSSRK(i), rss_key[i]);
3481
3482         /* Direct all traffic to queue 0 */
3483         for (i = 0; i < 32; i++)
3484                 ew32(RETA(i), 0);
3485
3486         /* Disable raw packet checksumming so that RSS hash is placed in
3487          * descriptor on writeback.
3488          */
3489         rxcsum = er32(RXCSUM);
3490         rxcsum |= E1000_RXCSUM_PCSD;
3491
3492         ew32(RXCSUM, rxcsum);
3493
3494         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3495                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3496                 E1000_MRQC_RSS_FIELD_IPV6 |
3497                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3498                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3499
3500         ew32(MRQC, mrqc);
3501 }
3502
3503 /**
3504  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3505  * @adapter: board private structure
3506  * @timinca: pointer to returned time increment attributes
3507  *
3508  * Get attributes for incrementing the System Time Register SYSTIML/H at
3509  * the default base frequency, and set the cyclecounter shift value.
3510  **/
3511 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3512 {
3513         struct e1000_hw *hw = &adapter->hw;
3514         u32 incvalue, incperiod, shift;
3515
3516         /* Make sure clock is enabled on I217/I218/I219  before checking
3517          * the frequency
3518          */
3519         if (((hw->mac.type == e1000_pch_lpt) ||
3520              (hw->mac.type == e1000_pch_spt)) &&
3521             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3522             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3523                 u32 fextnvm7 = er32(FEXTNVM7);
3524
3525                 if (!(fextnvm7 & (1 << 0))) {
3526                         ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3527                         e1e_flush();
3528                 }
3529         }
3530
3531         switch (hw->mac.type) {
3532         case e1000_pch2lan:
3533                 /* Stable 96MHz frequency */
3534                 incperiod = INCPERIOD_96MHz;
3535                 incvalue = INCVALUE_96MHz;
3536                 shift = INCVALUE_SHIFT_96MHz;
3537                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3538                 break;
3539         case e1000_pch_lpt:
3540                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3541                         /* Stable 96MHz frequency */
3542                         incperiod = INCPERIOD_96MHz;
3543                         incvalue = INCVALUE_96MHz;
3544                         shift = INCVALUE_SHIFT_96MHz;
3545                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3546                 } else {
3547                         /* Stable 25MHz frequency */
3548                         incperiod = INCPERIOD_25MHz;
3549                         incvalue = INCVALUE_25MHz;
3550                         shift = INCVALUE_SHIFT_25MHz;
3551                         adapter->cc.shift = shift;
3552                 }
3553                 break;
3554         case e1000_pch_spt:
3555                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3556                         /* Stable 24MHz frequency */
3557                         incperiod = INCPERIOD_24MHz;
3558                         incvalue = INCVALUE_24MHz;
3559                         shift = INCVALUE_SHIFT_24MHz;
3560                         adapter->cc.shift = shift;
3561                         break;
3562                 }
3563                 return -EINVAL;
3564         case e1000_82574:
3565         case e1000_82583:
3566                 /* Stable 25MHz frequency */
3567                 incperiod = INCPERIOD_25MHz;
3568                 incvalue = INCVALUE_25MHz;
3569                 shift = INCVALUE_SHIFT_25MHz;
3570                 adapter->cc.shift = shift;
3571                 break;
3572         default:
3573                 return -EINVAL;
3574         }
3575
3576         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3577                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3578
3579         return 0;
3580 }
3581
3582 /**
3583  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3584  * @adapter: board private structure
3585  *
3586  * Outgoing time stamping can be enabled and disabled. Play nice and
3587  * disable it when requested, although it shouldn't cause any overhead
3588  * when no packet needs it. At most one packet in the queue may be
3589  * marked for time stamping, otherwise it would be impossible to tell
3590  * for sure to which packet the hardware time stamp belongs.
3591  *
3592  * Incoming time stamping has to be configured via the hardware filters.
3593  * Not all combinations are supported, in particular event type has to be
3594  * specified. Matching the kind of event packet is not supported, with the
3595  * exception of "all V2 events regardless of level 2 or 4".
3596  **/
3597 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3598                                   struct hwtstamp_config *config)
3599 {
3600         struct e1000_hw *hw = &adapter->hw;
3601         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3602         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3603         u32 rxmtrl = 0;
3604         u16 rxudp = 0;
3605         bool is_l4 = false;
3606         bool is_l2 = false;
3607         u32 regval;
3608         s32 ret_val;
3609
3610         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3611                 return -EINVAL;
3612
3613         /* flags reserved for future extensions - must be zero */
3614         if (config->flags)
3615                 return -EINVAL;
3616
3617         switch (config->tx_type) {
3618         case HWTSTAMP_TX_OFF:
3619                 tsync_tx_ctl = 0;
3620                 break;
3621         case HWTSTAMP_TX_ON:
3622                 break;
3623         default:
3624                 return -ERANGE;
3625         }
3626
3627         switch (config->rx_filter) {
3628         case HWTSTAMP_FILTER_NONE:
3629                 tsync_rx_ctl = 0;
3630                 break;
3631         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3632                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3633                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3634                 is_l4 = true;
3635                 break;
3636         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3637                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3638                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3639                 is_l4 = true;
3640                 break;
3641         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3642                 /* Also time stamps V2 L2 Path Delay Request/Response */
3643                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3644                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3645                 is_l2 = true;
3646                 break;
3647         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3648                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3651                 is_l2 = true;
3652                 break;
3653         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3654                 /* Hardware cannot filter just V2 L4 Sync messages;
3655                  * fall-through to V2 (both L2 and L4) Sync.
3656                  */
3657         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3658                 /* Also time stamps V2 Path Delay Request/Response. */
3659                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3660                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3661                 is_l2 = true;
3662                 is_l4 = true;
3663                 break;
3664         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3665                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3666                  * fall-through to V2 (both L2 and L4) Delay Request.
3667                  */
3668         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3669                 /* Also time stamps V2 Path Delay Request/Response. */
3670                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3671                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3672                 is_l2 = true;
3673                 is_l4 = true;
3674                 break;
3675         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3676         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3677                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3678                  * fall-through to all V2 (both L2 and L4) Events.
3679                  */
3680         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3681                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3682                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3683                 is_l2 = true;
3684                 is_l4 = true;
3685                 break;
3686         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3687                 /* For V1, the hardware can only filter Sync messages or
3688                  * Delay Request messages but not both so fall-through to
3689                  * time stamp all packets.
3690                  */
3691         case HWTSTAMP_FILTER_ALL:
3692                 is_l2 = true;
3693                 is_l4 = true;
3694                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3695                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3696                 break;
3697         default:
3698                 return -ERANGE;
3699         }
3700
3701         adapter->hwtstamp_config = *config;
3702
3703         /* enable/disable Tx h/w time stamping */
3704         regval = er32(TSYNCTXCTL);
3705         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3706         regval |= tsync_tx_ctl;
3707         ew32(TSYNCTXCTL, regval);
3708         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3709             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3710                 e_err("Timesync Tx Control register not set as expected\n");
3711                 return -EAGAIN;
3712         }
3713
3714         /* enable/disable Rx h/w time stamping */
3715         regval = er32(TSYNCRXCTL);
3716         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3717         regval |= tsync_rx_ctl;
3718         ew32(TSYNCRXCTL, regval);
3719         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3720                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3721             (regval & (E1000_TSYNCRXCTL_ENABLED |
3722                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3723                 e_err("Timesync Rx Control register not set as expected\n");
3724                 return -EAGAIN;
3725         }
3726
3727         /* L2: define ethertype filter for time stamped packets */
3728         if (is_l2)
3729                 rxmtrl |= ETH_P_1588;
3730
3731         /* define which PTP packets get time stamped */
3732         ew32(RXMTRL, rxmtrl);
3733
3734         /* Filter by destination port */
3735         if (is_l4) {
3736                 rxudp = PTP_EV_PORT;
3737                 cpu_to_be16s(&rxudp);
3738         }
3739         ew32(RXUDP, rxudp);
3740
3741         e1e_flush();
3742
3743         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3744         er32(RXSTMPH);
3745         er32(TXSTMPH);
3746
3747         /* Get and set the System Time Register SYSTIM base frequency */
3748         ret_val = e1000e_get_base_timinca(adapter, &regval);
3749         if (ret_val)
3750                 return ret_val;
3751         ew32(TIMINCA, regval);
3752
3753         /* reset the ns time counter */
3754         timecounter_init(&adapter->tc, &adapter->cc,
3755                          ktime_to_ns(ktime_get_real()));
3756
3757         return 0;
3758 }
3759
3760 /**
3761  * e1000_configure - configure the hardware for Rx and Tx
3762  * @adapter: private board structure
3763  **/
3764 static void e1000_configure(struct e1000_adapter *adapter)
3765 {
3766         struct e1000_ring *rx_ring = adapter->rx_ring;
3767
3768         e1000e_set_rx_mode(adapter->netdev);
3769
3770         e1000_restore_vlan(adapter);
3771         e1000_init_manageability_pt(adapter);
3772
3773         e1000_configure_tx(adapter);
3774
3775         if (adapter->netdev->features & NETIF_F_RXHASH)
3776                 e1000e_setup_rss_hash(adapter);
3777         e1000_setup_rctl(adapter);
3778         e1000_configure_rx(adapter);
3779         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3780 }
3781
3782 /**
3783  * e1000e_power_up_phy - restore link in case the phy was powered down
3784  * @adapter: address of board private structure
3785  *
3786  * The phy may be powered down to save power and turn off link when the
3787  * driver is unloaded and wake on lan is not enabled (among others)
3788  * *** this routine MUST be followed by a call to e1000e_reset ***
3789  **/
3790 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3791 {
3792         if (adapter->hw.phy.ops.power_up)
3793                 adapter->hw.phy.ops.power_up(&adapter->hw);
3794
3795         adapter->hw.mac.ops.setup_link(&adapter->hw);
3796 }
3797
3798 /**
3799  * e1000_power_down_phy - Power down the PHY
3800  *
3801  * Power down the PHY so no link is implied when interface is down.
3802  * The PHY cannot be powered down if management or WoL is active.
3803  */
3804 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3805 {
3806         if (adapter->hw.phy.ops.power_down)
3807                 adapter->hw.phy.ops.power_down(&adapter->hw);
3808 }
3809
3810 /**
3811  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3812  *
3813  * We want to clear all pending descriptors from the TX ring.
3814  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3815  * the data of the next descriptor. We don't care about the data we are about
3816  * to reset the HW.
3817  */
3818 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3819 {
3820         struct e1000_hw *hw = &adapter->hw;
3821         struct e1000_ring *tx_ring = adapter->tx_ring;
3822         struct e1000_tx_desc *tx_desc = NULL;
3823         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3824         u16 size = 512;
3825
3826         tctl = er32(TCTL);
3827         ew32(TCTL, tctl | E1000_TCTL_EN);
3828         tdt = er32(TDT(0));
3829         BUG_ON(tdt != tx_ring->next_to_use);
3830         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3831         tx_desc->buffer_addr = tx_ring->dma;
3832
3833         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3834         tx_desc->upper.data = 0;
3835         /* flush descriptors to memory before notifying the HW */
3836         wmb();
3837         tx_ring->next_to_use++;
3838         if (tx_ring->next_to_use == tx_ring->count)
3839                 tx_ring->next_to_use = 0;
3840         ew32(TDT(0), tx_ring->next_to_use);
3841         mmiowb();
3842         usleep_range(200, 250);
3843 }
3844
3845 /**
3846  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3847  *
3848  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3849  */
3850 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3851 {
3852         u32 rctl, rxdctl;
3853         struct e1000_hw *hw = &adapter->hw;
3854
3855         rctl = er32(RCTL);
3856         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3857         e1e_flush();
3858         usleep_range(100, 150);
3859
3860         rxdctl = er32(RXDCTL(0));
3861         /* zero the lower 14 bits (prefetch and host thresholds) */
3862         rxdctl &= 0xffffc000;
3863
3864         /* update thresholds: prefetch threshold to 31, host threshold to 1
3865          * and make sure the granularity is "descriptors" and not "cache lines"
3866          */
3867         rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3868
3869         ew32(RXDCTL(0), rxdctl);
3870         /* momentarily enable the RX ring for the changes to take effect */
3871         ew32(RCTL, rctl | E1000_RCTL_EN);
3872         e1e_flush();
3873         usleep_range(100, 150);
3874         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3875 }
3876
3877 /**
3878  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3879  *
3880  * In i219, the descriptor rings must be emptied before resetting the HW
3881  * or before changing the device state to D3 during runtime (runtime PM).
3882  *
3883  * Failure to do this will cause the HW to enter a unit hang state which can
3884  * only be released by PCI reset on the device
3885  *
3886  */
3887
3888 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3889 {
3890         u16 hang_state;
3891         u32 fext_nvm11, tdlen;
3892         struct e1000_hw *hw = &adapter->hw;
3893
3894         /* First, disable MULR fix in FEXTNVM11 */
3895         fext_nvm11 = er32(FEXTNVM11);
3896         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3897         ew32(FEXTNVM11, fext_nvm11);
3898         /* do nothing if we're not in faulty state, or if the queue is empty */
3899         tdlen = er32(TDLEN(0));
3900         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3901                              &hang_state);
3902         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3903                 return;
3904         e1000_flush_tx_ring(adapter);
3905         /* recheck, maybe the fault is caused by the rx ring */
3906         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3907                              &hang_state);
3908         if (hang_state & FLUSH_DESC_REQUIRED)
3909                 e1000_flush_rx_ring(adapter);
3910 }
3911
3912 /**
3913  * e1000e_reset - bring the hardware into a known good state
3914  *
3915  * This function boots the hardware and enables some settings that
3916  * require a configuration cycle of the hardware - those cannot be
3917  * set/changed during runtime. After reset the device needs to be
3918  * properly configured for Rx, Tx etc.
3919  */
3920 void e1000e_reset(struct e1000_adapter *adapter)
3921 {
3922         struct e1000_mac_info *mac = &adapter->hw.mac;
3923         struct e1000_fc_info *fc = &adapter->hw.fc;
3924         struct e1000_hw *hw = &adapter->hw;
3925         u32 tx_space, min_tx_space, min_rx_space;
3926         u32 pba = adapter->pba;
3927         u16 hwm;
3928
3929         /* reset Packet Buffer Allocation to default */
3930         ew32(PBA, pba);
3931
3932         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3933                 /* To maintain wire speed transmits, the Tx FIFO should be
3934                  * large enough to accommodate two full transmit packets,
3935                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3936                  * the Rx FIFO should be large enough to accommodate at least
3937                  * one full receive packet and is similarly rounded up and
3938                  * expressed in KB.
3939                  */
3940                 pba = er32(PBA);
3941                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3942                 tx_space = pba >> 16;
3943                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3944                 pba &= 0xffff;
3945                 /* the Tx fifo also stores 16 bytes of information about the Tx
3946                  * but don't include ethernet FCS because hardware appends it
3947                  */
3948                 min_tx_space = (adapter->max_frame_size +
3949                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3950                 min_tx_space = ALIGN(min_tx_space, 1024);
3951                 min_tx_space >>= 10;
3952                 /* software strips receive CRC, so leave room for it */
3953                 min_rx_space = adapter->max_frame_size;
3954                 min_rx_space = ALIGN(min_rx_space, 1024);
3955                 min_rx_space >>= 10;
3956
3957                 /* If current Tx allocation is less than the min Tx FIFO size,
3958                  * and the min Tx FIFO size is less than the current Rx FIFO
3959                  * allocation, take space away from current Rx allocation
3960                  */
3961                 if ((tx_space < min_tx_space) &&
3962                     ((min_tx_space - tx_space) < pba)) {
3963                         pba -= min_tx_space - tx_space;
3964
3965                         /* if short on Rx space, Rx wins and must trump Tx
3966                          * adjustment
3967                          */
3968                         if (pba < min_rx_space)
3969                                 pba = min_rx_space;
3970                 }
3971
3972                 ew32(PBA, pba);
3973         }
3974
3975         /* flow control settings
3976          *
3977          * The high water mark must be low enough to fit one full frame
3978          * (or the size used for early receive) above it in the Rx FIFO.
3979          * Set it to the lower of:
3980          * - 90% of the Rx FIFO size, and
3981          * - the full Rx FIFO size minus one full frame
3982          */
3983         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3984                 fc->pause_time = 0xFFFF;
3985         else
3986                 fc->pause_time = E1000_FC_PAUSE_TIME;
3987         fc->send_xon = true;
3988         fc->current_mode = fc->requested_mode;
3989
3990         switch (hw->mac.type) {
3991         case e1000_ich9lan:
3992         case e1000_ich10lan:
3993                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3994                         pba = 14;
3995                         ew32(PBA, pba);
3996                         fc->high_water = 0x2800;
3997                         fc->low_water = fc->high_water - 8;
3998                         break;
3999                 }
4000                 /* fall-through */
4001         default:
4002                 hwm = min(((pba << 10) * 9 / 10),
4003                           ((pba << 10) - adapter->max_frame_size));
4004
4005                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4006                 fc->low_water = fc->high_water - 8;
4007                 break;
4008         case e1000_pchlan:
4009                 /* Workaround PCH LOM adapter hangs with certain network
4010                  * loads.  If hangs persist, try disabling Tx flow control.
4011                  */
4012                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4013                         fc->high_water = 0x3500;
4014                         fc->low_water = 0x1500;
4015                 } else {
4016                         fc->high_water = 0x5000;
4017                         fc->low_water = 0x3000;
4018                 }
4019                 fc->refresh_time = 0x1000;
4020                 break;
4021         case e1000_pch2lan:
4022         case e1000_pch_lpt:
4023         case e1000_pch_spt:
4024                 fc->refresh_time = 0x0400;
4025
4026                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4027                         fc->high_water = 0x05C20;
4028                         fc->low_water = 0x05048;
4029                         fc->pause_time = 0x0650;
4030                         break;
4031                 }
4032
4033                 pba = 14;
4034                 ew32(PBA, pba);
4035                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4036                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4037                 break;
4038         }
4039
4040         /* Alignment of Tx data is on an arbitrary byte boundary with the
4041          * maximum size per Tx descriptor limited only to the transmit
4042          * allocation of the packet buffer minus 96 bytes with an upper
4043          * limit of 24KB due to receive synchronization limitations.
4044          */
4045         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4046                                        24 << 10);
4047
4048         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4049          * fit in receive buffer.
4050          */
4051         if (adapter->itr_setting & 0x3) {
4052                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4053                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4054                                 dev_info(&adapter->pdev->dev,
4055                                          "Interrupt Throttle Rate off\n");
4056                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4057                                 e1000e_write_itr(adapter, 0);
4058                         }
4059                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4060                         dev_info(&adapter->pdev->dev,
4061                                  "Interrupt Throttle Rate on\n");
4062                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4063                         adapter->itr = 20000;
4064                         e1000e_write_itr(adapter, adapter->itr);
4065                 }
4066         }
4067
4068         if (hw->mac.type == e1000_pch_spt)
4069                 e1000_flush_desc_rings(adapter);
4070         /* Allow time for pending master requests to run */
4071         mac->ops.reset_hw(hw);
4072
4073         /* For parts with AMT enabled, let the firmware know
4074          * that the network interface is in control
4075          */
4076         if (adapter->flags & FLAG_HAS_AMT)
4077                 e1000e_get_hw_control(adapter);
4078
4079         ew32(WUC, 0);
4080
4081         if (mac->ops.init_hw(hw))
4082                 e_err("Hardware Error\n");
4083
4084         e1000_update_mng_vlan(adapter);
4085
4086         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4087         ew32(VET, ETH_P_8021Q);
4088
4089         e1000e_reset_adaptive(hw);
4090
4091         /* initialize systim and reset the ns time counter */
4092         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
4093
4094         /* Set EEE advertisement as appropriate */
4095         if (adapter->flags2 & FLAG2_HAS_EEE) {
4096                 s32 ret_val;
4097                 u16 adv_addr;
4098
4099                 switch (hw->phy.type) {
4100                 case e1000_phy_82579:
4101                         adv_addr = I82579_EEE_ADVERTISEMENT;
4102                         break;
4103                 case e1000_phy_i217:
4104                         adv_addr = I217_EEE_ADVERTISEMENT;
4105                         break;
4106                 default:
4107                         dev_err(&adapter->pdev->dev,
4108                                 "Invalid PHY type setting EEE advertisement\n");
4109                         return;
4110                 }
4111
4112                 ret_val = hw->phy.ops.acquire(hw);
4113                 if (ret_val) {
4114                         dev_err(&adapter->pdev->dev,
4115                                 "EEE advertisement - unable to acquire PHY\n");
4116                         return;
4117                 }
4118
4119                 e1000_write_emi_reg_locked(hw, adv_addr,
4120                                            hw->dev_spec.ich8lan.eee_disable ?
4121                                            0 : adapter->eee_advert);
4122
4123                 hw->phy.ops.release(hw);
4124         }
4125
4126         if (!netif_running(adapter->netdev) &&
4127             !test_bit(__E1000_TESTING, &adapter->state))
4128                 e1000_power_down_phy(adapter);
4129
4130         e1000_get_phy_info(hw);
4131
4132         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4133             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4134                 u16 phy_data = 0;
4135                 /* speed up time to link by disabling smart power down, ignore
4136                  * the return value of this function because there is nothing
4137                  * different we would do if it failed
4138                  */
4139                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4140                 phy_data &= ~IGP02E1000_PM_SPD;
4141                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4142         }
4143         if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
4144                 u32 reg;
4145
4146                 /* Fextnvm7 @ 0xe4[2] = 1 */
4147                 reg = er32(FEXTNVM7);
4148                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4149                 ew32(FEXTNVM7, reg);
4150                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4151                 reg = er32(FEXTNVM9);
4152                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4153                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4154                 ew32(FEXTNVM9, reg);
4155         }
4156
4157 }
4158
4159 int e1000e_up(struct e1000_adapter *adapter)
4160 {
4161         struct e1000_hw *hw = &adapter->hw;
4162
4163         /* hardware has been reset, we need to reload some things */
4164         e1000_configure(adapter);
4165
4166         clear_bit(__E1000_DOWN, &adapter->state);
4167
4168         if (adapter->msix_entries)
4169                 e1000_configure_msix(adapter);
4170         e1000_irq_enable(adapter);
4171
4172         /* Tx queue started by watchdog timer when link is up */
4173
4174         /* fire a link change interrupt to start the watchdog */
4175         if (adapter->msix_entries)
4176                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4177         else
4178                 ew32(ICS, E1000_ICS_LSC);
4179
4180         return 0;
4181 }
4182
4183 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4184 {
4185         struct e1000_hw *hw = &adapter->hw;
4186
4187         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4188                 return;
4189
4190         /* flush pending descriptor writebacks to memory */
4191         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4192         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4193
4194         /* execute the writes immediately */
4195         e1e_flush();
4196
4197         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4198          * write is successful
4199          */
4200         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4201         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4202
4203         /* execute the writes immediately */
4204         e1e_flush();
4205 }
4206
4207 static void e1000e_update_stats(struct e1000_adapter *adapter);
4208
4209 /**
4210  * e1000e_down - quiesce the device and optionally reset the hardware
4211  * @adapter: board private structure
4212  * @reset: boolean flag to reset the hardware or not
4213  */
4214 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4215 {
4216         struct net_device *netdev = adapter->netdev;
4217         struct e1000_hw *hw = &adapter->hw;
4218         u32 tctl, rctl;
4219
4220         /* signal that we're down so the interrupt handler does not
4221          * reschedule our watchdog timer
4222          */
4223         set_bit(__E1000_DOWN, &adapter->state);
4224
4225         netif_carrier_off(netdev);
4226
4227         /* disable receives in the hardware */
4228         rctl = er32(RCTL);
4229         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4230                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4231         /* flush and sleep below */
4232
4233         netif_stop_queue(netdev);
4234
4235         /* disable transmits in the hardware */
4236         tctl = er32(TCTL);
4237         tctl &= ~E1000_TCTL_EN;
4238         ew32(TCTL, tctl);
4239
4240         /* flush both disables and wait for them to finish */
4241         e1e_flush();
4242         usleep_range(10000, 20000);
4243
4244         e1000_irq_disable(adapter);
4245
4246         napi_synchronize(&adapter->napi);
4247
4248         del_timer_sync(&adapter->watchdog_timer);
4249         del_timer_sync(&adapter->phy_info_timer);
4250
4251         spin_lock(&adapter->stats64_lock);
4252         e1000e_update_stats(adapter);
4253         spin_unlock(&adapter->stats64_lock);
4254
4255         e1000e_flush_descriptors(adapter);
4256
4257         adapter->link_speed = 0;
4258         adapter->link_duplex = 0;
4259
4260         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4261         if ((hw->mac.type >= e1000_pch2lan) &&
4262             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4263             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4264                 e_dbg("failed to disable jumbo frame workaround mode\n");
4265
4266         if (!pci_channel_offline(adapter->pdev)) {
4267                 if (reset)
4268                         e1000e_reset(adapter);
4269                 else if (hw->mac.type == e1000_pch_spt)
4270                         e1000_flush_desc_rings(adapter);
4271         }
4272         e1000_clean_tx_ring(adapter->tx_ring);
4273         e1000_clean_rx_ring(adapter->rx_ring);
4274 }
4275
4276 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4277 {
4278         might_sleep();
4279         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4280                 usleep_range(1000, 2000);
4281         e1000e_down(adapter, true);
4282         e1000e_up(adapter);
4283         clear_bit(__E1000_RESETTING, &adapter->state);
4284 }
4285
4286 /**
4287  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4288  * @cc: cyclecounter structure
4289  **/
4290 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4291 {
4292         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4293                                                      cc);
4294         struct e1000_hw *hw = &adapter->hw;
4295         u32 systimel_1, systimel_2, systimeh;
4296         cycle_t systim, systim_next;
4297         /* SYSTIMH latching upon SYSTIML read does not work well.
4298          * This means that if SYSTIML overflows after we read it but before
4299          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4300          * will experience a huge non linear increment in the systime value
4301          * to fix that we test for overflow and if true, we re-read systime.
4302          */
4303         systimel_1 = er32(SYSTIML);
4304         systimeh = er32(SYSTIMH);
4305         systimel_2 = er32(SYSTIML);
4306         /* Check for overflow. If there was no overflow, use the values */
4307         if (systimel_1 < systimel_2) {
4308                 systim = (cycle_t)systimel_1;
4309                 systim |= (cycle_t)systimeh << 32;
4310         } else {
4311                 /* There was an overflow, read again SYSTIMH, and use
4312                  * systimel_2
4313                  */
4314                 systimeh = er32(SYSTIMH);
4315                 systim = (cycle_t)systimel_2;
4316                 systim |= (cycle_t)systimeh << 32;
4317         }
4318
4319         if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4320                 u64 incvalue, time_delta, rem, temp;
4321                 int i;
4322
4323                 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4324                  * check to see that the time is incrementing at a reasonable
4325                  * rate and is a multiple of incvalue
4326                  */
4327                 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4328                 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4329                         /* latch SYSTIMH on read of SYSTIML */
4330                         systim_next = (cycle_t)er32(SYSTIML);
4331                         systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4332
4333                         time_delta = systim_next - systim;
4334                         temp = time_delta;
4335                         rem = do_div(temp, incvalue);
4336
4337                         systim = systim_next;
4338
4339                         if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4340                             (rem == 0))
4341                                 break;
4342                 }
4343         }
4344         return systim;
4345 }
4346
4347 /**
4348  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4349  * @adapter: board private structure to initialize
4350  *
4351  * e1000_sw_init initializes the Adapter private data structure.
4352  * Fields are initialized based on PCI device information and
4353  * OS network device settings (MTU size).
4354  **/
4355 static int e1000_sw_init(struct e1000_adapter *adapter)
4356 {
4357         struct net_device *netdev = adapter->netdev;
4358
4359         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4360         adapter->rx_ps_bsize0 = 128;
4361         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4362         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4363         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4364         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4365
4366         spin_lock_init(&adapter->stats64_lock);
4367
4368         e1000e_set_interrupt_capability(adapter);
4369
4370         if (e1000_alloc_queues(adapter))
4371                 return -ENOMEM;
4372
4373         /* Setup hardware time stamping cyclecounter */
4374         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4375                 adapter->cc.read = e1000e_cyclecounter_read;
4376                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4377                 adapter->cc.mult = 1;
4378                 /* cc.shift set in e1000e_get_base_tininca() */
4379
4380                 spin_lock_init(&adapter->systim_lock);
4381                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4382         }
4383
4384         /* Explicitly disable IRQ since the NIC can be in any state. */
4385         e1000_irq_disable(adapter);
4386
4387         set_bit(__E1000_DOWN, &adapter->state);
4388         return 0;
4389 }
4390
4391 /**
4392  * e1000_intr_msi_test - Interrupt Handler
4393  * @irq: interrupt number
4394  * @data: pointer to a network interface device structure
4395  **/
4396 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4397 {
4398         struct net_device *netdev = data;
4399         struct e1000_adapter *adapter = netdev_priv(netdev);
4400         struct e1000_hw *hw = &adapter->hw;
4401         u32 icr = er32(ICR);
4402
4403         e_dbg("icr is %08X\n", icr);
4404         if (icr & E1000_ICR_RXSEQ) {
4405                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4406                 /* Force memory writes to complete before acknowledging the
4407                  * interrupt is handled.
4408                  */
4409                 wmb();
4410         }
4411
4412         return IRQ_HANDLED;
4413 }
4414
4415 /**
4416  * e1000_test_msi_interrupt - Returns 0 for successful test
4417  * @adapter: board private struct
4418  *
4419  * code flow taken from tg3.c
4420  **/
4421 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4422 {
4423         struct net_device *netdev = adapter->netdev;
4424         struct e1000_hw *hw = &adapter->hw;
4425         int err;
4426
4427         /* poll_enable hasn't been called yet, so don't need disable */
4428         /* clear any pending events */
4429         er32(ICR);
4430
4431         /* free the real vector and request a test handler */
4432         e1000_free_irq(adapter);
4433         e1000e_reset_interrupt_capability(adapter);
4434
4435         /* Assume that the test fails, if it succeeds then the test
4436          * MSI irq handler will unset this flag
4437          */
4438         adapter->flags |= FLAG_MSI_TEST_FAILED;
4439
4440         err = pci_enable_msi(adapter->pdev);
4441         if (err)
4442                 goto msi_test_failed;
4443
4444         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4445                           netdev->name, netdev);
4446         if (err) {
4447                 pci_disable_msi(adapter->pdev);
4448                 goto msi_test_failed;
4449         }
4450
4451         /* Force memory writes to complete before enabling and firing an
4452          * interrupt.
4453          */
4454         wmb();
4455
4456         e1000_irq_enable(adapter);
4457
4458         /* fire an unusual interrupt on the test handler */
4459         ew32(ICS, E1000_ICS_RXSEQ);
4460         e1e_flush();
4461         msleep(100);
4462
4463         e1000_irq_disable(adapter);
4464
4465         rmb();                  /* read flags after interrupt has been fired */
4466
4467         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4468                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4469                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4470         } else {
4471                 e_dbg("MSI interrupt test succeeded!\n");
4472         }
4473
4474         free_irq(adapter->pdev->irq, netdev);
4475         pci_disable_msi(adapter->pdev);
4476
4477 msi_test_failed:
4478         e1000e_set_interrupt_capability(adapter);
4479         return e1000_request_irq(adapter);
4480 }
4481
4482 /**
4483  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4484  * @adapter: board private struct
4485  *
4486  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4487  **/
4488 static int e1000_test_msi(struct e1000_adapter *adapter)
4489 {
4490         int err;
4491         u16 pci_cmd;
4492
4493         if (!(adapter->flags & FLAG_MSI_ENABLED))
4494                 return 0;
4495
4496         /* disable SERR in case the MSI write causes a master abort */
4497         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4498         if (pci_cmd & PCI_COMMAND_SERR)
4499                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4500                                       pci_cmd & ~PCI_COMMAND_SERR);
4501
4502         err = e1000_test_msi_interrupt(adapter);
4503
4504         /* re-enable SERR */
4505         if (pci_cmd & PCI_COMMAND_SERR) {
4506                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4507                 pci_cmd |= PCI_COMMAND_SERR;
4508                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4509         }
4510
4511         return err;
4512 }
4513
4514 /**
4515  * e1000_open - Called when a network interface is made active
4516  * @netdev: network interface device structure
4517  *
4518  * Returns 0 on success, negative value on failure
4519  *
4520  * The open entry point is called when a network interface is made
4521  * active by the system (IFF_UP).  At this point all resources needed
4522  * for transmit and receive operations are allocated, the interrupt
4523  * handler is registered with the OS, the watchdog timer is started,
4524  * and the stack is notified that the interface is ready.
4525  **/
4526 static int e1000_open(struct net_device *netdev)
4527 {
4528         struct e1000_adapter *adapter = netdev_priv(netdev);
4529         struct e1000_hw *hw = &adapter->hw;
4530         struct pci_dev *pdev = adapter->pdev;
4531         int err;
4532
4533         /* disallow open during test */
4534         if (test_bit(__E1000_TESTING, &adapter->state))
4535                 return -EBUSY;
4536
4537         pm_runtime_get_sync(&pdev->dev);
4538
4539         netif_carrier_off(netdev);
4540         netif_stop_queue(netdev);
4541
4542         /* allocate transmit descriptors */
4543         err = e1000e_setup_tx_resources(adapter->tx_ring);
4544         if (err)
4545                 goto err_setup_tx;
4546
4547         /* allocate receive descriptors */
4548         err = e1000e_setup_rx_resources(adapter->rx_ring);
4549         if (err)
4550                 goto err_setup_rx;
4551
4552         /* If AMT is enabled, let the firmware know that the network
4553          * interface is now open and reset the part to a known state.
4554          */
4555         if (adapter->flags & FLAG_HAS_AMT) {
4556                 e1000e_get_hw_control(adapter);
4557                 e1000e_reset(adapter);
4558         }
4559
4560         e1000e_power_up_phy(adapter);
4561
4562         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4563         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4564                 e1000_update_mng_vlan(adapter);
4565
4566         /* DMA latency requirement to workaround jumbo issue */
4567         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4568                            PM_QOS_DEFAULT_VALUE);
4569
4570         /* before we allocate an interrupt, we must be ready to handle it.
4571          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4572          * as soon as we call pci_request_irq, so we have to setup our
4573          * clean_rx handler before we do so.
4574          */
4575         e1000_configure(adapter);
4576
4577         err = e1000_request_irq(adapter);
4578         if (err)
4579                 goto err_req_irq;
4580
4581         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4582          * ignore e1000e MSI messages, which means we need to test our MSI
4583          * interrupt now
4584          */
4585         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4586                 err = e1000_test_msi(adapter);
4587                 if (err) {
4588                         e_err("Interrupt allocation failed\n");
4589                         goto err_req_irq;
4590                 }
4591         }
4592
4593         /* From here on the code is the same as e1000e_up() */
4594         clear_bit(__E1000_DOWN, &adapter->state);
4595
4596         napi_enable(&adapter->napi);
4597
4598         e1000_irq_enable(adapter);
4599
4600         adapter->tx_hang_recheck = false;
4601
4602         hw->mac.get_link_status = true;
4603         pm_runtime_put(&pdev->dev);
4604
4605         /* fire a link status change interrupt to start the watchdog */
4606         if (adapter->msix_entries)
4607                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4608         else
4609                 ew32(ICS, E1000_ICS_LSC);
4610
4611         return 0;
4612
4613 err_req_irq:
4614         pm_qos_remove_request(&adapter->pm_qos_req);
4615         e1000e_release_hw_control(adapter);
4616         e1000_power_down_phy(adapter);
4617         e1000e_free_rx_resources(adapter->rx_ring);
4618 err_setup_rx:
4619         e1000e_free_tx_resources(adapter->tx_ring);
4620 err_setup_tx:
4621         e1000e_reset(adapter);
4622         pm_runtime_put_sync(&pdev->dev);
4623
4624         return err;
4625 }
4626
4627 /**
4628  * e1000_close - Disables a network interface
4629  * @netdev: network interface device structure
4630  *
4631  * Returns 0, this is not allowed to fail
4632  *
4633  * The close entry point is called when an interface is de-activated
4634  * by the OS.  The hardware is still under the drivers control, but
4635  * needs to be disabled.  A global MAC reset is issued to stop the
4636  * hardware, and all transmit and receive resources are freed.
4637  **/
4638 static int e1000_close(struct net_device *netdev)
4639 {
4640         struct e1000_adapter *adapter = netdev_priv(netdev);
4641         struct pci_dev *pdev = adapter->pdev;
4642         int count = E1000_CHECK_RESET_COUNT;
4643
4644         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4645                 usleep_range(10000, 20000);
4646
4647         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4648
4649         pm_runtime_get_sync(&pdev->dev);
4650
4651         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4652                 e1000e_down(adapter, true);
4653                 e1000_free_irq(adapter);
4654
4655                 /* Link status message must follow this format */
4656                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4657         }
4658
4659         napi_disable(&adapter->napi);
4660
4661         e1000e_free_tx_resources(adapter->tx_ring);
4662         e1000e_free_rx_resources(adapter->rx_ring);
4663
4664         /* kill manageability vlan ID if supported, but not if a vlan with
4665          * the same ID is registered on the host OS (let 8021q kill it)
4666          */
4667         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4668                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4669                                        adapter->mng_vlan_id);
4670
4671         /* If AMT is enabled, let the firmware know that the network
4672          * interface is now closed
4673          */
4674         if ((adapter->flags & FLAG_HAS_AMT) &&
4675             !test_bit(__E1000_TESTING, &adapter->state))
4676                 e1000e_release_hw_control(adapter);
4677
4678         pm_qos_remove_request(&adapter->pm_qos_req);
4679
4680         pm_runtime_put_sync(&pdev->dev);
4681
4682         return 0;
4683 }
4684
4685 /**
4686  * e1000_set_mac - Change the Ethernet Address of the NIC
4687  * @netdev: network interface device structure
4688  * @p: pointer to an address structure
4689  *
4690  * Returns 0 on success, negative on failure
4691  **/
4692 static int e1000_set_mac(struct net_device *netdev, void *p)
4693 {
4694         struct e1000_adapter *adapter = netdev_priv(netdev);
4695         struct e1000_hw *hw = &adapter->hw;
4696         struct sockaddr *addr = p;
4697
4698         if (!is_valid_ether_addr(addr->sa_data))
4699                 return -EADDRNOTAVAIL;
4700
4701         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4702         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4703
4704         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4705
4706         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4707                 /* activate the work around */
4708                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4709
4710                 /* Hold a copy of the LAA in RAR[14] This is done so that
4711                  * between the time RAR[0] gets clobbered  and the time it
4712                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4713                  * of the RARs and no incoming packets directed to this port
4714                  * are dropped. Eventually the LAA will be in RAR[0] and
4715                  * RAR[14]
4716                  */
4717                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4718                                     adapter->hw.mac.rar_entry_count - 1);
4719         }
4720
4721         return 0;
4722 }
4723
4724 /**
4725  * e1000e_update_phy_task - work thread to update phy
4726  * @work: pointer to our work struct
4727  *
4728  * this worker thread exists because we must acquire a
4729  * semaphore to read the phy, which we could msleep while
4730  * waiting for it, and we can't msleep in a timer.
4731  **/
4732 static void e1000e_update_phy_task(struct work_struct *work)
4733 {
4734         struct e1000_adapter *adapter = container_of(work,
4735                                                      struct e1000_adapter,
4736                                                      update_phy_task);
4737         struct e1000_hw *hw = &adapter->hw;
4738
4739         if (test_bit(__E1000_DOWN, &adapter->state))
4740                 return;
4741
4742         e1000_get_phy_info(hw);
4743
4744         /* Enable EEE on 82579 after link up */
4745         if (hw->phy.type >= e1000_phy_82579)
4746                 e1000_set_eee_pchlan(hw);
4747 }
4748
4749 /**
4750  * e1000_update_phy_info - timre call-back to update PHY info
4751  * @data: pointer to adapter cast into an unsigned long
4752  *
4753  * Need to wait a few seconds after link up to get diagnostic information from
4754  * the phy
4755  **/
4756 static void e1000_update_phy_info(unsigned long data)
4757 {
4758         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4759
4760         if (test_bit(__E1000_DOWN, &adapter->state))
4761                 return;
4762
4763         schedule_work(&adapter->update_phy_task);
4764 }
4765
4766 /**
4767  * e1000e_update_phy_stats - Update the PHY statistics counters
4768  * @adapter: board private structure
4769  *
4770  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4771  **/
4772 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4773 {
4774         struct e1000_hw *hw = &adapter->hw;
4775         s32 ret_val;
4776         u16 phy_data;
4777
4778         ret_val = hw->phy.ops.acquire(hw);
4779         if (ret_val)
4780                 return;
4781
4782         /* A page set is expensive so check if already on desired page.
4783          * If not, set to the page with the PHY status registers.
4784          */
4785         hw->phy.addr = 1;
4786         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4787                                            &phy_data);
4788         if (ret_val)
4789                 goto release;
4790         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4791                 ret_val = hw->phy.ops.set_page(hw,
4792                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4793                 if (ret_val)
4794                         goto release;
4795         }
4796
4797         /* Single Collision Count */
4798         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4799         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4800         if (!ret_val)
4801                 adapter->stats.scc += phy_data;
4802
4803         /* Excessive Collision Count */
4804         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4805         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4806         if (!ret_val)
4807                 adapter->stats.ecol += phy_data;
4808
4809         /* Multiple Collision Count */
4810         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4811         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4812         if (!ret_val)
4813                 adapter->stats.mcc += phy_data;
4814
4815         /* Late Collision Count */
4816         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4817         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4818         if (!ret_val)
4819                 adapter->stats.latecol += phy_data;
4820
4821         /* Collision Count - also used for adaptive IFS */
4822         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4823         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4824         if (!ret_val)
4825                 hw->mac.collision_delta = phy_data;
4826
4827         /* Defer Count */
4828         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4829         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4830         if (!ret_val)
4831                 adapter->stats.dc += phy_data;
4832
4833         /* Transmit with no CRS */
4834         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4835         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4836         if (!ret_val)
4837                 adapter->stats.tncrs += phy_data;
4838
4839 release:
4840         hw->phy.ops.release(hw);
4841 }
4842
4843 /**
4844  * e1000e_update_stats - Update the board statistics counters
4845  * @adapter: board private structure
4846  **/
4847 static void e1000e_update_stats(struct e1000_adapter *adapter)
4848 {
4849         struct net_device *netdev = adapter->netdev;
4850         struct e1000_hw *hw = &adapter->hw;
4851         struct pci_dev *pdev = adapter->pdev;
4852
4853         /* Prevent stats update while adapter is being reset, or if the pci
4854          * connection is down.
4855          */
4856         if (adapter->link_speed == 0)
4857                 return;
4858         if (pci_channel_offline(pdev))
4859                 return;
4860
4861         adapter->stats.crcerrs += er32(CRCERRS);
4862         adapter->stats.gprc += er32(GPRC);
4863         adapter->stats.gorc += er32(GORCL);
4864         er32(GORCH);            /* Clear gorc */
4865         adapter->stats.bprc += er32(BPRC);
4866         adapter->stats.mprc += er32(MPRC);
4867         adapter->stats.roc += er32(ROC);
4868
4869         adapter->stats.mpc += er32(MPC);
4870
4871         /* Half-duplex statistics */
4872         if (adapter->link_duplex == HALF_DUPLEX) {
4873                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4874                         e1000e_update_phy_stats(adapter);
4875                 } else {
4876                         adapter->stats.scc += er32(SCC);
4877                         adapter->stats.ecol += er32(ECOL);
4878                         adapter->stats.mcc += er32(MCC);
4879                         adapter->stats.latecol += er32(LATECOL);
4880                         adapter->stats.dc += er32(DC);
4881
4882                         hw->mac.collision_delta = er32(COLC);
4883
4884                         if ((hw->mac.type != e1000_82574) &&
4885                             (hw->mac.type != e1000_82583))
4886                                 adapter->stats.tncrs += er32(TNCRS);
4887                 }
4888                 adapter->stats.colc += hw->mac.collision_delta;
4889         }
4890
4891         adapter->stats.xonrxc += er32(XONRXC);
4892         adapter->stats.xontxc += er32(XONTXC);
4893         adapter->stats.xoffrxc += er32(XOFFRXC);
4894         adapter->stats.xofftxc += er32(XOFFTXC);
4895         adapter->stats.gptc += er32(GPTC);
4896         adapter->stats.gotc += er32(GOTCL);
4897         er32(GOTCH);            /* Clear gotc */
4898         adapter->stats.rnbc += er32(RNBC);
4899         adapter->stats.ruc += er32(RUC);
4900
4901         adapter->stats.mptc += er32(MPTC);
4902         adapter->stats.bptc += er32(BPTC);
4903
4904         /* used for adaptive IFS */
4905
4906         hw->mac.tx_packet_delta = er32(TPT);
4907         adapter->stats.tpt += hw->mac.tx_packet_delta;
4908
4909         adapter->stats.algnerrc += er32(ALGNERRC);
4910         adapter->stats.rxerrc += er32(RXERRC);
4911         adapter->stats.cexterr += er32(CEXTERR);
4912         adapter->stats.tsctc += er32(TSCTC);
4913         adapter->stats.tsctfc += er32(TSCTFC);
4914
4915         /* Fill out the OS statistics structure */
4916         netdev->stats.multicast = adapter->stats.mprc;
4917         netdev->stats.collisions = adapter->stats.colc;
4918
4919         /* Rx Errors */
4920
4921         /* RLEC on some newer hardware can be incorrect so build
4922          * our own version based on RUC and ROC
4923          */
4924         netdev->stats.rx_errors = adapter->stats.rxerrc +
4925             adapter->stats.crcerrs + adapter->stats.algnerrc +
4926             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4927         netdev->stats.rx_length_errors = adapter->stats.ruc +
4928             adapter->stats.roc;
4929         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4930         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4931         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4932
4933         /* Tx Errors */
4934         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4935         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4936         netdev->stats.tx_window_errors = adapter->stats.latecol;
4937         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4938
4939         /* Tx Dropped needs to be maintained elsewhere */
4940
4941         /* Management Stats */
4942         adapter->stats.mgptc += er32(MGTPTC);
4943         adapter->stats.mgprc += er32(MGTPRC);
4944         adapter->stats.mgpdc += er32(MGTPDC);
4945
4946         /* Correctable ECC Errors */
4947         if ((hw->mac.type == e1000_pch_lpt) ||
4948             (hw->mac.type == e1000_pch_spt)) {
4949                 u32 pbeccsts = er32(PBECCSTS);
4950
4951                 adapter->corr_errors +=
4952                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4953                 adapter->uncorr_errors +=
4954                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4955                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4956         }
4957 }
4958
4959 /**
4960  * e1000_phy_read_status - Update the PHY register status snapshot
4961  * @adapter: board private structure
4962  **/
4963 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4964 {
4965         struct e1000_hw *hw = &adapter->hw;
4966         struct e1000_phy_regs *phy = &adapter->phy_regs;
4967
4968         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4969             (er32(STATUS) & E1000_STATUS_LU) &&
4970             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4971                 int ret_val;
4972
4973                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4974                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4975                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4976                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4977                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4978                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4979                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4980                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4981                 if (ret_val)
4982                         e_warn("Error reading PHY register\n");
4983         } else {
4984                 /* Do not read PHY registers if link is not up
4985                  * Set values to typical power-on defaults
4986                  */
4987                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4988                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4989                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4990                              BMSR_ERCAP);
4991                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4992                                   ADVERTISE_ALL | ADVERTISE_CSMA);
4993                 phy->lpa = 0;
4994                 phy->expansion = EXPANSION_ENABLENPAGE;
4995                 phy->ctrl1000 = ADVERTISE_1000FULL;
4996                 phy->stat1000 = 0;
4997                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4998         }
4999 }
5000
5001 static void e1000_print_link_info(struct e1000_adapter *adapter)
5002 {
5003         struct e1000_hw *hw = &adapter->hw;
5004         u32 ctrl = er32(CTRL);
5005
5006         /* Link status message must follow this format for user tools */
5007         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5008                 adapter->netdev->name, adapter->link_speed,
5009                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5010                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5011                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5012                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5013 }
5014
5015 static bool e1000e_has_link(struct e1000_adapter *adapter)
5016 {
5017         struct e1000_hw *hw = &adapter->hw;
5018         bool link_active = false;
5019         s32 ret_val = 0;
5020
5021         /* get_link_status is set on LSC (link status) interrupt or
5022          * Rx sequence error interrupt.  get_link_status will stay
5023          * false until the check_for_link establishes link
5024          * for copper adapters ONLY
5025          */
5026         switch (hw->phy.media_type) {
5027         case e1000_media_type_copper:
5028                 if (hw->mac.get_link_status) {
5029                         ret_val = hw->mac.ops.check_for_link(hw);
5030                         link_active = ret_val > 0;
5031                 } else {
5032                         link_active = true;
5033                 }
5034                 break;
5035         case e1000_media_type_fiber:
5036                 ret_val = hw->mac.ops.check_for_link(hw);
5037                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5038                 break;
5039         case e1000_media_type_internal_serdes:
5040                 ret_val = hw->mac.ops.check_for_link(hw);
5041                 link_active = adapter->hw.mac.serdes_has_link;
5042                 break;
5043         default:
5044         case e1000_media_type_unknown:
5045                 break;
5046         }
5047
5048         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5049             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5050                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5051                 e_info("Gigabit has been disabled, downgrading speed\n");
5052         }
5053
5054         return link_active;
5055 }
5056
5057 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5058 {
5059         /* make sure the receive unit is started */
5060         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5061             (adapter->flags & FLAG_RESTART_NOW)) {
5062                 struct e1000_hw *hw = &adapter->hw;
5063                 u32 rctl = er32(RCTL);
5064
5065                 ew32(RCTL, rctl | E1000_RCTL_EN);
5066                 adapter->flags &= ~FLAG_RESTART_NOW;
5067         }
5068 }
5069
5070 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5071 {
5072         struct e1000_hw *hw = &adapter->hw;
5073
5074         /* With 82574 controllers, PHY needs to be checked periodically
5075          * for hung state and reset, if two calls return true
5076          */
5077         if (e1000_check_phy_82574(hw))
5078                 adapter->phy_hang_count++;
5079         else
5080                 adapter->phy_hang_count = 0;
5081
5082         if (adapter->phy_hang_count > 1) {
5083                 adapter->phy_hang_count = 0;
5084                 e_dbg("PHY appears hung - resetting\n");
5085                 schedule_work(&adapter->reset_task);
5086         }
5087 }
5088
5089 /**
5090  * e1000_watchdog - Timer Call-back
5091  * @data: pointer to adapter cast into an unsigned long
5092  **/
5093 static void e1000_watchdog(unsigned long data)
5094 {
5095         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5096
5097         /* Do the rest outside of interrupt context */
5098         schedule_work(&adapter->watchdog_task);
5099
5100         /* TODO: make this use queue_delayed_work() */
5101 }
5102
5103 static void e1000_watchdog_task(struct work_struct *work)
5104 {
5105         struct e1000_adapter *adapter = container_of(work,
5106                                                      struct e1000_adapter,
5107                                                      watchdog_task);
5108         struct net_device *netdev = adapter->netdev;
5109         struct e1000_mac_info *mac = &adapter->hw.mac;
5110         struct e1000_phy_info *phy = &adapter->hw.phy;
5111         struct e1000_ring *tx_ring = adapter->tx_ring;
5112         struct e1000_hw *hw = &adapter->hw;
5113         u32 link, tctl;
5114
5115         if (test_bit(__E1000_DOWN, &adapter->state))
5116                 return;
5117
5118         link = e1000e_has_link(adapter);
5119         if ((netif_carrier_ok(netdev)) && link) {
5120                 /* Cancel scheduled suspend requests. */
5121                 pm_runtime_resume(netdev->dev.parent);
5122
5123                 e1000e_enable_receives(adapter);
5124                 goto link_up;
5125         }
5126
5127         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5128             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5129                 e1000_update_mng_vlan(adapter);
5130
5131         if (link) {
5132                 if (!netif_carrier_ok(netdev)) {
5133                         bool txb2b = true;
5134
5135                         /* Cancel scheduled suspend requests. */
5136                         pm_runtime_resume(netdev->dev.parent);
5137
5138                         /* update snapshot of PHY registers on LSC */
5139                         e1000_phy_read_status(adapter);
5140                         mac->ops.get_link_up_info(&adapter->hw,
5141                                                   &adapter->link_speed,
5142                                                   &adapter->link_duplex);
5143                         e1000_print_link_info(adapter);
5144
5145                         /* check if SmartSpeed worked */
5146                         e1000e_check_downshift(hw);
5147                         if (phy->speed_downgraded)
5148                                 netdev_warn(netdev,
5149                                             "Link Speed was downgraded by SmartSpeed\n");
5150
5151                         /* On supported PHYs, check for duplex mismatch only
5152                          * if link has autonegotiated at 10/100 half
5153                          */
5154                         if ((hw->phy.type == e1000_phy_igp_3 ||
5155                              hw->phy.type == e1000_phy_bm) &&
5156                             hw->mac.autoneg &&
5157                             (adapter->link_speed == SPEED_10 ||
5158                              adapter->link_speed == SPEED_100) &&
5159                             (adapter->link_duplex == HALF_DUPLEX)) {
5160                                 u16 autoneg_exp;
5161
5162                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5163
5164                                 if (!(autoneg_exp & EXPANSION_NWAY))
5165                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5166                         }
5167
5168                         /* adjust timeout factor according to speed/duplex */
5169                         adapter->tx_timeout_factor = 1;
5170                         switch (adapter->link_speed) {
5171                         case SPEED_10:
5172                                 txb2b = false;
5173                                 adapter->tx_timeout_factor = 16;
5174                                 break;
5175                         case SPEED_100:
5176                                 txb2b = false;
5177                                 adapter->tx_timeout_factor = 10;
5178                                 break;
5179                         }
5180
5181                         /* workaround: re-program speed mode bit after
5182                          * link-up event
5183                          */
5184                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5185                             !txb2b) {
5186                                 u32 tarc0;
5187
5188                                 tarc0 = er32(TARC(0));
5189                                 tarc0 &= ~SPEED_MODE_BIT;
5190                                 ew32(TARC(0), tarc0);
5191                         }
5192
5193                         /* disable TSO for pcie and 10/100 speeds, to avoid
5194                          * some hardware issues
5195                          */
5196                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5197                                 switch (adapter->link_speed) {
5198                                 case SPEED_10:
5199                                 case SPEED_100:
5200                                         e_info("10/100 speed: disabling TSO\n");
5201                                         netdev->features &= ~NETIF_F_TSO;
5202                                         netdev->features &= ~NETIF_F_TSO6;
5203                                         break;
5204                                 case SPEED_1000:
5205                                         netdev->features |= NETIF_F_TSO;
5206                                         netdev->features |= NETIF_F_TSO6;
5207                                         break;
5208                                 default:
5209                                         /* oops */
5210                                         break;
5211                                 }
5212                         }
5213
5214                         /* enable transmits in the hardware, need to do this
5215                          * after setting TARC(0)
5216                          */
5217                         tctl = er32(TCTL);
5218                         tctl |= E1000_TCTL_EN;
5219                         ew32(TCTL, tctl);
5220
5221                         /* Perform any post-link-up configuration before
5222                          * reporting link up.
5223                          */
5224                         if (phy->ops.cfg_on_link_up)
5225                                 phy->ops.cfg_on_link_up(hw);
5226
5227                         netif_wake_queue(netdev);
5228                         netif_carrier_on(netdev);
5229
5230                         if (!test_bit(__E1000_DOWN, &adapter->state))
5231                                 mod_timer(&adapter->phy_info_timer,
5232                                           round_jiffies(jiffies + 2 * HZ));
5233                 }
5234         } else {
5235                 if (netif_carrier_ok(netdev)) {
5236                         adapter->link_speed = 0;
5237                         adapter->link_duplex = 0;
5238                         /* Link status message must follow this format */
5239                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5240                         netif_carrier_off(netdev);
5241                         netif_stop_queue(netdev);
5242                         if (!test_bit(__E1000_DOWN, &adapter->state))
5243                                 mod_timer(&adapter->phy_info_timer,
5244                                           round_jiffies(jiffies + 2 * HZ));
5245
5246                         /* 8000ES2LAN requires a Rx packet buffer work-around
5247                          * on link down event; reset the controller to flush
5248                          * the Rx packet buffer.
5249                          */
5250                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5251                                 adapter->flags |= FLAG_RESTART_NOW;
5252                         else
5253                                 pm_schedule_suspend(netdev->dev.parent,
5254                                                     LINK_TIMEOUT);
5255                 }
5256         }
5257
5258 link_up:
5259         spin_lock(&adapter->stats64_lock);
5260         e1000e_update_stats(adapter);
5261
5262         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5263         adapter->tpt_old = adapter->stats.tpt;
5264         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5265         adapter->colc_old = adapter->stats.colc;
5266
5267         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5268         adapter->gorc_old = adapter->stats.gorc;
5269         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5270         adapter->gotc_old = adapter->stats.gotc;
5271         spin_unlock(&adapter->stats64_lock);
5272
5273         /* If the link is lost the controller stops DMA, but
5274          * if there is queued Tx work it cannot be done.  So
5275          * reset the controller to flush the Tx packet buffers.
5276          */
5277         if (!netif_carrier_ok(netdev) &&
5278             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5279                 adapter->flags |= FLAG_RESTART_NOW;
5280
5281         /* If reset is necessary, do it outside of interrupt context. */
5282         if (adapter->flags & FLAG_RESTART_NOW) {
5283                 schedule_work(&adapter->reset_task);
5284                 /* return immediately since reset is imminent */
5285                 return;
5286         }
5287
5288         e1000e_update_adaptive(&adapter->hw);
5289
5290         /* Simple mode for Interrupt Throttle Rate (ITR) */
5291         if (adapter->itr_setting == 4) {
5292                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5293                  * Total asymmetrical Tx or Rx gets ITR=8000;
5294                  * everyone else is between 2000-8000.
5295                  */
5296                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5297                 u32 dif = (adapter->gotc > adapter->gorc ?
5298                            adapter->gotc - adapter->gorc :
5299                            adapter->gorc - adapter->gotc) / 10000;
5300                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5301
5302                 e1000e_write_itr(adapter, itr);
5303         }
5304
5305         /* Cause software interrupt to ensure Rx ring is cleaned */
5306         if (adapter->msix_entries)
5307                 ew32(ICS, adapter->rx_ring->ims_val);
5308         else
5309                 ew32(ICS, E1000_ICS_RXDMT0);
5310
5311         /* flush pending descriptors to memory before detecting Tx hang */
5312         e1000e_flush_descriptors(adapter);
5313
5314         /* Force detection of hung controller every watchdog period */
5315         adapter->detect_tx_hung = true;
5316
5317         /* With 82571 controllers, LAA may be overwritten due to controller
5318          * reset from the other port. Set the appropriate LAA in RAR[0]
5319          */
5320         if (e1000e_get_laa_state_82571(hw))
5321                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5322
5323         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5324                 e1000e_check_82574_phy_workaround(adapter);
5325
5326         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5327         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5328                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5329                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5330                         er32(RXSTMPH);
5331                         adapter->rx_hwtstamp_cleared++;
5332                 } else {
5333                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5334                 }
5335         }
5336
5337         /* Reset the timer */
5338         if (!test_bit(__E1000_DOWN, &adapter->state))
5339                 mod_timer(&adapter->watchdog_timer,
5340                           round_jiffies(jiffies + 2 * HZ));
5341 }
5342
5343 #define E1000_TX_FLAGS_CSUM             0x00000001
5344 #define E1000_TX_FLAGS_VLAN             0x00000002
5345 #define E1000_TX_FLAGS_TSO              0x00000004
5346 #define E1000_TX_FLAGS_IPV4             0x00000008
5347 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5348 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5349 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5350 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5351
5352 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5353                      __be16 protocol)
5354 {
5355         struct e1000_context_desc *context_desc;
5356         struct e1000_buffer *buffer_info;
5357         unsigned int i;
5358         u32 cmd_length = 0;
5359         u16 ipcse = 0, mss;
5360         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5361         int err;
5362
5363         if (!skb_is_gso(skb))
5364                 return 0;
5365
5366         err = skb_cow_head(skb, 0);
5367         if (err < 0)
5368                 return err;
5369
5370         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5371         mss = skb_shinfo(skb)->gso_size;
5372         if (protocol == htons(ETH_P_IP)) {
5373                 struct iphdr *iph = ip_hdr(skb);
5374                 iph->tot_len = 0;
5375                 iph->check = 0;
5376                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5377                                                          0, IPPROTO_TCP, 0);
5378                 cmd_length = E1000_TXD_CMD_IP;
5379                 ipcse = skb_transport_offset(skb) - 1;
5380         } else if (skb_is_gso_v6(skb)) {
5381                 ipv6_hdr(skb)->payload_len = 0;
5382                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5383                                                        &ipv6_hdr(skb)->daddr,
5384                                                        0, IPPROTO_TCP, 0);
5385                 ipcse = 0;
5386         }
5387         ipcss = skb_network_offset(skb);
5388         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5389         tucss = skb_transport_offset(skb);
5390         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5391
5392         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5393                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5394
5395         i = tx_ring->next_to_use;
5396         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5397         buffer_info = &tx_ring->buffer_info[i];
5398
5399         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5400         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5401         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5402         context_desc->upper_setup.tcp_fields.tucss = tucss;
5403         context_desc->upper_setup.tcp_fields.tucso = tucso;
5404         context_desc->upper_setup.tcp_fields.tucse = 0;
5405         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5406         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5407         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5408
5409         buffer_info->time_stamp = jiffies;
5410         buffer_info->next_to_watch = i;
5411
5412         i++;
5413         if (i == tx_ring->count)
5414                 i = 0;
5415         tx_ring->next_to_use = i;
5416
5417         return 1;
5418 }
5419
5420 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5421                           __be16 protocol)
5422 {
5423         struct e1000_adapter *adapter = tx_ring->adapter;
5424         struct e1000_context_desc *context_desc;
5425         struct e1000_buffer *buffer_info;
5426         unsigned int i;
5427         u8 css;
5428         u32 cmd_len = E1000_TXD_CMD_DEXT;
5429
5430         if (skb->ip_summed != CHECKSUM_PARTIAL)
5431                 return false;
5432
5433         switch (protocol) {
5434         case cpu_to_be16(ETH_P_IP):
5435                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5436                         cmd_len |= E1000_TXD_CMD_TCP;
5437                 break;
5438         case cpu_to_be16(ETH_P_IPV6):
5439                 /* XXX not handling all IPV6 headers */
5440                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5441                         cmd_len |= E1000_TXD_CMD_TCP;
5442                 break;
5443         default:
5444                 if (unlikely(net_ratelimit()))
5445                         e_warn("checksum_partial proto=%x!\n",
5446                                be16_to_cpu(protocol));
5447                 break;
5448         }
5449
5450         css = skb_checksum_start_offset(skb);
5451
5452         i = tx_ring->next_to_use;
5453         buffer_info = &tx_ring->buffer_info[i];
5454         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5455
5456         context_desc->lower_setup.ip_config = 0;
5457         context_desc->upper_setup.tcp_fields.tucss = css;
5458         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5459         context_desc->upper_setup.tcp_fields.tucse = 0;
5460         context_desc->tcp_seg_setup.data = 0;
5461         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5462
5463         buffer_info->time_stamp = jiffies;
5464         buffer_info->next_to_watch = i;
5465
5466         i++;
5467         if (i == tx_ring->count)
5468                 i = 0;
5469         tx_ring->next_to_use = i;
5470
5471         return true;
5472 }
5473
5474 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5475                         unsigned int first, unsigned int max_per_txd,
5476                         unsigned int nr_frags)
5477 {
5478         struct e1000_adapter *adapter = tx_ring->adapter;
5479         struct pci_dev *pdev = adapter->pdev;
5480         struct e1000_buffer *buffer_info;
5481         unsigned int len = skb_headlen(skb);
5482         unsigned int offset = 0, size, count = 0, i;
5483         unsigned int f, bytecount, segs;
5484
5485         i = tx_ring->next_to_use;
5486
5487         while (len) {
5488                 buffer_info = &tx_ring->buffer_info[i];
5489                 size = min(len, max_per_txd);
5490
5491                 buffer_info->length = size;
5492                 buffer_info->time_stamp = jiffies;
5493                 buffer_info->next_to_watch = i;
5494                 buffer_info->dma = dma_map_single(&pdev->dev,
5495                                                   skb->data + offset,
5496                                                   size, DMA_TO_DEVICE);
5497                 buffer_info->mapped_as_page = false;
5498                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5499                         goto dma_error;
5500
5501                 len -= size;
5502                 offset += size;
5503                 count++;
5504
5505                 if (len) {
5506                         i++;
5507                         if (i == tx_ring->count)
5508                                 i = 0;
5509                 }
5510         }
5511
5512         for (f = 0; f < nr_frags; f++) {
5513                 const struct skb_frag_struct *frag;
5514
5515                 frag = &skb_shinfo(skb)->frags[f];
5516                 len = skb_frag_size(frag);
5517                 offset = 0;
5518
5519                 while (len) {
5520                         i++;
5521                         if (i == tx_ring->count)
5522                                 i = 0;
5523
5524                         buffer_info = &tx_ring->buffer_info[i];
5525                         size = min(len, max_per_txd);
5526
5527                         buffer_info->length = size;
5528                         buffer_info->time_stamp = jiffies;
5529                         buffer_info->next_to_watch = i;
5530                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5531                                                             offset, size,
5532                                                             DMA_TO_DEVICE);
5533                         buffer_info->mapped_as_page = true;
5534                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5535                                 goto dma_error;
5536
5537                         len -= size;
5538                         offset += size;
5539                         count++;
5540                 }
5541         }
5542
5543         segs = skb_shinfo(skb)->gso_segs ? : 1;
5544         /* multiply data chunks by size of headers */
5545         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5546
5547         tx_ring->buffer_info[i].skb = skb;
5548         tx_ring->buffer_info[i].segs = segs;
5549         tx_ring->buffer_info[i].bytecount = bytecount;
5550         tx_ring->buffer_info[first].next_to_watch = i;
5551
5552         return count;
5553
5554 dma_error:
5555         dev_err(&pdev->dev, "Tx DMA map failed\n");
5556         buffer_info->dma = 0;
5557         if (count)
5558                 count--;
5559
5560         while (count--) {
5561                 if (i == 0)
5562                         i += tx_ring->count;
5563                 i--;
5564                 buffer_info = &tx_ring->buffer_info[i];
5565                 e1000_put_txbuf(tx_ring, buffer_info);
5566         }
5567
5568         return 0;
5569 }
5570
5571 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5572 {
5573         struct e1000_adapter *adapter = tx_ring->adapter;
5574         struct e1000_tx_desc *tx_desc = NULL;
5575         struct e1000_buffer *buffer_info;
5576         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5577         unsigned int i;
5578
5579         if (tx_flags & E1000_TX_FLAGS_TSO) {
5580                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5581                     E1000_TXD_CMD_TSE;
5582                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5583
5584                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5585                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5586         }
5587
5588         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5589                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5590                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5591         }
5592
5593         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5594                 txd_lower |= E1000_TXD_CMD_VLE;
5595                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5596         }
5597
5598         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5599                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5600
5601         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5602                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5603                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5604         }
5605
5606         i = tx_ring->next_to_use;
5607
5608         do {
5609                 buffer_info = &tx_ring->buffer_info[i];
5610                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5611                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5612                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5613                                                   buffer_info->length);
5614                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5615
5616                 i++;
5617                 if (i == tx_ring->count)
5618                         i = 0;
5619         } while (--count > 0);
5620
5621         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5622
5623         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5624         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5625                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5626
5627         /* Force memory writes to complete before letting h/w
5628          * know there are new descriptors to fetch.  (Only
5629          * applicable for weak-ordered memory model archs,
5630          * such as IA-64).
5631          */
5632         wmb();
5633
5634         tx_ring->next_to_use = i;
5635 }
5636
5637 #define MINIMUM_DHCP_PACKET_SIZE 282
5638 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5639                                     struct sk_buff *skb)
5640 {
5641         struct e1000_hw *hw = &adapter->hw;
5642         u16 length, offset;
5643
5644         if (skb_vlan_tag_present(skb) &&
5645             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5646               (adapter->hw.mng_cookie.status &
5647                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5648                 return 0;
5649
5650         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5651                 return 0;
5652
5653         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5654                 return 0;
5655
5656         {
5657                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5658                 struct udphdr *udp;
5659
5660                 if (ip->protocol != IPPROTO_UDP)
5661                         return 0;
5662
5663                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5664                 if (ntohs(udp->dest) != 67)
5665                         return 0;
5666
5667                 offset = (u8 *)udp + 8 - skb->data;
5668                 length = skb->len - offset;
5669                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5670         }
5671
5672         return 0;
5673 }
5674
5675 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5676 {
5677         struct e1000_adapter *adapter = tx_ring->adapter;
5678
5679         netif_stop_queue(adapter->netdev);
5680         /* Herbert's original patch had:
5681          *  smp_mb__after_netif_stop_queue();
5682          * but since that doesn't exist yet, just open code it.
5683          */
5684         smp_mb();
5685
5686         /* We need to check again in a case another CPU has just
5687          * made room available.
5688          */
5689         if (e1000_desc_unused(tx_ring) < size)
5690                 return -EBUSY;
5691
5692         /* A reprieve! */
5693         netif_start_queue(adapter->netdev);
5694         ++adapter->restart_queue;
5695         return 0;
5696 }
5697
5698 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5699 {
5700         BUG_ON(size > tx_ring->count);
5701
5702         if (e1000_desc_unused(tx_ring) >= size)
5703                 return 0;
5704         return __e1000_maybe_stop_tx(tx_ring, size);
5705 }
5706
5707 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5708                                     struct net_device *netdev)
5709 {
5710         struct e1000_adapter *adapter = netdev_priv(netdev);
5711         struct e1000_ring *tx_ring = adapter->tx_ring;
5712         unsigned int first;
5713         unsigned int tx_flags = 0;
5714         unsigned int len = skb_headlen(skb);
5715         unsigned int nr_frags;
5716         unsigned int mss;
5717         int count = 0;
5718         int tso;
5719         unsigned int f;
5720         __be16 protocol = vlan_get_protocol(skb);
5721
5722         if (test_bit(__E1000_DOWN, &adapter->state)) {
5723                 dev_kfree_skb_any(skb);
5724                 return NETDEV_TX_OK;
5725         }
5726
5727         if (skb->len <= 0) {
5728                 dev_kfree_skb_any(skb);
5729                 return NETDEV_TX_OK;
5730         }
5731
5732         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5733          * pad skb in order to meet this minimum size requirement
5734          */
5735         if (skb_put_padto(skb, 17))
5736                 return NETDEV_TX_OK;
5737
5738         mss = skb_shinfo(skb)->gso_size;
5739         if (mss) {
5740                 u8 hdr_len;
5741
5742                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5743                  * points to just header, pull a few bytes of payload from
5744                  * frags into skb->data
5745                  */
5746                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5747                 /* we do this workaround for ES2LAN, but it is un-necessary,
5748                  * avoiding it could save a lot of cycles
5749                  */
5750                 if (skb->data_len && (hdr_len == len)) {
5751                         unsigned int pull_size;
5752
5753                         pull_size = min_t(unsigned int, 4, skb->data_len);
5754                         if (!__pskb_pull_tail(skb, pull_size)) {
5755                                 e_err("__pskb_pull_tail failed.\n");
5756                                 dev_kfree_skb_any(skb);
5757                                 return NETDEV_TX_OK;
5758                         }
5759                         len = skb_headlen(skb);
5760                 }
5761         }
5762
5763         /* reserve a descriptor for the offload context */
5764         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5765                 count++;
5766         count++;
5767
5768         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5769
5770         nr_frags = skb_shinfo(skb)->nr_frags;
5771         for (f = 0; f < nr_frags; f++)
5772                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5773                                       adapter->tx_fifo_limit);
5774
5775         if (adapter->hw.mac.tx_pkt_filtering)
5776                 e1000_transfer_dhcp_info(adapter, skb);
5777
5778         /* need: count + 2 desc gap to keep tail from touching
5779          * head, otherwise try next time
5780          */
5781         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5782                 return NETDEV_TX_BUSY;
5783
5784         if (skb_vlan_tag_present(skb)) {
5785                 tx_flags |= E1000_TX_FLAGS_VLAN;
5786                 tx_flags |= (skb_vlan_tag_get(skb) <<
5787                              E1000_TX_FLAGS_VLAN_SHIFT);
5788         }
5789
5790         first = tx_ring->next_to_use;
5791
5792         tso = e1000_tso(tx_ring, skb, protocol);
5793         if (tso < 0) {
5794                 dev_kfree_skb_any(skb);
5795                 return NETDEV_TX_OK;
5796         }
5797
5798         if (tso)
5799                 tx_flags |= E1000_TX_FLAGS_TSO;
5800         else if (e1000_tx_csum(tx_ring, skb, protocol))
5801                 tx_flags |= E1000_TX_FLAGS_CSUM;
5802
5803         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5804          * 82571 hardware supports TSO capabilities for IPv6 as well...
5805          * no longer assume, we must.
5806          */
5807         if (protocol == htons(ETH_P_IP))
5808                 tx_flags |= E1000_TX_FLAGS_IPV4;
5809
5810         if (unlikely(skb->no_fcs))
5811                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5812
5813         /* if count is 0 then mapping error has occurred */
5814         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5815                              nr_frags);
5816         if (count) {
5817                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5818                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP) &&
5819                     !adapter->tx_hwtstamp_skb) {
5820                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5821                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5822                         adapter->tx_hwtstamp_skb = skb_get(skb);
5823                         adapter->tx_hwtstamp_start = jiffies;
5824                         schedule_work(&adapter->tx_hwtstamp_work);
5825                 } else {
5826                         skb_tx_timestamp(skb);
5827                 }
5828
5829                 netdev_sent_queue(netdev, skb->len);
5830                 e1000_tx_queue(tx_ring, tx_flags, count);
5831                 /* Make sure there is space in the ring for the next send. */
5832                 e1000_maybe_stop_tx(tx_ring,
5833                                     (MAX_SKB_FRAGS *
5834                                      DIV_ROUND_UP(PAGE_SIZE,
5835                                                   adapter->tx_fifo_limit) + 2));
5836
5837                 if (!skb->xmit_more ||
5838                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5839                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5840                                 e1000e_update_tdt_wa(tx_ring,
5841                                                      tx_ring->next_to_use);
5842                         else
5843                                 writel(tx_ring->next_to_use, tx_ring->tail);
5844
5845                         /* we need this if more than one processor can write
5846                          * to our tail at a time, it synchronizes IO on
5847                          *IA64/Altix systems
5848                          */
5849                         mmiowb();
5850                 }
5851         } else {
5852                 dev_kfree_skb_any(skb);
5853                 tx_ring->buffer_info[first].time_stamp = 0;
5854                 tx_ring->next_to_use = first;
5855         }
5856
5857         return NETDEV_TX_OK;
5858 }
5859
5860 /**
5861  * e1000_tx_timeout - Respond to a Tx Hang
5862  * @netdev: network interface device structure
5863  **/
5864 static void e1000_tx_timeout(struct net_device *netdev)
5865 {
5866         struct e1000_adapter *adapter = netdev_priv(netdev);
5867
5868         /* Do the reset outside of interrupt context */
5869         adapter->tx_timeout_count++;
5870         schedule_work(&adapter->reset_task);
5871 }
5872
5873 static void e1000_reset_task(struct work_struct *work)
5874 {
5875         struct e1000_adapter *adapter;
5876         adapter = container_of(work, struct e1000_adapter, reset_task);
5877
5878         rtnl_lock();
5879         /* don't run the task if already down */
5880         if (test_bit(__E1000_DOWN, &adapter->state)) {
5881                 rtnl_unlock();
5882                 return;
5883         }
5884
5885         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5886                 e1000e_dump(adapter);
5887                 e_err("Reset adapter unexpectedly\n");
5888         }
5889         e1000e_reinit_locked(adapter);
5890         rtnl_unlock();
5891 }
5892
5893 /**
5894  * e1000_get_stats64 - Get System Network Statistics
5895  * @netdev: network interface device structure
5896  * @stats: rtnl_link_stats64 pointer
5897  *
5898  * Returns the address of the device statistics structure.
5899  **/
5900 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5901                                              struct rtnl_link_stats64 *stats)
5902 {
5903         struct e1000_adapter *adapter = netdev_priv(netdev);
5904
5905         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5906         spin_lock(&adapter->stats64_lock);
5907         e1000e_update_stats(adapter);
5908         /* Fill out the OS statistics structure */
5909         stats->rx_bytes = adapter->stats.gorc;
5910         stats->rx_packets = adapter->stats.gprc;
5911         stats->tx_bytes = adapter->stats.gotc;
5912         stats->tx_packets = adapter->stats.gptc;
5913         stats->multicast = adapter->stats.mprc;
5914         stats->collisions = adapter->stats.colc;
5915
5916         /* Rx Errors */
5917
5918         /* RLEC on some newer hardware can be incorrect so build
5919          * our own version based on RUC and ROC
5920          */
5921         stats->rx_errors = adapter->stats.rxerrc +
5922             adapter->stats.crcerrs + adapter->stats.algnerrc +
5923             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5924         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5925         stats->rx_crc_errors = adapter->stats.crcerrs;
5926         stats->rx_frame_errors = adapter->stats.algnerrc;
5927         stats->rx_missed_errors = adapter->stats.mpc;
5928
5929         /* Tx Errors */
5930         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5931         stats->tx_aborted_errors = adapter->stats.ecol;
5932         stats->tx_window_errors = adapter->stats.latecol;
5933         stats->tx_carrier_errors = adapter->stats.tncrs;
5934
5935         /* Tx Dropped needs to be maintained elsewhere */
5936
5937         spin_unlock(&adapter->stats64_lock);
5938         return stats;
5939 }
5940
5941 /**
5942  * e1000_change_mtu - Change the Maximum Transfer Unit
5943  * @netdev: network interface device structure
5944  * @new_mtu: new value for maximum frame size
5945  *
5946  * Returns 0 on success, negative on failure
5947  **/
5948 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5949 {
5950         struct e1000_adapter *adapter = netdev_priv(netdev);
5951         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5952
5953         /* Jumbo frame support */
5954         if ((max_frame > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) &&
5955             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5956                 e_err("Jumbo Frames not supported.\n");
5957                 return -EINVAL;
5958         }
5959
5960         /* Supported frame sizes */
5961         if ((new_mtu < (VLAN_ETH_ZLEN + ETH_FCS_LEN)) ||
5962             (max_frame > adapter->max_hw_frame_size)) {
5963                 e_err("Unsupported MTU setting\n");
5964                 return -EINVAL;
5965         }
5966
5967         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5968         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5969             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5970             (new_mtu > ETH_DATA_LEN)) {
5971                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5972                 return -EINVAL;
5973         }
5974
5975         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5976                 usleep_range(1000, 2000);
5977         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5978         adapter->max_frame_size = max_frame;
5979         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5980         netdev->mtu = new_mtu;
5981
5982         pm_runtime_get_sync(netdev->dev.parent);
5983
5984         if (netif_running(netdev))
5985                 e1000e_down(adapter, true);
5986
5987         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5988          * means we reserve 2 more, this pushes us to allocate from the next
5989          * larger slab size.
5990          * i.e. RXBUFFER_2048 --> size-4096 slab
5991          * However with the new *_jumbo_rx* routines, jumbo receives will use
5992          * fragmented skbs
5993          */
5994
5995         if (max_frame <= 2048)
5996                 adapter->rx_buffer_len = 2048;
5997         else
5998                 adapter->rx_buffer_len = 4096;
5999
6000         /* adjust allocation if LPE protects us, and we aren't using SBP */
6001         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6002                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6003
6004         if (netif_running(netdev))
6005                 e1000e_up(adapter);
6006         else
6007                 e1000e_reset(adapter);
6008
6009         pm_runtime_put_sync(netdev->dev.parent);
6010
6011         clear_bit(__E1000_RESETTING, &adapter->state);
6012
6013         return 0;
6014 }
6015
6016 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6017                            int cmd)
6018 {
6019         struct e1000_adapter *adapter = netdev_priv(netdev);
6020         struct mii_ioctl_data *data = if_mii(ifr);
6021
6022         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6023                 return -EOPNOTSUPP;
6024
6025         switch (cmd) {
6026         case SIOCGMIIPHY:
6027                 data->phy_id = adapter->hw.phy.addr;
6028                 break;
6029         case SIOCGMIIREG:
6030                 e1000_phy_read_status(adapter);
6031
6032                 switch (data->reg_num & 0x1F) {
6033                 case MII_BMCR:
6034                         data->val_out = adapter->phy_regs.bmcr;
6035                         break;
6036                 case MII_BMSR:
6037                         data->val_out = adapter->phy_regs.bmsr;
6038                         break;
6039                 case MII_PHYSID1:
6040                         data->val_out = (adapter->hw.phy.id >> 16);
6041                         break;
6042                 case MII_PHYSID2:
6043                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6044                         break;
6045                 case MII_ADVERTISE:
6046                         data->val_out = adapter->phy_regs.advertise;
6047                         break;
6048                 case MII_LPA:
6049                         data->val_out = adapter->phy_regs.lpa;
6050                         break;
6051                 case MII_EXPANSION:
6052                         data->val_out = adapter->phy_regs.expansion;
6053                         break;
6054                 case MII_CTRL1000:
6055                         data->val_out = adapter->phy_regs.ctrl1000;
6056                         break;
6057                 case MII_STAT1000:
6058                         data->val_out = adapter->phy_regs.stat1000;
6059                         break;
6060                 case MII_ESTATUS:
6061                         data->val_out = adapter->phy_regs.estatus;
6062                         break;
6063                 default:
6064                         return -EIO;
6065                 }
6066                 break;
6067         case SIOCSMIIREG:
6068         default:
6069                 return -EOPNOTSUPP;
6070         }
6071         return 0;
6072 }
6073
6074 /**
6075  * e1000e_hwtstamp_ioctl - control hardware time stamping
6076  * @netdev: network interface device structure
6077  * @ifreq: interface request
6078  *
6079  * Outgoing time stamping can be enabled and disabled. Play nice and
6080  * disable it when requested, although it shouldn't cause any overhead
6081  * when no packet needs it. At most one packet in the queue may be
6082  * marked for time stamping, otherwise it would be impossible to tell
6083  * for sure to which packet the hardware time stamp belongs.
6084  *
6085  * Incoming time stamping has to be configured via the hardware filters.
6086  * Not all combinations are supported, in particular event type has to be
6087  * specified. Matching the kind of event packet is not supported, with the
6088  * exception of "all V2 events regardless of level 2 or 4".
6089  **/
6090 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6091 {
6092         struct e1000_adapter *adapter = netdev_priv(netdev);
6093         struct hwtstamp_config config;
6094         int ret_val;
6095
6096         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6097                 return -EFAULT;
6098
6099         ret_val = e1000e_config_hwtstamp(adapter, &config);
6100         if (ret_val)
6101                 return ret_val;
6102
6103         switch (config.rx_filter) {
6104         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6105         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6106         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6107         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6108         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6109         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6110                 /* With V2 type filters which specify a Sync or Delay Request,
6111                  * Path Delay Request/Response messages are also time stamped
6112                  * by hardware so notify the caller the requested packets plus
6113                  * some others are time stamped.
6114                  */
6115                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6116                 break;
6117         default:
6118                 break;
6119         }
6120
6121         return copy_to_user(ifr->ifr_data, &config,
6122                             sizeof(config)) ? -EFAULT : 0;
6123 }
6124
6125 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6126 {
6127         struct e1000_adapter *adapter = netdev_priv(netdev);
6128
6129         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6130                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6131 }
6132
6133 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6134 {
6135         switch (cmd) {
6136         case SIOCGMIIPHY:
6137         case SIOCGMIIREG:
6138         case SIOCSMIIREG:
6139                 return e1000_mii_ioctl(netdev, ifr, cmd);
6140         case SIOCSHWTSTAMP:
6141                 return e1000e_hwtstamp_set(netdev, ifr);
6142         case SIOCGHWTSTAMP:
6143                 return e1000e_hwtstamp_get(netdev, ifr);
6144         default:
6145                 return -EOPNOTSUPP;
6146         }
6147 }
6148
6149 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6150 {
6151         struct e1000_hw *hw = &adapter->hw;
6152         u32 i, mac_reg, wuc;
6153         u16 phy_reg, wuc_enable;
6154         int retval;
6155
6156         /* copy MAC RARs to PHY RARs */
6157         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6158
6159         retval = hw->phy.ops.acquire(hw);
6160         if (retval) {
6161                 e_err("Could not acquire PHY\n");
6162                 return retval;
6163         }
6164
6165         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6166         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6167         if (retval)
6168                 goto release;
6169
6170         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6171         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6172                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6173                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6174                                            (u16)(mac_reg & 0xFFFF));
6175                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6176                                            (u16)((mac_reg >> 16) & 0xFFFF));
6177         }
6178
6179         /* configure PHY Rx Control register */
6180         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6181         mac_reg = er32(RCTL);
6182         if (mac_reg & E1000_RCTL_UPE)
6183                 phy_reg |= BM_RCTL_UPE;
6184         if (mac_reg & E1000_RCTL_MPE)
6185                 phy_reg |= BM_RCTL_MPE;
6186         phy_reg &= ~(BM_RCTL_MO_MASK);
6187         if (mac_reg & E1000_RCTL_MO_3)
6188                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6189                             << BM_RCTL_MO_SHIFT);
6190         if (mac_reg & E1000_RCTL_BAM)
6191                 phy_reg |= BM_RCTL_BAM;
6192         if (mac_reg & E1000_RCTL_PMCF)
6193                 phy_reg |= BM_RCTL_PMCF;
6194         mac_reg = er32(CTRL);
6195         if (mac_reg & E1000_CTRL_RFCE)
6196                 phy_reg |= BM_RCTL_RFCE;
6197         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6198
6199         wuc = E1000_WUC_PME_EN;
6200         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6201                 wuc |= E1000_WUC_APME;
6202
6203         /* enable PHY wakeup in MAC register */
6204         ew32(WUFC, wufc);
6205         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6206                    E1000_WUC_PME_STATUS | wuc));
6207
6208         /* configure and enable PHY wakeup in PHY registers */
6209         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6210         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6211
6212         /* activate PHY wakeup */
6213         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6214         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6215         if (retval)
6216                 e_err("Could not set PHY Host Wakeup bit\n");
6217 release:
6218         hw->phy.ops.release(hw);
6219
6220         return retval;
6221 }
6222
6223 static void e1000e_flush_lpic(struct pci_dev *pdev)
6224 {
6225         struct net_device *netdev = pci_get_drvdata(pdev);
6226         struct e1000_adapter *adapter = netdev_priv(netdev);
6227         struct e1000_hw *hw = &adapter->hw;
6228         u32 ret_val;
6229
6230         pm_runtime_get_sync(netdev->dev.parent);
6231
6232         ret_val = hw->phy.ops.acquire(hw);
6233         if (ret_val)
6234                 goto fl_out;
6235
6236         pr_info("EEE TX LPI TIMER: %08X\n",
6237                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6238
6239         hw->phy.ops.release(hw);
6240
6241 fl_out:
6242         pm_runtime_put_sync(netdev->dev.parent);
6243 }
6244
6245 static int e1000e_pm_freeze(struct device *dev)
6246 {
6247         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6248         struct e1000_adapter *adapter = netdev_priv(netdev);
6249
6250         netif_device_detach(netdev);
6251
6252         if (netif_running(netdev)) {
6253                 int count = E1000_CHECK_RESET_COUNT;
6254
6255                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6256                         usleep_range(10000, 20000);
6257
6258                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6259
6260                 /* Quiesce the device without resetting the hardware */
6261                 e1000e_down(adapter, false);
6262                 e1000_free_irq(adapter);
6263         }
6264         e1000e_reset_interrupt_capability(adapter);
6265
6266         /* Allow time for pending master requests to run */
6267         e1000e_disable_pcie_master(&adapter->hw);
6268
6269         return 0;
6270 }
6271
6272 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6273 {
6274         struct net_device *netdev = pci_get_drvdata(pdev);
6275         struct e1000_adapter *adapter = netdev_priv(netdev);
6276         struct e1000_hw *hw = &adapter->hw;
6277         u32 ctrl, ctrl_ext, rctl, status, wufc;
6278         int retval = 0;
6279
6280         /* Runtime suspend should only enable wakeup for link changes */
6281         if (runtime)
6282                 wufc = E1000_WUFC_LNKC;
6283         else if (device_may_wakeup(&pdev->dev))
6284                 wufc = adapter->wol;
6285         else
6286                 wufc = 0;
6287
6288         status = er32(STATUS);
6289         if (status & E1000_STATUS_LU)
6290                 wufc &= ~E1000_WUFC_LNKC;
6291
6292         if (wufc) {
6293                 e1000_setup_rctl(adapter);
6294                 e1000e_set_rx_mode(netdev);
6295
6296                 /* turn on all-multi mode if wake on multicast is enabled */
6297                 if (wufc & E1000_WUFC_MC) {
6298                         rctl = er32(RCTL);
6299                         rctl |= E1000_RCTL_MPE;
6300                         ew32(RCTL, rctl);
6301                 }
6302
6303                 ctrl = er32(CTRL);
6304                 ctrl |= E1000_CTRL_ADVD3WUC;
6305                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6306                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6307                 ew32(CTRL, ctrl);
6308
6309                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6310                     adapter->hw.phy.media_type ==
6311                     e1000_media_type_internal_serdes) {
6312                         /* keep the laser running in D3 */
6313                         ctrl_ext = er32(CTRL_EXT);
6314                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6315                         ew32(CTRL_EXT, ctrl_ext);
6316                 }
6317
6318                 if (!runtime)
6319                         e1000e_power_up_phy(adapter);
6320
6321                 if (adapter->flags & FLAG_IS_ICH)
6322                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6323
6324                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6325                         /* enable wakeup by the PHY */
6326                         retval = e1000_init_phy_wakeup(adapter, wufc);
6327                         if (retval)
6328                                 return retval;
6329                 } else {
6330                         /* enable wakeup by the MAC */
6331                         ew32(WUFC, wufc);
6332                         ew32(WUC, E1000_WUC_PME_EN);
6333                 }
6334         } else {
6335                 ew32(WUC, 0);
6336                 ew32(WUFC, 0);
6337
6338                 e1000_power_down_phy(adapter);
6339         }
6340
6341         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6342                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6343         } else if ((hw->mac.type == e1000_pch_lpt) ||
6344                    (hw->mac.type == e1000_pch_spt)) {
6345                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6346                         /* ULP does not support wake from unicast, multicast
6347                          * or broadcast.
6348                          */
6349                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6350
6351                 if (retval)
6352                         return retval;
6353         }
6354
6355         /* Ensure that the appropriate bits are set in LPI_CTRL
6356          * for EEE in Sx
6357          */
6358         if ((hw->phy.type >= e1000_phy_i217) &&
6359             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6360                 u16 lpi_ctrl = 0;
6361
6362                 retval = hw->phy.ops.acquire(hw);
6363                 if (!retval) {
6364                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6365                                                  &lpi_ctrl);
6366                         if (!retval) {
6367                                 if (adapter->eee_advert &
6368                                     hw->dev_spec.ich8lan.eee_lp_ability &
6369                                     I82579_EEE_100_SUPPORTED)
6370                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6371                                 if (adapter->eee_advert &
6372                                     hw->dev_spec.ich8lan.eee_lp_ability &
6373                                     I82579_EEE_1000_SUPPORTED)
6374                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6375
6376                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6377                                                          lpi_ctrl);
6378                         }
6379                 }
6380                 hw->phy.ops.release(hw);
6381         }
6382
6383         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6384          * would have already happened in close and is redundant.
6385          */
6386         e1000e_release_hw_control(adapter);
6387
6388         pci_clear_master(pdev);
6389
6390         /* The pci-e switch on some quad port adapters will report a
6391          * correctable error when the MAC transitions from D0 to D3.  To
6392          * prevent this we need to mask off the correctable errors on the
6393          * downstream port of the pci-e switch.
6394          *
6395          * We don't have the associated upstream bridge while assigning
6396          * the PCI device into guest. For example, the KVM on power is
6397          * one of the cases.
6398          */
6399         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6400                 struct pci_dev *us_dev = pdev->bus->self;
6401                 u16 devctl;
6402
6403                 if (!us_dev)
6404                         return 0;
6405
6406                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6407                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6408                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6409
6410                 pci_save_state(pdev);
6411                 pci_prepare_to_sleep(pdev);
6412
6413                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6414         }
6415
6416         return 0;
6417 }
6418
6419 /**
6420  * __e1000e_disable_aspm - Disable ASPM states
6421  * @pdev: pointer to PCI device struct
6422  * @state: bit-mask of ASPM states to disable
6423  * @locked: indication if this context holds pci_bus_sem locked.
6424  *
6425  * Some devices *must* have certain ASPM states disabled per hardware errata.
6426  **/
6427 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6428 {
6429         struct pci_dev *parent = pdev->bus->self;
6430         u16 aspm_dis_mask = 0;
6431         u16 pdev_aspmc, parent_aspmc;
6432
6433         switch (state) {
6434         case PCIE_LINK_STATE_L0S:
6435         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6436                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6437                 /* fall-through - can't have L1 without L0s */
6438         case PCIE_LINK_STATE_L1:
6439                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6440                 break;
6441         default:
6442                 return;
6443         }
6444
6445         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6446         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6447
6448         if (parent) {
6449                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6450                                           &parent_aspmc);
6451                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6452         }
6453
6454         /* Nothing to do if the ASPM states to be disabled already are */
6455         if (!(pdev_aspmc & aspm_dis_mask) &&
6456             (!parent || !(parent_aspmc & aspm_dis_mask)))
6457                 return;
6458
6459         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6460                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6461                  "L0s" : "",
6462                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6463                  "L1" : "");
6464
6465 #ifdef CONFIG_PCIEASPM
6466         if (locked)
6467                 pci_disable_link_state_locked(pdev, state);
6468         else
6469                 pci_disable_link_state(pdev, state);
6470
6471         /* Double-check ASPM control.  If not disabled by the above, the
6472          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6473          * not enabled); override by writing PCI config space directly.
6474          */
6475         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6476         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6477
6478         if (!(aspm_dis_mask & pdev_aspmc))
6479                 return;
6480 #endif
6481
6482         /* Both device and parent should have the same ASPM setting.
6483          * Disable ASPM in downstream component first and then upstream.
6484          */
6485         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6486
6487         if (parent)
6488                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6489                                            aspm_dis_mask);
6490 }
6491
6492 /**
6493  * e1000e_disable_aspm - Disable ASPM states.
6494  * @pdev: pointer to PCI device struct
6495  * @state: bit-mask of ASPM states to disable
6496  *
6497  * This function acquires the pci_bus_sem!
6498  * Some devices *must* have certain ASPM states disabled per hardware errata.
6499  **/
6500 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6501 {
6502         __e1000e_disable_aspm(pdev, state, 0);
6503 }
6504
6505 /**
6506  * e1000e_disable_aspm_locked   Disable ASPM states.
6507  * @pdev: pointer to PCI device struct
6508  * @state: bit-mask of ASPM states to disable
6509  *
6510  * This function must be called with pci_bus_sem acquired!
6511  * Some devices *must* have certain ASPM states disabled per hardware errata.
6512  **/
6513 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6514 {
6515         __e1000e_disable_aspm(pdev, state, 1);
6516 }
6517
6518 #ifdef CONFIG_PM
6519 static int __e1000_resume(struct pci_dev *pdev)
6520 {
6521         struct net_device *netdev = pci_get_drvdata(pdev);
6522         struct e1000_adapter *adapter = netdev_priv(netdev);
6523         struct e1000_hw *hw = &adapter->hw;
6524         u16 aspm_disable_flag = 0;
6525
6526         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6527                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6528         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6529                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6530         if (aspm_disable_flag)
6531                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6532
6533         pci_set_master(pdev);
6534
6535         if (hw->mac.type >= e1000_pch2lan)
6536                 e1000_resume_workarounds_pchlan(&adapter->hw);
6537
6538         e1000e_power_up_phy(adapter);
6539
6540         /* report the system wakeup cause from S3/S4 */
6541         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6542                 u16 phy_data;
6543
6544                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6545                 if (phy_data) {
6546                         e_info("PHY Wakeup cause - %s\n",
6547                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6548                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6549                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6550                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6551                                phy_data & E1000_WUS_LNKC ?
6552                                "Link Status Change" : "other");
6553                 }
6554                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6555         } else {
6556                 u32 wus = er32(WUS);
6557
6558                 if (wus) {
6559                         e_info("MAC Wakeup cause - %s\n",
6560                                wus & E1000_WUS_EX ? "Unicast Packet" :
6561                                wus & E1000_WUS_MC ? "Multicast Packet" :
6562                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6563                                wus & E1000_WUS_MAG ? "Magic Packet" :
6564                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6565                                "other");
6566                 }
6567                 ew32(WUS, ~0);
6568         }
6569
6570         e1000e_reset(adapter);
6571
6572         e1000_init_manageability_pt(adapter);
6573
6574         /* If the controller has AMT, do not set DRV_LOAD until the interface
6575          * is up.  For all other cases, let the f/w know that the h/w is now
6576          * under the control of the driver.
6577          */
6578         if (!(adapter->flags & FLAG_HAS_AMT))
6579                 e1000e_get_hw_control(adapter);
6580
6581         return 0;
6582 }
6583
6584 #ifdef CONFIG_PM_SLEEP
6585 static int e1000e_pm_thaw(struct device *dev)
6586 {
6587         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6588         struct e1000_adapter *adapter = netdev_priv(netdev);
6589
6590         e1000e_set_interrupt_capability(adapter);
6591         if (netif_running(netdev)) {
6592                 u32 err = e1000_request_irq(adapter);
6593
6594                 if (err)
6595                         return err;
6596
6597                 e1000e_up(adapter);
6598         }
6599
6600         netif_device_attach(netdev);
6601
6602         return 0;
6603 }
6604
6605 static int e1000e_pm_suspend(struct device *dev)
6606 {
6607         struct pci_dev *pdev = to_pci_dev(dev);
6608         int rc;
6609
6610         e1000e_flush_lpic(pdev);
6611
6612         e1000e_pm_freeze(dev);
6613
6614         rc = __e1000_shutdown(pdev, false);
6615         if (rc)
6616                 e1000e_pm_thaw(dev);
6617
6618         return rc;
6619 }
6620
6621 static int e1000e_pm_resume(struct device *dev)
6622 {
6623         struct pci_dev *pdev = to_pci_dev(dev);
6624         int rc;
6625
6626         rc = __e1000_resume(pdev);
6627         if (rc)
6628                 return rc;
6629
6630         return e1000e_pm_thaw(dev);
6631 }
6632 #endif /* CONFIG_PM_SLEEP */
6633
6634 static int e1000e_pm_runtime_idle(struct device *dev)
6635 {
6636         struct pci_dev *pdev = to_pci_dev(dev);
6637         struct net_device *netdev = pci_get_drvdata(pdev);
6638         struct e1000_adapter *adapter = netdev_priv(netdev);
6639         u16 eee_lp;
6640
6641         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6642
6643         if (!e1000e_has_link(adapter)) {
6644                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6645                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6646         }
6647
6648         return -EBUSY;
6649 }
6650
6651 static int e1000e_pm_runtime_resume(struct device *dev)
6652 {
6653         struct pci_dev *pdev = to_pci_dev(dev);
6654         struct net_device *netdev = pci_get_drvdata(pdev);
6655         struct e1000_adapter *adapter = netdev_priv(netdev);
6656         int rc;
6657
6658         rc = __e1000_resume(pdev);
6659         if (rc)
6660                 return rc;
6661
6662         if (netdev->flags & IFF_UP)
6663                 rc = e1000e_up(adapter);
6664
6665         return rc;
6666 }
6667
6668 static int e1000e_pm_runtime_suspend(struct device *dev)
6669 {
6670         struct pci_dev *pdev = to_pci_dev(dev);
6671         struct net_device *netdev = pci_get_drvdata(pdev);
6672         struct e1000_adapter *adapter = netdev_priv(netdev);
6673
6674         if (netdev->flags & IFF_UP) {
6675                 int count = E1000_CHECK_RESET_COUNT;
6676
6677                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6678                         usleep_range(10000, 20000);
6679
6680                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6681
6682                 /* Down the device without resetting the hardware */
6683                 e1000e_down(adapter, false);
6684         }
6685
6686         if (__e1000_shutdown(pdev, true)) {
6687                 e1000e_pm_runtime_resume(dev);
6688                 return -EBUSY;
6689         }
6690
6691         return 0;
6692 }
6693 #endif /* CONFIG_PM */
6694
6695 static void e1000_shutdown(struct pci_dev *pdev)
6696 {
6697         e1000e_flush_lpic(pdev);
6698
6699         e1000e_pm_freeze(&pdev->dev);
6700
6701         __e1000_shutdown(pdev, false);
6702 }
6703
6704 #ifdef CONFIG_NET_POLL_CONTROLLER
6705
6706 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6707 {
6708         struct net_device *netdev = data;
6709         struct e1000_adapter *adapter = netdev_priv(netdev);
6710
6711         if (adapter->msix_entries) {
6712                 int vector, msix_irq;
6713
6714                 vector = 0;
6715                 msix_irq = adapter->msix_entries[vector].vector;
6716                 disable_irq(msix_irq);
6717                 e1000_intr_msix_rx(msix_irq, netdev);
6718                 enable_irq(msix_irq);
6719
6720                 vector++;
6721                 msix_irq = adapter->msix_entries[vector].vector;
6722                 disable_irq(msix_irq);
6723                 e1000_intr_msix_tx(msix_irq, netdev);
6724                 enable_irq(msix_irq);
6725
6726                 vector++;
6727                 msix_irq = adapter->msix_entries[vector].vector;
6728                 disable_irq(msix_irq);
6729                 e1000_msix_other(msix_irq, netdev);
6730                 enable_irq(msix_irq);
6731         }
6732
6733         return IRQ_HANDLED;
6734 }
6735
6736 /**
6737  * e1000_netpoll
6738  * @netdev: network interface device structure
6739  *
6740  * Polling 'interrupt' - used by things like netconsole to send skbs
6741  * without having to re-enable interrupts. It's not called while
6742  * the interrupt routine is executing.
6743  */
6744 static void e1000_netpoll(struct net_device *netdev)
6745 {
6746         struct e1000_adapter *adapter = netdev_priv(netdev);
6747
6748         switch (adapter->int_mode) {
6749         case E1000E_INT_MODE_MSIX:
6750                 e1000_intr_msix(adapter->pdev->irq, netdev);
6751                 break;
6752         case E1000E_INT_MODE_MSI:
6753                 disable_irq(adapter->pdev->irq);
6754                 e1000_intr_msi(adapter->pdev->irq, netdev);
6755                 enable_irq(adapter->pdev->irq);
6756                 break;
6757         default:                /* E1000E_INT_MODE_LEGACY */
6758                 disable_irq(adapter->pdev->irq);
6759                 e1000_intr(adapter->pdev->irq, netdev);
6760                 enable_irq(adapter->pdev->irq);
6761                 break;
6762         }
6763 }
6764 #endif
6765
6766 /**
6767  * e1000_io_error_detected - called when PCI error is detected
6768  * @pdev: Pointer to PCI device
6769  * @state: The current pci connection state
6770  *
6771  * This function is called after a PCI bus error affecting
6772  * this device has been detected.
6773  */
6774 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6775                                                 pci_channel_state_t state)
6776 {
6777         struct net_device *netdev = pci_get_drvdata(pdev);
6778         struct e1000_adapter *adapter = netdev_priv(netdev);
6779
6780         netif_device_detach(netdev);
6781
6782         if (state == pci_channel_io_perm_failure)
6783                 return PCI_ERS_RESULT_DISCONNECT;
6784
6785         if (netif_running(netdev))
6786                 e1000e_down(adapter, true);
6787         pci_disable_device(pdev);
6788
6789         /* Request a slot slot reset. */
6790         return PCI_ERS_RESULT_NEED_RESET;
6791 }
6792
6793 /**
6794  * e1000_io_slot_reset - called after the pci bus has been reset.
6795  * @pdev: Pointer to PCI device
6796  *
6797  * Restart the card from scratch, as if from a cold-boot. Implementation
6798  * resembles the first-half of the e1000e_pm_resume routine.
6799  */
6800 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6801 {
6802         struct net_device *netdev = pci_get_drvdata(pdev);
6803         struct e1000_adapter *adapter = netdev_priv(netdev);
6804         struct e1000_hw *hw = &adapter->hw;
6805         u16 aspm_disable_flag = 0;
6806         int err;
6807         pci_ers_result_t result;
6808
6809         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6810                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6811         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6812                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6813         if (aspm_disable_flag)
6814                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6815
6816         err = pci_enable_device_mem(pdev);
6817         if (err) {
6818                 dev_err(&pdev->dev,
6819                         "Cannot re-enable PCI device after reset.\n");
6820                 result = PCI_ERS_RESULT_DISCONNECT;
6821         } else {
6822                 pdev->state_saved = true;
6823                 pci_restore_state(pdev);
6824                 pci_set_master(pdev);
6825
6826                 pci_enable_wake(pdev, PCI_D3hot, 0);
6827                 pci_enable_wake(pdev, PCI_D3cold, 0);
6828
6829                 e1000e_reset(adapter);
6830                 ew32(WUS, ~0);
6831                 result = PCI_ERS_RESULT_RECOVERED;
6832         }
6833
6834         pci_cleanup_aer_uncorrect_error_status(pdev);
6835
6836         return result;
6837 }
6838
6839 /**
6840  * e1000_io_resume - called when traffic can start flowing again.
6841  * @pdev: Pointer to PCI device
6842  *
6843  * This callback is called when the error recovery driver tells us that
6844  * its OK to resume normal operation. Implementation resembles the
6845  * second-half of the e1000e_pm_resume routine.
6846  */
6847 static void e1000_io_resume(struct pci_dev *pdev)
6848 {
6849         struct net_device *netdev = pci_get_drvdata(pdev);
6850         struct e1000_adapter *adapter = netdev_priv(netdev);
6851
6852         e1000_init_manageability_pt(adapter);
6853
6854         if (netif_running(netdev)) {
6855                 if (e1000e_up(adapter)) {
6856                         dev_err(&pdev->dev,
6857                                 "can't bring device back up after reset\n");
6858                         return;
6859                 }
6860         }
6861
6862         netif_device_attach(netdev);
6863
6864         /* If the controller has AMT, do not set DRV_LOAD until the interface
6865          * is up.  For all other cases, let the f/w know that the h/w is now
6866          * under the control of the driver.
6867          */
6868         if (!(adapter->flags & FLAG_HAS_AMT))
6869                 e1000e_get_hw_control(adapter);
6870 }
6871
6872 static void e1000_print_device_info(struct e1000_adapter *adapter)
6873 {
6874         struct e1000_hw *hw = &adapter->hw;
6875         struct net_device *netdev = adapter->netdev;
6876         u32 ret_val;
6877         u8 pba_str[E1000_PBANUM_LENGTH];
6878
6879         /* print bus type/speed/width info */
6880         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6881                /* bus width */
6882                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6883                 "Width x1"),
6884                /* MAC address */
6885                netdev->dev_addr);
6886         e_info("Intel(R) PRO/%s Network Connection\n",
6887                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6888         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6889                                                 E1000_PBANUM_LENGTH);
6890         if (ret_val)
6891                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6892         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6893                hw->mac.type, hw->phy.type, pba_str);
6894 }
6895
6896 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6897 {
6898         struct e1000_hw *hw = &adapter->hw;
6899         int ret_val;
6900         u16 buf = 0;
6901
6902         if (hw->mac.type != e1000_82573)
6903                 return;
6904
6905         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6906         le16_to_cpus(&buf);
6907         if (!ret_val && (!(buf & (1 << 0)))) {
6908                 /* Deep Smart Power Down (DSPD) */
6909                 dev_warn(&adapter->pdev->dev,
6910                          "Warning: detected DSPD enabled in EEPROM\n");
6911         }
6912 }
6913
6914 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6915                                             netdev_features_t features)
6916 {
6917         struct e1000_adapter *adapter = netdev_priv(netdev);
6918         struct e1000_hw *hw = &adapter->hw;
6919
6920         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6921         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6922                 features &= ~NETIF_F_RXFCS;
6923
6924         return features;
6925 }
6926
6927 static int e1000_set_features(struct net_device *netdev,
6928                               netdev_features_t features)
6929 {
6930         struct e1000_adapter *adapter = netdev_priv(netdev);
6931         netdev_features_t changed = features ^ netdev->features;
6932
6933         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6934                 adapter->flags |= FLAG_TSO_FORCE;
6935
6936         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6937                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6938                          NETIF_F_RXALL)))
6939                 return 0;
6940
6941         if (changed & NETIF_F_RXFCS) {
6942                 if (features & NETIF_F_RXFCS) {
6943                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6944                 } else {
6945                         /* We need to take it back to defaults, which might mean
6946                          * stripping is still disabled at the adapter level.
6947                          */
6948                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6949                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6950                         else
6951                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6952                 }
6953         }
6954
6955         netdev->features = features;
6956
6957         if (netif_running(netdev))
6958                 e1000e_reinit_locked(adapter);
6959         else
6960                 e1000e_reset(adapter);
6961
6962         return 0;
6963 }
6964
6965 static const struct net_device_ops e1000e_netdev_ops = {
6966         .ndo_open               = e1000_open,
6967         .ndo_stop               = e1000_close,
6968         .ndo_start_xmit         = e1000_xmit_frame,
6969         .ndo_get_stats64        = e1000e_get_stats64,
6970         .ndo_set_rx_mode        = e1000e_set_rx_mode,
6971         .ndo_set_mac_address    = e1000_set_mac,
6972         .ndo_change_mtu         = e1000_change_mtu,
6973         .ndo_do_ioctl           = e1000_ioctl,
6974         .ndo_tx_timeout         = e1000_tx_timeout,
6975         .ndo_validate_addr      = eth_validate_addr,
6976
6977         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
6978         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
6979 #ifdef CONFIG_NET_POLL_CONTROLLER
6980         .ndo_poll_controller    = e1000_netpoll,
6981 #endif
6982         .ndo_set_features = e1000_set_features,
6983         .ndo_fix_features = e1000_fix_features,
6984         .ndo_features_check     = passthru_features_check,
6985 };
6986
6987 /**
6988  * e1000_probe - Device Initialization Routine
6989  * @pdev: PCI device information struct
6990  * @ent: entry in e1000_pci_tbl
6991  *
6992  * Returns 0 on success, negative on failure
6993  *
6994  * e1000_probe initializes an adapter identified by a pci_dev structure.
6995  * The OS initialization, configuring of the adapter private structure,
6996  * and a hardware reset occur.
6997  **/
6998 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6999 {
7000         struct net_device *netdev;
7001         struct e1000_adapter *adapter;
7002         struct e1000_hw *hw;
7003         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7004         resource_size_t mmio_start, mmio_len;
7005         resource_size_t flash_start, flash_len;
7006         static int cards_found;
7007         u16 aspm_disable_flag = 0;
7008         int bars, i, err, pci_using_dac;
7009         u16 eeprom_data = 0;
7010         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7011         s32 rval = 0;
7012
7013         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7014                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7015         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7016                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7017         if (aspm_disable_flag)
7018                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7019
7020         err = pci_enable_device_mem(pdev);
7021         if (err)
7022                 return err;
7023
7024         pci_using_dac = 0;
7025         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7026         if (!err) {
7027                 pci_using_dac = 1;
7028         } else {
7029                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7030                 if (err) {
7031                         dev_err(&pdev->dev,
7032                                 "No usable DMA configuration, aborting\n");
7033                         goto err_dma;
7034                 }
7035         }
7036
7037         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7038         err = pci_request_selected_regions_exclusive(pdev, bars,
7039                                                      e1000e_driver_name);
7040         if (err)
7041                 goto err_pci_reg;
7042
7043         /* AER (Advanced Error Reporting) hooks */
7044         pci_enable_pcie_error_reporting(pdev);
7045
7046         pci_set_master(pdev);
7047         /* PCI config space info */
7048         err = pci_save_state(pdev);
7049         if (err)
7050                 goto err_alloc_etherdev;
7051
7052         err = -ENOMEM;
7053         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7054         if (!netdev)
7055                 goto err_alloc_etherdev;
7056
7057         SET_NETDEV_DEV(netdev, &pdev->dev);
7058
7059         netdev->irq = pdev->irq;
7060
7061         pci_set_drvdata(pdev, netdev);
7062         adapter = netdev_priv(netdev);
7063         hw = &adapter->hw;
7064         adapter->netdev = netdev;
7065         adapter->pdev = pdev;
7066         adapter->ei = ei;
7067         adapter->pba = ei->pba;
7068         adapter->flags = ei->flags;
7069         adapter->flags2 = ei->flags2;
7070         adapter->hw.adapter = adapter;
7071         adapter->hw.mac.type = ei->mac;
7072         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7073         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7074
7075         mmio_start = pci_resource_start(pdev, 0);
7076         mmio_len = pci_resource_len(pdev, 0);
7077
7078         err = -EIO;
7079         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7080         if (!adapter->hw.hw_addr)
7081                 goto err_ioremap;
7082
7083         if ((adapter->flags & FLAG_HAS_FLASH) &&
7084             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7085             (hw->mac.type < e1000_pch_spt)) {
7086                 flash_start = pci_resource_start(pdev, 1);
7087                 flash_len = pci_resource_len(pdev, 1);
7088                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7089                 if (!adapter->hw.flash_address)
7090                         goto err_flashmap;
7091         }
7092
7093         /* Set default EEE advertisement */
7094         if (adapter->flags2 & FLAG2_HAS_EEE)
7095                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7096
7097         /* construct the net_device struct */
7098         netdev->netdev_ops = &e1000e_netdev_ops;
7099         e1000e_set_ethtool_ops(netdev);
7100         netdev->watchdog_timeo = 5 * HZ;
7101         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7102         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7103
7104         netdev->mem_start = mmio_start;
7105         netdev->mem_end = mmio_start + mmio_len;
7106
7107         adapter->bd_number = cards_found++;
7108
7109         e1000e_check_options(adapter);
7110
7111         /* setup adapter struct */
7112         err = e1000_sw_init(adapter);
7113         if (err)
7114                 goto err_sw_init;
7115
7116         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7117         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7118         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7119
7120         err = ei->get_variants(adapter);
7121         if (err)
7122                 goto err_hw_init;
7123
7124         if ((adapter->flags & FLAG_IS_ICH) &&
7125             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7126             (hw->mac.type < e1000_pch_spt))
7127                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7128
7129         hw->mac.ops.get_bus_info(&adapter->hw);
7130
7131         adapter->hw.phy.autoneg_wait_to_complete = 0;
7132
7133         /* Copper options */
7134         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7135                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7136                 adapter->hw.phy.disable_polarity_correction = 0;
7137                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7138         }
7139
7140         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7141                 dev_info(&pdev->dev,
7142                          "PHY reset is blocked due to SOL/IDER session.\n");
7143
7144         /* Set initial default active device features */
7145         netdev->features = (NETIF_F_SG |
7146                             NETIF_F_HW_VLAN_CTAG_RX |
7147                             NETIF_F_HW_VLAN_CTAG_TX |
7148                             NETIF_F_TSO |
7149                             NETIF_F_TSO6 |
7150                             NETIF_F_RXHASH |
7151                             NETIF_F_RXCSUM |
7152                             NETIF_F_HW_CSUM);
7153
7154         /* Set user-changeable features (subset of all device features) */
7155         netdev->hw_features = netdev->features;
7156         netdev->hw_features |= NETIF_F_RXFCS;
7157         netdev->priv_flags |= IFF_SUPP_NOFCS;
7158         netdev->hw_features |= NETIF_F_RXALL;
7159
7160         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7161                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7162
7163         netdev->vlan_features |= (NETIF_F_SG |
7164                                   NETIF_F_TSO |
7165                                   NETIF_F_TSO6 |
7166                                   NETIF_F_HW_CSUM);
7167
7168         netdev->priv_flags |= IFF_UNICAST_FLT;
7169
7170         if (pci_using_dac) {
7171                 netdev->features |= NETIF_F_HIGHDMA;
7172                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7173         }
7174
7175         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7176                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7177
7178         /* before reading the NVM, reset the controller to
7179          * put the device in a known good starting state
7180          */
7181         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7182
7183         /* systems with ASPM and others may see the checksum fail on the first
7184          * attempt. Let's give it a few tries
7185          */
7186         for (i = 0;; i++) {
7187                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7188                         break;
7189                 if (i == 2) {
7190                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7191                         err = -EIO;
7192                         goto err_eeprom;
7193                 }
7194         }
7195
7196         e1000_eeprom_checks(adapter);
7197
7198         /* copy the MAC address */
7199         if (e1000e_read_mac_addr(&adapter->hw))
7200                 dev_err(&pdev->dev,
7201                         "NVM Read Error while reading MAC address\n");
7202
7203         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7204
7205         if (!is_valid_ether_addr(netdev->dev_addr)) {
7206                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7207                         netdev->dev_addr);
7208                 err = -EIO;
7209                 goto err_eeprom;
7210         }
7211
7212         init_timer(&adapter->watchdog_timer);
7213         adapter->watchdog_timer.function = e1000_watchdog;
7214         adapter->watchdog_timer.data = (unsigned long)adapter;
7215
7216         init_timer(&adapter->phy_info_timer);
7217         adapter->phy_info_timer.function = e1000_update_phy_info;
7218         adapter->phy_info_timer.data = (unsigned long)adapter;
7219
7220         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7221         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7222         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7223         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7224         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7225
7226         /* Initialize link parameters. User can change them with ethtool */
7227         adapter->hw.mac.autoneg = 1;
7228         adapter->fc_autoneg = true;
7229         adapter->hw.fc.requested_mode = e1000_fc_default;
7230         adapter->hw.fc.current_mode = e1000_fc_default;
7231         adapter->hw.phy.autoneg_advertised = 0x2f;
7232
7233         /* Initial Wake on LAN setting - If APM wake is enabled in
7234          * the EEPROM, enable the ACPI Magic Packet filter
7235          */
7236         if (adapter->flags & FLAG_APME_IN_WUC) {
7237                 /* APME bit in EEPROM is mapped to WUC.APME */
7238                 eeprom_data = er32(WUC);
7239                 eeprom_apme_mask = E1000_WUC_APME;
7240                 if ((hw->mac.type > e1000_ich10lan) &&
7241                     (eeprom_data & E1000_WUC_PHY_WAKE))
7242                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7243         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7244                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7245                     (adapter->hw.bus.func == 1))
7246                         rval = e1000_read_nvm(&adapter->hw,
7247                                               NVM_INIT_CONTROL3_PORT_B,
7248                                               1, &eeprom_data);
7249                 else
7250                         rval = e1000_read_nvm(&adapter->hw,
7251                                               NVM_INIT_CONTROL3_PORT_A,
7252                                               1, &eeprom_data);
7253         }
7254
7255         /* fetch WoL from EEPROM */
7256         if (rval)
7257                 e_dbg("NVM read error getting WoL initial values: %d\n", rval);
7258         else if (eeprom_data & eeprom_apme_mask)
7259                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7260
7261         /* now that we have the eeprom settings, apply the special cases
7262          * where the eeprom may be wrong or the board simply won't support
7263          * wake on lan on a particular port
7264          */
7265         if (!(adapter->flags & FLAG_HAS_WOL))
7266                 adapter->eeprom_wol = 0;
7267
7268         /* initialize the wol settings based on the eeprom settings */
7269         adapter->wol = adapter->eeprom_wol;
7270
7271         /* make sure adapter isn't asleep if manageability is enabled */
7272         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7273             (hw->mac.ops.check_mng_mode(hw)))
7274                 device_wakeup_enable(&pdev->dev);
7275
7276         /* save off EEPROM version number */
7277         rval = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7278
7279         if (rval) {
7280                 e_dbg("NVM read error getting EEPROM version: %d\n", rval);
7281                 adapter->eeprom_vers = 0;
7282         }
7283
7284         /* reset the hardware with the new settings */
7285         e1000e_reset(adapter);
7286
7287         /* If the controller has AMT, do not set DRV_LOAD until the interface
7288          * is up.  For all other cases, let the f/w know that the h/w is now
7289          * under the control of the driver.
7290          */
7291         if (!(adapter->flags & FLAG_HAS_AMT))
7292                 e1000e_get_hw_control(adapter);
7293
7294         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7295         err = register_netdev(netdev);
7296         if (err)
7297                 goto err_register;
7298
7299         /* carrier off reporting is important to ethtool even BEFORE open */
7300         netif_carrier_off(netdev);
7301
7302         /* init PTP hardware clock */
7303         e1000e_ptp_init(adapter);
7304
7305         e1000_print_device_info(adapter);
7306
7307         if (pci_dev_run_wake(pdev))
7308                 pm_runtime_put_noidle(&pdev->dev);
7309
7310         return 0;
7311
7312 err_register:
7313         if (!(adapter->flags & FLAG_HAS_AMT))
7314                 e1000e_release_hw_control(adapter);
7315 err_eeprom:
7316         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7317                 e1000_phy_hw_reset(&adapter->hw);
7318 err_hw_init:
7319         kfree(adapter->tx_ring);
7320         kfree(adapter->rx_ring);
7321 err_sw_init:
7322         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7323                 iounmap(adapter->hw.flash_address);
7324         e1000e_reset_interrupt_capability(adapter);
7325 err_flashmap:
7326         iounmap(adapter->hw.hw_addr);
7327 err_ioremap:
7328         free_netdev(netdev);
7329 err_alloc_etherdev:
7330         pci_release_selected_regions(pdev,
7331                                      pci_select_bars(pdev, IORESOURCE_MEM));
7332 err_pci_reg:
7333 err_dma:
7334         pci_disable_device(pdev);
7335         return err;
7336 }
7337
7338 /**
7339  * e1000_remove - Device Removal Routine
7340  * @pdev: PCI device information struct
7341  *
7342  * e1000_remove is called by the PCI subsystem to alert the driver
7343  * that it should release a PCI device.  The could be caused by a
7344  * Hot-Plug event, or because the driver is going to be removed from
7345  * memory.
7346  **/
7347 static void e1000_remove(struct pci_dev *pdev)
7348 {
7349         struct net_device *netdev = pci_get_drvdata(pdev);
7350         struct e1000_adapter *adapter = netdev_priv(netdev);
7351         bool down = test_bit(__E1000_DOWN, &adapter->state);
7352
7353         e1000e_ptp_remove(adapter);
7354
7355         /* The timers may be rescheduled, so explicitly disable them
7356          * from being rescheduled.
7357          */
7358         if (!down)
7359                 set_bit(__E1000_DOWN, &adapter->state);
7360         del_timer_sync(&adapter->watchdog_timer);
7361         del_timer_sync(&adapter->phy_info_timer);
7362
7363         cancel_work_sync(&adapter->reset_task);
7364         cancel_work_sync(&adapter->watchdog_task);
7365         cancel_work_sync(&adapter->downshift_task);
7366         cancel_work_sync(&adapter->update_phy_task);
7367         cancel_work_sync(&adapter->print_hang_task);
7368
7369         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7370                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7371                 if (adapter->tx_hwtstamp_skb) {
7372                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7373                         adapter->tx_hwtstamp_skb = NULL;
7374                 }
7375         }
7376
7377         /* Don't lie to e1000_close() down the road. */
7378         if (!down)
7379                 clear_bit(__E1000_DOWN, &adapter->state);
7380         unregister_netdev(netdev);
7381
7382         if (pci_dev_run_wake(pdev))
7383                 pm_runtime_get_noresume(&pdev->dev);
7384
7385         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7386          * would have already happened in close and is redundant.
7387          */
7388         e1000e_release_hw_control(adapter);
7389
7390         e1000e_reset_interrupt_capability(adapter);
7391         kfree(adapter->tx_ring);
7392         kfree(adapter->rx_ring);
7393
7394         iounmap(adapter->hw.hw_addr);
7395         if ((adapter->hw.flash_address) &&
7396             (adapter->hw.mac.type < e1000_pch_spt))
7397                 iounmap(adapter->hw.flash_address);
7398         pci_release_selected_regions(pdev,
7399                                      pci_select_bars(pdev, IORESOURCE_MEM));
7400
7401         free_netdev(netdev);
7402
7403         /* AER disable */
7404         pci_disable_pcie_error_reporting(pdev);
7405
7406         pci_disable_device(pdev);
7407 }
7408
7409 /* PCI Error Recovery (ERS) */
7410 static const struct pci_error_handlers e1000_err_handler = {
7411         .error_detected = e1000_io_error_detected,
7412         .slot_reset = e1000_io_slot_reset,
7413         .resume = e1000_io_resume,
7414 };
7415
7416 static const struct pci_device_id e1000_pci_tbl[] = {
7417         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7418         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7419         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7420         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7421           board_82571 },
7422         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7423         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7424         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7425         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7426         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7427
7428         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7429         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7430         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7431         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7432
7433         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7434         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7435         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7436
7437         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7438         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7439         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7440
7441         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7442           board_80003es2lan },
7443         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7444           board_80003es2lan },
7445         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7446           board_80003es2lan },
7447         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7448           board_80003es2lan },
7449
7450         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7451         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7452         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7453         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7454         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7455         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7456         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7457         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7458
7459         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7460         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7461         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7462         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7463         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7464         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7465         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7466         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7467         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7468
7469         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7470         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7471         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7472
7473         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7474         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7475         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7476
7477         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7478         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7479         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7480         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7481
7482         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7483         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7484
7485         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7486         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7487         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7488         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7489         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7490         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7491         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7492         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7493         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7494         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7495         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7496         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7497
7498         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7499 };
7500 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7501
7502 static const struct dev_pm_ops e1000_pm_ops = {
7503 #ifdef CONFIG_PM_SLEEP
7504         .suspend        = e1000e_pm_suspend,
7505         .resume         = e1000e_pm_resume,
7506         .freeze         = e1000e_pm_freeze,
7507         .thaw           = e1000e_pm_thaw,
7508         .poweroff       = e1000e_pm_suspend,
7509         .restore        = e1000e_pm_resume,
7510 #endif
7511         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7512                            e1000e_pm_runtime_idle)
7513 };
7514
7515 /* PCI Device API Driver */
7516 static struct pci_driver e1000_driver = {
7517         .name     = e1000e_driver_name,
7518         .id_table = e1000_pci_tbl,
7519         .probe    = e1000_probe,
7520         .remove   = e1000_remove,
7521         .driver   = {
7522                 .pm = &e1000_pm_ops,
7523         },
7524         .shutdown = e1000_shutdown,
7525         .err_handler = &e1000_err_handler
7526 };
7527
7528 /**
7529  * e1000_init_module - Driver Registration Routine
7530  *
7531  * e1000_init_module is the first routine called when the driver is
7532  * loaded. All it does is register with the PCI subsystem.
7533  **/
7534 static int __init e1000_init_module(void)
7535 {
7536         int ret;
7537
7538         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7539                 e1000e_driver_version);
7540         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7541         ret = pci_register_driver(&e1000_driver);
7542
7543         return ret;
7544 }
7545 module_init(e1000_init_module);
7546
7547 /**
7548  * e1000_exit_module - Driver Exit Cleanup Routine
7549  *
7550  * e1000_exit_module is called just before the driver is removed
7551  * from memory.
7552  **/
7553 static void __exit e1000_exit_module(void)
7554 {
7555         pci_unregister_driver(&e1000_driver);
7556 }
7557 module_exit(e1000_exit_module);
7558
7559 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7560 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7561 MODULE_LICENSE("GPL");
7562 MODULE_VERSION(DRV_VERSION);
7563
7564 /* netdev.c */