1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/delay.h>
13 #include <linux/netdevice.h>
14 #include <linux/interrupt.h>
15 #include <linux/tcp.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/cpu.h>
23 #include <linux/smp.h>
24 #include <linux/pm_qos.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/aer.h>
27 #include <linux/prefetch.h>
31 #define DRV_EXTRAVERSION "-k"
33 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
34 char e1000e_driver_name[] = "e1000e";
35 const char e1000e_driver_version[] = DRV_VERSION;
37 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
38 static int debug = -1;
39 module_param(debug, int, 0);
40 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
42 static const struct e1000_info *e1000_info_tbl[] = {
43 [board_82571] = &e1000_82571_info,
44 [board_82572] = &e1000_82572_info,
45 [board_82573] = &e1000_82573_info,
46 [board_82574] = &e1000_82574_info,
47 [board_82583] = &e1000_82583_info,
48 [board_80003es2lan] = &e1000_es2_info,
49 [board_ich8lan] = &e1000_ich8_info,
50 [board_ich9lan] = &e1000_ich9_info,
51 [board_ich10lan] = &e1000_ich10_info,
52 [board_pchlan] = &e1000_pch_info,
53 [board_pch2lan] = &e1000_pch2_info,
54 [board_pch_lpt] = &e1000_pch_lpt_info,
55 [board_pch_spt] = &e1000_pch_spt_info,
56 [board_pch_cnp] = &e1000_pch_cnp_info,
59 struct e1000_reg_info {
64 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
65 /* General Registers */
67 {E1000_STATUS, "STATUS"},
68 {E1000_CTRL_EXT, "CTRL_EXT"},
70 /* Interrupt Registers */
75 {E1000_RDLEN(0), "RDLEN"},
76 {E1000_RDH(0), "RDH"},
77 {E1000_RDT(0), "RDT"},
79 {E1000_RXDCTL(0), "RXDCTL"},
81 {E1000_RDBAL(0), "RDBAL"},
82 {E1000_RDBAH(0), "RDBAH"},
85 {E1000_RDFHS, "RDFHS"},
86 {E1000_RDFTS, "RDFTS"},
87 {E1000_RDFPC, "RDFPC"},
91 {E1000_TDBAL(0), "TDBAL"},
92 {E1000_TDBAH(0), "TDBAH"},
93 {E1000_TDLEN(0), "TDLEN"},
94 {E1000_TDH(0), "TDH"},
95 {E1000_TDT(0), "TDT"},
97 {E1000_TXDCTL(0), "TXDCTL"},
99 {E1000_TARC(0), "TARC"},
100 {E1000_TDFH, "TDFH"},
101 {E1000_TDFT, "TDFT"},
102 {E1000_TDFHS, "TDFHS"},
103 {E1000_TDFTS, "TDFTS"},
104 {E1000_TDFPC, "TDFPC"},
106 /* List Terminator */
111 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
112 * @hw: pointer to the HW structure
114 * When updating the MAC CSR registers, the Manageability Engine (ME) could
115 * be accessing the registers at the same time. Normally, this is handled in
116 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
117 * accesses later than it should which could result in the register to have
118 * an incorrect value. Workaround this by checking the FWSM register which
119 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
120 * and try again a number of times.
122 static void __ew32_prepare(struct e1000_hw *hw)
124 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
126 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
130 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
132 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
135 writel(val, hw->hw_addr + reg);
139 * e1000_regdump - register printout routine
140 * @hw: pointer to the HW structure
141 * @reginfo: pointer to the register info table
143 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
149 switch (reginfo->ofs) {
150 case E1000_RXDCTL(0):
151 for (n = 0; n < 2; n++)
152 regs[n] = __er32(hw, E1000_RXDCTL(n));
154 case E1000_TXDCTL(0):
155 for (n = 0; n < 2; n++)
156 regs[n] = __er32(hw, E1000_TXDCTL(n));
159 for (n = 0; n < 2; n++)
160 regs[n] = __er32(hw, E1000_TARC(n));
163 pr_info("%-15s %08x\n",
164 reginfo->name, __er32(hw, reginfo->ofs));
168 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
169 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
172 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
173 struct e1000_buffer *bi)
176 struct e1000_ps_page *ps_page;
178 for (i = 0; i < adapter->rx_ps_pages; i++) {
179 ps_page = &bi->ps_pages[i];
182 pr_info("packet dump for ps_page %d:\n", i);
183 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
184 16, 1, page_address(ps_page->page),
191 * e1000e_dump - Print registers, Tx-ring and Rx-ring
192 * @adapter: board private structure
194 static void e1000e_dump(struct e1000_adapter *adapter)
196 struct net_device *netdev = adapter->netdev;
197 struct e1000_hw *hw = &adapter->hw;
198 struct e1000_reg_info *reginfo;
199 struct e1000_ring *tx_ring = adapter->tx_ring;
200 struct e1000_tx_desc *tx_desc;
205 struct e1000_buffer *buffer_info;
206 struct e1000_ring *rx_ring = adapter->rx_ring;
207 union e1000_rx_desc_packet_split *rx_desc_ps;
208 union e1000_rx_desc_extended *rx_desc;
218 if (!netif_msg_hw(adapter))
221 /* Print netdevice Info */
223 dev_info(&adapter->pdev->dev, "Net device Info\n");
224 pr_info("Device Name state trans_start\n");
225 pr_info("%-15s %016lX %016lX\n", netdev->name,
226 netdev->state, dev_trans_start(netdev));
229 /* Print Registers */
230 dev_info(&adapter->pdev->dev, "Register Dump\n");
231 pr_info(" Register Name Value\n");
232 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
233 reginfo->name; reginfo++) {
234 e1000_regdump(hw, reginfo);
237 /* Print Tx Ring Summary */
238 if (!netdev || !netif_running(netdev))
241 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
242 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
243 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
244 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
245 0, tx_ring->next_to_use, tx_ring->next_to_clean,
246 (unsigned long long)buffer_info->dma,
248 buffer_info->next_to_watch,
249 (unsigned long long)buffer_info->time_stamp);
252 if (!netif_msg_tx_done(adapter))
253 goto rx_ring_summary;
255 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
257 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
259 * Legacy Transmit Descriptor
260 * +--------------------------------------------------------------+
261 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
262 * +--------------------------------------------------------------+
263 * 8 | Special | CSS | Status | CMD | CSO | Length |
264 * +--------------------------------------------------------------+
265 * 63 48 47 36 35 32 31 24 23 16 15 0
267 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
268 * 63 48 47 40 39 32 31 16 15 8 7 0
269 * +----------------------------------------------------------------+
270 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
271 * +----------------------------------------------------------------+
272 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
273 * +----------------------------------------------------------------+
274 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
276 * Extended Data Descriptor (DTYP=0x1)
277 * +----------------------------------------------------------------+
278 * 0 | Buffer Address [63:0] |
279 * +----------------------------------------------------------------+
280 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
281 * +----------------------------------------------------------------+
282 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
284 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
285 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
286 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
287 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
288 const char *next_desc;
289 tx_desc = E1000_TX_DESC(*tx_ring, i);
290 buffer_info = &tx_ring->buffer_info[i];
291 u0 = (struct my_u0 *)tx_desc;
292 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
293 next_desc = " NTC/U";
294 else if (i == tx_ring->next_to_use)
296 else if (i == tx_ring->next_to_clean)
300 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
301 (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
302 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
304 (unsigned long long)le64_to_cpu(u0->a),
305 (unsigned long long)le64_to_cpu(u0->b),
306 (unsigned long long)buffer_info->dma,
307 buffer_info->length, buffer_info->next_to_watch,
308 (unsigned long long)buffer_info->time_stamp,
309 buffer_info->skb, next_desc);
311 if (netif_msg_pktdata(adapter) && buffer_info->skb)
312 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
313 16, 1, buffer_info->skb->data,
314 buffer_info->skb->len, true);
317 /* Print Rx Ring Summary */
319 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
320 pr_info("Queue [NTU] [NTC]\n");
321 pr_info(" %5d %5X %5X\n",
322 0, rx_ring->next_to_use, rx_ring->next_to_clean);
325 if (!netif_msg_rx_status(adapter))
328 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
329 switch (adapter->rx_ps_pages) {
333 /* [Extended] Packet Split Receive Descriptor Format
335 * +-----------------------------------------------------+
336 * 0 | Buffer Address 0 [63:0] |
337 * +-----------------------------------------------------+
338 * 8 | Buffer Address 1 [63:0] |
339 * +-----------------------------------------------------+
340 * 16 | Buffer Address 2 [63:0] |
341 * +-----------------------------------------------------+
342 * 24 | Buffer Address 3 [63:0] |
343 * +-----------------------------------------------------+
345 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
346 /* [Extended] Receive Descriptor (Write-Back) Format
348 * 63 48 47 32 31 13 12 8 7 4 3 0
349 * +------------------------------------------------------+
350 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
351 * | Checksum | Ident | | Queue | | Type |
352 * +------------------------------------------------------+
353 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
354 * +------------------------------------------------------+
355 * 63 48 47 32 31 20 19 0
357 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
358 for (i = 0; i < rx_ring->count; i++) {
359 const char *next_desc;
360 buffer_info = &rx_ring->buffer_info[i];
361 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
362 u1 = (struct my_u1 *)rx_desc_ps;
364 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
366 if (i == rx_ring->next_to_use)
368 else if (i == rx_ring->next_to_clean)
373 if (staterr & E1000_RXD_STAT_DD) {
374 /* Descriptor Done */
375 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
377 (unsigned long long)le64_to_cpu(u1->a),
378 (unsigned long long)le64_to_cpu(u1->b),
379 (unsigned long long)le64_to_cpu(u1->c),
380 (unsigned long long)le64_to_cpu(u1->d),
381 buffer_info->skb, next_desc);
383 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
385 (unsigned long long)le64_to_cpu(u1->a),
386 (unsigned long long)le64_to_cpu(u1->b),
387 (unsigned long long)le64_to_cpu(u1->c),
388 (unsigned long long)le64_to_cpu(u1->d),
389 (unsigned long long)buffer_info->dma,
390 buffer_info->skb, next_desc);
392 if (netif_msg_pktdata(adapter))
393 e1000e_dump_ps_pages(adapter,
400 /* Extended Receive Descriptor (Read) Format
402 * +-----------------------------------------------------+
403 * 0 | Buffer Address [63:0] |
404 * +-----------------------------------------------------+
406 * +-----------------------------------------------------+
408 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
409 /* Extended Receive Descriptor (Write-Back) Format
411 * 63 48 47 32 31 24 23 4 3 0
412 * +------------------------------------------------------+
414 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
415 * | Packet | IP | | | Type |
416 * | Checksum | Ident | | | |
417 * +------------------------------------------------------+
418 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
419 * +------------------------------------------------------+
420 * 63 48 47 32 31 20 19 0
422 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
424 for (i = 0; i < rx_ring->count; i++) {
425 const char *next_desc;
427 buffer_info = &rx_ring->buffer_info[i];
428 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
429 u1 = (struct my_u1 *)rx_desc;
430 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
432 if (i == rx_ring->next_to_use)
434 else if (i == rx_ring->next_to_clean)
439 if (staterr & E1000_RXD_STAT_DD) {
440 /* Descriptor Done */
441 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
443 (unsigned long long)le64_to_cpu(u1->a),
444 (unsigned long long)le64_to_cpu(u1->b),
445 buffer_info->skb, next_desc);
447 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
449 (unsigned long long)le64_to_cpu(u1->a),
450 (unsigned long long)le64_to_cpu(u1->b),
451 (unsigned long long)buffer_info->dma,
452 buffer_info->skb, next_desc);
454 if (netif_msg_pktdata(adapter) &&
456 print_hex_dump(KERN_INFO, "",
457 DUMP_PREFIX_ADDRESS, 16,
459 buffer_info->skb->data,
460 adapter->rx_buffer_len,
468 * e1000_desc_unused - calculate if we have unused descriptors
470 static int e1000_desc_unused(struct e1000_ring *ring)
472 if (ring->next_to_clean > ring->next_to_use)
473 return ring->next_to_clean - ring->next_to_use - 1;
475 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
479 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
480 * @adapter: board private structure
481 * @hwtstamps: time stamp structure to update
482 * @systim: unsigned 64bit system time value.
484 * Convert the system time value stored in the RX/TXSTMP registers into a
485 * hwtstamp which can be used by the upper level time stamping functions.
487 * The 'systim_lock' spinlock is used to protect the consistency of the
488 * system time value. This is needed because reading the 64 bit time
489 * value involves reading two 32 bit registers. The first read latches the
492 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
493 struct skb_shared_hwtstamps *hwtstamps,
499 spin_lock_irqsave(&adapter->systim_lock, flags);
500 ns = timecounter_cyc2time(&adapter->tc, systim);
501 spin_unlock_irqrestore(&adapter->systim_lock, flags);
503 memset(hwtstamps, 0, sizeof(*hwtstamps));
504 hwtstamps->hwtstamp = ns_to_ktime(ns);
508 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
509 * @adapter: board private structure
510 * @status: descriptor extended error and status field
511 * @skb: particular skb to include time stamp
513 * If the time stamp is valid, convert it into the timecounter ns value
514 * and store that result into the shhwtstamps structure which is passed
515 * up the network stack.
517 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
520 struct e1000_hw *hw = &adapter->hw;
523 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
524 !(status & E1000_RXDEXT_STATERR_TST) ||
525 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
528 /* The Rx time stamp registers contain the time stamp. No other
529 * received packet will be time stamped until the Rx time stamp
530 * registers are read. Because only one packet can be time stamped
531 * at a time, the register values must belong to this packet and
532 * therefore none of the other additional attributes need to be
535 rxstmp = (u64)er32(RXSTMPL);
536 rxstmp |= (u64)er32(RXSTMPH) << 32;
537 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
539 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
543 * e1000_receive_skb - helper function to handle Rx indications
544 * @adapter: board private structure
545 * @staterr: descriptor extended error and status field as written by hardware
546 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
547 * @skb: pointer to sk_buff to be indicated to stack
549 static void e1000_receive_skb(struct e1000_adapter *adapter,
550 struct net_device *netdev, struct sk_buff *skb,
551 u32 staterr, __le16 vlan)
553 u16 tag = le16_to_cpu(vlan);
555 e1000e_rx_hwtstamp(adapter, staterr, skb);
557 skb->protocol = eth_type_trans(skb, netdev);
559 if (staterr & E1000_RXD_STAT_VP)
560 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
562 napi_gro_receive(&adapter->napi, skb);
566 * e1000_rx_checksum - Receive Checksum Offload
567 * @adapter: board private structure
568 * @status_err: receive descriptor status and error fields
569 * @csum: receive descriptor csum field
570 * @sk_buff: socket buffer with received data
572 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
575 u16 status = (u16)status_err;
576 u8 errors = (u8)(status_err >> 24);
578 skb_checksum_none_assert(skb);
580 /* Rx checksum disabled */
581 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
584 /* Ignore Checksum bit is set */
585 if (status & E1000_RXD_STAT_IXSM)
588 /* TCP/UDP checksum error bit or IP checksum error bit is set */
589 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
590 /* let the stack verify checksum errors */
591 adapter->hw_csum_err++;
595 /* TCP/UDP Checksum has not been calculated */
596 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
599 /* It must be a TCP or UDP packet with a valid checksum */
600 skb->ip_summed = CHECKSUM_UNNECESSARY;
601 adapter->hw_csum_good++;
604 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
606 struct e1000_adapter *adapter = rx_ring->adapter;
607 struct e1000_hw *hw = &adapter->hw;
610 writel(i, rx_ring->tail);
612 if (unlikely(i != readl(rx_ring->tail))) {
613 u32 rctl = er32(RCTL);
615 ew32(RCTL, rctl & ~E1000_RCTL_EN);
616 e_err("ME firmware caused invalid RDT - resetting\n");
617 schedule_work(&adapter->reset_task);
621 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
623 struct e1000_adapter *adapter = tx_ring->adapter;
624 struct e1000_hw *hw = &adapter->hw;
627 writel(i, tx_ring->tail);
629 if (unlikely(i != readl(tx_ring->tail))) {
630 u32 tctl = er32(TCTL);
632 ew32(TCTL, tctl & ~E1000_TCTL_EN);
633 e_err("ME firmware caused invalid TDT - resetting\n");
634 schedule_work(&adapter->reset_task);
639 * e1000_alloc_rx_buffers - Replace used receive buffers
640 * @rx_ring: Rx descriptor ring
642 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
643 int cleaned_count, gfp_t gfp)
645 struct e1000_adapter *adapter = rx_ring->adapter;
646 struct net_device *netdev = adapter->netdev;
647 struct pci_dev *pdev = adapter->pdev;
648 union e1000_rx_desc_extended *rx_desc;
649 struct e1000_buffer *buffer_info;
652 unsigned int bufsz = adapter->rx_buffer_len;
654 i = rx_ring->next_to_use;
655 buffer_info = &rx_ring->buffer_info[i];
657 while (cleaned_count--) {
658 skb = buffer_info->skb;
664 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
666 /* Better luck next round */
667 adapter->alloc_rx_buff_failed++;
671 buffer_info->skb = skb;
673 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
674 adapter->rx_buffer_len,
676 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
677 dev_err(&pdev->dev, "Rx DMA map failed\n");
678 adapter->rx_dma_failed++;
682 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
683 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
685 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
686 /* Force memory writes to complete before letting h/w
687 * know there are new descriptors to fetch. (Only
688 * applicable for weak-ordered memory model archs,
692 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
693 e1000e_update_rdt_wa(rx_ring, i);
695 writel(i, rx_ring->tail);
698 if (i == rx_ring->count)
700 buffer_info = &rx_ring->buffer_info[i];
703 rx_ring->next_to_use = i;
707 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
708 * @rx_ring: Rx descriptor ring
710 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
711 int cleaned_count, gfp_t gfp)
713 struct e1000_adapter *adapter = rx_ring->adapter;
714 struct net_device *netdev = adapter->netdev;
715 struct pci_dev *pdev = adapter->pdev;
716 union e1000_rx_desc_packet_split *rx_desc;
717 struct e1000_buffer *buffer_info;
718 struct e1000_ps_page *ps_page;
722 i = rx_ring->next_to_use;
723 buffer_info = &rx_ring->buffer_info[i];
725 while (cleaned_count--) {
726 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
728 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
729 ps_page = &buffer_info->ps_pages[j];
730 if (j >= adapter->rx_ps_pages) {
731 /* all unused desc entries get hw null ptr */
732 rx_desc->read.buffer_addr[j + 1] =
736 if (!ps_page->page) {
737 ps_page->page = alloc_page(gfp);
738 if (!ps_page->page) {
739 adapter->alloc_rx_buff_failed++;
742 ps_page->dma = dma_map_page(&pdev->dev,
746 if (dma_mapping_error(&pdev->dev,
748 dev_err(&adapter->pdev->dev,
749 "Rx DMA page map failed\n");
750 adapter->rx_dma_failed++;
754 /* Refresh the desc even if buffer_addrs
755 * didn't change because each write-back
758 rx_desc->read.buffer_addr[j + 1] =
759 cpu_to_le64(ps_page->dma);
762 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
766 adapter->alloc_rx_buff_failed++;
770 buffer_info->skb = skb;
771 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
772 adapter->rx_ps_bsize0,
774 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
775 dev_err(&pdev->dev, "Rx DMA map failed\n");
776 adapter->rx_dma_failed++;
778 dev_kfree_skb_any(skb);
779 buffer_info->skb = NULL;
783 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
785 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
786 /* Force memory writes to complete before letting h/w
787 * know there are new descriptors to fetch. (Only
788 * applicable for weak-ordered memory model archs,
792 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
793 e1000e_update_rdt_wa(rx_ring, i << 1);
795 writel(i << 1, rx_ring->tail);
799 if (i == rx_ring->count)
801 buffer_info = &rx_ring->buffer_info[i];
805 rx_ring->next_to_use = i;
809 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
810 * @rx_ring: Rx descriptor ring
811 * @cleaned_count: number of buffers to allocate this pass
814 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
815 int cleaned_count, gfp_t gfp)
817 struct e1000_adapter *adapter = rx_ring->adapter;
818 struct net_device *netdev = adapter->netdev;
819 struct pci_dev *pdev = adapter->pdev;
820 union e1000_rx_desc_extended *rx_desc;
821 struct e1000_buffer *buffer_info;
824 unsigned int bufsz = 256 - 16; /* for skb_reserve */
826 i = rx_ring->next_to_use;
827 buffer_info = &rx_ring->buffer_info[i];
829 while (cleaned_count--) {
830 skb = buffer_info->skb;
836 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
837 if (unlikely(!skb)) {
838 /* Better luck next round */
839 adapter->alloc_rx_buff_failed++;
843 buffer_info->skb = skb;
845 /* allocate a new page if necessary */
846 if (!buffer_info->page) {
847 buffer_info->page = alloc_page(gfp);
848 if (unlikely(!buffer_info->page)) {
849 adapter->alloc_rx_buff_failed++;
854 if (!buffer_info->dma) {
855 buffer_info->dma = dma_map_page(&pdev->dev,
856 buffer_info->page, 0,
859 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
860 adapter->alloc_rx_buff_failed++;
865 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
866 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
868 if (unlikely(++i == rx_ring->count))
870 buffer_info = &rx_ring->buffer_info[i];
873 if (likely(rx_ring->next_to_use != i)) {
874 rx_ring->next_to_use = i;
875 if (unlikely(i-- == 0))
876 i = (rx_ring->count - 1);
878 /* Force memory writes to complete before letting h/w
879 * know there are new descriptors to fetch. (Only
880 * applicable for weak-ordered memory model archs,
884 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
885 e1000e_update_rdt_wa(rx_ring, i);
887 writel(i, rx_ring->tail);
891 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
894 if (netdev->features & NETIF_F_RXHASH)
895 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
899 * e1000_clean_rx_irq - Send received data up the network stack
900 * @rx_ring: Rx descriptor ring
902 * the return value indicates whether actual cleaning was done, there
903 * is no guarantee that everything was cleaned
905 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
908 struct e1000_adapter *adapter = rx_ring->adapter;
909 struct net_device *netdev = adapter->netdev;
910 struct pci_dev *pdev = adapter->pdev;
911 struct e1000_hw *hw = &adapter->hw;
912 union e1000_rx_desc_extended *rx_desc, *next_rxd;
913 struct e1000_buffer *buffer_info, *next_buffer;
916 int cleaned_count = 0;
917 bool cleaned = false;
918 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
920 i = rx_ring->next_to_clean;
921 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
922 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
923 buffer_info = &rx_ring->buffer_info[i];
925 while (staterr & E1000_RXD_STAT_DD) {
928 if (*work_done >= work_to_do)
931 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
933 skb = buffer_info->skb;
934 buffer_info->skb = NULL;
936 prefetch(skb->data - NET_IP_ALIGN);
939 if (i == rx_ring->count)
941 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
944 next_buffer = &rx_ring->buffer_info[i];
948 dma_unmap_single(&pdev->dev, buffer_info->dma,
949 adapter->rx_buffer_len, DMA_FROM_DEVICE);
950 buffer_info->dma = 0;
952 length = le16_to_cpu(rx_desc->wb.upper.length);
954 /* !EOP means multiple descriptors were used to store a single
955 * packet, if that's the case we need to toss it. In fact, we
956 * need to toss every packet with the EOP bit clear and the
957 * next frame that _does_ have the EOP bit set, as it is by
958 * definition only a frame fragment
960 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
961 adapter->flags2 |= FLAG2_IS_DISCARDING;
963 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
964 /* All receives must fit into a single buffer */
965 e_dbg("Receive packet consumed multiple buffers\n");
967 buffer_info->skb = skb;
968 if (staterr & E1000_RXD_STAT_EOP)
969 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
973 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
974 !(netdev->features & NETIF_F_RXALL))) {
976 buffer_info->skb = skb;
980 /* adjust length to remove Ethernet CRC */
981 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
982 /* If configured to store CRC, don't subtract FCS,
983 * but keep the FCS bytes out of the total_rx_bytes
986 if (netdev->features & NETIF_F_RXFCS)
992 total_rx_bytes += length;
995 /* code added for copybreak, this should improve
996 * performance for small packets with large amounts
997 * of reassembly being done in the stack
999 if (length < copybreak) {
1000 struct sk_buff *new_skb =
1001 napi_alloc_skb(&adapter->napi, length);
1003 skb_copy_to_linear_data_offset(new_skb,
1009 /* save the skb in buffer_info as good */
1010 buffer_info->skb = skb;
1013 /* else just continue with the old one */
1015 /* end copybreak code */
1016 skb_put(skb, length);
1018 /* Receive Checksum Offload */
1019 e1000_rx_checksum(adapter, staterr, skb);
1021 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1023 e1000_receive_skb(adapter, netdev, skb, staterr,
1024 rx_desc->wb.upper.vlan);
1027 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1029 /* return some buffers to hardware, one at a time is too slow */
1030 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1031 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1036 /* use prefetched values */
1038 buffer_info = next_buffer;
1040 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1042 rx_ring->next_to_clean = i;
1044 cleaned_count = e1000_desc_unused(rx_ring);
1046 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1048 adapter->total_rx_bytes += total_rx_bytes;
1049 adapter->total_rx_packets += total_rx_packets;
1053 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1054 struct e1000_buffer *buffer_info,
1057 struct e1000_adapter *adapter = tx_ring->adapter;
1059 if (buffer_info->dma) {
1060 if (buffer_info->mapped_as_page)
1061 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1062 buffer_info->length, DMA_TO_DEVICE);
1064 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1065 buffer_info->length, DMA_TO_DEVICE);
1066 buffer_info->dma = 0;
1068 if (buffer_info->skb) {
1070 dev_kfree_skb_any(buffer_info->skb);
1072 dev_consume_skb_any(buffer_info->skb);
1073 buffer_info->skb = NULL;
1075 buffer_info->time_stamp = 0;
1078 static void e1000_print_hw_hang(struct work_struct *work)
1080 struct e1000_adapter *adapter = container_of(work,
1081 struct e1000_adapter,
1083 struct net_device *netdev = adapter->netdev;
1084 struct e1000_ring *tx_ring = adapter->tx_ring;
1085 unsigned int i = tx_ring->next_to_clean;
1086 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1087 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1088 struct e1000_hw *hw = &adapter->hw;
1089 u16 phy_status, phy_1000t_status, phy_ext_status;
1092 if (test_bit(__E1000_DOWN, &adapter->state))
1095 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1096 /* May be block on write-back, flush and detect again
1097 * flush pending descriptor writebacks to memory
1099 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1100 /* execute the writes immediately */
1102 /* Due to rare timing issues, write to TIDV again to ensure
1103 * the write is successful
1105 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1106 /* execute the writes immediately */
1108 adapter->tx_hang_recheck = true;
1111 adapter->tx_hang_recheck = false;
1113 if (er32(TDH(0)) == er32(TDT(0))) {
1114 e_dbg("false hang detected, ignoring\n");
1118 /* Real hang detected */
1119 netif_stop_queue(netdev);
1121 e1e_rphy(hw, MII_BMSR, &phy_status);
1122 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1123 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1125 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1127 /* detected Hardware unit hang */
1128 e_err("Detected Hardware Unit Hang:\n"
1131 " next_to_use <%x>\n"
1132 " next_to_clean <%x>\n"
1133 "buffer_info[next_to_clean]:\n"
1134 " time_stamp <%lx>\n"
1135 " next_to_watch <%x>\n"
1137 " next_to_watch.status <%x>\n"
1140 "PHY 1000BASE-T Status <%x>\n"
1141 "PHY Extended Status <%x>\n"
1142 "PCI Status <%x>\n",
1143 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1144 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1145 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1146 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1148 e1000e_dump(adapter);
1150 /* Suggest workaround for known h/w issue */
1151 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1152 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1156 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1157 * @work: pointer to work struct
1159 * This work function polls the TSYNCTXCTL valid bit to determine when a
1160 * timestamp has been taken for the current stored skb. The timestamp must
1161 * be for this skb because only one such packet is allowed in the queue.
1163 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1165 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1167 struct e1000_hw *hw = &adapter->hw;
1169 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1170 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1171 struct skb_shared_hwtstamps shhwtstamps;
1174 txstmp = er32(TXSTMPL);
1175 txstmp |= (u64)er32(TXSTMPH) << 32;
1177 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1179 /* Clear the global tx_hwtstamp_skb pointer and force writes
1180 * prior to notifying the stack of a Tx timestamp.
1182 adapter->tx_hwtstamp_skb = NULL;
1183 wmb(); /* force write prior to skb_tstamp_tx */
1185 skb_tstamp_tx(skb, &shhwtstamps);
1186 dev_consume_skb_any(skb);
1187 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1188 + adapter->tx_timeout_factor * HZ)) {
1189 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1190 adapter->tx_hwtstamp_skb = NULL;
1191 adapter->tx_hwtstamp_timeouts++;
1192 e_warn("clearing Tx timestamp hang\n");
1194 /* reschedule to check later */
1195 schedule_work(&adapter->tx_hwtstamp_work);
1200 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1201 * @tx_ring: Tx descriptor ring
1203 * the return value indicates whether actual cleaning was done, there
1204 * is no guarantee that everything was cleaned
1206 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1208 struct e1000_adapter *adapter = tx_ring->adapter;
1209 struct net_device *netdev = adapter->netdev;
1210 struct e1000_hw *hw = &adapter->hw;
1211 struct e1000_tx_desc *tx_desc, *eop_desc;
1212 struct e1000_buffer *buffer_info;
1213 unsigned int i, eop;
1214 unsigned int count = 0;
1215 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1216 unsigned int bytes_compl = 0, pkts_compl = 0;
1218 i = tx_ring->next_to_clean;
1219 eop = tx_ring->buffer_info[i].next_to_watch;
1220 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1222 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1223 (count < tx_ring->count)) {
1224 bool cleaned = false;
1226 dma_rmb(); /* read buffer_info after eop_desc */
1227 for (; !cleaned; count++) {
1228 tx_desc = E1000_TX_DESC(*tx_ring, i);
1229 buffer_info = &tx_ring->buffer_info[i];
1230 cleaned = (i == eop);
1233 total_tx_packets += buffer_info->segs;
1234 total_tx_bytes += buffer_info->bytecount;
1235 if (buffer_info->skb) {
1236 bytes_compl += buffer_info->skb->len;
1241 e1000_put_txbuf(tx_ring, buffer_info, false);
1242 tx_desc->upper.data = 0;
1245 if (i == tx_ring->count)
1249 if (i == tx_ring->next_to_use)
1251 eop = tx_ring->buffer_info[i].next_to_watch;
1252 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1255 tx_ring->next_to_clean = i;
1257 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1259 #define TX_WAKE_THRESHOLD 32
1260 if (count && netif_carrier_ok(netdev) &&
1261 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1262 /* Make sure that anybody stopping the queue after this
1263 * sees the new next_to_clean.
1267 if (netif_queue_stopped(netdev) &&
1268 !(test_bit(__E1000_DOWN, &adapter->state))) {
1269 netif_wake_queue(netdev);
1270 ++adapter->restart_queue;
1274 if (adapter->detect_tx_hung) {
1275 /* Detect a transmit hang in hardware, this serializes the
1276 * check with the clearing of time_stamp and movement of i
1278 adapter->detect_tx_hung = false;
1279 if (tx_ring->buffer_info[i].time_stamp &&
1280 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1281 + (adapter->tx_timeout_factor * HZ)) &&
1282 !(er32(STATUS) & E1000_STATUS_TXOFF))
1283 schedule_work(&adapter->print_hang_task);
1285 adapter->tx_hang_recheck = false;
1287 adapter->total_tx_bytes += total_tx_bytes;
1288 adapter->total_tx_packets += total_tx_packets;
1289 return count < tx_ring->count;
1293 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1294 * @rx_ring: Rx descriptor ring
1296 * the return value indicates whether actual cleaning was done, there
1297 * is no guarantee that everything was cleaned
1299 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1302 struct e1000_adapter *adapter = rx_ring->adapter;
1303 struct e1000_hw *hw = &adapter->hw;
1304 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1305 struct net_device *netdev = adapter->netdev;
1306 struct pci_dev *pdev = adapter->pdev;
1307 struct e1000_buffer *buffer_info, *next_buffer;
1308 struct e1000_ps_page *ps_page;
1309 struct sk_buff *skb;
1311 u32 length, staterr;
1312 int cleaned_count = 0;
1313 bool cleaned = false;
1314 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1316 i = rx_ring->next_to_clean;
1317 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1318 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1319 buffer_info = &rx_ring->buffer_info[i];
1321 while (staterr & E1000_RXD_STAT_DD) {
1322 if (*work_done >= work_to_do)
1325 skb = buffer_info->skb;
1326 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1328 /* in the packet split case this is header only */
1329 prefetch(skb->data - NET_IP_ALIGN);
1332 if (i == rx_ring->count)
1334 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1337 next_buffer = &rx_ring->buffer_info[i];
1341 dma_unmap_single(&pdev->dev, buffer_info->dma,
1342 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1343 buffer_info->dma = 0;
1345 /* see !EOP comment in other Rx routine */
1346 if (!(staterr & E1000_RXD_STAT_EOP))
1347 adapter->flags2 |= FLAG2_IS_DISCARDING;
1349 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1350 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1351 dev_kfree_skb_irq(skb);
1352 if (staterr & E1000_RXD_STAT_EOP)
1353 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1357 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1358 !(netdev->features & NETIF_F_RXALL))) {
1359 dev_kfree_skb_irq(skb);
1363 length = le16_to_cpu(rx_desc->wb.middle.length0);
1366 e_dbg("Last part of the packet spanning multiple descriptors\n");
1367 dev_kfree_skb_irq(skb);
1372 skb_put(skb, length);
1375 /* this looks ugly, but it seems compiler issues make
1376 * it more efficient than reusing j
1378 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1380 /* page alloc/put takes too long and effects small
1381 * packet throughput, so unsplit small packets and
1382 * save the alloc/put only valid in softirq (napi)
1383 * context to call kmap_*
1385 if (l1 && (l1 <= copybreak) &&
1386 ((length + l1) <= adapter->rx_ps_bsize0)) {
1389 ps_page = &buffer_info->ps_pages[0];
1391 /* there is no documentation about how to call
1392 * kmap_atomic, so we can't hold the mapping
1395 dma_sync_single_for_cpu(&pdev->dev,
1399 vaddr = kmap_atomic(ps_page->page);
1400 memcpy(skb_tail_pointer(skb), vaddr, l1);
1401 kunmap_atomic(vaddr);
1402 dma_sync_single_for_device(&pdev->dev,
1407 /* remove the CRC */
1408 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1409 if (!(netdev->features & NETIF_F_RXFCS))
1418 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1419 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1423 ps_page = &buffer_info->ps_pages[j];
1424 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1427 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1428 ps_page->page = NULL;
1430 skb->data_len += length;
1431 skb->truesize += PAGE_SIZE;
1434 /* strip the ethernet crc, problem is we're using pages now so
1435 * this whole operation can get a little cpu intensive
1437 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1438 if (!(netdev->features & NETIF_F_RXFCS))
1439 pskb_trim(skb, skb->len - 4);
1443 total_rx_bytes += skb->len;
1446 e1000_rx_checksum(adapter, staterr, skb);
1448 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1450 if (rx_desc->wb.upper.header_status &
1451 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1452 adapter->rx_hdr_split++;
1454 e1000_receive_skb(adapter, netdev, skb, staterr,
1455 rx_desc->wb.middle.vlan);
1458 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1459 buffer_info->skb = NULL;
1461 /* return some buffers to hardware, one at a time is too slow */
1462 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1463 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1468 /* use prefetched values */
1470 buffer_info = next_buffer;
1472 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1474 rx_ring->next_to_clean = i;
1476 cleaned_count = e1000_desc_unused(rx_ring);
1478 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1480 adapter->total_rx_bytes += total_rx_bytes;
1481 adapter->total_rx_packets += total_rx_packets;
1486 * e1000_consume_page - helper function
1488 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1493 skb->data_len += length;
1494 skb->truesize += PAGE_SIZE;
1498 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1499 * @adapter: board private structure
1501 * the return value indicates whether actual cleaning was done, there
1502 * is no guarantee that everything was cleaned
1504 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1507 struct e1000_adapter *adapter = rx_ring->adapter;
1508 struct net_device *netdev = adapter->netdev;
1509 struct pci_dev *pdev = adapter->pdev;
1510 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1511 struct e1000_buffer *buffer_info, *next_buffer;
1512 u32 length, staterr;
1514 int cleaned_count = 0;
1515 bool cleaned = false;
1516 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1517 struct skb_shared_info *shinfo;
1519 i = rx_ring->next_to_clean;
1520 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1521 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1522 buffer_info = &rx_ring->buffer_info[i];
1524 while (staterr & E1000_RXD_STAT_DD) {
1525 struct sk_buff *skb;
1527 if (*work_done >= work_to_do)
1530 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1532 skb = buffer_info->skb;
1533 buffer_info->skb = NULL;
1536 if (i == rx_ring->count)
1538 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1541 next_buffer = &rx_ring->buffer_info[i];
1545 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1547 buffer_info->dma = 0;
1549 length = le16_to_cpu(rx_desc->wb.upper.length);
1551 /* errors is only valid for DD + EOP descriptors */
1552 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1553 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1554 !(netdev->features & NETIF_F_RXALL)))) {
1555 /* recycle both page and skb */
1556 buffer_info->skb = skb;
1557 /* an error means any chain goes out the window too */
1558 if (rx_ring->rx_skb_top)
1559 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1560 rx_ring->rx_skb_top = NULL;
1563 #define rxtop (rx_ring->rx_skb_top)
1564 if (!(staterr & E1000_RXD_STAT_EOP)) {
1565 /* this descriptor is only the beginning (or middle) */
1567 /* this is the beginning of a chain */
1569 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1572 /* this is the middle of a chain */
1573 shinfo = skb_shinfo(rxtop);
1574 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1575 buffer_info->page, 0,
1577 /* re-use the skb, only consumed the page */
1578 buffer_info->skb = skb;
1580 e1000_consume_page(buffer_info, rxtop, length);
1584 /* end of the chain */
1585 shinfo = skb_shinfo(rxtop);
1586 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1587 buffer_info->page, 0,
1589 /* re-use the current skb, we only consumed the
1592 buffer_info->skb = skb;
1595 e1000_consume_page(buffer_info, skb, length);
1597 /* no chain, got EOP, this buf is the packet
1598 * copybreak to save the put_page/alloc_page
1600 if (length <= copybreak &&
1601 skb_tailroom(skb) >= length) {
1603 vaddr = kmap_atomic(buffer_info->page);
1604 memcpy(skb_tail_pointer(skb), vaddr,
1606 kunmap_atomic(vaddr);
1607 /* re-use the page, so don't erase
1610 skb_put(skb, length);
1612 skb_fill_page_desc(skb, 0,
1613 buffer_info->page, 0,
1615 e1000_consume_page(buffer_info, skb,
1621 /* Receive Checksum Offload */
1622 e1000_rx_checksum(adapter, staterr, skb);
1624 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1626 /* probably a little skewed due to removing CRC */
1627 total_rx_bytes += skb->len;
1630 /* eth type trans needs skb->data to point to something */
1631 if (!pskb_may_pull(skb, ETH_HLEN)) {
1632 e_err("pskb_may_pull failed.\n");
1633 dev_kfree_skb_irq(skb);
1637 e1000_receive_skb(adapter, netdev, skb, staterr,
1638 rx_desc->wb.upper.vlan);
1641 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1643 /* return some buffers to hardware, one at a time is too slow */
1644 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1645 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1650 /* use prefetched values */
1652 buffer_info = next_buffer;
1654 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1656 rx_ring->next_to_clean = i;
1658 cleaned_count = e1000_desc_unused(rx_ring);
1660 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1662 adapter->total_rx_bytes += total_rx_bytes;
1663 adapter->total_rx_packets += total_rx_packets;
1668 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1669 * @rx_ring: Rx descriptor ring
1671 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1673 struct e1000_adapter *adapter = rx_ring->adapter;
1674 struct e1000_buffer *buffer_info;
1675 struct e1000_ps_page *ps_page;
1676 struct pci_dev *pdev = adapter->pdev;
1679 /* Free all the Rx ring sk_buffs */
1680 for (i = 0; i < rx_ring->count; i++) {
1681 buffer_info = &rx_ring->buffer_info[i];
1682 if (buffer_info->dma) {
1683 if (adapter->clean_rx == e1000_clean_rx_irq)
1684 dma_unmap_single(&pdev->dev, buffer_info->dma,
1685 adapter->rx_buffer_len,
1687 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1688 dma_unmap_page(&pdev->dev, buffer_info->dma,
1689 PAGE_SIZE, DMA_FROM_DEVICE);
1690 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1691 dma_unmap_single(&pdev->dev, buffer_info->dma,
1692 adapter->rx_ps_bsize0,
1694 buffer_info->dma = 0;
1697 if (buffer_info->page) {
1698 put_page(buffer_info->page);
1699 buffer_info->page = NULL;
1702 if (buffer_info->skb) {
1703 dev_kfree_skb(buffer_info->skb);
1704 buffer_info->skb = NULL;
1707 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1708 ps_page = &buffer_info->ps_pages[j];
1711 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1714 put_page(ps_page->page);
1715 ps_page->page = NULL;
1719 /* there also may be some cached data from a chained receive */
1720 if (rx_ring->rx_skb_top) {
1721 dev_kfree_skb(rx_ring->rx_skb_top);
1722 rx_ring->rx_skb_top = NULL;
1725 /* Zero out the descriptor ring */
1726 memset(rx_ring->desc, 0, rx_ring->size);
1728 rx_ring->next_to_clean = 0;
1729 rx_ring->next_to_use = 0;
1730 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1733 static void e1000e_downshift_workaround(struct work_struct *work)
1735 struct e1000_adapter *adapter = container_of(work,
1736 struct e1000_adapter,
1739 if (test_bit(__E1000_DOWN, &adapter->state))
1742 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1746 * e1000_intr_msi - Interrupt Handler
1747 * @irq: interrupt number
1748 * @data: pointer to a network interface device structure
1750 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1752 struct net_device *netdev = data;
1753 struct e1000_adapter *adapter = netdev_priv(netdev);
1754 struct e1000_hw *hw = &adapter->hw;
1755 u32 icr = er32(ICR);
1757 /* read ICR disables interrupts using IAM */
1758 if (icr & E1000_ICR_LSC) {
1759 hw->mac.get_link_status = true;
1760 /* ICH8 workaround-- Call gig speed drop workaround on cable
1761 * disconnect (LSC) before accessing any PHY registers
1763 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1764 (!(er32(STATUS) & E1000_STATUS_LU)))
1765 schedule_work(&adapter->downshift_task);
1767 /* 80003ES2LAN workaround-- For packet buffer work-around on
1768 * link down event; disable receives here in the ISR and reset
1769 * adapter in watchdog
1771 if (netif_carrier_ok(netdev) &&
1772 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1773 /* disable receives */
1774 u32 rctl = er32(RCTL);
1776 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1777 adapter->flags |= FLAG_RESTART_NOW;
1779 /* guard against interrupt when we're going down */
1780 if (!test_bit(__E1000_DOWN, &adapter->state))
1781 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1784 /* Reset on uncorrectable ECC error */
1785 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1786 u32 pbeccsts = er32(PBECCSTS);
1788 adapter->corr_errors +=
1789 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1790 adapter->uncorr_errors +=
1791 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1792 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1794 /* Do the reset outside of interrupt context */
1795 schedule_work(&adapter->reset_task);
1797 /* return immediately since reset is imminent */
1801 if (napi_schedule_prep(&adapter->napi)) {
1802 adapter->total_tx_bytes = 0;
1803 adapter->total_tx_packets = 0;
1804 adapter->total_rx_bytes = 0;
1805 adapter->total_rx_packets = 0;
1806 __napi_schedule(&adapter->napi);
1813 * e1000_intr - Interrupt Handler
1814 * @irq: interrupt number
1815 * @data: pointer to a network interface device structure
1817 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1819 struct net_device *netdev = data;
1820 struct e1000_adapter *adapter = netdev_priv(netdev);
1821 struct e1000_hw *hw = &adapter->hw;
1822 u32 rctl, icr = er32(ICR);
1824 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1825 return IRQ_NONE; /* Not our interrupt */
1827 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1828 * not set, then the adapter didn't send an interrupt
1830 if (!(icr & E1000_ICR_INT_ASSERTED))
1833 /* Interrupt Auto-Mask...upon reading ICR,
1834 * interrupts are masked. No need for the
1838 if (icr & E1000_ICR_LSC) {
1839 hw->mac.get_link_status = true;
1840 /* ICH8 workaround-- Call gig speed drop workaround on cable
1841 * disconnect (LSC) before accessing any PHY registers
1843 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1844 (!(er32(STATUS) & E1000_STATUS_LU)))
1845 schedule_work(&adapter->downshift_task);
1847 /* 80003ES2LAN workaround--
1848 * For packet buffer work-around on link down event;
1849 * disable receives here in the ISR and
1850 * reset adapter in watchdog
1852 if (netif_carrier_ok(netdev) &&
1853 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1854 /* disable receives */
1856 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1857 adapter->flags |= FLAG_RESTART_NOW;
1859 /* guard against interrupt when we're going down */
1860 if (!test_bit(__E1000_DOWN, &adapter->state))
1861 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1864 /* Reset on uncorrectable ECC error */
1865 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1866 u32 pbeccsts = er32(PBECCSTS);
1868 adapter->corr_errors +=
1869 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1870 adapter->uncorr_errors +=
1871 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1872 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1874 /* Do the reset outside of interrupt context */
1875 schedule_work(&adapter->reset_task);
1877 /* return immediately since reset is imminent */
1881 if (napi_schedule_prep(&adapter->napi)) {
1882 adapter->total_tx_bytes = 0;
1883 adapter->total_tx_packets = 0;
1884 adapter->total_rx_bytes = 0;
1885 adapter->total_rx_packets = 0;
1886 __napi_schedule(&adapter->napi);
1892 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1894 struct net_device *netdev = data;
1895 struct e1000_adapter *adapter = netdev_priv(netdev);
1896 struct e1000_hw *hw = &adapter->hw;
1897 u32 icr = er32(ICR);
1899 if (icr & adapter->eiac_mask)
1900 ew32(ICS, (icr & adapter->eiac_mask));
1902 if (icr & E1000_ICR_LSC) {
1903 hw->mac.get_link_status = true;
1904 /* guard against interrupt when we're going down */
1905 if (!test_bit(__E1000_DOWN, &adapter->state))
1906 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1909 if (!test_bit(__E1000_DOWN, &adapter->state))
1910 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1915 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1917 struct net_device *netdev = data;
1918 struct e1000_adapter *adapter = netdev_priv(netdev);
1919 struct e1000_hw *hw = &adapter->hw;
1920 struct e1000_ring *tx_ring = adapter->tx_ring;
1922 adapter->total_tx_bytes = 0;
1923 adapter->total_tx_packets = 0;
1925 if (!e1000_clean_tx_irq(tx_ring))
1926 /* Ring was not completely cleaned, so fire another interrupt */
1927 ew32(ICS, tx_ring->ims_val);
1929 if (!test_bit(__E1000_DOWN, &adapter->state))
1930 ew32(IMS, adapter->tx_ring->ims_val);
1935 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1937 struct net_device *netdev = data;
1938 struct e1000_adapter *adapter = netdev_priv(netdev);
1939 struct e1000_ring *rx_ring = adapter->rx_ring;
1941 /* Write the ITR value calculated at the end of the
1942 * previous interrupt.
1944 if (rx_ring->set_itr) {
1945 u32 itr = rx_ring->itr_val ?
1946 1000000000 / (rx_ring->itr_val * 256) : 0;
1948 writel(itr, rx_ring->itr_register);
1949 rx_ring->set_itr = 0;
1952 if (napi_schedule_prep(&adapter->napi)) {
1953 adapter->total_rx_bytes = 0;
1954 adapter->total_rx_packets = 0;
1955 __napi_schedule(&adapter->napi);
1961 * e1000_configure_msix - Configure MSI-X hardware
1963 * e1000_configure_msix sets up the hardware to properly
1964 * generate MSI-X interrupts.
1966 static void e1000_configure_msix(struct e1000_adapter *adapter)
1968 struct e1000_hw *hw = &adapter->hw;
1969 struct e1000_ring *rx_ring = adapter->rx_ring;
1970 struct e1000_ring *tx_ring = adapter->tx_ring;
1972 u32 ctrl_ext, ivar = 0;
1974 adapter->eiac_mask = 0;
1976 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1977 if (hw->mac.type == e1000_82574) {
1978 u32 rfctl = er32(RFCTL);
1980 rfctl |= E1000_RFCTL_ACK_DIS;
1984 /* Configure Rx vector */
1985 rx_ring->ims_val = E1000_IMS_RXQ0;
1986 adapter->eiac_mask |= rx_ring->ims_val;
1987 if (rx_ring->itr_val)
1988 writel(1000000000 / (rx_ring->itr_val * 256),
1989 rx_ring->itr_register);
1991 writel(1, rx_ring->itr_register);
1992 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1994 /* Configure Tx vector */
1995 tx_ring->ims_val = E1000_IMS_TXQ0;
1997 if (tx_ring->itr_val)
1998 writel(1000000000 / (tx_ring->itr_val * 256),
1999 tx_ring->itr_register);
2001 writel(1, tx_ring->itr_register);
2002 adapter->eiac_mask |= tx_ring->ims_val;
2003 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2005 /* set vector for Other Causes, e.g. link changes */
2007 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2008 if (rx_ring->itr_val)
2009 writel(1000000000 / (rx_ring->itr_val * 256),
2010 hw->hw_addr + E1000_EITR_82574(vector));
2012 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2014 /* Cause Tx interrupts on every write back */
2019 /* enable MSI-X PBA support */
2020 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2021 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2022 ew32(CTRL_EXT, ctrl_ext);
2026 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2028 if (adapter->msix_entries) {
2029 pci_disable_msix(adapter->pdev);
2030 kfree(adapter->msix_entries);
2031 adapter->msix_entries = NULL;
2032 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2033 pci_disable_msi(adapter->pdev);
2034 adapter->flags &= ~FLAG_MSI_ENABLED;
2039 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2041 * Attempt to configure interrupts using the best available
2042 * capabilities of the hardware and kernel.
2044 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2049 switch (adapter->int_mode) {
2050 case E1000E_INT_MODE_MSIX:
2051 if (adapter->flags & FLAG_HAS_MSIX) {
2052 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2053 adapter->msix_entries = kcalloc(adapter->num_vectors,
2057 if (adapter->msix_entries) {
2058 struct e1000_adapter *a = adapter;
2060 for (i = 0; i < adapter->num_vectors; i++)
2061 adapter->msix_entries[i].entry = i;
2063 err = pci_enable_msix_range(a->pdev,
2070 /* MSI-X failed, so fall through and try MSI */
2071 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2072 e1000e_reset_interrupt_capability(adapter);
2074 adapter->int_mode = E1000E_INT_MODE_MSI;
2076 case E1000E_INT_MODE_MSI:
2077 if (!pci_enable_msi(adapter->pdev)) {
2078 adapter->flags |= FLAG_MSI_ENABLED;
2080 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2081 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2084 case E1000E_INT_MODE_LEGACY:
2085 /* Don't do anything; this is the system default */
2089 /* store the number of vectors being used */
2090 adapter->num_vectors = 1;
2094 * e1000_request_msix - Initialize MSI-X interrupts
2096 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2099 static int e1000_request_msix(struct e1000_adapter *adapter)
2101 struct net_device *netdev = adapter->netdev;
2102 int err = 0, vector = 0;
2104 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2105 snprintf(adapter->rx_ring->name,
2106 sizeof(adapter->rx_ring->name) - 1,
2107 "%.14s-rx-0", netdev->name);
2109 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2110 err = request_irq(adapter->msix_entries[vector].vector,
2111 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2115 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2116 E1000_EITR_82574(vector);
2117 adapter->rx_ring->itr_val = adapter->itr;
2120 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2121 snprintf(adapter->tx_ring->name,
2122 sizeof(adapter->tx_ring->name) - 1,
2123 "%.14s-tx-0", netdev->name);
2125 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2126 err = request_irq(adapter->msix_entries[vector].vector,
2127 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2131 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2132 E1000_EITR_82574(vector);
2133 adapter->tx_ring->itr_val = adapter->itr;
2136 err = request_irq(adapter->msix_entries[vector].vector,
2137 e1000_msix_other, 0, netdev->name, netdev);
2141 e1000_configure_msix(adapter);
2147 * e1000_request_irq - initialize interrupts
2149 * Attempts to configure interrupts using the best available
2150 * capabilities of the hardware and kernel.
2152 static int e1000_request_irq(struct e1000_adapter *adapter)
2154 struct net_device *netdev = adapter->netdev;
2157 if (adapter->msix_entries) {
2158 err = e1000_request_msix(adapter);
2161 /* fall back to MSI */
2162 e1000e_reset_interrupt_capability(adapter);
2163 adapter->int_mode = E1000E_INT_MODE_MSI;
2164 e1000e_set_interrupt_capability(adapter);
2166 if (adapter->flags & FLAG_MSI_ENABLED) {
2167 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2168 netdev->name, netdev);
2172 /* fall back to legacy interrupt */
2173 e1000e_reset_interrupt_capability(adapter);
2174 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2177 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2178 netdev->name, netdev);
2180 e_err("Unable to allocate interrupt, Error: %d\n", err);
2185 static void e1000_free_irq(struct e1000_adapter *adapter)
2187 struct net_device *netdev = adapter->netdev;
2189 if (adapter->msix_entries) {
2192 free_irq(adapter->msix_entries[vector].vector, netdev);
2195 free_irq(adapter->msix_entries[vector].vector, netdev);
2198 /* Other Causes interrupt vector */
2199 free_irq(adapter->msix_entries[vector].vector, netdev);
2203 free_irq(adapter->pdev->irq, netdev);
2207 * e1000_irq_disable - Mask off interrupt generation on the NIC
2209 static void e1000_irq_disable(struct e1000_adapter *adapter)
2211 struct e1000_hw *hw = &adapter->hw;
2214 if (adapter->msix_entries)
2215 ew32(EIAC_82574, 0);
2218 if (adapter->msix_entries) {
2221 for (i = 0; i < adapter->num_vectors; i++)
2222 synchronize_irq(adapter->msix_entries[i].vector);
2224 synchronize_irq(adapter->pdev->irq);
2229 * e1000_irq_enable - Enable default interrupt generation settings
2231 static void e1000_irq_enable(struct e1000_adapter *adapter)
2233 struct e1000_hw *hw = &adapter->hw;
2235 if (adapter->msix_entries) {
2236 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2237 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2239 } else if (hw->mac.type >= e1000_pch_lpt) {
2240 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2242 ew32(IMS, IMS_ENABLE_MASK);
2248 * e1000e_get_hw_control - get control of the h/w from f/w
2249 * @adapter: address of board private structure
2251 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2252 * For ASF and Pass Through versions of f/w this means that
2253 * the driver is loaded. For AMT version (only with 82573)
2254 * of the f/w this means that the network i/f is open.
2256 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2258 struct e1000_hw *hw = &adapter->hw;
2262 /* Let firmware know the driver has taken over */
2263 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2265 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2266 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2267 ctrl_ext = er32(CTRL_EXT);
2268 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2273 * e1000e_release_hw_control - release control of the h/w to f/w
2274 * @adapter: address of board private structure
2276 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2277 * For ASF and Pass Through versions of f/w this means that the
2278 * driver is no longer loaded. For AMT version (only with 82573) i
2279 * of the f/w this means that the network i/f is closed.
2282 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2284 struct e1000_hw *hw = &adapter->hw;
2288 /* Let firmware taken over control of h/w */
2289 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2291 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2292 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2293 ctrl_ext = er32(CTRL_EXT);
2294 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2299 * e1000_alloc_ring_dma - allocate memory for a ring structure
2301 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2302 struct e1000_ring *ring)
2304 struct pci_dev *pdev = adapter->pdev;
2306 ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
2315 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2316 * @tx_ring: Tx descriptor ring
2318 * Return 0 on success, negative on failure
2320 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2322 struct e1000_adapter *adapter = tx_ring->adapter;
2323 int err = -ENOMEM, size;
2325 size = sizeof(struct e1000_buffer) * tx_ring->count;
2326 tx_ring->buffer_info = vzalloc(size);
2327 if (!tx_ring->buffer_info)
2330 /* round up to nearest 4K */
2331 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2332 tx_ring->size = ALIGN(tx_ring->size, 4096);
2334 err = e1000_alloc_ring_dma(adapter, tx_ring);
2338 tx_ring->next_to_use = 0;
2339 tx_ring->next_to_clean = 0;
2343 vfree(tx_ring->buffer_info);
2344 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2349 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2350 * @rx_ring: Rx descriptor ring
2352 * Returns 0 on success, negative on failure
2354 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2356 struct e1000_adapter *adapter = rx_ring->adapter;
2357 struct e1000_buffer *buffer_info;
2358 int i, size, desc_len, err = -ENOMEM;
2360 size = sizeof(struct e1000_buffer) * rx_ring->count;
2361 rx_ring->buffer_info = vzalloc(size);
2362 if (!rx_ring->buffer_info)
2365 for (i = 0; i < rx_ring->count; i++) {
2366 buffer_info = &rx_ring->buffer_info[i];
2367 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2368 sizeof(struct e1000_ps_page),
2370 if (!buffer_info->ps_pages)
2374 desc_len = sizeof(union e1000_rx_desc_packet_split);
2376 /* Round up to nearest 4K */
2377 rx_ring->size = rx_ring->count * desc_len;
2378 rx_ring->size = ALIGN(rx_ring->size, 4096);
2380 err = e1000_alloc_ring_dma(adapter, rx_ring);
2384 rx_ring->next_to_clean = 0;
2385 rx_ring->next_to_use = 0;
2386 rx_ring->rx_skb_top = NULL;
2391 for (i = 0; i < rx_ring->count; i++) {
2392 buffer_info = &rx_ring->buffer_info[i];
2393 kfree(buffer_info->ps_pages);
2396 vfree(rx_ring->buffer_info);
2397 e_err("Unable to allocate memory for the receive descriptor ring\n");
2402 * e1000_clean_tx_ring - Free Tx Buffers
2403 * @tx_ring: Tx descriptor ring
2405 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2407 struct e1000_adapter *adapter = tx_ring->adapter;
2408 struct e1000_buffer *buffer_info;
2412 for (i = 0; i < tx_ring->count; i++) {
2413 buffer_info = &tx_ring->buffer_info[i];
2414 e1000_put_txbuf(tx_ring, buffer_info, false);
2417 netdev_reset_queue(adapter->netdev);
2418 size = sizeof(struct e1000_buffer) * tx_ring->count;
2419 memset(tx_ring->buffer_info, 0, size);
2421 memset(tx_ring->desc, 0, tx_ring->size);
2423 tx_ring->next_to_use = 0;
2424 tx_ring->next_to_clean = 0;
2428 * e1000e_free_tx_resources - Free Tx Resources per Queue
2429 * @tx_ring: Tx descriptor ring
2431 * Free all transmit software resources
2433 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2435 struct e1000_adapter *adapter = tx_ring->adapter;
2436 struct pci_dev *pdev = adapter->pdev;
2438 e1000_clean_tx_ring(tx_ring);
2440 vfree(tx_ring->buffer_info);
2441 tx_ring->buffer_info = NULL;
2443 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2445 tx_ring->desc = NULL;
2449 * e1000e_free_rx_resources - Free Rx Resources
2450 * @rx_ring: Rx descriptor ring
2452 * Free all receive software resources
2454 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2456 struct e1000_adapter *adapter = rx_ring->adapter;
2457 struct pci_dev *pdev = adapter->pdev;
2460 e1000_clean_rx_ring(rx_ring);
2462 for (i = 0; i < rx_ring->count; i++)
2463 kfree(rx_ring->buffer_info[i].ps_pages);
2465 vfree(rx_ring->buffer_info);
2466 rx_ring->buffer_info = NULL;
2468 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2470 rx_ring->desc = NULL;
2474 * e1000_update_itr - update the dynamic ITR value based on statistics
2475 * @adapter: pointer to adapter
2476 * @itr_setting: current adapter->itr
2477 * @packets: the number of packets during this measurement interval
2478 * @bytes: the number of bytes during this measurement interval
2480 * Stores a new ITR value based on packets and byte
2481 * counts during the last interrupt. The advantage of per interrupt
2482 * computation is faster updates and more accurate ITR for the current
2483 * traffic pattern. Constants in this function were computed
2484 * based on theoretical maximum wire speed and thresholds were set based
2485 * on testing data as well as attempting to minimize response time
2486 * while increasing bulk throughput. This functionality is controlled
2487 * by the InterruptThrottleRate module parameter.
2489 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2491 unsigned int retval = itr_setting;
2496 switch (itr_setting) {
2497 case lowest_latency:
2498 /* handle TSO and jumbo frames */
2499 if (bytes / packets > 8000)
2500 retval = bulk_latency;
2501 else if ((packets < 5) && (bytes > 512))
2502 retval = low_latency;
2504 case low_latency: /* 50 usec aka 20000 ints/s */
2505 if (bytes > 10000) {
2506 /* this if handles the TSO accounting */
2507 if (bytes / packets > 8000)
2508 retval = bulk_latency;
2509 else if ((packets < 10) || ((bytes / packets) > 1200))
2510 retval = bulk_latency;
2511 else if ((packets > 35))
2512 retval = lowest_latency;
2513 } else if (bytes / packets > 2000) {
2514 retval = bulk_latency;
2515 } else if (packets <= 2 && bytes < 512) {
2516 retval = lowest_latency;
2519 case bulk_latency: /* 250 usec aka 4000 ints/s */
2520 if (bytes > 25000) {
2522 retval = low_latency;
2523 } else if (bytes < 6000) {
2524 retval = low_latency;
2532 static void e1000_set_itr(struct e1000_adapter *adapter)
2535 u32 new_itr = adapter->itr;
2537 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2538 if (adapter->link_speed != SPEED_1000) {
2544 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2549 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2550 adapter->total_tx_packets,
2551 adapter->total_tx_bytes);
2552 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2553 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2554 adapter->tx_itr = low_latency;
2556 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2557 adapter->total_rx_packets,
2558 adapter->total_rx_bytes);
2559 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2560 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2561 adapter->rx_itr = low_latency;
2563 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2565 /* counts and packets in update_itr are dependent on these numbers */
2566 switch (current_itr) {
2567 case lowest_latency:
2571 new_itr = 20000; /* aka hwitr = ~200 */
2581 if (new_itr != adapter->itr) {
2582 /* this attempts to bias the interrupt rate towards Bulk
2583 * by adding intermediate steps when interrupt rate is
2586 new_itr = new_itr > adapter->itr ?
2587 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2588 adapter->itr = new_itr;
2589 adapter->rx_ring->itr_val = new_itr;
2590 if (adapter->msix_entries)
2591 adapter->rx_ring->set_itr = 1;
2593 e1000e_write_itr(adapter, new_itr);
2598 * e1000e_write_itr - write the ITR value to the appropriate registers
2599 * @adapter: address of board private structure
2600 * @itr: new ITR value to program
2602 * e1000e_write_itr determines if the adapter is in MSI-X mode
2603 * and, if so, writes the EITR registers with the ITR value.
2604 * Otherwise, it writes the ITR value into the ITR register.
2606 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2608 struct e1000_hw *hw = &adapter->hw;
2609 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2611 if (adapter->msix_entries) {
2614 for (vector = 0; vector < adapter->num_vectors; vector++)
2615 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2622 * e1000_alloc_queues - Allocate memory for all rings
2623 * @adapter: board private structure to initialize
2625 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2627 int size = sizeof(struct e1000_ring);
2629 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2630 if (!adapter->tx_ring)
2632 adapter->tx_ring->count = adapter->tx_ring_count;
2633 adapter->tx_ring->adapter = adapter;
2635 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2636 if (!adapter->rx_ring)
2638 adapter->rx_ring->count = adapter->rx_ring_count;
2639 adapter->rx_ring->adapter = adapter;
2643 e_err("Unable to allocate memory for queues\n");
2644 kfree(adapter->rx_ring);
2645 kfree(adapter->tx_ring);
2650 * e1000e_poll - NAPI Rx polling callback
2651 * @napi: struct associated with this polling callback
2652 * @weight: number of packets driver is allowed to process this poll
2654 static int e1000e_poll(struct napi_struct *napi, int weight)
2656 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2658 struct e1000_hw *hw = &adapter->hw;
2659 struct net_device *poll_dev = adapter->netdev;
2660 int tx_cleaned = 1, work_done = 0;
2662 adapter = netdev_priv(poll_dev);
2664 if (!adapter->msix_entries ||
2665 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2666 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2668 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2673 /* If weight not fully consumed, exit the polling mode */
2674 if (work_done < weight) {
2675 if (adapter->itr_setting & 3)
2676 e1000_set_itr(adapter);
2677 napi_complete_done(napi, work_done);
2678 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2679 if (adapter->msix_entries)
2680 ew32(IMS, adapter->rx_ring->ims_val);
2682 e1000_irq_enable(adapter);
2689 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2690 __always_unused __be16 proto, u16 vid)
2692 struct e1000_adapter *adapter = netdev_priv(netdev);
2693 struct e1000_hw *hw = &adapter->hw;
2696 /* don't update vlan cookie if already programmed */
2697 if ((adapter->hw.mng_cookie.status &
2698 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2699 (vid == adapter->mng_vlan_id))
2702 /* add VID to filter table */
2703 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2704 index = (vid >> 5) & 0x7F;
2705 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2706 vfta |= BIT((vid & 0x1F));
2707 hw->mac.ops.write_vfta(hw, index, vfta);
2710 set_bit(vid, adapter->active_vlans);
2715 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2716 __always_unused __be16 proto, u16 vid)
2718 struct e1000_adapter *adapter = netdev_priv(netdev);
2719 struct e1000_hw *hw = &adapter->hw;
2722 if ((adapter->hw.mng_cookie.status &
2723 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2724 (vid == adapter->mng_vlan_id)) {
2725 /* release control to f/w */
2726 e1000e_release_hw_control(adapter);
2730 /* remove VID from filter table */
2731 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2732 index = (vid >> 5) & 0x7F;
2733 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2734 vfta &= ~BIT((vid & 0x1F));
2735 hw->mac.ops.write_vfta(hw, index, vfta);
2738 clear_bit(vid, adapter->active_vlans);
2744 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2745 * @adapter: board private structure to initialize
2747 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2749 struct net_device *netdev = adapter->netdev;
2750 struct e1000_hw *hw = &adapter->hw;
2753 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2754 /* disable VLAN receive filtering */
2756 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2759 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2760 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2761 adapter->mng_vlan_id);
2762 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2768 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2769 * @adapter: board private structure to initialize
2771 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2773 struct e1000_hw *hw = &adapter->hw;
2776 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2777 /* enable VLAN receive filtering */
2779 rctl |= E1000_RCTL_VFE;
2780 rctl &= ~E1000_RCTL_CFIEN;
2786 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2787 * @adapter: board private structure to initialize
2789 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2791 struct e1000_hw *hw = &adapter->hw;
2794 /* disable VLAN tag insert/strip */
2796 ctrl &= ~E1000_CTRL_VME;
2801 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2802 * @adapter: board private structure to initialize
2804 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2806 struct e1000_hw *hw = &adapter->hw;
2809 /* enable VLAN tag insert/strip */
2811 ctrl |= E1000_CTRL_VME;
2815 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2817 struct net_device *netdev = adapter->netdev;
2818 u16 vid = adapter->hw.mng_cookie.vlan_id;
2819 u16 old_vid = adapter->mng_vlan_id;
2821 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2822 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2823 adapter->mng_vlan_id = vid;
2826 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2827 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2830 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2834 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2836 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2837 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2840 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2842 struct e1000_hw *hw = &adapter->hw;
2843 u32 manc, manc2h, mdef, i, j;
2845 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2850 /* enable receiving management packets to the host. this will probably
2851 * generate destination unreachable messages from the host OS, but
2852 * the packets will be handled on SMBUS
2854 manc |= E1000_MANC_EN_MNG2HOST;
2855 manc2h = er32(MANC2H);
2857 switch (hw->mac.type) {
2859 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2863 /* Check if IPMI pass-through decision filter already exists;
2866 for (i = 0, j = 0; i < 8; i++) {
2867 mdef = er32(MDEF(i));
2869 /* Ignore filters with anything other than IPMI ports */
2870 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2873 /* Enable this decision filter in MANC2H */
2880 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2883 /* Create new decision filter in an empty filter */
2884 for (i = 0, j = 0; i < 8; i++)
2885 if (er32(MDEF(i)) == 0) {
2886 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2887 E1000_MDEF_PORT_664));
2894 e_warn("Unable to create IPMI pass-through filter\n");
2898 ew32(MANC2H, manc2h);
2903 * e1000_configure_tx - Configure Transmit Unit after Reset
2904 * @adapter: board private structure
2906 * Configure the Tx unit of the MAC after a reset.
2908 static void e1000_configure_tx(struct e1000_adapter *adapter)
2910 struct e1000_hw *hw = &adapter->hw;
2911 struct e1000_ring *tx_ring = adapter->tx_ring;
2913 u32 tdlen, tctl, tarc;
2915 /* Setup the HW Tx Head and Tail descriptor pointers */
2916 tdba = tx_ring->dma;
2917 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2918 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2919 ew32(TDBAH(0), (tdba >> 32));
2920 ew32(TDLEN(0), tdlen);
2923 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2924 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2926 writel(0, tx_ring->head);
2927 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2928 e1000e_update_tdt_wa(tx_ring, 0);
2930 writel(0, tx_ring->tail);
2932 /* Set the Tx Interrupt Delay register */
2933 ew32(TIDV, adapter->tx_int_delay);
2934 /* Tx irq moderation */
2935 ew32(TADV, adapter->tx_abs_int_delay);
2937 if (adapter->flags2 & FLAG2_DMA_BURST) {
2938 u32 txdctl = er32(TXDCTL(0));
2940 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2941 E1000_TXDCTL_WTHRESH);
2942 /* set up some performance related parameters to encourage the
2943 * hardware to use the bus more efficiently in bursts, depends
2944 * on the tx_int_delay to be enabled,
2945 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2946 * hthresh = 1 ==> prefetch when one or more available
2947 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2948 * BEWARE: this seems to work but should be considered first if
2949 * there are Tx hangs or other Tx related bugs
2951 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2952 ew32(TXDCTL(0), txdctl);
2954 /* erratum work around: set txdctl the same for both queues */
2955 ew32(TXDCTL(1), er32(TXDCTL(0)));
2957 /* Program the Transmit Control Register */
2959 tctl &= ~E1000_TCTL_CT;
2960 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2961 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2963 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2964 tarc = er32(TARC(0));
2965 /* set the speed mode bit, we'll clear it if we're not at
2966 * gigabit link later
2968 #define SPEED_MODE_BIT BIT(21)
2969 tarc |= SPEED_MODE_BIT;
2970 ew32(TARC(0), tarc);
2973 /* errata: program both queues to unweighted RR */
2974 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2975 tarc = er32(TARC(0));
2977 ew32(TARC(0), tarc);
2978 tarc = er32(TARC(1));
2980 ew32(TARC(1), tarc);
2983 /* Setup Transmit Descriptor Settings for eop descriptor */
2984 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2986 /* only set IDE if we are delaying interrupts using the timers */
2987 if (adapter->tx_int_delay)
2988 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2990 /* enable Report Status bit */
2991 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2995 hw->mac.ops.config_collision_dist(hw);
2997 /* SPT and KBL Si errata workaround to avoid data corruption */
2998 if (hw->mac.type == e1000_pch_spt) {
3001 reg_val = er32(IOSFPC);
3002 reg_val |= E1000_RCTL_RDMTS_HEX;
3003 ew32(IOSFPC, reg_val);
3005 reg_val = er32(TARC(0));
3006 /* SPT and KBL Si errata workaround to avoid Tx hang.
3007 * Dropping the number of outstanding requests from
3008 * 3 to 2 in order to avoid a buffer overrun.
3010 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3011 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3012 ew32(TARC(0), reg_val);
3017 * e1000_setup_rctl - configure the receive control registers
3018 * @adapter: Board private structure
3020 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3021 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3022 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3024 struct e1000_hw *hw = &adapter->hw;
3028 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3029 * If jumbo frames not set, program related MAC/PHY registers
3032 if (hw->mac.type >= e1000_pch2lan) {
3035 if (adapter->netdev->mtu > ETH_DATA_LEN)
3036 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3038 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3041 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3044 /* Program MC offset vector base */
3046 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3047 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3048 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3049 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3051 /* Do not Store bad packets */
3052 rctl &= ~E1000_RCTL_SBP;
3054 /* Enable Long Packet receive */
3055 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3056 rctl &= ~E1000_RCTL_LPE;
3058 rctl |= E1000_RCTL_LPE;
3060 /* Some systems expect that the CRC is included in SMBUS traffic. The
3061 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3062 * host memory when this is enabled
3064 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3065 rctl |= E1000_RCTL_SECRC;
3067 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3068 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3071 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3074 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3076 e1e_rphy(hw, 22, &phy_data);
3078 phy_data |= BIT(14);
3079 e1e_wphy(hw, 0x10, 0x2823);
3080 e1e_wphy(hw, 0x11, 0x0003);
3081 e1e_wphy(hw, 22, phy_data);
3084 /* Setup buffer sizes */
3085 rctl &= ~E1000_RCTL_SZ_4096;
3086 rctl |= E1000_RCTL_BSEX;
3087 switch (adapter->rx_buffer_len) {
3090 rctl |= E1000_RCTL_SZ_2048;
3091 rctl &= ~E1000_RCTL_BSEX;
3094 rctl |= E1000_RCTL_SZ_4096;
3097 rctl |= E1000_RCTL_SZ_8192;
3100 rctl |= E1000_RCTL_SZ_16384;
3104 /* Enable Extended Status in all Receive Descriptors */
3105 rfctl = er32(RFCTL);
3106 rfctl |= E1000_RFCTL_EXTEN;
3109 /* 82571 and greater support packet-split where the protocol
3110 * header is placed in skb->data and the packet data is
3111 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3112 * In the case of a non-split, skb->data is linearly filled,
3113 * followed by the page buffers. Therefore, skb->data is
3114 * sized to hold the largest protocol header.
3116 * allocations using alloc_page take too long for regular MTU
3117 * so only enable packet split for jumbo frames
3119 * Using pages when the page size is greater than 16k wastes
3120 * a lot of memory, since we allocate 3 pages at all times
3123 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3124 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3125 adapter->rx_ps_pages = pages;
3127 adapter->rx_ps_pages = 0;
3129 if (adapter->rx_ps_pages) {
3132 /* Enable Packet split descriptors */
3133 rctl |= E1000_RCTL_DTYP_PS;
3135 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3137 switch (adapter->rx_ps_pages) {
3139 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3142 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3145 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3149 ew32(PSRCTL, psrctl);
3152 /* This is useful for sniffing bad packets. */
3153 if (adapter->netdev->features & NETIF_F_RXALL) {
3154 /* UPE and MPE will be handled by normal PROMISC logic
3155 * in e1000e_set_rx_mode
3157 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3158 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3159 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3161 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3162 E1000_RCTL_DPF | /* Allow filtered pause */
3163 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3164 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3165 * and that breaks VLANs.
3170 /* just started the receive unit, no need to restart */
3171 adapter->flags &= ~FLAG_RESTART_NOW;
3175 * e1000_configure_rx - Configure Receive Unit after Reset
3176 * @adapter: board private structure
3178 * Configure the Rx unit of the MAC after a reset.
3180 static void e1000_configure_rx(struct e1000_adapter *adapter)
3182 struct e1000_hw *hw = &adapter->hw;
3183 struct e1000_ring *rx_ring = adapter->rx_ring;
3185 u32 rdlen, rctl, rxcsum, ctrl_ext;
3187 if (adapter->rx_ps_pages) {
3188 /* this is a 32 byte descriptor */
3189 rdlen = rx_ring->count *
3190 sizeof(union e1000_rx_desc_packet_split);
3191 adapter->clean_rx = e1000_clean_rx_irq_ps;
3192 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3193 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3194 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3195 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3196 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3198 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3199 adapter->clean_rx = e1000_clean_rx_irq;
3200 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3203 /* disable receives while setting up the descriptors */
3205 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3206 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3208 usleep_range(10000, 20000);
3210 if (adapter->flags2 & FLAG2_DMA_BURST) {
3211 /* set the writeback threshold (only takes effect if the RDTR
3212 * is set). set GRAN=1 and write back up to 0x4 worth, and
3213 * enable prefetching of 0x20 Rx descriptors
3219 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3220 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3223 /* set the Receive Delay Timer Register */
3224 ew32(RDTR, adapter->rx_int_delay);
3226 /* irq moderation */
3227 ew32(RADV, adapter->rx_abs_int_delay);
3228 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3229 e1000e_write_itr(adapter, adapter->itr);
3231 ctrl_ext = er32(CTRL_EXT);
3232 /* Auto-Mask interrupts upon ICR access */
3233 ctrl_ext |= E1000_CTRL_EXT_IAME;
3234 ew32(IAM, 0xffffffff);
3235 ew32(CTRL_EXT, ctrl_ext);
3238 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3239 * the Base and Length of the Rx Descriptor Ring
3241 rdba = rx_ring->dma;
3242 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3243 ew32(RDBAH(0), (rdba >> 32));
3244 ew32(RDLEN(0), rdlen);
3247 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3248 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3250 writel(0, rx_ring->head);
3251 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3252 e1000e_update_rdt_wa(rx_ring, 0);
3254 writel(0, rx_ring->tail);
3256 /* Enable Receive Checksum Offload for TCP and UDP */
3257 rxcsum = er32(RXCSUM);
3258 if (adapter->netdev->features & NETIF_F_RXCSUM)
3259 rxcsum |= E1000_RXCSUM_TUOFL;
3261 rxcsum &= ~E1000_RXCSUM_TUOFL;
3262 ew32(RXCSUM, rxcsum);
3264 /* With jumbo frames, excessive C-state transition latencies result
3265 * in dropped transactions.
3267 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3269 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3270 adapter->max_frame_size) * 8 / 1000;
3272 if (adapter->flags & FLAG_IS_ICH) {
3273 u32 rxdctl = er32(RXDCTL(0));
3275 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3278 dev_info(&adapter->pdev->dev,
3279 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3280 pm_qos_update_request(&adapter->pm_qos_req, lat);
3282 pm_qos_update_request(&adapter->pm_qos_req,
3283 PM_QOS_DEFAULT_VALUE);
3286 /* Enable Receives */
3291 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3292 * @netdev: network interface device structure
3294 * Writes multicast address list to the MTA hash table.
3295 * Returns: -ENOMEM on failure
3296 * 0 on no addresses written
3297 * X on writing X addresses to MTA
3299 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3301 struct e1000_adapter *adapter = netdev_priv(netdev);
3302 struct e1000_hw *hw = &adapter->hw;
3303 struct netdev_hw_addr *ha;
3307 if (netdev_mc_empty(netdev)) {
3308 /* nothing to program, so clear mc list */
3309 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3313 mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3317 /* update_mc_addr_list expects a packed array of only addresses. */
3319 netdev_for_each_mc_addr(ha, netdev)
3320 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3322 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3325 return netdev_mc_count(netdev);
3329 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3330 * @netdev: network interface device structure
3332 * Writes unicast address list to the RAR table.
3333 * Returns: -ENOMEM on failure/insufficient address space
3334 * 0 on no addresses written
3335 * X on writing X addresses to the RAR table
3337 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3339 struct e1000_adapter *adapter = netdev_priv(netdev);
3340 struct e1000_hw *hw = &adapter->hw;
3341 unsigned int rar_entries;
3344 rar_entries = hw->mac.ops.rar_get_count(hw);
3346 /* save a rar entry for our hardware address */
3349 /* save a rar entry for the LAA workaround */
3350 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3353 /* return ENOMEM indicating insufficient memory for addresses */
3354 if (netdev_uc_count(netdev) > rar_entries)
3357 if (!netdev_uc_empty(netdev) && rar_entries) {
3358 struct netdev_hw_addr *ha;
3360 /* write the addresses in reverse order to avoid write
3363 netdev_for_each_uc_addr(ha, netdev) {
3368 ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3375 /* zero out the remaining RAR entries not used above */
3376 for (; rar_entries > 0; rar_entries--) {
3377 ew32(RAH(rar_entries), 0);
3378 ew32(RAL(rar_entries), 0);
3386 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3387 * @netdev: network interface device structure
3389 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3390 * address list or the network interface flags are updated. This routine is
3391 * responsible for configuring the hardware for proper unicast, multicast,
3392 * promiscuous mode, and all-multi behavior.
3394 static void e1000e_set_rx_mode(struct net_device *netdev)
3396 struct e1000_adapter *adapter = netdev_priv(netdev);
3397 struct e1000_hw *hw = &adapter->hw;
3400 if (pm_runtime_suspended(netdev->dev.parent))
3403 /* Check for Promiscuous and All Multicast modes */
3406 /* clear the affected bits */
3407 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3409 if (netdev->flags & IFF_PROMISC) {
3410 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3411 /* Do not hardware filter VLANs in promisc mode */
3412 e1000e_vlan_filter_disable(adapter);
3416 if (netdev->flags & IFF_ALLMULTI) {
3417 rctl |= E1000_RCTL_MPE;
3419 /* Write addresses to the MTA, if the attempt fails
3420 * then we should just turn on promiscuous mode so
3421 * that we can at least receive multicast traffic
3423 count = e1000e_write_mc_addr_list(netdev);
3425 rctl |= E1000_RCTL_MPE;
3427 e1000e_vlan_filter_enable(adapter);
3428 /* Write addresses to available RAR registers, if there is not
3429 * sufficient space to store all the addresses then enable
3430 * unicast promiscuous mode
3432 count = e1000e_write_uc_addr_list(netdev);
3434 rctl |= E1000_RCTL_UPE;
3439 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3440 e1000e_vlan_strip_enable(adapter);
3442 e1000e_vlan_strip_disable(adapter);
3445 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3447 struct e1000_hw *hw = &adapter->hw;
3452 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3453 for (i = 0; i < 10; i++)
3454 ew32(RSSRK(i), rss_key[i]);
3456 /* Direct all traffic to queue 0 */
3457 for (i = 0; i < 32; i++)
3460 /* Disable raw packet checksumming so that RSS hash is placed in
3461 * descriptor on writeback.
3463 rxcsum = er32(RXCSUM);
3464 rxcsum |= E1000_RXCSUM_PCSD;
3466 ew32(RXCSUM, rxcsum);
3468 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3469 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3470 E1000_MRQC_RSS_FIELD_IPV6 |
3471 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3472 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3478 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3479 * @adapter: board private structure
3480 * @timinca: pointer to returned time increment attributes
3482 * Get attributes for incrementing the System Time Register SYSTIML/H at
3483 * the default base frequency, and set the cyclecounter shift value.
3485 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3487 struct e1000_hw *hw = &adapter->hw;
3488 u32 incvalue, incperiod, shift;
3490 /* Make sure clock is enabled on I217/I218/I219 before checking
3493 if ((hw->mac.type >= e1000_pch_lpt) &&
3494 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3495 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3496 u32 fextnvm7 = er32(FEXTNVM7);
3498 if (!(fextnvm7 & BIT(0))) {
3499 ew32(FEXTNVM7, fextnvm7 | BIT(0));
3504 switch (hw->mac.type) {
3506 /* Stable 96MHz frequency */
3507 incperiod = INCPERIOD_96MHZ;
3508 incvalue = INCVALUE_96MHZ;
3509 shift = INCVALUE_SHIFT_96MHZ;
3510 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3513 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3514 /* Stable 96MHz frequency */
3515 incperiod = INCPERIOD_96MHZ;
3516 incvalue = INCVALUE_96MHZ;
3517 shift = INCVALUE_SHIFT_96MHZ;
3518 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3520 /* Stable 25MHz frequency */
3521 incperiod = INCPERIOD_25MHZ;
3522 incvalue = INCVALUE_25MHZ;
3523 shift = INCVALUE_SHIFT_25MHZ;
3524 adapter->cc.shift = shift;
3528 /* Stable 24MHz frequency */
3529 incperiod = INCPERIOD_24MHZ;
3530 incvalue = INCVALUE_24MHZ;
3531 shift = INCVALUE_SHIFT_24MHZ;
3532 adapter->cc.shift = shift;
3535 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3536 /* Stable 24MHz frequency */
3537 incperiod = INCPERIOD_24MHZ;
3538 incvalue = INCVALUE_24MHZ;
3539 shift = INCVALUE_SHIFT_24MHZ;
3540 adapter->cc.shift = shift;
3542 /* Stable 38400KHz frequency */
3543 incperiod = INCPERIOD_38400KHZ;
3544 incvalue = INCVALUE_38400KHZ;
3545 shift = INCVALUE_SHIFT_38400KHZ;
3546 adapter->cc.shift = shift;
3551 /* Stable 25MHz frequency */
3552 incperiod = INCPERIOD_25MHZ;
3553 incvalue = INCVALUE_25MHZ;
3554 shift = INCVALUE_SHIFT_25MHZ;
3555 adapter->cc.shift = shift;
3561 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3562 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3568 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3569 * @adapter: board private structure
3571 * Outgoing time stamping can be enabled and disabled. Play nice and
3572 * disable it when requested, although it shouldn't cause any overhead
3573 * when no packet needs it. At most one packet in the queue may be
3574 * marked for time stamping, otherwise it would be impossible to tell
3575 * for sure to which packet the hardware time stamp belongs.
3577 * Incoming time stamping has to be configured via the hardware filters.
3578 * Not all combinations are supported, in particular event type has to be
3579 * specified. Matching the kind of event packet is not supported, with the
3580 * exception of "all V2 events regardless of level 2 or 4".
3582 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3583 struct hwtstamp_config *config)
3585 struct e1000_hw *hw = &adapter->hw;
3586 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3587 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3594 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3597 /* flags reserved for future extensions - must be zero */
3601 switch (config->tx_type) {
3602 case HWTSTAMP_TX_OFF:
3605 case HWTSTAMP_TX_ON:
3611 switch (config->rx_filter) {
3612 case HWTSTAMP_FILTER_NONE:
3615 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3616 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3617 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3620 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3621 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3622 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3625 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3626 /* Also time stamps V2 L2 Path Delay Request/Response */
3627 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3628 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3631 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3632 /* Also time stamps V2 L2 Path Delay Request/Response. */
3633 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3634 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3637 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3638 /* Hardware cannot filter just V2 L4 Sync messages;
3639 * fall-through to V2 (both L2 and L4) Sync.
3641 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3642 /* Also time stamps V2 Path Delay Request/Response. */
3643 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3644 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3648 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3649 /* Hardware cannot filter just V2 L4 Delay Request messages;
3650 * fall-through to V2 (both L2 and L4) Delay Request.
3652 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3653 /* Also time stamps V2 Path Delay Request/Response. */
3654 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3655 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3659 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3660 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3661 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3662 * fall-through to all V2 (both L2 and L4) Events.
3664 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3665 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3666 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3670 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3671 /* For V1, the hardware can only filter Sync messages or
3672 * Delay Request messages but not both so fall-through to
3673 * time stamp all packets.
3675 case HWTSTAMP_FILTER_NTP_ALL:
3676 case HWTSTAMP_FILTER_ALL:
3679 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3680 config->rx_filter = HWTSTAMP_FILTER_ALL;
3686 adapter->hwtstamp_config = *config;
3688 /* enable/disable Tx h/w time stamping */
3689 regval = er32(TSYNCTXCTL);
3690 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3691 regval |= tsync_tx_ctl;
3692 ew32(TSYNCTXCTL, regval);
3693 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3694 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3695 e_err("Timesync Tx Control register not set as expected\n");
3699 /* enable/disable Rx h/w time stamping */
3700 regval = er32(TSYNCRXCTL);
3701 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3702 regval |= tsync_rx_ctl;
3703 ew32(TSYNCRXCTL, regval);
3704 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3705 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3706 (regval & (E1000_TSYNCRXCTL_ENABLED |
3707 E1000_TSYNCRXCTL_TYPE_MASK))) {
3708 e_err("Timesync Rx Control register not set as expected\n");
3712 /* L2: define ethertype filter for time stamped packets */
3714 rxmtrl |= ETH_P_1588;
3716 /* define which PTP packets get time stamped */
3717 ew32(RXMTRL, rxmtrl);
3719 /* Filter by destination port */
3721 rxudp = PTP_EV_PORT;
3722 cpu_to_be16s(&rxudp);
3728 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3736 * e1000_configure - configure the hardware for Rx and Tx
3737 * @adapter: private board structure
3739 static void e1000_configure(struct e1000_adapter *adapter)
3741 struct e1000_ring *rx_ring = adapter->rx_ring;
3743 e1000e_set_rx_mode(adapter->netdev);
3745 e1000_restore_vlan(adapter);
3746 e1000_init_manageability_pt(adapter);
3748 e1000_configure_tx(adapter);
3750 if (adapter->netdev->features & NETIF_F_RXHASH)
3751 e1000e_setup_rss_hash(adapter);
3752 e1000_setup_rctl(adapter);
3753 e1000_configure_rx(adapter);
3754 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3758 * e1000e_power_up_phy - restore link in case the phy was powered down
3759 * @adapter: address of board private structure
3761 * The phy may be powered down to save power and turn off link when the
3762 * driver is unloaded and wake on lan is not enabled (among others)
3763 * *** this routine MUST be followed by a call to e1000e_reset ***
3765 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3767 if (adapter->hw.phy.ops.power_up)
3768 adapter->hw.phy.ops.power_up(&adapter->hw);
3770 adapter->hw.mac.ops.setup_link(&adapter->hw);
3774 * e1000_power_down_phy - Power down the PHY
3776 * Power down the PHY so no link is implied when interface is down.
3777 * The PHY cannot be powered down if management or WoL is active.
3779 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3781 if (adapter->hw.phy.ops.power_down)
3782 adapter->hw.phy.ops.power_down(&adapter->hw);
3786 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3788 * We want to clear all pending descriptors from the TX ring.
3789 * zeroing happens when the HW reads the regs. We assign the ring itself as
3790 * the data of the next descriptor. We don't care about the data we are about
3793 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3795 struct e1000_hw *hw = &adapter->hw;
3796 struct e1000_ring *tx_ring = adapter->tx_ring;
3797 struct e1000_tx_desc *tx_desc = NULL;
3798 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3802 ew32(TCTL, tctl | E1000_TCTL_EN);
3804 BUG_ON(tdt != tx_ring->next_to_use);
3805 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3806 tx_desc->buffer_addr = tx_ring->dma;
3808 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3809 tx_desc->upper.data = 0;
3810 /* flush descriptors to memory before notifying the HW */
3812 tx_ring->next_to_use++;
3813 if (tx_ring->next_to_use == tx_ring->count)
3814 tx_ring->next_to_use = 0;
3815 ew32(TDT(0), tx_ring->next_to_use);
3817 usleep_range(200, 250);
3821 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3823 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3825 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3828 struct e1000_hw *hw = &adapter->hw;
3831 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3833 usleep_range(100, 150);
3835 rxdctl = er32(RXDCTL(0));
3836 /* zero the lower 14 bits (prefetch and host thresholds) */
3837 rxdctl &= 0xffffc000;
3839 /* update thresholds: prefetch threshold to 31, host threshold to 1
3840 * and make sure the granularity is "descriptors" and not "cache lines"
3842 rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3844 ew32(RXDCTL(0), rxdctl);
3845 /* momentarily enable the RX ring for the changes to take effect */
3846 ew32(RCTL, rctl | E1000_RCTL_EN);
3848 usleep_range(100, 150);
3849 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3853 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3855 * In i219, the descriptor rings must be emptied before resetting the HW
3856 * or before changing the device state to D3 during runtime (runtime PM).
3858 * Failure to do this will cause the HW to enter a unit hang state which can
3859 * only be released by PCI reset on the device
3863 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3866 u32 fext_nvm11, tdlen;
3867 struct e1000_hw *hw = &adapter->hw;
3869 /* First, disable MULR fix in FEXTNVM11 */
3870 fext_nvm11 = er32(FEXTNVM11);
3871 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3872 ew32(FEXTNVM11, fext_nvm11);
3873 /* do nothing if we're not in faulty state, or if the queue is empty */
3874 tdlen = er32(TDLEN(0));
3875 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3877 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3879 e1000_flush_tx_ring(adapter);
3880 /* recheck, maybe the fault is caused by the rx ring */
3881 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3883 if (hang_state & FLUSH_DESC_REQUIRED)
3884 e1000_flush_rx_ring(adapter);
3888 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3889 * @adapter: board private structure
3891 * When the MAC is reset, all hardware bits for timesync will be reset to the
3892 * default values. This function will restore the settings last in place.
3893 * Since the clock SYSTIME registers are reset, we will simply restore the
3894 * cyclecounter to the kernel real clock time.
3896 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3898 struct ptp_clock_info *info = &adapter->ptp_clock_info;
3899 struct e1000_hw *hw = &adapter->hw;
3900 unsigned long flags;
3904 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3907 if (info->adjfreq) {
3908 /* restore the previous ptp frequency delta */
3909 ret_val = info->adjfreq(info, adapter->ptp_delta);
3911 /* set the default base frequency if no adjustment possible */
3912 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3914 ew32(TIMINCA, timinca);
3918 dev_warn(&adapter->pdev->dev,
3919 "Failed to restore TIMINCA clock rate delta: %d\n",
3924 /* reset the systim ns time counter */
3925 spin_lock_irqsave(&adapter->systim_lock, flags);
3926 timecounter_init(&adapter->tc, &adapter->cc,
3927 ktime_to_ns(ktime_get_real()));
3928 spin_unlock_irqrestore(&adapter->systim_lock, flags);
3930 /* restore the previous hwtstamp configuration settings */
3931 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3935 * e1000e_reset - bring the hardware into a known good state
3937 * This function boots the hardware and enables some settings that
3938 * require a configuration cycle of the hardware - those cannot be
3939 * set/changed during runtime. After reset the device needs to be
3940 * properly configured for Rx, Tx etc.
3942 void e1000e_reset(struct e1000_adapter *adapter)
3944 struct e1000_mac_info *mac = &adapter->hw.mac;
3945 struct e1000_fc_info *fc = &adapter->hw.fc;
3946 struct e1000_hw *hw = &adapter->hw;
3947 u32 tx_space, min_tx_space, min_rx_space;
3948 u32 pba = adapter->pba;
3951 /* reset Packet Buffer Allocation to default */
3954 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3955 /* To maintain wire speed transmits, the Tx FIFO should be
3956 * large enough to accommodate two full transmit packets,
3957 * rounded up to the next 1KB and expressed in KB. Likewise,
3958 * the Rx FIFO should be large enough to accommodate at least
3959 * one full receive packet and is similarly rounded up and
3963 /* upper 16 bits has Tx packet buffer allocation size in KB */
3964 tx_space = pba >> 16;
3965 /* lower 16 bits has Rx packet buffer allocation size in KB */
3967 /* the Tx fifo also stores 16 bytes of information about the Tx
3968 * but don't include ethernet FCS because hardware appends it
3970 min_tx_space = (adapter->max_frame_size +
3971 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3972 min_tx_space = ALIGN(min_tx_space, 1024);
3973 min_tx_space >>= 10;
3974 /* software strips receive CRC, so leave room for it */
3975 min_rx_space = adapter->max_frame_size;
3976 min_rx_space = ALIGN(min_rx_space, 1024);
3977 min_rx_space >>= 10;
3979 /* If current Tx allocation is less than the min Tx FIFO size,
3980 * and the min Tx FIFO size is less than the current Rx FIFO
3981 * allocation, take space away from current Rx allocation
3983 if ((tx_space < min_tx_space) &&
3984 ((min_tx_space - tx_space) < pba)) {
3985 pba -= min_tx_space - tx_space;
3987 /* if short on Rx space, Rx wins and must trump Tx
3990 if (pba < min_rx_space)
3997 /* flow control settings
3999 * The high water mark must be low enough to fit one full frame
4000 * (or the size used for early receive) above it in the Rx FIFO.
4001 * Set it to the lower of:
4002 * - 90% of the Rx FIFO size, and
4003 * - the full Rx FIFO size minus one full frame
4005 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4006 fc->pause_time = 0xFFFF;
4008 fc->pause_time = E1000_FC_PAUSE_TIME;
4009 fc->send_xon = true;
4010 fc->current_mode = fc->requested_mode;
4012 switch (hw->mac.type) {
4014 case e1000_ich10lan:
4015 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4018 fc->high_water = 0x2800;
4019 fc->low_water = fc->high_water - 8;
4024 hwm = min(((pba << 10) * 9 / 10),
4025 ((pba << 10) - adapter->max_frame_size));
4027 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4028 fc->low_water = fc->high_water - 8;
4031 /* Workaround PCH LOM adapter hangs with certain network
4032 * loads. If hangs persist, try disabling Tx flow control.
4034 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4035 fc->high_water = 0x3500;
4036 fc->low_water = 0x1500;
4038 fc->high_water = 0x5000;
4039 fc->low_water = 0x3000;
4041 fc->refresh_time = 0x1000;
4047 fc->refresh_time = 0x0400;
4049 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4050 fc->high_water = 0x05C20;
4051 fc->low_water = 0x05048;
4052 fc->pause_time = 0x0650;
4058 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4059 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4063 /* Alignment of Tx data is on an arbitrary byte boundary with the
4064 * maximum size per Tx descriptor limited only to the transmit
4065 * allocation of the packet buffer minus 96 bytes with an upper
4066 * limit of 24KB due to receive synchronization limitations.
4068 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4071 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4072 * fit in receive buffer.
4074 if (adapter->itr_setting & 0x3) {
4075 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4076 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4077 dev_info(&adapter->pdev->dev,
4078 "Interrupt Throttle Rate off\n");
4079 adapter->flags2 |= FLAG2_DISABLE_AIM;
4080 e1000e_write_itr(adapter, 0);
4082 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4083 dev_info(&adapter->pdev->dev,
4084 "Interrupt Throttle Rate on\n");
4085 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4086 adapter->itr = 20000;
4087 e1000e_write_itr(adapter, adapter->itr);
4091 if (hw->mac.type >= e1000_pch_spt)
4092 e1000_flush_desc_rings(adapter);
4093 /* Allow time for pending master requests to run */
4094 mac->ops.reset_hw(hw);
4096 /* For parts with AMT enabled, let the firmware know
4097 * that the network interface is in control
4099 if (adapter->flags & FLAG_HAS_AMT)
4100 e1000e_get_hw_control(adapter);
4104 if (mac->ops.init_hw(hw))
4105 e_err("Hardware Error\n");
4107 e1000_update_mng_vlan(adapter);
4109 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4110 ew32(VET, ETH_P_8021Q);
4112 e1000e_reset_adaptive(hw);
4114 /* restore systim and hwtstamp settings */
4115 e1000e_systim_reset(adapter);
4117 /* Set EEE advertisement as appropriate */
4118 if (adapter->flags2 & FLAG2_HAS_EEE) {
4122 switch (hw->phy.type) {
4123 case e1000_phy_82579:
4124 adv_addr = I82579_EEE_ADVERTISEMENT;
4126 case e1000_phy_i217:
4127 adv_addr = I217_EEE_ADVERTISEMENT;
4130 dev_err(&adapter->pdev->dev,
4131 "Invalid PHY type setting EEE advertisement\n");
4135 ret_val = hw->phy.ops.acquire(hw);
4137 dev_err(&adapter->pdev->dev,
4138 "EEE advertisement - unable to acquire PHY\n");
4142 e1000_write_emi_reg_locked(hw, adv_addr,
4143 hw->dev_spec.ich8lan.eee_disable ?
4144 0 : adapter->eee_advert);
4146 hw->phy.ops.release(hw);
4149 if (!netif_running(adapter->netdev) &&
4150 !test_bit(__E1000_TESTING, &adapter->state))
4151 e1000_power_down_phy(adapter);
4153 e1000_get_phy_info(hw);
4155 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4156 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4158 /* speed up time to link by disabling smart power down, ignore
4159 * the return value of this function because there is nothing
4160 * different we would do if it failed
4162 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4163 phy_data &= ~IGP02E1000_PM_SPD;
4164 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4166 if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4169 /* Fextnvm7 @ 0xe4[2] = 1 */
4170 reg = er32(FEXTNVM7);
4171 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4172 ew32(FEXTNVM7, reg);
4173 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4174 reg = er32(FEXTNVM9);
4175 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4176 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4177 ew32(FEXTNVM9, reg);
4183 * e1000e_trigger_lsc - trigger an LSC interrupt
4186 * Fire a link status change interrupt to start the watchdog.
4188 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4190 struct e1000_hw *hw = &adapter->hw;
4192 if (adapter->msix_entries)
4193 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4195 ew32(ICS, E1000_ICS_LSC);
4198 void e1000e_up(struct e1000_adapter *adapter)
4200 /* hardware has been reset, we need to reload some things */
4201 e1000_configure(adapter);
4203 clear_bit(__E1000_DOWN, &adapter->state);
4205 if (adapter->msix_entries)
4206 e1000_configure_msix(adapter);
4207 e1000_irq_enable(adapter);
4209 /* Tx queue started by watchdog timer when link is up */
4211 e1000e_trigger_lsc(adapter);
4214 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4216 struct e1000_hw *hw = &adapter->hw;
4218 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4221 /* flush pending descriptor writebacks to memory */
4222 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4223 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4225 /* execute the writes immediately */
4228 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4229 * write is successful
4231 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4232 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4234 /* execute the writes immediately */
4238 static void e1000e_update_stats(struct e1000_adapter *adapter);
4241 * e1000e_down - quiesce the device and optionally reset the hardware
4242 * @adapter: board private structure
4243 * @reset: boolean flag to reset the hardware or not
4245 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4247 struct net_device *netdev = adapter->netdev;
4248 struct e1000_hw *hw = &adapter->hw;
4251 /* signal that we're down so the interrupt handler does not
4252 * reschedule our watchdog timer
4254 set_bit(__E1000_DOWN, &adapter->state);
4256 netif_carrier_off(netdev);
4258 /* disable receives in the hardware */
4260 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4261 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4262 /* flush and sleep below */
4264 netif_stop_queue(netdev);
4266 /* disable transmits in the hardware */
4268 tctl &= ~E1000_TCTL_EN;
4271 /* flush both disables and wait for them to finish */
4273 usleep_range(10000, 20000);
4275 e1000_irq_disable(adapter);
4277 napi_synchronize(&adapter->napi);
4279 del_timer_sync(&adapter->watchdog_timer);
4280 del_timer_sync(&adapter->phy_info_timer);
4282 spin_lock(&adapter->stats64_lock);
4283 e1000e_update_stats(adapter);
4284 spin_unlock(&adapter->stats64_lock);
4286 e1000e_flush_descriptors(adapter);
4288 adapter->link_speed = 0;
4289 adapter->link_duplex = 0;
4291 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4292 if ((hw->mac.type >= e1000_pch2lan) &&
4293 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4294 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4295 e_dbg("failed to disable jumbo frame workaround mode\n");
4297 if (!pci_channel_offline(adapter->pdev)) {
4299 e1000e_reset(adapter);
4300 else if (hw->mac.type >= e1000_pch_spt)
4301 e1000_flush_desc_rings(adapter);
4303 e1000_clean_tx_ring(adapter->tx_ring);
4304 e1000_clean_rx_ring(adapter->rx_ring);
4307 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4310 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4311 usleep_range(1000, 2000);
4312 e1000e_down(adapter, true);
4314 clear_bit(__E1000_RESETTING, &adapter->state);
4318 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4319 * @hw: pointer to the HW structure
4320 * @systim: time value read, sanitized and returned
4322 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4323 * check to see that the time is incrementing at a reasonable
4324 * rate and is a multiple of incvalue.
4326 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim)
4328 u64 time_delta, rem, temp;
4333 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4334 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4335 /* latch SYSTIMH on read of SYSTIML */
4336 systim_next = (u64)er32(SYSTIML);
4337 systim_next |= (u64)er32(SYSTIMH) << 32;
4339 time_delta = systim_next - systim;
4341 /* VMWare users have seen incvalue of zero, don't div / 0 */
4342 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4344 systim = systim_next;
4346 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4354 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4355 * @cc: cyclecounter structure
4357 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4359 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4361 struct e1000_hw *hw = &adapter->hw;
4362 u32 systimel, systimeh;
4364 /* SYSTIMH latching upon SYSTIML read does not work well.
4365 * This means that if SYSTIML overflows after we read it but before
4366 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4367 * will experience a huge non linear increment in the systime value
4368 * to fix that we test for overflow and if true, we re-read systime.
4370 systimel = er32(SYSTIML);
4371 systimeh = er32(SYSTIMH);
4372 /* Is systimel is so large that overflow is possible? */
4373 if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4374 u32 systimel_2 = er32(SYSTIML);
4375 if (systimel > systimel_2) {
4376 /* There was an overflow, read again SYSTIMH, and use
4379 systimeh = er32(SYSTIMH);
4380 systimel = systimel_2;
4383 systim = (u64)systimel;
4384 systim |= (u64)systimeh << 32;
4386 if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4387 systim = e1000e_sanitize_systim(hw, systim);
4393 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4394 * @adapter: board private structure to initialize
4396 * e1000_sw_init initializes the Adapter private data structure.
4397 * Fields are initialized based on PCI device information and
4398 * OS network device settings (MTU size).
4400 static int e1000_sw_init(struct e1000_adapter *adapter)
4402 struct net_device *netdev = adapter->netdev;
4404 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4405 adapter->rx_ps_bsize0 = 128;
4406 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4407 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4408 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4409 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4411 spin_lock_init(&adapter->stats64_lock);
4413 e1000e_set_interrupt_capability(adapter);
4415 if (e1000_alloc_queues(adapter))
4418 /* Setup hardware time stamping cyclecounter */
4419 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4420 adapter->cc.read = e1000e_cyclecounter_read;
4421 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4422 adapter->cc.mult = 1;
4423 /* cc.shift set in e1000e_get_base_tininca() */
4425 spin_lock_init(&adapter->systim_lock);
4426 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4429 /* Explicitly disable IRQ since the NIC can be in any state. */
4430 e1000_irq_disable(adapter);
4432 set_bit(__E1000_DOWN, &adapter->state);
4437 * e1000_intr_msi_test - Interrupt Handler
4438 * @irq: interrupt number
4439 * @data: pointer to a network interface device structure
4441 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4443 struct net_device *netdev = data;
4444 struct e1000_adapter *adapter = netdev_priv(netdev);
4445 struct e1000_hw *hw = &adapter->hw;
4446 u32 icr = er32(ICR);
4448 e_dbg("icr is %08X\n", icr);
4449 if (icr & E1000_ICR_RXSEQ) {
4450 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4451 /* Force memory writes to complete before acknowledging the
4452 * interrupt is handled.
4461 * e1000_test_msi_interrupt - Returns 0 for successful test
4462 * @adapter: board private struct
4464 * code flow taken from tg3.c
4466 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4468 struct net_device *netdev = adapter->netdev;
4469 struct e1000_hw *hw = &adapter->hw;
4472 /* poll_enable hasn't been called yet, so don't need disable */
4473 /* clear any pending events */
4476 /* free the real vector and request a test handler */
4477 e1000_free_irq(adapter);
4478 e1000e_reset_interrupt_capability(adapter);
4480 /* Assume that the test fails, if it succeeds then the test
4481 * MSI irq handler will unset this flag
4483 adapter->flags |= FLAG_MSI_TEST_FAILED;
4485 err = pci_enable_msi(adapter->pdev);
4487 goto msi_test_failed;
4489 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4490 netdev->name, netdev);
4492 pci_disable_msi(adapter->pdev);
4493 goto msi_test_failed;
4496 /* Force memory writes to complete before enabling and firing an
4501 e1000_irq_enable(adapter);
4503 /* fire an unusual interrupt on the test handler */
4504 ew32(ICS, E1000_ICS_RXSEQ);
4508 e1000_irq_disable(adapter);
4510 rmb(); /* read flags after interrupt has been fired */
4512 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4513 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4514 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4516 e_dbg("MSI interrupt test succeeded!\n");
4519 free_irq(adapter->pdev->irq, netdev);
4520 pci_disable_msi(adapter->pdev);
4523 e1000e_set_interrupt_capability(adapter);
4524 return e1000_request_irq(adapter);
4528 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4529 * @adapter: board private struct
4531 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4533 static int e1000_test_msi(struct e1000_adapter *adapter)
4538 if (!(adapter->flags & FLAG_MSI_ENABLED))
4541 /* disable SERR in case the MSI write causes a master abort */
4542 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4543 if (pci_cmd & PCI_COMMAND_SERR)
4544 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4545 pci_cmd & ~PCI_COMMAND_SERR);
4547 err = e1000_test_msi_interrupt(adapter);
4549 /* re-enable SERR */
4550 if (pci_cmd & PCI_COMMAND_SERR) {
4551 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4552 pci_cmd |= PCI_COMMAND_SERR;
4553 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4560 * e1000e_open - Called when a network interface is made active
4561 * @netdev: network interface device structure
4563 * Returns 0 on success, negative value on failure
4565 * The open entry point is called when a network interface is made
4566 * active by the system (IFF_UP). At this point all resources needed
4567 * for transmit and receive operations are allocated, the interrupt
4568 * handler is registered with the OS, the watchdog timer is started,
4569 * and the stack is notified that the interface is ready.
4571 int e1000e_open(struct net_device *netdev)
4573 struct e1000_adapter *adapter = netdev_priv(netdev);
4574 struct e1000_hw *hw = &adapter->hw;
4575 struct pci_dev *pdev = adapter->pdev;
4578 /* disallow open during test */
4579 if (test_bit(__E1000_TESTING, &adapter->state))
4582 pm_runtime_get_sync(&pdev->dev);
4584 netif_carrier_off(netdev);
4585 netif_stop_queue(netdev);
4587 /* allocate transmit descriptors */
4588 err = e1000e_setup_tx_resources(adapter->tx_ring);
4592 /* allocate receive descriptors */
4593 err = e1000e_setup_rx_resources(adapter->rx_ring);
4597 /* If AMT is enabled, let the firmware know that the network
4598 * interface is now open and reset the part to a known state.
4600 if (adapter->flags & FLAG_HAS_AMT) {
4601 e1000e_get_hw_control(adapter);
4602 e1000e_reset(adapter);
4605 e1000e_power_up_phy(adapter);
4607 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4608 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4609 e1000_update_mng_vlan(adapter);
4611 /* DMA latency requirement to workaround jumbo issue */
4612 pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4613 PM_QOS_DEFAULT_VALUE);
4615 /* before we allocate an interrupt, we must be ready to handle it.
4616 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4617 * as soon as we call pci_request_irq, so we have to setup our
4618 * clean_rx handler before we do so.
4620 e1000_configure(adapter);
4622 err = e1000_request_irq(adapter);
4626 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4627 * ignore e1000e MSI messages, which means we need to test our MSI
4630 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4631 err = e1000_test_msi(adapter);
4633 e_err("Interrupt allocation failed\n");
4638 /* From here on the code is the same as e1000e_up() */
4639 clear_bit(__E1000_DOWN, &adapter->state);
4641 napi_enable(&adapter->napi);
4643 e1000_irq_enable(adapter);
4645 adapter->tx_hang_recheck = false;
4647 hw->mac.get_link_status = true;
4648 pm_runtime_put(&pdev->dev);
4650 e1000e_trigger_lsc(adapter);
4655 pm_qos_remove_request(&adapter->pm_qos_req);
4656 e1000e_release_hw_control(adapter);
4657 e1000_power_down_phy(adapter);
4658 e1000e_free_rx_resources(adapter->rx_ring);
4660 e1000e_free_tx_resources(adapter->tx_ring);
4662 e1000e_reset(adapter);
4663 pm_runtime_put_sync(&pdev->dev);
4669 * e1000e_close - Disables a network interface
4670 * @netdev: network interface device structure
4672 * Returns 0, this is not allowed to fail
4674 * The close entry point is called when an interface is de-activated
4675 * by the OS. The hardware is still under the drivers control, but
4676 * needs to be disabled. A global MAC reset is issued to stop the
4677 * hardware, and all transmit and receive resources are freed.
4679 int e1000e_close(struct net_device *netdev)
4681 struct e1000_adapter *adapter = netdev_priv(netdev);
4682 struct pci_dev *pdev = adapter->pdev;
4683 int count = E1000_CHECK_RESET_COUNT;
4685 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4686 usleep_range(10000, 20000);
4688 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4690 pm_runtime_get_sync(&pdev->dev);
4692 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4693 e1000e_down(adapter, true);
4694 e1000_free_irq(adapter);
4696 /* Link status message must follow this format */
4697 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4700 napi_disable(&adapter->napi);
4702 e1000e_free_tx_resources(adapter->tx_ring);
4703 e1000e_free_rx_resources(adapter->rx_ring);
4705 /* kill manageability vlan ID if supported, but not if a vlan with
4706 * the same ID is registered on the host OS (let 8021q kill it)
4708 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4709 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4710 adapter->mng_vlan_id);
4712 /* If AMT is enabled, let the firmware know that the network
4713 * interface is now closed
4715 if ((adapter->flags & FLAG_HAS_AMT) &&
4716 !test_bit(__E1000_TESTING, &adapter->state))
4717 e1000e_release_hw_control(adapter);
4719 pm_qos_remove_request(&adapter->pm_qos_req);
4721 pm_runtime_put_sync(&pdev->dev);
4727 * e1000_set_mac - Change the Ethernet Address of the NIC
4728 * @netdev: network interface device structure
4729 * @p: pointer to an address structure
4731 * Returns 0 on success, negative on failure
4733 static int e1000_set_mac(struct net_device *netdev, void *p)
4735 struct e1000_adapter *adapter = netdev_priv(netdev);
4736 struct e1000_hw *hw = &adapter->hw;
4737 struct sockaddr *addr = p;
4739 if (!is_valid_ether_addr(addr->sa_data))
4740 return -EADDRNOTAVAIL;
4742 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4743 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4745 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4747 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4748 /* activate the work around */
4749 e1000e_set_laa_state_82571(&adapter->hw, 1);
4751 /* Hold a copy of the LAA in RAR[14] This is done so that
4752 * between the time RAR[0] gets clobbered and the time it
4753 * gets fixed (in e1000_watchdog), the actual LAA is in one
4754 * of the RARs and no incoming packets directed to this port
4755 * are dropped. Eventually the LAA will be in RAR[0] and
4758 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4759 adapter->hw.mac.rar_entry_count - 1);
4766 * e1000e_update_phy_task - work thread to update phy
4767 * @work: pointer to our work struct
4769 * this worker thread exists because we must acquire a
4770 * semaphore to read the phy, which we could msleep while
4771 * waiting for it, and we can't msleep in a timer.
4773 static void e1000e_update_phy_task(struct work_struct *work)
4775 struct e1000_adapter *adapter = container_of(work,
4776 struct e1000_adapter,
4778 struct e1000_hw *hw = &adapter->hw;
4780 if (test_bit(__E1000_DOWN, &adapter->state))
4783 e1000_get_phy_info(hw);
4785 /* Enable EEE on 82579 after link up */
4786 if (hw->phy.type >= e1000_phy_82579)
4787 e1000_set_eee_pchlan(hw);
4791 * e1000_update_phy_info - timre call-back to update PHY info
4792 * @data: pointer to adapter cast into an unsigned long
4794 * Need to wait a few seconds after link up to get diagnostic information from
4797 static void e1000_update_phy_info(struct timer_list *t)
4799 struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4801 if (test_bit(__E1000_DOWN, &adapter->state))
4804 schedule_work(&adapter->update_phy_task);
4808 * e1000e_update_phy_stats - Update the PHY statistics counters
4809 * @adapter: board private structure
4811 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4813 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4815 struct e1000_hw *hw = &adapter->hw;
4819 ret_val = hw->phy.ops.acquire(hw);
4823 /* A page set is expensive so check if already on desired page.
4824 * If not, set to the page with the PHY status registers.
4827 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4831 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4832 ret_val = hw->phy.ops.set_page(hw,
4833 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4838 /* Single Collision Count */
4839 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4840 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4842 adapter->stats.scc += phy_data;
4844 /* Excessive Collision Count */
4845 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4846 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4848 adapter->stats.ecol += phy_data;
4850 /* Multiple Collision Count */
4851 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4852 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4854 adapter->stats.mcc += phy_data;
4856 /* Late Collision Count */
4857 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4858 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4860 adapter->stats.latecol += phy_data;
4862 /* Collision Count - also used for adaptive IFS */
4863 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4864 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4866 hw->mac.collision_delta = phy_data;
4869 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4870 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4872 adapter->stats.dc += phy_data;
4874 /* Transmit with no CRS */
4875 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4876 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4878 adapter->stats.tncrs += phy_data;
4881 hw->phy.ops.release(hw);
4885 * e1000e_update_stats - Update the board statistics counters
4886 * @adapter: board private structure
4888 static void e1000e_update_stats(struct e1000_adapter *adapter)
4890 struct net_device *netdev = adapter->netdev;
4891 struct e1000_hw *hw = &adapter->hw;
4892 struct pci_dev *pdev = adapter->pdev;
4894 /* Prevent stats update while adapter is being reset, or if the pci
4895 * connection is down.
4897 if (adapter->link_speed == 0)
4899 if (pci_channel_offline(pdev))
4902 adapter->stats.crcerrs += er32(CRCERRS);
4903 adapter->stats.gprc += er32(GPRC);
4904 adapter->stats.gorc += er32(GORCL);
4905 er32(GORCH); /* Clear gorc */
4906 adapter->stats.bprc += er32(BPRC);
4907 adapter->stats.mprc += er32(MPRC);
4908 adapter->stats.roc += er32(ROC);
4910 adapter->stats.mpc += er32(MPC);
4912 /* Half-duplex statistics */
4913 if (adapter->link_duplex == HALF_DUPLEX) {
4914 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4915 e1000e_update_phy_stats(adapter);
4917 adapter->stats.scc += er32(SCC);
4918 adapter->stats.ecol += er32(ECOL);
4919 adapter->stats.mcc += er32(MCC);
4920 adapter->stats.latecol += er32(LATECOL);
4921 adapter->stats.dc += er32(DC);
4923 hw->mac.collision_delta = er32(COLC);
4925 if ((hw->mac.type != e1000_82574) &&
4926 (hw->mac.type != e1000_82583))
4927 adapter->stats.tncrs += er32(TNCRS);
4929 adapter->stats.colc += hw->mac.collision_delta;
4932 adapter->stats.xonrxc += er32(XONRXC);
4933 adapter->stats.xontxc += er32(XONTXC);
4934 adapter->stats.xoffrxc += er32(XOFFRXC);
4935 adapter->stats.xofftxc += er32(XOFFTXC);
4936 adapter->stats.gptc += er32(GPTC);
4937 adapter->stats.gotc += er32(GOTCL);
4938 er32(GOTCH); /* Clear gotc */
4939 adapter->stats.rnbc += er32(RNBC);
4940 adapter->stats.ruc += er32(RUC);
4942 adapter->stats.mptc += er32(MPTC);
4943 adapter->stats.bptc += er32(BPTC);
4945 /* used for adaptive IFS */
4947 hw->mac.tx_packet_delta = er32(TPT);
4948 adapter->stats.tpt += hw->mac.tx_packet_delta;
4950 adapter->stats.algnerrc += er32(ALGNERRC);
4951 adapter->stats.rxerrc += er32(RXERRC);
4952 adapter->stats.cexterr += er32(CEXTERR);
4953 adapter->stats.tsctc += er32(TSCTC);
4954 adapter->stats.tsctfc += er32(TSCTFC);
4956 /* Fill out the OS statistics structure */
4957 netdev->stats.multicast = adapter->stats.mprc;
4958 netdev->stats.collisions = adapter->stats.colc;
4962 /* RLEC on some newer hardware can be incorrect so build
4963 * our own version based on RUC and ROC
4965 netdev->stats.rx_errors = adapter->stats.rxerrc +
4966 adapter->stats.crcerrs + adapter->stats.algnerrc +
4967 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4968 netdev->stats.rx_length_errors = adapter->stats.ruc +
4970 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4971 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4972 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4975 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4976 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4977 netdev->stats.tx_window_errors = adapter->stats.latecol;
4978 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4980 /* Tx Dropped needs to be maintained elsewhere */
4982 /* Management Stats */
4983 adapter->stats.mgptc += er32(MGTPTC);
4984 adapter->stats.mgprc += er32(MGTPRC);
4985 adapter->stats.mgpdc += er32(MGTPDC);
4987 /* Correctable ECC Errors */
4988 if (hw->mac.type >= e1000_pch_lpt) {
4989 u32 pbeccsts = er32(PBECCSTS);
4991 adapter->corr_errors +=
4992 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4993 adapter->uncorr_errors +=
4994 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4995 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5000 * e1000_phy_read_status - Update the PHY register status snapshot
5001 * @adapter: board private structure
5003 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5005 struct e1000_hw *hw = &adapter->hw;
5006 struct e1000_phy_regs *phy = &adapter->phy_regs;
5008 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5009 (er32(STATUS) & E1000_STATUS_LU) &&
5010 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5013 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5014 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5015 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5016 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5017 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5018 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5019 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5020 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5022 e_warn("Error reading PHY register\n");
5024 /* Do not read PHY registers if link is not up
5025 * Set values to typical power-on defaults
5027 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5028 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5029 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5031 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5032 ADVERTISE_ALL | ADVERTISE_CSMA);
5034 phy->expansion = EXPANSION_ENABLENPAGE;
5035 phy->ctrl1000 = ADVERTISE_1000FULL;
5037 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5041 static void e1000_print_link_info(struct e1000_adapter *adapter)
5043 struct e1000_hw *hw = &adapter->hw;
5044 u32 ctrl = er32(CTRL);
5046 /* Link status message must follow this format for user tools */
5047 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5048 adapter->netdev->name, adapter->link_speed,
5049 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5050 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5051 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5052 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5055 static bool e1000e_has_link(struct e1000_adapter *adapter)
5057 struct e1000_hw *hw = &adapter->hw;
5058 bool link_active = false;
5061 /* get_link_status is set on LSC (link status) interrupt or
5062 * Rx sequence error interrupt. get_link_status will stay
5063 * true until the check_for_link establishes link
5064 * for copper adapters ONLY
5066 switch (hw->phy.media_type) {
5067 case e1000_media_type_copper:
5068 if (hw->mac.get_link_status) {
5069 ret_val = hw->mac.ops.check_for_link(hw);
5070 link_active = !hw->mac.get_link_status;
5075 case e1000_media_type_fiber:
5076 ret_val = hw->mac.ops.check_for_link(hw);
5077 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5079 case e1000_media_type_internal_serdes:
5080 ret_val = hw->mac.ops.check_for_link(hw);
5081 link_active = hw->mac.serdes_has_link;
5084 case e1000_media_type_unknown:
5088 if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5089 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5090 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5091 e_info("Gigabit has been disabled, downgrading speed\n");
5097 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5099 /* make sure the receive unit is started */
5100 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5101 (adapter->flags & FLAG_RESTART_NOW)) {
5102 struct e1000_hw *hw = &adapter->hw;
5103 u32 rctl = er32(RCTL);
5105 ew32(RCTL, rctl | E1000_RCTL_EN);
5106 adapter->flags &= ~FLAG_RESTART_NOW;
5110 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5112 struct e1000_hw *hw = &adapter->hw;
5114 /* With 82574 controllers, PHY needs to be checked periodically
5115 * for hung state and reset, if two calls return true
5117 if (e1000_check_phy_82574(hw))
5118 adapter->phy_hang_count++;
5120 adapter->phy_hang_count = 0;
5122 if (adapter->phy_hang_count > 1) {
5123 adapter->phy_hang_count = 0;
5124 e_dbg("PHY appears hung - resetting\n");
5125 schedule_work(&adapter->reset_task);
5130 * e1000_watchdog - Timer Call-back
5131 * @data: pointer to adapter cast into an unsigned long
5133 static void e1000_watchdog(struct timer_list *t)
5135 struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5137 /* Do the rest outside of interrupt context */
5138 schedule_work(&adapter->watchdog_task);
5140 /* TODO: make this use queue_delayed_work() */
5143 static void e1000_watchdog_task(struct work_struct *work)
5145 struct e1000_adapter *adapter = container_of(work,
5146 struct e1000_adapter,
5148 struct net_device *netdev = adapter->netdev;
5149 struct e1000_mac_info *mac = &adapter->hw.mac;
5150 struct e1000_phy_info *phy = &adapter->hw.phy;
5151 struct e1000_ring *tx_ring = adapter->tx_ring;
5152 struct e1000_hw *hw = &adapter->hw;
5155 if (test_bit(__E1000_DOWN, &adapter->state))
5158 link = e1000e_has_link(adapter);
5159 if ((netif_carrier_ok(netdev)) && link) {
5160 /* Cancel scheduled suspend requests. */
5161 pm_runtime_resume(netdev->dev.parent);
5163 e1000e_enable_receives(adapter);
5167 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5168 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5169 e1000_update_mng_vlan(adapter);
5172 if (!netif_carrier_ok(netdev)) {
5175 /* Cancel scheduled suspend requests. */
5176 pm_runtime_resume(netdev->dev.parent);
5178 /* update snapshot of PHY registers on LSC */
5179 e1000_phy_read_status(adapter);
5180 mac->ops.get_link_up_info(&adapter->hw,
5181 &adapter->link_speed,
5182 &adapter->link_duplex);
5183 e1000_print_link_info(adapter);
5185 /* check if SmartSpeed worked */
5186 e1000e_check_downshift(hw);
5187 if (phy->speed_downgraded)
5189 "Link Speed was downgraded by SmartSpeed\n");
5191 /* On supported PHYs, check for duplex mismatch only
5192 * if link has autonegotiated at 10/100 half
5194 if ((hw->phy.type == e1000_phy_igp_3 ||
5195 hw->phy.type == e1000_phy_bm) &&
5197 (adapter->link_speed == SPEED_10 ||
5198 adapter->link_speed == SPEED_100) &&
5199 (adapter->link_duplex == HALF_DUPLEX)) {
5202 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5204 if (!(autoneg_exp & EXPANSION_NWAY))
5205 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5208 /* adjust timeout factor according to speed/duplex */
5209 adapter->tx_timeout_factor = 1;
5210 switch (adapter->link_speed) {
5213 adapter->tx_timeout_factor = 16;
5217 adapter->tx_timeout_factor = 10;
5221 /* workaround: re-program speed mode bit after
5224 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5228 tarc0 = er32(TARC(0));
5229 tarc0 &= ~SPEED_MODE_BIT;
5230 ew32(TARC(0), tarc0);
5233 /* disable TSO for pcie and 10/100 speeds, to avoid
5234 * some hardware issues
5236 if (!(adapter->flags & FLAG_TSO_FORCE)) {
5237 switch (adapter->link_speed) {
5240 e_info("10/100 speed: disabling TSO\n");
5241 netdev->features &= ~NETIF_F_TSO;
5242 netdev->features &= ~NETIF_F_TSO6;
5245 netdev->features |= NETIF_F_TSO;
5246 netdev->features |= NETIF_F_TSO6;
5252 if (hw->mac.type == e1000_pch_spt) {
5253 netdev->features &= ~NETIF_F_TSO;
5254 netdev->features &= ~NETIF_F_TSO6;
5258 /* enable transmits in the hardware, need to do this
5259 * after setting TARC(0)
5262 tctl |= E1000_TCTL_EN;
5265 /* Perform any post-link-up configuration before
5266 * reporting link up.
5268 if (phy->ops.cfg_on_link_up)
5269 phy->ops.cfg_on_link_up(hw);
5271 netif_wake_queue(netdev);
5272 netif_carrier_on(netdev);
5274 if (!test_bit(__E1000_DOWN, &adapter->state))
5275 mod_timer(&adapter->phy_info_timer,
5276 round_jiffies(jiffies + 2 * HZ));
5279 if (netif_carrier_ok(netdev)) {
5280 adapter->link_speed = 0;
5281 adapter->link_duplex = 0;
5282 /* Link status message must follow this format */
5283 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5284 netif_carrier_off(netdev);
5285 netif_stop_queue(netdev);
5286 if (!test_bit(__E1000_DOWN, &adapter->state))
5287 mod_timer(&adapter->phy_info_timer,
5288 round_jiffies(jiffies + 2 * HZ));
5290 /* 8000ES2LAN requires a Rx packet buffer work-around
5291 * on link down event; reset the controller to flush
5292 * the Rx packet buffer.
5294 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5295 adapter->flags |= FLAG_RESTART_NOW;
5297 pm_schedule_suspend(netdev->dev.parent,
5303 spin_lock(&adapter->stats64_lock);
5304 e1000e_update_stats(adapter);
5306 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5307 adapter->tpt_old = adapter->stats.tpt;
5308 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5309 adapter->colc_old = adapter->stats.colc;
5311 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5312 adapter->gorc_old = adapter->stats.gorc;
5313 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5314 adapter->gotc_old = adapter->stats.gotc;
5315 spin_unlock(&adapter->stats64_lock);
5317 /* If the link is lost the controller stops DMA, but
5318 * if there is queued Tx work it cannot be done. So
5319 * reset the controller to flush the Tx packet buffers.
5321 if (!netif_carrier_ok(netdev) &&
5322 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5323 adapter->flags |= FLAG_RESTART_NOW;
5325 /* If reset is necessary, do it outside of interrupt context. */
5326 if (adapter->flags & FLAG_RESTART_NOW) {
5327 schedule_work(&adapter->reset_task);
5328 /* return immediately since reset is imminent */
5332 e1000e_update_adaptive(&adapter->hw);
5334 /* Simple mode for Interrupt Throttle Rate (ITR) */
5335 if (adapter->itr_setting == 4) {
5336 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5337 * Total asymmetrical Tx or Rx gets ITR=8000;
5338 * everyone else is between 2000-8000.
5340 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5341 u32 dif = (adapter->gotc > adapter->gorc ?
5342 adapter->gotc - adapter->gorc :
5343 adapter->gorc - adapter->gotc) / 10000;
5344 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5346 e1000e_write_itr(adapter, itr);
5349 /* Cause software interrupt to ensure Rx ring is cleaned */
5350 if (adapter->msix_entries)
5351 ew32(ICS, adapter->rx_ring->ims_val);
5353 ew32(ICS, E1000_ICS_RXDMT0);
5355 /* flush pending descriptors to memory before detecting Tx hang */
5356 e1000e_flush_descriptors(adapter);
5358 /* Force detection of hung controller every watchdog period */
5359 adapter->detect_tx_hung = true;
5361 /* With 82571 controllers, LAA may be overwritten due to controller
5362 * reset from the other port. Set the appropriate LAA in RAR[0]
5364 if (e1000e_get_laa_state_82571(hw))
5365 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5367 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5368 e1000e_check_82574_phy_workaround(adapter);
5370 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5371 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5372 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5373 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5375 adapter->rx_hwtstamp_cleared++;
5377 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5381 /* Reset the timer */
5382 if (!test_bit(__E1000_DOWN, &adapter->state))
5383 mod_timer(&adapter->watchdog_timer,
5384 round_jiffies(jiffies + 2 * HZ));
5387 #define E1000_TX_FLAGS_CSUM 0x00000001
5388 #define E1000_TX_FLAGS_VLAN 0x00000002
5389 #define E1000_TX_FLAGS_TSO 0x00000004
5390 #define E1000_TX_FLAGS_IPV4 0x00000008
5391 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5392 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5393 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5394 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5396 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5399 struct e1000_context_desc *context_desc;
5400 struct e1000_buffer *buffer_info;
5404 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5407 if (!skb_is_gso(skb))
5410 err = skb_cow_head(skb, 0);
5414 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5415 mss = skb_shinfo(skb)->gso_size;
5416 if (protocol == htons(ETH_P_IP)) {
5417 struct iphdr *iph = ip_hdr(skb);
5420 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5422 cmd_length = E1000_TXD_CMD_IP;
5423 ipcse = skb_transport_offset(skb) - 1;
5424 } else if (skb_is_gso_v6(skb)) {
5425 ipv6_hdr(skb)->payload_len = 0;
5426 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5427 &ipv6_hdr(skb)->daddr,
5431 ipcss = skb_network_offset(skb);
5432 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5433 tucss = skb_transport_offset(skb);
5434 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5436 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5437 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5439 i = tx_ring->next_to_use;
5440 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5441 buffer_info = &tx_ring->buffer_info[i];
5443 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5444 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5445 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5446 context_desc->upper_setup.tcp_fields.tucss = tucss;
5447 context_desc->upper_setup.tcp_fields.tucso = tucso;
5448 context_desc->upper_setup.tcp_fields.tucse = 0;
5449 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5450 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5451 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5453 buffer_info->time_stamp = jiffies;
5454 buffer_info->next_to_watch = i;
5457 if (i == tx_ring->count)
5459 tx_ring->next_to_use = i;
5464 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5467 struct e1000_adapter *adapter = tx_ring->adapter;
5468 struct e1000_context_desc *context_desc;
5469 struct e1000_buffer *buffer_info;
5472 u32 cmd_len = E1000_TXD_CMD_DEXT;
5474 if (skb->ip_summed != CHECKSUM_PARTIAL)
5478 case cpu_to_be16(ETH_P_IP):
5479 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5480 cmd_len |= E1000_TXD_CMD_TCP;
5482 case cpu_to_be16(ETH_P_IPV6):
5483 /* XXX not handling all IPV6 headers */
5484 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5485 cmd_len |= E1000_TXD_CMD_TCP;
5488 if (unlikely(net_ratelimit()))
5489 e_warn("checksum_partial proto=%x!\n",
5490 be16_to_cpu(protocol));
5494 css = skb_checksum_start_offset(skb);
5496 i = tx_ring->next_to_use;
5497 buffer_info = &tx_ring->buffer_info[i];
5498 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5500 context_desc->lower_setup.ip_config = 0;
5501 context_desc->upper_setup.tcp_fields.tucss = css;
5502 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5503 context_desc->upper_setup.tcp_fields.tucse = 0;
5504 context_desc->tcp_seg_setup.data = 0;
5505 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5507 buffer_info->time_stamp = jiffies;
5508 buffer_info->next_to_watch = i;
5511 if (i == tx_ring->count)
5513 tx_ring->next_to_use = i;
5518 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5519 unsigned int first, unsigned int max_per_txd,
5520 unsigned int nr_frags)
5522 struct e1000_adapter *adapter = tx_ring->adapter;
5523 struct pci_dev *pdev = adapter->pdev;
5524 struct e1000_buffer *buffer_info;
5525 unsigned int len = skb_headlen(skb);
5526 unsigned int offset = 0, size, count = 0, i;
5527 unsigned int f, bytecount, segs;
5529 i = tx_ring->next_to_use;
5532 buffer_info = &tx_ring->buffer_info[i];
5533 size = min(len, max_per_txd);
5535 buffer_info->length = size;
5536 buffer_info->time_stamp = jiffies;
5537 buffer_info->next_to_watch = i;
5538 buffer_info->dma = dma_map_single(&pdev->dev,
5540 size, DMA_TO_DEVICE);
5541 buffer_info->mapped_as_page = false;
5542 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5551 if (i == tx_ring->count)
5556 for (f = 0; f < nr_frags; f++) {
5557 const struct skb_frag_struct *frag;
5559 frag = &skb_shinfo(skb)->frags[f];
5560 len = skb_frag_size(frag);
5565 if (i == tx_ring->count)
5568 buffer_info = &tx_ring->buffer_info[i];
5569 size = min(len, max_per_txd);
5571 buffer_info->length = size;
5572 buffer_info->time_stamp = jiffies;
5573 buffer_info->next_to_watch = i;
5574 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5577 buffer_info->mapped_as_page = true;
5578 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5587 segs = skb_shinfo(skb)->gso_segs ? : 1;
5588 /* multiply data chunks by size of headers */
5589 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5591 tx_ring->buffer_info[i].skb = skb;
5592 tx_ring->buffer_info[i].segs = segs;
5593 tx_ring->buffer_info[i].bytecount = bytecount;
5594 tx_ring->buffer_info[first].next_to_watch = i;
5599 dev_err(&pdev->dev, "Tx DMA map failed\n");
5600 buffer_info->dma = 0;
5606 i += tx_ring->count;
5608 buffer_info = &tx_ring->buffer_info[i];
5609 e1000_put_txbuf(tx_ring, buffer_info, true);
5615 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5617 struct e1000_adapter *adapter = tx_ring->adapter;
5618 struct e1000_tx_desc *tx_desc = NULL;
5619 struct e1000_buffer *buffer_info;
5620 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5623 if (tx_flags & E1000_TX_FLAGS_TSO) {
5624 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5626 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5628 if (tx_flags & E1000_TX_FLAGS_IPV4)
5629 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5632 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5633 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5634 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5637 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5638 txd_lower |= E1000_TXD_CMD_VLE;
5639 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5642 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5643 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5645 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5646 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5647 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5650 i = tx_ring->next_to_use;
5653 buffer_info = &tx_ring->buffer_info[i];
5654 tx_desc = E1000_TX_DESC(*tx_ring, i);
5655 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5656 tx_desc->lower.data = cpu_to_le32(txd_lower |
5657 buffer_info->length);
5658 tx_desc->upper.data = cpu_to_le32(txd_upper);
5661 if (i == tx_ring->count)
5663 } while (--count > 0);
5665 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5667 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5668 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5669 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5671 /* Force memory writes to complete before letting h/w
5672 * know there are new descriptors to fetch. (Only
5673 * applicable for weak-ordered memory model archs,
5678 tx_ring->next_to_use = i;
5681 #define MINIMUM_DHCP_PACKET_SIZE 282
5682 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5683 struct sk_buff *skb)
5685 struct e1000_hw *hw = &adapter->hw;
5688 if (skb_vlan_tag_present(skb) &&
5689 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5690 (adapter->hw.mng_cookie.status &
5691 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5694 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5697 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5701 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5704 if (ip->protocol != IPPROTO_UDP)
5707 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5708 if (ntohs(udp->dest) != 67)
5711 offset = (u8 *)udp + 8 - skb->data;
5712 length = skb->len - offset;
5713 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5719 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5721 struct e1000_adapter *adapter = tx_ring->adapter;
5723 netif_stop_queue(adapter->netdev);
5724 /* Herbert's original patch had:
5725 * smp_mb__after_netif_stop_queue();
5726 * but since that doesn't exist yet, just open code it.
5730 /* We need to check again in a case another CPU has just
5731 * made room available.
5733 if (e1000_desc_unused(tx_ring) < size)
5737 netif_start_queue(adapter->netdev);
5738 ++adapter->restart_queue;
5742 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5744 BUG_ON(size > tx_ring->count);
5746 if (e1000_desc_unused(tx_ring) >= size)
5748 return __e1000_maybe_stop_tx(tx_ring, size);
5751 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5752 struct net_device *netdev)
5754 struct e1000_adapter *adapter = netdev_priv(netdev);
5755 struct e1000_ring *tx_ring = adapter->tx_ring;
5757 unsigned int tx_flags = 0;
5758 unsigned int len = skb_headlen(skb);
5759 unsigned int nr_frags;
5764 __be16 protocol = vlan_get_protocol(skb);
5766 if (test_bit(__E1000_DOWN, &adapter->state)) {
5767 dev_kfree_skb_any(skb);
5768 return NETDEV_TX_OK;
5771 if (skb->len <= 0) {
5772 dev_kfree_skb_any(skb);
5773 return NETDEV_TX_OK;
5776 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5777 * pad skb in order to meet this minimum size requirement
5779 if (skb_put_padto(skb, 17))
5780 return NETDEV_TX_OK;
5782 mss = skb_shinfo(skb)->gso_size;
5786 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5787 * points to just header, pull a few bytes of payload from
5788 * frags into skb->data
5790 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5791 /* we do this workaround for ES2LAN, but it is un-necessary,
5792 * avoiding it could save a lot of cycles
5794 if (skb->data_len && (hdr_len == len)) {
5795 unsigned int pull_size;
5797 pull_size = min_t(unsigned int, 4, skb->data_len);
5798 if (!__pskb_pull_tail(skb, pull_size)) {
5799 e_err("__pskb_pull_tail failed.\n");
5800 dev_kfree_skb_any(skb);
5801 return NETDEV_TX_OK;
5803 len = skb_headlen(skb);
5807 /* reserve a descriptor for the offload context */
5808 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5812 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5814 nr_frags = skb_shinfo(skb)->nr_frags;
5815 for (f = 0; f < nr_frags; f++)
5816 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5817 adapter->tx_fifo_limit);
5819 if (adapter->hw.mac.tx_pkt_filtering)
5820 e1000_transfer_dhcp_info(adapter, skb);
5822 /* need: count + 2 desc gap to keep tail from touching
5823 * head, otherwise try next time
5825 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5826 return NETDEV_TX_BUSY;
5828 if (skb_vlan_tag_present(skb)) {
5829 tx_flags |= E1000_TX_FLAGS_VLAN;
5830 tx_flags |= (skb_vlan_tag_get(skb) <<
5831 E1000_TX_FLAGS_VLAN_SHIFT);
5834 first = tx_ring->next_to_use;
5836 tso = e1000_tso(tx_ring, skb, protocol);
5838 dev_kfree_skb_any(skb);
5839 return NETDEV_TX_OK;
5843 tx_flags |= E1000_TX_FLAGS_TSO;
5844 else if (e1000_tx_csum(tx_ring, skb, protocol))
5845 tx_flags |= E1000_TX_FLAGS_CSUM;
5847 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5848 * 82571 hardware supports TSO capabilities for IPv6 as well...
5849 * no longer assume, we must.
5851 if (protocol == htons(ETH_P_IP))
5852 tx_flags |= E1000_TX_FLAGS_IPV4;
5854 if (unlikely(skb->no_fcs))
5855 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5857 /* if count is 0 then mapping error has occurred */
5858 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5861 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5862 (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5863 if (!adapter->tx_hwtstamp_skb) {
5864 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5865 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5866 adapter->tx_hwtstamp_skb = skb_get(skb);
5867 adapter->tx_hwtstamp_start = jiffies;
5868 schedule_work(&adapter->tx_hwtstamp_work);
5870 adapter->tx_hwtstamp_skipped++;
5874 skb_tx_timestamp(skb);
5876 netdev_sent_queue(netdev, skb->len);
5877 e1000_tx_queue(tx_ring, tx_flags, count);
5878 /* Make sure there is space in the ring for the next send. */
5879 e1000_maybe_stop_tx(tx_ring,
5881 DIV_ROUND_UP(PAGE_SIZE,
5882 adapter->tx_fifo_limit) + 2));
5884 if (!skb->xmit_more ||
5885 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5886 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5887 e1000e_update_tdt_wa(tx_ring,
5888 tx_ring->next_to_use);
5890 writel(tx_ring->next_to_use, tx_ring->tail);
5892 /* we need this if more than one processor can write
5893 * to our tail at a time, it synchronizes IO on
5899 dev_kfree_skb_any(skb);
5900 tx_ring->buffer_info[first].time_stamp = 0;
5901 tx_ring->next_to_use = first;
5904 return NETDEV_TX_OK;
5908 * e1000_tx_timeout - Respond to a Tx Hang
5909 * @netdev: network interface device structure
5911 static void e1000_tx_timeout(struct net_device *netdev)
5913 struct e1000_adapter *adapter = netdev_priv(netdev);
5915 /* Do the reset outside of interrupt context */
5916 adapter->tx_timeout_count++;
5917 schedule_work(&adapter->reset_task);
5920 static void e1000_reset_task(struct work_struct *work)
5922 struct e1000_adapter *adapter;
5923 adapter = container_of(work, struct e1000_adapter, reset_task);
5926 /* don't run the task if already down */
5927 if (test_bit(__E1000_DOWN, &adapter->state)) {
5932 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5933 e1000e_dump(adapter);
5934 e_err("Reset adapter unexpectedly\n");
5936 e1000e_reinit_locked(adapter);
5941 * e1000_get_stats64 - Get System Network Statistics
5942 * @netdev: network interface device structure
5943 * @stats: rtnl_link_stats64 pointer
5945 * Returns the address of the device statistics structure.
5947 void e1000e_get_stats64(struct net_device *netdev,
5948 struct rtnl_link_stats64 *stats)
5950 struct e1000_adapter *adapter = netdev_priv(netdev);
5952 spin_lock(&adapter->stats64_lock);
5953 e1000e_update_stats(adapter);
5954 /* Fill out the OS statistics structure */
5955 stats->rx_bytes = adapter->stats.gorc;
5956 stats->rx_packets = adapter->stats.gprc;
5957 stats->tx_bytes = adapter->stats.gotc;
5958 stats->tx_packets = adapter->stats.gptc;
5959 stats->multicast = adapter->stats.mprc;
5960 stats->collisions = adapter->stats.colc;
5964 /* RLEC on some newer hardware can be incorrect so build
5965 * our own version based on RUC and ROC
5967 stats->rx_errors = adapter->stats.rxerrc +
5968 adapter->stats.crcerrs + adapter->stats.algnerrc +
5969 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5970 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5971 stats->rx_crc_errors = adapter->stats.crcerrs;
5972 stats->rx_frame_errors = adapter->stats.algnerrc;
5973 stats->rx_missed_errors = adapter->stats.mpc;
5976 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5977 stats->tx_aborted_errors = adapter->stats.ecol;
5978 stats->tx_window_errors = adapter->stats.latecol;
5979 stats->tx_carrier_errors = adapter->stats.tncrs;
5981 /* Tx Dropped needs to be maintained elsewhere */
5983 spin_unlock(&adapter->stats64_lock);
5987 * e1000_change_mtu - Change the Maximum Transfer Unit
5988 * @netdev: network interface device structure
5989 * @new_mtu: new value for maximum frame size
5991 * Returns 0 on success, negative on failure
5993 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5995 struct e1000_adapter *adapter = netdev_priv(netdev);
5996 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5998 /* Jumbo frame support */
5999 if ((new_mtu > ETH_DATA_LEN) &&
6000 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6001 e_err("Jumbo Frames not supported.\n");
6005 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6006 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6007 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6008 (new_mtu > ETH_DATA_LEN)) {
6009 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6013 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6014 usleep_range(1000, 2000);
6015 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6016 adapter->max_frame_size = max_frame;
6017 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6018 netdev->mtu = new_mtu;
6020 pm_runtime_get_sync(netdev->dev.parent);
6022 if (netif_running(netdev))
6023 e1000e_down(adapter, true);
6025 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6026 * means we reserve 2 more, this pushes us to allocate from the next
6028 * i.e. RXBUFFER_2048 --> size-4096 slab
6029 * However with the new *_jumbo_rx* routines, jumbo receives will use
6033 if (max_frame <= 2048)
6034 adapter->rx_buffer_len = 2048;
6036 adapter->rx_buffer_len = 4096;
6038 /* adjust allocation if LPE protects us, and we aren't using SBP */
6039 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6040 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6042 if (netif_running(netdev))
6045 e1000e_reset(adapter);
6047 pm_runtime_put_sync(netdev->dev.parent);
6049 clear_bit(__E1000_RESETTING, &adapter->state);
6054 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6057 struct e1000_adapter *adapter = netdev_priv(netdev);
6058 struct mii_ioctl_data *data = if_mii(ifr);
6060 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6065 data->phy_id = adapter->hw.phy.addr;
6068 e1000_phy_read_status(adapter);
6070 switch (data->reg_num & 0x1F) {
6072 data->val_out = adapter->phy_regs.bmcr;
6075 data->val_out = adapter->phy_regs.bmsr;
6078 data->val_out = (adapter->hw.phy.id >> 16);
6081 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6084 data->val_out = adapter->phy_regs.advertise;
6087 data->val_out = adapter->phy_regs.lpa;
6090 data->val_out = adapter->phy_regs.expansion;
6093 data->val_out = adapter->phy_regs.ctrl1000;
6096 data->val_out = adapter->phy_regs.stat1000;
6099 data->val_out = adapter->phy_regs.estatus;
6113 * e1000e_hwtstamp_ioctl - control hardware time stamping
6114 * @netdev: network interface device structure
6115 * @ifreq: interface request
6117 * Outgoing time stamping can be enabled and disabled. Play nice and
6118 * disable it when requested, although it shouldn't cause any overhead
6119 * when no packet needs it. At most one packet in the queue may be
6120 * marked for time stamping, otherwise it would be impossible to tell
6121 * for sure to which packet the hardware time stamp belongs.
6123 * Incoming time stamping has to be configured via the hardware filters.
6124 * Not all combinations are supported, in particular event type has to be
6125 * specified. Matching the kind of event packet is not supported, with the
6126 * exception of "all V2 events regardless of level 2 or 4".
6128 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6130 struct e1000_adapter *adapter = netdev_priv(netdev);
6131 struct hwtstamp_config config;
6134 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6137 ret_val = e1000e_config_hwtstamp(adapter, &config);
6141 switch (config.rx_filter) {
6142 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6143 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6144 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6145 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6146 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6147 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6148 /* With V2 type filters which specify a Sync or Delay Request,
6149 * Path Delay Request/Response messages are also time stamped
6150 * by hardware so notify the caller the requested packets plus
6151 * some others are time stamped.
6153 config.rx_filter = HWTSTAMP_FILTER_SOME;
6159 return copy_to_user(ifr->ifr_data, &config,
6160 sizeof(config)) ? -EFAULT : 0;
6163 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6165 struct e1000_adapter *adapter = netdev_priv(netdev);
6167 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6168 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6171 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6177 return e1000_mii_ioctl(netdev, ifr, cmd);
6179 return e1000e_hwtstamp_set(netdev, ifr);
6181 return e1000e_hwtstamp_get(netdev, ifr);
6187 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6189 struct e1000_hw *hw = &adapter->hw;
6190 u32 i, mac_reg, wuc;
6191 u16 phy_reg, wuc_enable;
6194 /* copy MAC RARs to PHY RARs */
6195 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6197 retval = hw->phy.ops.acquire(hw);
6199 e_err("Could not acquire PHY\n");
6203 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6204 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6208 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6209 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6210 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6211 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6212 (u16)(mac_reg & 0xFFFF));
6213 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6214 (u16)((mac_reg >> 16) & 0xFFFF));
6217 /* configure PHY Rx Control register */
6218 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6219 mac_reg = er32(RCTL);
6220 if (mac_reg & E1000_RCTL_UPE)
6221 phy_reg |= BM_RCTL_UPE;
6222 if (mac_reg & E1000_RCTL_MPE)
6223 phy_reg |= BM_RCTL_MPE;
6224 phy_reg &= ~(BM_RCTL_MO_MASK);
6225 if (mac_reg & E1000_RCTL_MO_3)
6226 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6227 << BM_RCTL_MO_SHIFT);
6228 if (mac_reg & E1000_RCTL_BAM)
6229 phy_reg |= BM_RCTL_BAM;
6230 if (mac_reg & E1000_RCTL_PMCF)
6231 phy_reg |= BM_RCTL_PMCF;
6232 mac_reg = er32(CTRL);
6233 if (mac_reg & E1000_CTRL_RFCE)
6234 phy_reg |= BM_RCTL_RFCE;
6235 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6237 wuc = E1000_WUC_PME_EN;
6238 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6239 wuc |= E1000_WUC_APME;
6241 /* enable PHY wakeup in MAC register */
6243 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6244 E1000_WUC_PME_STATUS | wuc));
6246 /* configure and enable PHY wakeup in PHY registers */
6247 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6248 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6250 /* activate PHY wakeup */
6251 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6252 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6254 e_err("Could not set PHY Host Wakeup bit\n");
6256 hw->phy.ops.release(hw);
6261 static void e1000e_flush_lpic(struct pci_dev *pdev)
6263 struct net_device *netdev = pci_get_drvdata(pdev);
6264 struct e1000_adapter *adapter = netdev_priv(netdev);
6265 struct e1000_hw *hw = &adapter->hw;
6268 pm_runtime_get_sync(netdev->dev.parent);
6270 ret_val = hw->phy.ops.acquire(hw);
6274 pr_info("EEE TX LPI TIMER: %08X\n",
6275 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6277 hw->phy.ops.release(hw);
6280 pm_runtime_put_sync(netdev->dev.parent);
6283 static int e1000e_pm_freeze(struct device *dev)
6285 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6286 struct e1000_adapter *adapter = netdev_priv(netdev);
6288 netif_device_detach(netdev);
6290 if (netif_running(netdev)) {
6291 int count = E1000_CHECK_RESET_COUNT;
6293 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6294 usleep_range(10000, 20000);
6296 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6298 /* Quiesce the device without resetting the hardware */
6299 e1000e_down(adapter, false);
6300 e1000_free_irq(adapter);
6302 e1000e_reset_interrupt_capability(adapter);
6304 /* Allow time for pending master requests to run */
6305 e1000e_disable_pcie_master(&adapter->hw);
6310 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6312 struct net_device *netdev = pci_get_drvdata(pdev);
6313 struct e1000_adapter *adapter = netdev_priv(netdev);
6314 struct e1000_hw *hw = &adapter->hw;
6315 u32 ctrl, ctrl_ext, rctl, status, wufc;
6318 /* Runtime suspend should only enable wakeup for link changes */
6320 wufc = E1000_WUFC_LNKC;
6321 else if (device_may_wakeup(&pdev->dev))
6322 wufc = adapter->wol;
6326 status = er32(STATUS);
6327 if (status & E1000_STATUS_LU)
6328 wufc &= ~E1000_WUFC_LNKC;
6331 e1000_setup_rctl(adapter);
6332 e1000e_set_rx_mode(netdev);
6334 /* turn on all-multi mode if wake on multicast is enabled */
6335 if (wufc & E1000_WUFC_MC) {
6337 rctl |= E1000_RCTL_MPE;
6342 ctrl |= E1000_CTRL_ADVD3WUC;
6343 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6344 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6347 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6348 adapter->hw.phy.media_type ==
6349 e1000_media_type_internal_serdes) {
6350 /* keep the laser running in D3 */
6351 ctrl_ext = er32(CTRL_EXT);
6352 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6353 ew32(CTRL_EXT, ctrl_ext);
6357 e1000e_power_up_phy(adapter);
6359 if (adapter->flags & FLAG_IS_ICH)
6360 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6362 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6363 /* enable wakeup by the PHY */
6364 retval = e1000_init_phy_wakeup(adapter, wufc);
6368 /* enable wakeup by the MAC */
6370 ew32(WUC, E1000_WUC_PME_EN);
6376 e1000_power_down_phy(adapter);
6379 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6380 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6381 } else if (hw->mac.type >= e1000_pch_lpt) {
6382 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6383 /* ULP does not support wake from unicast, multicast
6386 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6392 /* Ensure that the appropriate bits are set in LPI_CTRL
6395 if ((hw->phy.type >= e1000_phy_i217) &&
6396 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6399 retval = hw->phy.ops.acquire(hw);
6401 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6404 if (adapter->eee_advert &
6405 hw->dev_spec.ich8lan.eee_lp_ability &
6406 I82579_EEE_100_SUPPORTED)
6407 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6408 if (adapter->eee_advert &
6409 hw->dev_spec.ich8lan.eee_lp_ability &
6410 I82579_EEE_1000_SUPPORTED)
6411 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6413 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6417 hw->phy.ops.release(hw);
6420 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6421 * would have already happened in close and is redundant.
6423 e1000e_release_hw_control(adapter);
6425 pci_clear_master(pdev);
6427 /* The pci-e switch on some quad port adapters will report a
6428 * correctable error when the MAC transitions from D0 to D3. To
6429 * prevent this we need to mask off the correctable errors on the
6430 * downstream port of the pci-e switch.
6432 * We don't have the associated upstream bridge while assigning
6433 * the PCI device into guest. For example, the KVM on power is
6436 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6437 struct pci_dev *us_dev = pdev->bus->self;
6443 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6444 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6445 (devctl & ~PCI_EXP_DEVCTL_CERE));
6447 pci_save_state(pdev);
6448 pci_prepare_to_sleep(pdev);
6450 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6457 * __e1000e_disable_aspm - Disable ASPM states
6458 * @pdev: pointer to PCI device struct
6459 * @state: bit-mask of ASPM states to disable
6460 * @locked: indication if this context holds pci_bus_sem locked.
6462 * Some devices *must* have certain ASPM states disabled per hardware errata.
6464 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6466 struct pci_dev *parent = pdev->bus->self;
6467 u16 aspm_dis_mask = 0;
6468 u16 pdev_aspmc, parent_aspmc;
6471 case PCIE_LINK_STATE_L0S:
6472 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6473 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6474 /* fall-through - can't have L1 without L0s */
6475 case PCIE_LINK_STATE_L1:
6476 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6482 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6483 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6486 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6488 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6491 /* Nothing to do if the ASPM states to be disabled already are */
6492 if (!(pdev_aspmc & aspm_dis_mask) &&
6493 (!parent || !(parent_aspmc & aspm_dis_mask)))
6496 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6497 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6499 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6502 #ifdef CONFIG_PCIEASPM
6504 pci_disable_link_state_locked(pdev, state);
6506 pci_disable_link_state(pdev, state);
6508 /* Double-check ASPM control. If not disabled by the above, the
6509 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6510 * not enabled); override by writing PCI config space directly.
6512 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6513 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6515 if (!(aspm_dis_mask & pdev_aspmc))
6519 /* Both device and parent should have the same ASPM setting.
6520 * Disable ASPM in downstream component first and then upstream.
6522 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6525 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6530 * e1000e_disable_aspm - Disable ASPM states.
6531 * @pdev: pointer to PCI device struct
6532 * @state: bit-mask of ASPM states to disable
6534 * This function acquires the pci_bus_sem!
6535 * Some devices *must* have certain ASPM states disabled per hardware errata.
6537 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6539 __e1000e_disable_aspm(pdev, state, 0);
6543 * e1000e_disable_aspm_locked Disable ASPM states.
6544 * @pdev: pointer to PCI device struct
6545 * @state: bit-mask of ASPM states to disable
6547 * This function must be called with pci_bus_sem acquired!
6548 * Some devices *must* have certain ASPM states disabled per hardware errata.
6550 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6552 __e1000e_disable_aspm(pdev, state, 1);
6556 static int __e1000_resume(struct pci_dev *pdev)
6558 struct net_device *netdev = pci_get_drvdata(pdev);
6559 struct e1000_adapter *adapter = netdev_priv(netdev);
6560 struct e1000_hw *hw = &adapter->hw;
6561 u16 aspm_disable_flag = 0;
6563 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6564 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6565 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6566 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6567 if (aspm_disable_flag)
6568 e1000e_disable_aspm(pdev, aspm_disable_flag);
6570 pci_set_master(pdev);
6572 if (hw->mac.type >= e1000_pch2lan)
6573 e1000_resume_workarounds_pchlan(&adapter->hw);
6575 e1000e_power_up_phy(adapter);
6577 /* report the system wakeup cause from S3/S4 */
6578 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6581 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6583 e_info("PHY Wakeup cause - %s\n",
6584 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6585 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6586 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6587 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6588 phy_data & E1000_WUS_LNKC ?
6589 "Link Status Change" : "other");
6591 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6593 u32 wus = er32(WUS);
6596 e_info("MAC Wakeup cause - %s\n",
6597 wus & E1000_WUS_EX ? "Unicast Packet" :
6598 wus & E1000_WUS_MC ? "Multicast Packet" :
6599 wus & E1000_WUS_BC ? "Broadcast Packet" :
6600 wus & E1000_WUS_MAG ? "Magic Packet" :
6601 wus & E1000_WUS_LNKC ? "Link Status Change" :
6607 e1000e_reset(adapter);
6609 e1000_init_manageability_pt(adapter);
6611 /* If the controller has AMT, do not set DRV_LOAD until the interface
6612 * is up. For all other cases, let the f/w know that the h/w is now
6613 * under the control of the driver.
6615 if (!(adapter->flags & FLAG_HAS_AMT))
6616 e1000e_get_hw_control(adapter);
6621 #ifdef CONFIG_PM_SLEEP
6622 static int e1000e_pm_thaw(struct device *dev)
6624 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6625 struct e1000_adapter *adapter = netdev_priv(netdev);
6627 e1000e_set_interrupt_capability(adapter);
6628 if (netif_running(netdev)) {
6629 u32 err = e1000_request_irq(adapter);
6637 netif_device_attach(netdev);
6642 static int e1000e_pm_suspend(struct device *dev)
6644 struct pci_dev *pdev = to_pci_dev(dev);
6647 e1000e_flush_lpic(pdev);
6649 e1000e_pm_freeze(dev);
6651 rc = __e1000_shutdown(pdev, false);
6653 e1000e_pm_thaw(dev);
6658 static int e1000e_pm_resume(struct device *dev)
6660 struct pci_dev *pdev = to_pci_dev(dev);
6663 rc = __e1000_resume(pdev);
6667 return e1000e_pm_thaw(dev);
6669 #endif /* CONFIG_PM_SLEEP */
6671 static int e1000e_pm_runtime_idle(struct device *dev)
6673 struct pci_dev *pdev = to_pci_dev(dev);
6674 struct net_device *netdev = pci_get_drvdata(pdev);
6675 struct e1000_adapter *adapter = netdev_priv(netdev);
6678 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6680 if (!e1000e_has_link(adapter)) {
6681 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6682 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6688 static int e1000e_pm_runtime_resume(struct device *dev)
6690 struct pci_dev *pdev = to_pci_dev(dev);
6691 struct net_device *netdev = pci_get_drvdata(pdev);
6692 struct e1000_adapter *adapter = netdev_priv(netdev);
6695 rc = __e1000_resume(pdev);
6699 if (netdev->flags & IFF_UP)
6705 static int e1000e_pm_runtime_suspend(struct device *dev)
6707 struct pci_dev *pdev = to_pci_dev(dev);
6708 struct net_device *netdev = pci_get_drvdata(pdev);
6709 struct e1000_adapter *adapter = netdev_priv(netdev);
6711 if (netdev->flags & IFF_UP) {
6712 int count = E1000_CHECK_RESET_COUNT;
6714 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6715 usleep_range(10000, 20000);
6717 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6719 /* Down the device without resetting the hardware */
6720 e1000e_down(adapter, false);
6723 if (__e1000_shutdown(pdev, true)) {
6724 e1000e_pm_runtime_resume(dev);
6730 #endif /* CONFIG_PM */
6732 static void e1000_shutdown(struct pci_dev *pdev)
6734 e1000e_flush_lpic(pdev);
6736 e1000e_pm_freeze(&pdev->dev);
6738 __e1000_shutdown(pdev, false);
6741 #ifdef CONFIG_NET_POLL_CONTROLLER
6743 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6745 struct net_device *netdev = data;
6746 struct e1000_adapter *adapter = netdev_priv(netdev);
6748 if (adapter->msix_entries) {
6749 int vector, msix_irq;
6752 msix_irq = adapter->msix_entries[vector].vector;
6753 if (disable_hardirq(msix_irq))
6754 e1000_intr_msix_rx(msix_irq, netdev);
6755 enable_irq(msix_irq);
6758 msix_irq = adapter->msix_entries[vector].vector;
6759 if (disable_hardirq(msix_irq))
6760 e1000_intr_msix_tx(msix_irq, netdev);
6761 enable_irq(msix_irq);
6764 msix_irq = adapter->msix_entries[vector].vector;
6765 if (disable_hardirq(msix_irq))
6766 e1000_msix_other(msix_irq, netdev);
6767 enable_irq(msix_irq);
6775 * @netdev: network interface device structure
6777 * Polling 'interrupt' - used by things like netconsole to send skbs
6778 * without having to re-enable interrupts. It's not called while
6779 * the interrupt routine is executing.
6781 static void e1000_netpoll(struct net_device *netdev)
6783 struct e1000_adapter *adapter = netdev_priv(netdev);
6785 switch (adapter->int_mode) {
6786 case E1000E_INT_MODE_MSIX:
6787 e1000_intr_msix(adapter->pdev->irq, netdev);
6789 case E1000E_INT_MODE_MSI:
6790 if (disable_hardirq(adapter->pdev->irq))
6791 e1000_intr_msi(adapter->pdev->irq, netdev);
6792 enable_irq(adapter->pdev->irq);
6794 default: /* E1000E_INT_MODE_LEGACY */
6795 if (disable_hardirq(adapter->pdev->irq))
6796 e1000_intr(adapter->pdev->irq, netdev);
6797 enable_irq(adapter->pdev->irq);
6804 * e1000_io_error_detected - called when PCI error is detected
6805 * @pdev: Pointer to PCI device
6806 * @state: The current pci connection state
6808 * This function is called after a PCI bus error affecting
6809 * this device has been detected.
6811 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6812 pci_channel_state_t state)
6814 struct net_device *netdev = pci_get_drvdata(pdev);
6815 struct e1000_adapter *adapter = netdev_priv(netdev);
6817 netif_device_detach(netdev);
6819 if (state == pci_channel_io_perm_failure)
6820 return PCI_ERS_RESULT_DISCONNECT;
6822 if (netif_running(netdev))
6823 e1000e_down(adapter, true);
6824 pci_disable_device(pdev);
6826 /* Request a slot slot reset. */
6827 return PCI_ERS_RESULT_NEED_RESET;
6831 * e1000_io_slot_reset - called after the pci bus has been reset.
6832 * @pdev: Pointer to PCI device
6834 * Restart the card from scratch, as if from a cold-boot. Implementation
6835 * resembles the first-half of the e1000e_pm_resume routine.
6837 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6839 struct net_device *netdev = pci_get_drvdata(pdev);
6840 struct e1000_adapter *adapter = netdev_priv(netdev);
6841 struct e1000_hw *hw = &adapter->hw;
6842 u16 aspm_disable_flag = 0;
6844 pci_ers_result_t result;
6846 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6847 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6848 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6849 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6850 if (aspm_disable_flag)
6851 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6853 err = pci_enable_device_mem(pdev);
6856 "Cannot re-enable PCI device after reset.\n");
6857 result = PCI_ERS_RESULT_DISCONNECT;
6859 pdev->state_saved = true;
6860 pci_restore_state(pdev);
6861 pci_set_master(pdev);
6863 pci_enable_wake(pdev, PCI_D3hot, 0);
6864 pci_enable_wake(pdev, PCI_D3cold, 0);
6866 e1000e_reset(adapter);
6868 result = PCI_ERS_RESULT_RECOVERED;
6871 pci_cleanup_aer_uncorrect_error_status(pdev);
6877 * e1000_io_resume - called when traffic can start flowing again.
6878 * @pdev: Pointer to PCI device
6880 * This callback is called when the error recovery driver tells us that
6881 * its OK to resume normal operation. Implementation resembles the
6882 * second-half of the e1000e_pm_resume routine.
6884 static void e1000_io_resume(struct pci_dev *pdev)
6886 struct net_device *netdev = pci_get_drvdata(pdev);
6887 struct e1000_adapter *adapter = netdev_priv(netdev);
6889 e1000_init_manageability_pt(adapter);
6891 if (netif_running(netdev))
6894 netif_device_attach(netdev);
6896 /* If the controller has AMT, do not set DRV_LOAD until the interface
6897 * is up. For all other cases, let the f/w know that the h/w is now
6898 * under the control of the driver.
6900 if (!(adapter->flags & FLAG_HAS_AMT))
6901 e1000e_get_hw_control(adapter);
6904 static void e1000_print_device_info(struct e1000_adapter *adapter)
6906 struct e1000_hw *hw = &adapter->hw;
6907 struct net_device *netdev = adapter->netdev;
6909 u8 pba_str[E1000_PBANUM_LENGTH];
6911 /* print bus type/speed/width info */
6912 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6914 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6918 e_info("Intel(R) PRO/%s Network Connection\n",
6919 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6920 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6921 E1000_PBANUM_LENGTH);
6923 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6924 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6925 hw->mac.type, hw->phy.type, pba_str);
6928 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6930 struct e1000_hw *hw = &adapter->hw;
6934 if (hw->mac.type != e1000_82573)
6937 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6939 if (!ret_val && (!(buf & BIT(0)))) {
6940 /* Deep Smart Power Down (DSPD) */
6941 dev_warn(&adapter->pdev->dev,
6942 "Warning: detected DSPD enabled in EEPROM\n");
6946 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6947 netdev_features_t features)
6949 struct e1000_adapter *adapter = netdev_priv(netdev);
6950 struct e1000_hw *hw = &adapter->hw;
6952 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6953 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6954 features &= ~NETIF_F_RXFCS;
6956 /* Since there is no support for separate Rx/Tx vlan accel
6957 * enable/disable make sure Tx flag is always in same state as Rx.
6959 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6960 features |= NETIF_F_HW_VLAN_CTAG_TX;
6962 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6967 static int e1000_set_features(struct net_device *netdev,
6968 netdev_features_t features)
6970 struct e1000_adapter *adapter = netdev_priv(netdev);
6971 netdev_features_t changed = features ^ netdev->features;
6973 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6974 adapter->flags |= FLAG_TSO_FORCE;
6976 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6977 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6981 if (changed & NETIF_F_RXFCS) {
6982 if (features & NETIF_F_RXFCS) {
6983 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6985 /* We need to take it back to defaults, which might mean
6986 * stripping is still disabled at the adapter level.
6988 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6989 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6991 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6995 netdev->features = features;
6997 if (netif_running(netdev))
6998 e1000e_reinit_locked(adapter);
7000 e1000e_reset(adapter);
7005 static const struct net_device_ops e1000e_netdev_ops = {
7006 .ndo_open = e1000e_open,
7007 .ndo_stop = e1000e_close,
7008 .ndo_start_xmit = e1000_xmit_frame,
7009 .ndo_get_stats64 = e1000e_get_stats64,
7010 .ndo_set_rx_mode = e1000e_set_rx_mode,
7011 .ndo_set_mac_address = e1000_set_mac,
7012 .ndo_change_mtu = e1000_change_mtu,
7013 .ndo_do_ioctl = e1000_ioctl,
7014 .ndo_tx_timeout = e1000_tx_timeout,
7015 .ndo_validate_addr = eth_validate_addr,
7017 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
7018 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
7019 #ifdef CONFIG_NET_POLL_CONTROLLER
7020 .ndo_poll_controller = e1000_netpoll,
7022 .ndo_set_features = e1000_set_features,
7023 .ndo_fix_features = e1000_fix_features,
7024 .ndo_features_check = passthru_features_check,
7028 * e1000_probe - Device Initialization Routine
7029 * @pdev: PCI device information struct
7030 * @ent: entry in e1000_pci_tbl
7032 * Returns 0 on success, negative on failure
7034 * e1000_probe initializes an adapter identified by a pci_dev structure.
7035 * The OS initialization, configuring of the adapter private structure,
7036 * and a hardware reset occur.
7038 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7040 struct net_device *netdev;
7041 struct e1000_adapter *adapter;
7042 struct e1000_hw *hw;
7043 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7044 resource_size_t mmio_start, mmio_len;
7045 resource_size_t flash_start, flash_len;
7046 static int cards_found;
7047 u16 aspm_disable_flag = 0;
7048 int bars, i, err, pci_using_dac;
7049 u16 eeprom_data = 0;
7050 u16 eeprom_apme_mask = E1000_EEPROM_APME;
7053 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7054 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7055 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7056 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7057 if (aspm_disable_flag)
7058 e1000e_disable_aspm(pdev, aspm_disable_flag);
7060 err = pci_enable_device_mem(pdev);
7065 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7069 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7072 "No usable DMA configuration, aborting\n");
7077 bars = pci_select_bars(pdev, IORESOURCE_MEM);
7078 err = pci_request_selected_regions_exclusive(pdev, bars,
7079 e1000e_driver_name);
7083 /* AER (Advanced Error Reporting) hooks */
7084 pci_enable_pcie_error_reporting(pdev);
7086 pci_set_master(pdev);
7087 /* PCI config space info */
7088 err = pci_save_state(pdev);
7090 goto err_alloc_etherdev;
7093 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7095 goto err_alloc_etherdev;
7097 SET_NETDEV_DEV(netdev, &pdev->dev);
7099 netdev->irq = pdev->irq;
7101 pci_set_drvdata(pdev, netdev);
7102 adapter = netdev_priv(netdev);
7104 adapter->netdev = netdev;
7105 adapter->pdev = pdev;
7107 adapter->pba = ei->pba;
7108 adapter->flags = ei->flags;
7109 adapter->flags2 = ei->flags2;
7110 adapter->hw.adapter = adapter;
7111 adapter->hw.mac.type = ei->mac;
7112 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7113 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7115 mmio_start = pci_resource_start(pdev, 0);
7116 mmio_len = pci_resource_len(pdev, 0);
7119 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7120 if (!adapter->hw.hw_addr)
7123 if ((adapter->flags & FLAG_HAS_FLASH) &&
7124 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7125 (hw->mac.type < e1000_pch_spt)) {
7126 flash_start = pci_resource_start(pdev, 1);
7127 flash_len = pci_resource_len(pdev, 1);
7128 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7129 if (!adapter->hw.flash_address)
7133 /* Set default EEE advertisement */
7134 if (adapter->flags2 & FLAG2_HAS_EEE)
7135 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7137 /* construct the net_device struct */
7138 netdev->netdev_ops = &e1000e_netdev_ops;
7139 e1000e_set_ethtool_ops(netdev);
7140 netdev->watchdog_timeo = 5 * HZ;
7141 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7142 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7144 netdev->mem_start = mmio_start;
7145 netdev->mem_end = mmio_start + mmio_len;
7147 adapter->bd_number = cards_found++;
7149 e1000e_check_options(adapter);
7151 /* setup adapter struct */
7152 err = e1000_sw_init(adapter);
7156 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7157 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7158 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7160 err = ei->get_variants(adapter);
7164 if ((adapter->flags & FLAG_IS_ICH) &&
7165 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7166 (hw->mac.type < e1000_pch_spt))
7167 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7169 hw->mac.ops.get_bus_info(&adapter->hw);
7171 adapter->hw.phy.autoneg_wait_to_complete = 0;
7173 /* Copper options */
7174 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7175 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7176 adapter->hw.phy.disable_polarity_correction = 0;
7177 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7180 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7181 dev_info(&pdev->dev,
7182 "PHY reset is blocked due to SOL/IDER session.\n");
7184 /* Set initial default active device features */
7185 netdev->features = (NETIF_F_SG |
7186 NETIF_F_HW_VLAN_CTAG_RX |
7187 NETIF_F_HW_VLAN_CTAG_TX |
7194 /* Set user-changeable features (subset of all device features) */
7195 netdev->hw_features = netdev->features;
7196 netdev->hw_features |= NETIF_F_RXFCS;
7197 netdev->priv_flags |= IFF_SUPP_NOFCS;
7198 netdev->hw_features |= NETIF_F_RXALL;
7200 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7201 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7203 netdev->vlan_features |= (NETIF_F_SG |
7208 netdev->priv_flags |= IFF_UNICAST_FLT;
7210 if (pci_using_dac) {
7211 netdev->features |= NETIF_F_HIGHDMA;
7212 netdev->vlan_features |= NETIF_F_HIGHDMA;
7215 /* MTU range: 68 - max_hw_frame_size */
7216 netdev->min_mtu = ETH_MIN_MTU;
7217 netdev->max_mtu = adapter->max_hw_frame_size -
7218 (VLAN_ETH_HLEN + ETH_FCS_LEN);
7220 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7221 adapter->flags |= FLAG_MNG_PT_ENABLED;
7223 /* before reading the NVM, reset the controller to
7224 * put the device in a known good starting state
7226 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7228 /* systems with ASPM and others may see the checksum fail on the first
7229 * attempt. Let's give it a few tries
7232 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7235 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7241 e1000_eeprom_checks(adapter);
7243 /* copy the MAC address */
7244 if (e1000e_read_mac_addr(&adapter->hw))
7246 "NVM Read Error while reading MAC address\n");
7248 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7250 if (!is_valid_ether_addr(netdev->dev_addr)) {
7251 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7257 timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7258 timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7260 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7261 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7262 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7263 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7264 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7266 /* Initialize link parameters. User can change them with ethtool */
7267 adapter->hw.mac.autoneg = 1;
7268 adapter->fc_autoneg = true;
7269 adapter->hw.fc.requested_mode = e1000_fc_default;
7270 adapter->hw.fc.current_mode = e1000_fc_default;
7271 adapter->hw.phy.autoneg_advertised = 0x2f;
7273 /* Initial Wake on LAN setting - If APM wake is enabled in
7274 * the EEPROM, enable the ACPI Magic Packet filter
7276 if (adapter->flags & FLAG_APME_IN_WUC) {
7277 /* APME bit in EEPROM is mapped to WUC.APME */
7278 eeprom_data = er32(WUC);
7279 eeprom_apme_mask = E1000_WUC_APME;
7280 if ((hw->mac.type > e1000_ich10lan) &&
7281 (eeprom_data & E1000_WUC_PHY_WAKE))
7282 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7283 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7284 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7285 (adapter->hw.bus.func == 1))
7286 ret_val = e1000_read_nvm(&adapter->hw,
7287 NVM_INIT_CONTROL3_PORT_B,
7290 ret_val = e1000_read_nvm(&adapter->hw,
7291 NVM_INIT_CONTROL3_PORT_A,
7295 /* fetch WoL from EEPROM */
7297 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7298 else if (eeprom_data & eeprom_apme_mask)
7299 adapter->eeprom_wol |= E1000_WUFC_MAG;
7301 /* now that we have the eeprom settings, apply the special cases
7302 * where the eeprom may be wrong or the board simply won't support
7303 * wake on lan on a particular port
7305 if (!(adapter->flags & FLAG_HAS_WOL))
7306 adapter->eeprom_wol = 0;
7308 /* initialize the wol settings based on the eeprom settings */
7309 adapter->wol = adapter->eeprom_wol;
7311 /* make sure adapter isn't asleep if manageability is enabled */
7312 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7313 (hw->mac.ops.check_mng_mode(hw)))
7314 device_wakeup_enable(&pdev->dev);
7316 /* save off EEPROM version number */
7317 ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7320 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7321 adapter->eeprom_vers = 0;
7324 /* init PTP hardware clock */
7325 e1000e_ptp_init(adapter);
7327 /* reset the hardware with the new settings */
7328 e1000e_reset(adapter);
7330 /* If the controller has AMT, do not set DRV_LOAD until the interface
7331 * is up. For all other cases, let the f/w know that the h/w is now
7332 * under the control of the driver.
7334 if (!(adapter->flags & FLAG_HAS_AMT))
7335 e1000e_get_hw_control(adapter);
7337 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7338 err = register_netdev(netdev);
7342 /* carrier off reporting is important to ethtool even BEFORE open */
7343 netif_carrier_off(netdev);
7345 e1000_print_device_info(adapter);
7347 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
7349 if (pci_dev_run_wake(pdev) && hw->mac.type < e1000_pch_cnp)
7350 pm_runtime_put_noidle(&pdev->dev);
7355 if (!(adapter->flags & FLAG_HAS_AMT))
7356 e1000e_release_hw_control(adapter);
7358 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7359 e1000_phy_hw_reset(&adapter->hw);
7361 kfree(adapter->tx_ring);
7362 kfree(adapter->rx_ring);
7364 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7365 iounmap(adapter->hw.flash_address);
7366 e1000e_reset_interrupt_capability(adapter);
7368 iounmap(adapter->hw.hw_addr);
7370 free_netdev(netdev);
7372 pci_disable_pcie_error_reporting(pdev);
7373 pci_release_mem_regions(pdev);
7376 pci_disable_device(pdev);
7381 * e1000_remove - Device Removal Routine
7382 * @pdev: PCI device information struct
7384 * e1000_remove is called by the PCI subsystem to alert the driver
7385 * that it should release a PCI device. The could be caused by a
7386 * Hot-Plug event, or because the driver is going to be removed from
7389 static void e1000_remove(struct pci_dev *pdev)
7391 struct net_device *netdev = pci_get_drvdata(pdev);
7392 struct e1000_adapter *adapter = netdev_priv(netdev);
7393 bool down = test_bit(__E1000_DOWN, &adapter->state);
7395 e1000e_ptp_remove(adapter);
7397 /* The timers may be rescheduled, so explicitly disable them
7398 * from being rescheduled.
7401 set_bit(__E1000_DOWN, &adapter->state);
7402 del_timer_sync(&adapter->watchdog_timer);
7403 del_timer_sync(&adapter->phy_info_timer);
7405 cancel_work_sync(&adapter->reset_task);
7406 cancel_work_sync(&adapter->watchdog_task);
7407 cancel_work_sync(&adapter->downshift_task);
7408 cancel_work_sync(&adapter->update_phy_task);
7409 cancel_work_sync(&adapter->print_hang_task);
7411 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7412 cancel_work_sync(&adapter->tx_hwtstamp_work);
7413 if (adapter->tx_hwtstamp_skb) {
7414 dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7415 adapter->tx_hwtstamp_skb = NULL;
7419 /* Don't lie to e1000_close() down the road. */
7421 clear_bit(__E1000_DOWN, &adapter->state);
7422 unregister_netdev(netdev);
7424 if (pci_dev_run_wake(pdev))
7425 pm_runtime_get_noresume(&pdev->dev);
7427 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7428 * would have already happened in close and is redundant.
7430 e1000e_release_hw_control(adapter);
7432 e1000e_reset_interrupt_capability(adapter);
7433 kfree(adapter->tx_ring);
7434 kfree(adapter->rx_ring);
7436 iounmap(adapter->hw.hw_addr);
7437 if ((adapter->hw.flash_address) &&
7438 (adapter->hw.mac.type < e1000_pch_spt))
7439 iounmap(adapter->hw.flash_address);
7440 pci_release_mem_regions(pdev);
7442 free_netdev(netdev);
7445 pci_disable_pcie_error_reporting(pdev);
7447 pci_disable_device(pdev);
7450 /* PCI Error Recovery (ERS) */
7451 static const struct pci_error_handlers e1000_err_handler = {
7452 .error_detected = e1000_io_error_detected,
7453 .slot_reset = e1000_io_slot_reset,
7454 .resume = e1000_io_resume,
7457 static const struct pci_device_id e1000_pci_tbl[] = {
7458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7479 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7483 board_80003es2lan },
7484 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7485 board_80003es2lan },
7486 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7487 board_80003es2lan },
7488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7489 board_80003es2lan },
7491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7492 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7493 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7496 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7501 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7503 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7507 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7511 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7516 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7523 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7524 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7526 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7527 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7528 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7529 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7530 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7531 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7532 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7533 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7534 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7535 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7536 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7537 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7538 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7539 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7540 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7541 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7542 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7543 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7544 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7545 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7546 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7547 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7548 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7549 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7550 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7552 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7554 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7556 static const struct dev_pm_ops e1000_pm_ops = {
7557 #ifdef CONFIG_PM_SLEEP
7558 .suspend = e1000e_pm_suspend,
7559 .resume = e1000e_pm_resume,
7560 .freeze = e1000e_pm_freeze,
7561 .thaw = e1000e_pm_thaw,
7562 .poweroff = e1000e_pm_suspend,
7563 .restore = e1000e_pm_resume,
7565 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7566 e1000e_pm_runtime_idle)
7569 /* PCI Device API Driver */
7570 static struct pci_driver e1000_driver = {
7571 .name = e1000e_driver_name,
7572 .id_table = e1000_pci_tbl,
7573 .probe = e1000_probe,
7574 .remove = e1000_remove,
7576 .pm = &e1000_pm_ops,
7578 .shutdown = e1000_shutdown,
7579 .err_handler = &e1000_err_handler
7583 * e1000_init_module - Driver Registration Routine
7585 * e1000_init_module is the first routine called when the driver is
7586 * loaded. All it does is register with the PCI subsystem.
7588 static int __init e1000_init_module(void)
7590 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7591 e1000e_driver_version);
7592 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7594 return pci_register_driver(&e1000_driver);
7596 module_init(e1000_init_module);
7599 * e1000_exit_module - Driver Exit Cleanup Routine
7601 * e1000_exit_module is called just before the driver is removed
7604 static void __exit e1000_exit_module(void)
7606 pci_unregister_driver(&e1000_driver);
7608 module_exit(e1000_exit_module);
7610 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7611 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7612 MODULE_LICENSE("GPL");
7613 MODULE_VERSION(DRV_VERSION);