2 * drivers/net/ethernet/ibm/emac/core.c
4 * Driver for PowerPC 4xx on-chip ethernet controller.
6 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
7 * <benh@kernel.crashing.org>
9 * Based on the arch/ppc version of the driver:
11 * Copyright (c) 2004, 2005 Zultys Technologies.
12 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
14 * Based on original work by
15 * Matt Porter <mporter@kernel.crashing.org>
16 * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
17 * Armin Kuster <akuster@mvista.com>
18 * Johnnie Peters <jpeters@mvista.com>
20 * This program is free software; you can redistribute it and/or modify it
21 * under the terms of the GNU General Public License as published by the
22 * Free Software Foundation; either version 2 of the License, or (at your
23 * option) any later version.
27 #include <linux/module.h>
28 #include <linux/sched.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/delay.h>
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
36 #include <linux/crc32.h>
37 #include <linux/ethtool.h>
38 #include <linux/mii.h>
39 #include <linux/bitops.h>
40 #include <linux/workqueue.h>
42 #include <linux/of_address.h>
43 #include <linux/of_irq.h>
44 #include <linux/of_net.h>
45 #include <linux/of_mdio.h>
46 #include <linux/slab.h>
48 #include <asm/processor.h>
51 #include <linux/uaccess.h>
53 #include <asm/dcr-regs.h>
58 * Lack of dma_unmap_???? calls is intentional.
60 * API-correct usage requires additional support state information to be
61 * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
62 * EMAC design (e.g. TX buffer passed from network stack can be split into
63 * several BDs, dma_map_single/dma_map_page can be used to map particular BD),
64 * maintaining such information will add additional overhead.
65 * Current DMA API implementation for 4xx processors only ensures cache coherency
66 * and dma_unmap_???? routines are empty and are likely to stay this way.
67 * I decided to omit dma_unmap_??? calls because I don't want to add additional
68 * complexity just for the sake of following some abstract API, when it doesn't
69 * add any real benefit to the driver. I understand that this decision maybe
70 * controversial, but I really tried to make code API-correct and efficient
71 * at the same time and didn't come up with code I liked :(. --ebs
74 #define DRV_NAME "emac"
75 #define DRV_VERSION "3.54"
76 #define DRV_DESC "PPC 4xx OCP EMAC driver"
78 MODULE_DESCRIPTION(DRV_DESC);
80 ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>");
81 MODULE_LICENSE("GPL");
83 /* minimum number of free TX descriptors required to wake up TX process */
84 #define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4)
86 /* If packet size is less than this number, we allocate small skb and copy packet
87 * contents into it instead of just sending original big skb up
89 #define EMAC_RX_COPY_THRESH CONFIG_IBM_EMAC_RX_COPY_THRESHOLD
91 /* Since multiple EMACs share MDIO lines in various ways, we need
92 * to avoid re-using the same PHY ID in cases where the arch didn't
93 * setup precise phy_map entries
95 * XXX This is something that needs to be reworked as we can have multiple
96 * EMAC "sets" (multiple ASICs containing several EMACs) though we can
97 * probably require in that case to have explicit PHY IDs in the device-tree
99 static u32 busy_phy_map;
100 static DEFINE_MUTEX(emac_phy_map_lock);
102 /* This is the wait queue used to wait on any event related to probe, that
103 * is discovery of MALs, other EMACs, ZMII/RGMIIs, etc...
105 static DECLARE_WAIT_QUEUE_HEAD(emac_probe_wait);
107 /* Having stable interface names is a doomed idea. However, it would be nice
108 * if we didn't have completely random interface names at boot too :-) It's
109 * just a matter of making everybody's life easier. Since we are doing
110 * threaded probing, it's a bit harder though. The base idea here is that
111 * we make up a list of all emacs in the device-tree before we register the
112 * driver. Every emac will then wait for the previous one in the list to
113 * initialize before itself. We should also keep that list ordered by
115 * That list is only 4 entries long, meaning that additional EMACs don't
116 * get ordering guarantees unless EMAC_BOOT_LIST_SIZE is increased.
119 #define EMAC_BOOT_LIST_SIZE 4
120 static struct device_node *emac_boot_list[EMAC_BOOT_LIST_SIZE];
122 /* How long should I wait for dependent devices ? */
123 #define EMAC_PROBE_DEP_TIMEOUT (HZ * 5)
125 /* I don't want to litter system log with timeout errors
126 * when we have brain-damaged PHY.
128 static inline void emac_report_timeout_error(struct emac_instance *dev,
131 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |
132 EMAC_FTR_460EX_PHY_CLK_FIX |
133 EMAC_FTR_440EP_PHY_CLK_FIX))
134 DBG(dev, "%s" NL, error);
135 else if (net_ratelimit())
136 printk(KERN_ERR "%pOF: %s\n", dev->ofdev->dev.of_node, error);
139 /* EMAC PHY clock workaround:
140 * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX,
141 * which allows controlling each EMAC clock
143 static inline void emac_rx_clk_tx(struct emac_instance *dev)
145 #ifdef CONFIG_PPC_DCR_NATIVE
146 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
147 dcri_clrset(SDR0, SDR0_MFR,
148 0, SDR0_MFR_ECS >> dev->cell_index);
152 static inline void emac_rx_clk_default(struct emac_instance *dev)
154 #ifdef CONFIG_PPC_DCR_NATIVE
155 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
156 dcri_clrset(SDR0, SDR0_MFR,
157 SDR0_MFR_ECS >> dev->cell_index, 0);
161 /* PHY polling intervals */
162 #define PHY_POLL_LINK_ON HZ
163 #define PHY_POLL_LINK_OFF (HZ / 5)
165 /* Graceful stop timeouts in us.
166 * We should allow up to 1 frame time (full-duplex, ignoring collisions)
168 #define STOP_TIMEOUT_10 1230
169 #define STOP_TIMEOUT_100 124
170 #define STOP_TIMEOUT_1000 13
171 #define STOP_TIMEOUT_1000_JUMBO 73
173 static unsigned char default_mcast_addr[] = {
174 0x01, 0x80, 0xC2, 0x00, 0x00, 0x01
177 /* Please, keep in sync with struct ibm_emac_stats/ibm_emac_error_stats */
178 static const char emac_stats_keys[EMAC_ETHTOOL_STATS_COUNT][ETH_GSTRING_LEN] = {
179 "rx_packets", "rx_bytes", "tx_packets", "tx_bytes", "rx_packets_csum",
180 "tx_packets_csum", "tx_undo", "rx_dropped_stack", "rx_dropped_oom",
181 "rx_dropped_error", "rx_dropped_resize", "rx_dropped_mtu",
182 "rx_stopped", "rx_bd_errors", "rx_bd_overrun", "rx_bd_bad_packet",
183 "rx_bd_runt_packet", "rx_bd_short_event", "rx_bd_alignment_error",
184 "rx_bd_bad_fcs", "rx_bd_packet_too_long", "rx_bd_out_of_range",
185 "rx_bd_in_range", "rx_parity", "rx_fifo_overrun", "rx_overrun",
186 "rx_bad_packet", "rx_runt_packet", "rx_short_event",
187 "rx_alignment_error", "rx_bad_fcs", "rx_packet_too_long",
188 "rx_out_of_range", "rx_in_range", "tx_dropped", "tx_bd_errors",
189 "tx_bd_bad_fcs", "tx_bd_carrier_loss", "tx_bd_excessive_deferral",
190 "tx_bd_excessive_collisions", "tx_bd_late_collision",
191 "tx_bd_multple_collisions", "tx_bd_single_collision",
192 "tx_bd_underrun", "tx_bd_sqe", "tx_parity", "tx_underrun", "tx_sqe",
196 static irqreturn_t emac_irq(int irq, void *dev_instance);
197 static void emac_clean_tx_ring(struct emac_instance *dev);
198 static void __emac_set_multicast_list(struct emac_instance *dev);
200 static inline int emac_phy_supports_gige(int phy_mode)
202 return phy_mode == PHY_MODE_GMII ||
203 phy_mode == PHY_MODE_RGMII ||
204 phy_mode == PHY_MODE_SGMII ||
205 phy_mode == PHY_MODE_TBI ||
206 phy_mode == PHY_MODE_RTBI;
209 static inline int emac_phy_gpcs(int phy_mode)
211 return phy_mode == PHY_MODE_SGMII ||
212 phy_mode == PHY_MODE_TBI ||
213 phy_mode == PHY_MODE_RTBI;
216 static inline void emac_tx_enable(struct emac_instance *dev)
218 struct emac_regs __iomem *p = dev->emacp;
221 DBG(dev, "tx_enable" NL);
223 r = in_be32(&p->mr0);
224 if (!(r & EMAC_MR0_TXE))
225 out_be32(&p->mr0, r | EMAC_MR0_TXE);
228 static void emac_tx_disable(struct emac_instance *dev)
230 struct emac_regs __iomem *p = dev->emacp;
233 DBG(dev, "tx_disable" NL);
235 r = in_be32(&p->mr0);
236 if (r & EMAC_MR0_TXE) {
237 int n = dev->stop_timeout;
238 out_be32(&p->mr0, r & ~EMAC_MR0_TXE);
239 while (!(in_be32(&p->mr0) & EMAC_MR0_TXI) && n) {
244 emac_report_timeout_error(dev, "TX disable timeout");
248 static void emac_rx_enable(struct emac_instance *dev)
250 struct emac_regs __iomem *p = dev->emacp;
253 if (unlikely(test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags)))
256 DBG(dev, "rx_enable" NL);
258 r = in_be32(&p->mr0);
259 if (!(r & EMAC_MR0_RXE)) {
260 if (unlikely(!(r & EMAC_MR0_RXI))) {
261 /* Wait if previous async disable is still in progress */
262 int n = dev->stop_timeout;
263 while (!(r = in_be32(&p->mr0) & EMAC_MR0_RXI) && n) {
268 emac_report_timeout_error(dev,
269 "RX disable timeout");
271 out_be32(&p->mr0, r | EMAC_MR0_RXE);
277 static void emac_rx_disable(struct emac_instance *dev)
279 struct emac_regs __iomem *p = dev->emacp;
282 DBG(dev, "rx_disable" NL);
284 r = in_be32(&p->mr0);
285 if (r & EMAC_MR0_RXE) {
286 int n = dev->stop_timeout;
287 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
288 while (!(in_be32(&p->mr0) & EMAC_MR0_RXI) && n) {
293 emac_report_timeout_error(dev, "RX disable timeout");
297 static inline void emac_netif_stop(struct emac_instance *dev)
299 netif_tx_lock_bh(dev->ndev);
300 netif_addr_lock(dev->ndev);
302 netif_addr_unlock(dev->ndev);
303 netif_tx_unlock_bh(dev->ndev);
304 netif_trans_update(dev->ndev); /* prevent tx timeout */
305 mal_poll_disable(dev->mal, &dev->commac);
306 netif_tx_disable(dev->ndev);
309 static inline void emac_netif_start(struct emac_instance *dev)
311 netif_tx_lock_bh(dev->ndev);
312 netif_addr_lock(dev->ndev);
314 if (dev->mcast_pending && netif_running(dev->ndev))
315 __emac_set_multicast_list(dev);
316 netif_addr_unlock(dev->ndev);
317 netif_tx_unlock_bh(dev->ndev);
319 netif_wake_queue(dev->ndev);
321 /* NOTE: unconditional netif_wake_queue is only appropriate
322 * so long as all callers are assured to have free tx slots
323 * (taken from tg3... though the case where that is wrong is
324 * not terribly harmful)
326 mal_poll_enable(dev->mal, &dev->commac);
329 static inline void emac_rx_disable_async(struct emac_instance *dev)
331 struct emac_regs __iomem *p = dev->emacp;
334 DBG(dev, "rx_disable_async" NL);
336 r = in_be32(&p->mr0);
337 if (r & EMAC_MR0_RXE)
338 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
341 static int emac_reset(struct emac_instance *dev)
343 struct emac_regs __iomem *p = dev->emacp;
345 bool __maybe_unused try_internal_clock = false;
347 DBG(dev, "reset" NL);
349 if (!dev->reset_failed) {
350 /* 40x erratum suggests stopping RX channel before reset,
353 emac_rx_disable(dev);
354 emac_tx_disable(dev);
357 #ifdef CONFIG_PPC_DCR_NATIVE
360 * PPC460EX/GT Embedded Processor Advanced User's Manual
361 * section 28.10.1 Mode Register 0 (EMACx_MR0) states:
362 * Note: The PHY must provide a TX Clk in order to perform a soft reset
363 * of the EMAC. If none is present, select the internal clock
364 * (SDR0_ETH_CFG[EMACx_PHY_CLK] = 1).
365 * After a soft reset, select the external clock.
367 * The AR8035-A PHY Meraki MR24 does not provide a TX Clk if the
368 * ethernet cable is not attached. This causes the reset to timeout
369 * and the PHY detection code in emac_init_phy() is unable to
370 * communicate and detect the AR8035-A PHY. As a result, the emac
371 * driver bails out early and the user has no ethernet.
372 * In order to stay compatible with existing configurations, the
373 * driver will temporarily switch to the internal clock, after
374 * the first reset fails.
376 if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) {
377 if (try_internal_clock || (dev->phy_address == 0xffffffff &&
378 dev->phy_map == 0xffffffff)) {
379 /* No PHY: select internal loop clock before reset */
380 dcri_clrset(SDR0, SDR0_ETH_CFG,
381 0, SDR0_ETH_CFG_ECS << dev->cell_index);
383 /* PHY present: select external clock before reset */
384 dcri_clrset(SDR0, SDR0_ETH_CFG,
385 SDR0_ETH_CFG_ECS << dev->cell_index, 0);
390 out_be32(&p->mr0, EMAC_MR0_SRST);
391 while ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n)
394 #ifdef CONFIG_PPC_DCR_NATIVE
395 if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) {
396 if (!n && !try_internal_clock) {
397 /* first attempt has timed out. */
399 try_internal_clock = true;
403 if (try_internal_clock || (dev->phy_address == 0xffffffff &&
404 dev->phy_map == 0xffffffff)) {
405 /* No PHY: restore external clock source after reset */
406 dcri_clrset(SDR0, SDR0_ETH_CFG,
407 SDR0_ETH_CFG_ECS << dev->cell_index, 0);
413 dev->reset_failed = 0;
416 emac_report_timeout_error(dev, "reset timeout");
417 dev->reset_failed = 1;
422 static void emac_hash_mc(struct emac_instance *dev)
424 const int regs = EMAC_XAHT_REGS(dev);
425 u32 *gaht_base = emac_gaht_base(dev);
427 struct netdev_hw_addr *ha;
430 DBG(dev, "hash_mc %d" NL, netdev_mc_count(dev->ndev));
432 memset(gaht_temp, 0, sizeof (gaht_temp));
434 netdev_for_each_mc_addr(ha, dev->ndev) {
436 DBG2(dev, "mc %pM" NL, ha->addr);
438 slot = EMAC_XAHT_CRC_TO_SLOT(dev,
439 ether_crc(ETH_ALEN, ha->addr));
440 reg = EMAC_XAHT_SLOT_TO_REG(dev, slot);
441 mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot);
443 gaht_temp[reg] |= mask;
446 for (i = 0; i < regs; i++)
447 out_be32(gaht_base + i, gaht_temp[i]);
450 static inline u32 emac_iff2rmr(struct net_device *ndev)
452 struct emac_instance *dev = netdev_priv(ndev);
455 r = EMAC_RMR_SP | EMAC_RMR_SFCS | EMAC_RMR_IAE | EMAC_RMR_BAE;
457 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
462 if (ndev->flags & IFF_PROMISC)
464 else if (ndev->flags & IFF_ALLMULTI ||
465 (netdev_mc_count(ndev) > EMAC_XAHT_SLOTS(dev)))
467 else if (!netdev_mc_empty(ndev))
470 if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) {
471 r &= ~EMAC4_RMR_MJS_MASK;
472 r |= EMAC4_RMR_MJS(ndev->mtu);
478 static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
480 u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC_MR1_TR0_MULT;
482 DBG2(dev, "__emac_calc_base_mr1" NL);
486 ret |= EMAC_MR1_TFS_2K;
489 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
490 dev->ndev->name, tx_size);
495 ret |= EMAC_MR1_RFS_16K;
498 ret |= EMAC_MR1_RFS_4K;
501 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n",
502 dev->ndev->name, rx_size);
508 static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
510 u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR |
511 EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000);
513 DBG2(dev, "__emac4_calc_base_mr1" NL);
517 ret |= EMAC4_MR1_TFS_16K;
520 ret |= EMAC4_MR1_TFS_4K;
523 ret |= EMAC4_MR1_TFS_2K;
526 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
527 dev->ndev->name, tx_size);
532 ret |= EMAC4_MR1_RFS_16K;
535 ret |= EMAC4_MR1_RFS_4K;
538 ret |= EMAC4_MR1_RFS_2K;
541 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n",
542 dev->ndev->name, rx_size);
548 static u32 emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
550 return emac_has_feature(dev, EMAC_FTR_EMAC4) ?
551 __emac4_calc_base_mr1(dev, tx_size, rx_size) :
552 __emac_calc_base_mr1(dev, tx_size, rx_size);
555 static inline u32 emac_calc_trtr(struct emac_instance *dev, unsigned int size)
557 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
558 return ((size >> 6) - 1) << EMAC_TRTR_SHIFT_EMAC4;
560 return ((size >> 6) - 1) << EMAC_TRTR_SHIFT;
563 static inline u32 emac_calc_rwmr(struct emac_instance *dev,
564 unsigned int low, unsigned int high)
566 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
567 return (low << 22) | ( (high & 0x3ff) << 6);
569 return (low << 23) | ( (high & 0x1ff) << 7);
572 static int emac_configure(struct emac_instance *dev)
574 struct emac_regs __iomem *p = dev->emacp;
575 struct net_device *ndev = dev->ndev;
576 int tx_size, rx_size, link = netif_carrier_ok(dev->ndev);
579 DBG(dev, "configure" NL);
582 out_be32(&p->mr1, in_be32(&p->mr1)
583 | EMAC_MR1_FDE | EMAC_MR1_ILE);
585 } else if (emac_reset(dev) < 0)
588 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
589 tah_reset(dev->tah_dev);
591 DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n",
592 link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause);
594 /* Default fifo sizes */
595 tx_size = dev->tx_fifo_size;
596 rx_size = dev->rx_fifo_size;
598 /* No link, force loopback */
600 mr1 = EMAC_MR1_FDE | EMAC_MR1_ILE;
602 /* Check for full duplex */
603 else if (dev->phy.duplex == DUPLEX_FULL)
604 mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001;
606 /* Adjust fifo sizes, mr1 and timeouts based on link speed */
607 dev->stop_timeout = STOP_TIMEOUT_10;
608 switch (dev->phy.speed) {
610 if (emac_phy_gpcs(dev->phy.mode)) {
611 mr1 |= EMAC_MR1_MF_1000GPCS | EMAC_MR1_MF_IPPA(
612 (dev->phy.gpcs_address != 0xffffffff) ?
613 dev->phy.gpcs_address : dev->phy.address);
615 /* Put some arbitrary OUI, Manuf & Rev IDs so we can
616 * identify this GPCS PHY later.
618 out_be32(&p->u1.emac4.ipcr, 0xdeadbeef);
620 mr1 |= EMAC_MR1_MF_1000;
622 /* Extended fifo sizes */
623 tx_size = dev->tx_fifo_size_gige;
624 rx_size = dev->rx_fifo_size_gige;
626 if (dev->ndev->mtu > ETH_DATA_LEN) {
627 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
628 mr1 |= EMAC4_MR1_JPSM;
630 mr1 |= EMAC_MR1_JPSM;
631 dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO;
633 dev->stop_timeout = STOP_TIMEOUT_1000;
636 mr1 |= EMAC_MR1_MF_100;
637 dev->stop_timeout = STOP_TIMEOUT_100;
639 default: /* make gcc happy */
643 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
644 rgmii_set_speed(dev->rgmii_dev, dev->rgmii_port,
646 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
647 zmii_set_speed(dev->zmii_dev, dev->zmii_port, dev->phy.speed);
649 /* on 40x erratum forces us to NOT use integrated flow control,
650 * let's hope it works on 44x ;)
652 if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x) &&
653 dev->phy.duplex == DUPLEX_FULL) {
655 mr1 |= EMAC_MR1_EIFC | EMAC_MR1_APP;
656 else if (dev->phy.asym_pause)
660 /* Add base settings & fifo sizes & program MR1 */
661 mr1 |= emac_calc_base_mr1(dev, tx_size, rx_size);
662 out_be32(&p->mr1, mr1);
664 /* Set individual MAC address */
665 out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
666 out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
667 (ndev->dev_addr[3] << 16) | (ndev->dev_addr[4] << 8) |
670 /* VLAN Tag Protocol ID */
671 out_be32(&p->vtpid, 0x8100);
673 /* Receive mode register */
674 r = emac_iff2rmr(ndev);
675 if (r & EMAC_RMR_MAE)
677 out_be32(&p->rmr, r);
679 /* FIFOs thresholds */
680 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
681 r = EMAC4_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1,
682 tx_size / 2 / dev->fifo_entry_size);
684 r = EMAC_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1,
685 tx_size / 2 / dev->fifo_entry_size);
686 out_be32(&p->tmr1, r);
687 out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2));
689 /* PAUSE frame is sent when RX FIFO reaches its high-water mark,
690 there should be still enough space in FIFO to allow the our link
691 partner time to process this frame and also time to send PAUSE
694 Here is the worst case scenario for the RX FIFO "headroom"
695 (from "The Switch Book") (100Mbps, without preamble, inter-frame gap):
697 1) One maximum-length frame on TX 1522 bytes
698 2) One PAUSE frame time 64 bytes
699 3) PAUSE frame decode time allowance 64 bytes
700 4) One maximum-length frame on RX 1522 bytes
701 5) Round-trip propagation delay of the link (100Mb) 15 bytes
705 I chose to set high-water mark to RX_FIFO_SIZE / 4 (1024 bytes)
706 low-water mark to RX_FIFO_SIZE / 8 (512 bytes)
708 r = emac_calc_rwmr(dev, rx_size / 8 / dev->fifo_entry_size,
709 rx_size / 4 / dev->fifo_entry_size);
710 out_be32(&p->rwmr, r);
712 /* Set PAUSE timer to the maximum */
713 out_be32(&p->ptr, 0xffff);
716 r = EMAC_ISR_OVR | EMAC_ISR_BP | EMAC_ISR_SE |
717 EMAC_ISR_ALE | EMAC_ISR_BFCS | EMAC_ISR_PTLE | EMAC_ISR_ORE |
718 EMAC_ISR_IRE | EMAC_ISR_TE;
719 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
720 r |= EMAC4_ISR_TXPE | EMAC4_ISR_RXPE /* | EMAC4_ISR_TXUE |
722 out_be32(&p->iser, r);
724 /* We need to take GPCS PHY out of isolate mode after EMAC reset */
725 if (emac_phy_gpcs(dev->phy.mode)) {
726 if (dev->phy.gpcs_address != 0xffffffff)
727 emac_mii_reset_gpcs(&dev->phy);
729 emac_mii_reset_phy(&dev->phy);
735 static void emac_reinitialize(struct emac_instance *dev)
737 DBG(dev, "reinitialize" NL);
739 emac_netif_stop(dev);
740 if (!emac_configure(dev)) {
744 emac_netif_start(dev);
747 static void emac_full_tx_reset(struct emac_instance *dev)
749 DBG(dev, "full_tx_reset" NL);
751 emac_tx_disable(dev);
752 mal_disable_tx_channel(dev->mal, dev->mal_tx_chan);
753 emac_clean_tx_ring(dev);
754 dev->tx_cnt = dev->tx_slot = dev->ack_slot = 0;
758 mal_enable_tx_channel(dev->mal, dev->mal_tx_chan);
763 static void emac_reset_work(struct work_struct *work)
765 struct emac_instance *dev = container_of(work, struct emac_instance, reset_work);
767 DBG(dev, "reset_work" NL);
769 mutex_lock(&dev->link_lock);
771 emac_netif_stop(dev);
772 emac_full_tx_reset(dev);
773 emac_netif_start(dev);
775 mutex_unlock(&dev->link_lock);
778 static void emac_tx_timeout(struct net_device *ndev)
780 struct emac_instance *dev = netdev_priv(ndev);
782 DBG(dev, "tx_timeout" NL);
784 schedule_work(&dev->reset_work);
788 static inline int emac_phy_done(struct emac_instance *dev, u32 stacr)
790 int done = !!(stacr & EMAC_STACR_OC);
792 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
798 static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg)
800 struct emac_regs __iomem *p = dev->emacp;
802 int n, err = -ETIMEDOUT;
804 mutex_lock(&dev->mdio_lock);
806 DBG2(dev, "mdio_read(%02x,%02x)" NL, id, reg);
808 /* Enable proper MDIO port */
809 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
810 zmii_get_mdio(dev->zmii_dev, dev->zmii_port);
811 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
812 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
814 /* Wait for management interface to become idle */
816 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
819 DBG2(dev, " -> timeout wait idle\n");
824 /* Issue read command */
825 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
826 r = EMAC4_STACR_BASE(dev->opb_bus_freq);
828 r = EMAC_STACR_BASE(dev->opb_bus_freq);
829 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
831 if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
832 r |= EMACX_STACR_STAC_READ;
834 r |= EMAC_STACR_STAC_READ;
835 r |= (reg & EMAC_STACR_PRA_MASK)
836 | ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT);
837 out_be32(&p->stacr, r);
839 /* Wait for read to complete */
841 while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) {
844 DBG2(dev, " -> timeout wait complete\n");
849 if (unlikely(r & EMAC_STACR_PHYE)) {
850 DBG(dev, "mdio_read(%02x, %02x) failed" NL, id, reg);
855 r = ((r >> EMAC_STACR_PHYD_SHIFT) & EMAC_STACR_PHYD_MASK);
857 DBG2(dev, "mdio_read -> %04x" NL, r);
860 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
861 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port);
862 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
863 zmii_put_mdio(dev->zmii_dev, dev->zmii_port);
864 mutex_unlock(&dev->mdio_lock);
866 return err == 0 ? r : err;
869 static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg,
872 struct emac_regs __iomem *p = dev->emacp;
874 int n, err = -ETIMEDOUT;
876 mutex_lock(&dev->mdio_lock);
878 DBG2(dev, "mdio_write(%02x,%02x,%04x)" NL, id, reg, val);
880 /* Enable proper MDIO port */
881 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
882 zmii_get_mdio(dev->zmii_dev, dev->zmii_port);
883 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
884 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
886 /* Wait for management interface to be idle */
888 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
891 DBG2(dev, " -> timeout wait idle\n");
896 /* Issue write command */
897 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
898 r = EMAC4_STACR_BASE(dev->opb_bus_freq);
900 r = EMAC_STACR_BASE(dev->opb_bus_freq);
901 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
903 if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
904 r |= EMACX_STACR_STAC_WRITE;
906 r |= EMAC_STACR_STAC_WRITE;
907 r |= (reg & EMAC_STACR_PRA_MASK) |
908 ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT) |
909 (val << EMAC_STACR_PHYD_SHIFT);
910 out_be32(&p->stacr, r);
912 /* Wait for write to complete */
914 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
917 DBG2(dev, " -> timeout wait complete\n");
923 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
924 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port);
925 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
926 zmii_put_mdio(dev->zmii_dev, dev->zmii_port);
927 mutex_unlock(&dev->mdio_lock);
930 static int emac_mdio_read(struct net_device *ndev, int id, int reg)
932 struct emac_instance *dev = netdev_priv(ndev);
935 res = __emac_mdio_read((dev->mdio_instance &&
936 dev->phy.gpcs_address != id) ?
937 dev->mdio_instance : dev,
942 static void emac_mdio_write(struct net_device *ndev, int id, int reg, int val)
944 struct emac_instance *dev = netdev_priv(ndev);
946 __emac_mdio_write((dev->mdio_instance &&
947 dev->phy.gpcs_address != id) ?
948 dev->mdio_instance : dev,
949 (u8) id, (u8) reg, (u16) val);
953 static void __emac_set_multicast_list(struct emac_instance *dev)
955 struct emac_regs __iomem *p = dev->emacp;
956 u32 rmr = emac_iff2rmr(dev->ndev);
958 DBG(dev, "__multicast %08x" NL, rmr);
960 /* I decided to relax register access rules here to avoid
963 * There is a real problem with EMAC4 core if we use MWSW_001 bit
964 * in MR1 register and do a full EMAC reset.
965 * One TX BD status update is delayed and, after EMAC reset, it
966 * never happens, resulting in TX hung (it'll be recovered by TX
967 * timeout handler eventually, but this is just gross).
968 * So we either have to do full TX reset or try to cheat here :)
970 * The only required change is to RX mode register, so I *think* all
971 * we need is just to stop RX channel. This seems to work on all
974 * If we need the full reset, we might just trigger the workqueue
975 * and do it async... a bit nasty but should work --BenH
977 dev->mcast_pending = 0;
978 emac_rx_disable(dev);
979 if (rmr & EMAC_RMR_MAE)
981 out_be32(&p->rmr, rmr);
986 static void emac_set_multicast_list(struct net_device *ndev)
988 struct emac_instance *dev = netdev_priv(ndev);
990 DBG(dev, "multicast" NL);
992 BUG_ON(!netif_running(dev->ndev));
995 dev->mcast_pending = 1;
999 mutex_lock(&dev->link_lock);
1000 __emac_set_multicast_list(dev);
1001 mutex_unlock(&dev->link_lock);
1004 static int emac_set_mac_address(struct net_device *ndev, void *sa)
1006 struct emac_instance *dev = netdev_priv(ndev);
1007 struct sockaddr *addr = sa;
1008 struct emac_regs __iomem *p = dev->emacp;
1010 if (!is_valid_ether_addr(addr->sa_data))
1011 return -EADDRNOTAVAIL;
1013 mutex_lock(&dev->link_lock);
1015 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
1017 emac_rx_disable(dev);
1018 emac_tx_disable(dev);
1019 out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
1020 out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
1021 (ndev->dev_addr[3] << 16) | (ndev->dev_addr[4] << 8) |
1023 emac_tx_enable(dev);
1024 emac_rx_enable(dev);
1026 mutex_unlock(&dev->link_lock);
1031 static int emac_resize_rx_ring(struct emac_instance *dev, int new_mtu)
1033 int rx_sync_size = emac_rx_sync_size(new_mtu);
1034 int rx_skb_size = emac_rx_skb_size(new_mtu);
1036 int mr1_jumbo_bit_change = 0;
1038 mutex_lock(&dev->link_lock);
1039 emac_netif_stop(dev);
1040 emac_rx_disable(dev);
1041 mal_disable_rx_channel(dev->mal, dev->mal_rx_chan);
1043 if (dev->rx_sg_skb) {
1044 ++dev->estats.rx_dropped_resize;
1045 dev_kfree_skb(dev->rx_sg_skb);
1046 dev->rx_sg_skb = NULL;
1049 /* Make a first pass over RX ring and mark BDs ready, dropping
1050 * non-processed packets on the way. We need this as a separate pass
1051 * to simplify error recovery in the case of allocation failure later.
1053 for (i = 0; i < NUM_RX_BUFF; ++i) {
1054 if (dev->rx_desc[i].ctrl & MAL_RX_CTRL_FIRST)
1055 ++dev->estats.rx_dropped_resize;
1057 dev->rx_desc[i].data_len = 0;
1058 dev->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY |
1059 (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1062 /* Reallocate RX ring only if bigger skb buffers are required */
1063 if (rx_skb_size <= dev->rx_skb_size)
1066 /* Second pass, allocate new skbs */
1067 for (i = 0; i < NUM_RX_BUFF; ++i) {
1068 struct sk_buff *skb = alloc_skb(rx_skb_size, GFP_ATOMIC);
1074 BUG_ON(!dev->rx_skb[i]);
1075 dev_kfree_skb(dev->rx_skb[i]);
1077 skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
1078 dev->rx_desc[i].data_ptr =
1079 dma_map_single(&dev->ofdev->dev, skb->data - 2, rx_sync_size,
1080 DMA_FROM_DEVICE) + 2;
1081 dev->rx_skb[i] = skb;
1084 /* Check if we need to change "Jumbo" bit in MR1 */
1085 if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) {
1086 mr1_jumbo_bit_change = (new_mtu > ETH_DATA_LEN) ||
1087 (dev->ndev->mtu > ETH_DATA_LEN);
1089 mr1_jumbo_bit_change = (new_mtu > ETH_DATA_LEN) ^
1090 (dev->ndev->mtu > ETH_DATA_LEN);
1093 if (mr1_jumbo_bit_change) {
1094 /* This is to prevent starting RX channel in emac_rx_enable() */
1095 set_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1097 dev->ndev->mtu = new_mtu;
1098 emac_full_tx_reset(dev);
1101 mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(new_mtu));
1104 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1106 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1107 emac_rx_enable(dev);
1108 emac_netif_start(dev);
1109 mutex_unlock(&dev->link_lock);
1114 /* Process ctx, rtnl_lock semaphore */
1115 static int emac_change_mtu(struct net_device *ndev, int new_mtu)
1117 struct emac_instance *dev = netdev_priv(ndev);
1120 DBG(dev, "change_mtu(%d)" NL, new_mtu);
1122 if (netif_running(ndev)) {
1123 /* Check if we really need to reinitialize RX ring */
1124 if (emac_rx_skb_size(ndev->mtu) != emac_rx_skb_size(new_mtu))
1125 ret = emac_resize_rx_ring(dev, new_mtu);
1129 ndev->mtu = new_mtu;
1130 dev->rx_skb_size = emac_rx_skb_size(new_mtu);
1131 dev->rx_sync_size = emac_rx_sync_size(new_mtu);
1137 static void emac_clean_tx_ring(struct emac_instance *dev)
1141 for (i = 0; i < NUM_TX_BUFF; ++i) {
1142 if (dev->tx_skb[i]) {
1143 dev_kfree_skb(dev->tx_skb[i]);
1144 dev->tx_skb[i] = NULL;
1145 if (dev->tx_desc[i].ctrl & MAL_TX_CTRL_READY)
1146 ++dev->estats.tx_dropped;
1148 dev->tx_desc[i].ctrl = 0;
1149 dev->tx_desc[i].data_ptr = 0;
1153 static void emac_clean_rx_ring(struct emac_instance *dev)
1157 for (i = 0; i < NUM_RX_BUFF; ++i)
1158 if (dev->rx_skb[i]) {
1159 dev->rx_desc[i].ctrl = 0;
1160 dev_kfree_skb(dev->rx_skb[i]);
1161 dev->rx_skb[i] = NULL;
1162 dev->rx_desc[i].data_ptr = 0;
1165 if (dev->rx_sg_skb) {
1166 dev_kfree_skb(dev->rx_sg_skb);
1167 dev->rx_sg_skb = NULL;
1171 static inline int emac_alloc_rx_skb(struct emac_instance *dev, int slot,
1174 struct sk_buff *skb = alloc_skb(dev->rx_skb_size, flags);
1178 dev->rx_skb[slot] = skb;
1179 dev->rx_desc[slot].data_len = 0;
1181 skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
1182 dev->rx_desc[slot].data_ptr =
1183 dma_map_single(&dev->ofdev->dev, skb->data - 2, dev->rx_sync_size,
1184 DMA_FROM_DEVICE) + 2;
1186 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
1187 (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1192 static void emac_print_link_status(struct emac_instance *dev)
1194 if (netif_carrier_ok(dev->ndev))
1195 printk(KERN_INFO "%s: link is up, %d %s%s\n",
1196 dev->ndev->name, dev->phy.speed,
1197 dev->phy.duplex == DUPLEX_FULL ? "FDX" : "HDX",
1198 dev->phy.pause ? ", pause enabled" :
1199 dev->phy.asym_pause ? ", asymmetric pause enabled" : "");
1201 printk(KERN_INFO "%s: link is down\n", dev->ndev->name);
1204 /* Process ctx, rtnl_lock semaphore */
1205 static int emac_open(struct net_device *ndev)
1207 struct emac_instance *dev = netdev_priv(ndev);
1210 DBG(dev, "open" NL);
1212 /* Setup error IRQ handler */
1213 err = request_irq(dev->emac_irq, emac_irq, 0, "EMAC", dev);
1215 printk(KERN_ERR "%s: failed to request IRQ %d\n",
1216 ndev->name, dev->emac_irq);
1220 /* Allocate RX ring */
1221 for (i = 0; i < NUM_RX_BUFF; ++i)
1222 if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) {
1223 printk(KERN_ERR "%s: failed to allocate RX ring\n",
1228 dev->tx_cnt = dev->tx_slot = dev->ack_slot = dev->rx_slot = 0;
1229 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1230 dev->rx_sg_skb = NULL;
1232 mutex_lock(&dev->link_lock);
1235 /* Start PHY polling now.
1237 if (dev->phy.address >= 0) {
1238 int link_poll_interval;
1239 if (dev->phy.def->ops->poll_link(&dev->phy)) {
1240 dev->phy.def->ops->read_link(&dev->phy);
1241 emac_rx_clk_default(dev);
1242 netif_carrier_on(dev->ndev);
1243 link_poll_interval = PHY_POLL_LINK_ON;
1245 emac_rx_clk_tx(dev);
1246 netif_carrier_off(dev->ndev);
1247 link_poll_interval = PHY_POLL_LINK_OFF;
1249 dev->link_polling = 1;
1251 schedule_delayed_work(&dev->link_work, link_poll_interval);
1252 emac_print_link_status(dev);
1254 netif_carrier_on(dev->ndev);
1256 /* Required for Pause packet support in EMAC */
1257 dev_mc_add_global(ndev, default_mcast_addr);
1259 emac_configure(dev);
1260 mal_poll_add(dev->mal, &dev->commac);
1261 mal_enable_tx_channel(dev->mal, dev->mal_tx_chan);
1262 mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(ndev->mtu));
1263 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1264 emac_tx_enable(dev);
1265 emac_rx_enable(dev);
1266 emac_netif_start(dev);
1268 mutex_unlock(&dev->link_lock);
1272 emac_clean_rx_ring(dev);
1273 free_irq(dev->emac_irq, dev);
1280 static int emac_link_differs(struct emac_instance *dev)
1282 u32 r = in_be32(&dev->emacp->mr1);
1284 int duplex = r & EMAC_MR1_FDE ? DUPLEX_FULL : DUPLEX_HALF;
1285 int speed, pause, asym_pause;
1287 if (r & EMAC_MR1_MF_1000)
1289 else if (r & EMAC_MR1_MF_100)
1294 switch (r & (EMAC_MR1_EIFC | EMAC_MR1_APP)) {
1295 case (EMAC_MR1_EIFC | EMAC_MR1_APP):
1304 pause = asym_pause = 0;
1306 return speed != dev->phy.speed || duplex != dev->phy.duplex ||
1307 pause != dev->phy.pause || asym_pause != dev->phy.asym_pause;
1311 static void emac_link_timer(struct work_struct *work)
1313 struct emac_instance *dev =
1314 container_of(to_delayed_work(work),
1315 struct emac_instance, link_work);
1316 int link_poll_interval;
1318 mutex_lock(&dev->link_lock);
1319 DBG2(dev, "link timer" NL);
1324 if (dev->phy.def->ops->poll_link(&dev->phy)) {
1325 if (!netif_carrier_ok(dev->ndev)) {
1326 emac_rx_clk_default(dev);
1327 /* Get new link parameters */
1328 dev->phy.def->ops->read_link(&dev->phy);
1330 netif_carrier_on(dev->ndev);
1331 emac_netif_stop(dev);
1332 emac_full_tx_reset(dev);
1333 emac_netif_start(dev);
1334 emac_print_link_status(dev);
1336 link_poll_interval = PHY_POLL_LINK_ON;
1338 if (netif_carrier_ok(dev->ndev)) {
1339 emac_rx_clk_tx(dev);
1340 netif_carrier_off(dev->ndev);
1341 netif_tx_disable(dev->ndev);
1342 emac_reinitialize(dev);
1343 emac_print_link_status(dev);
1345 link_poll_interval = PHY_POLL_LINK_OFF;
1347 schedule_delayed_work(&dev->link_work, link_poll_interval);
1349 mutex_unlock(&dev->link_lock);
1352 static void emac_force_link_update(struct emac_instance *dev)
1354 netif_carrier_off(dev->ndev);
1356 if (dev->link_polling) {
1357 cancel_delayed_work_sync(&dev->link_work);
1358 if (dev->link_polling)
1359 schedule_delayed_work(&dev->link_work, PHY_POLL_LINK_OFF);
1363 /* Process ctx, rtnl_lock semaphore */
1364 static int emac_close(struct net_device *ndev)
1366 struct emac_instance *dev = netdev_priv(ndev);
1368 DBG(dev, "close" NL);
1370 if (dev->phy.address >= 0) {
1371 dev->link_polling = 0;
1372 cancel_delayed_work_sync(&dev->link_work);
1374 mutex_lock(&dev->link_lock);
1375 emac_netif_stop(dev);
1377 mutex_unlock(&dev->link_lock);
1379 emac_rx_disable(dev);
1380 emac_tx_disable(dev);
1381 mal_disable_rx_channel(dev->mal, dev->mal_rx_chan);
1382 mal_disable_tx_channel(dev->mal, dev->mal_tx_chan);
1383 mal_poll_del(dev->mal, &dev->commac);
1385 emac_clean_tx_ring(dev);
1386 emac_clean_rx_ring(dev);
1388 free_irq(dev->emac_irq, dev);
1390 netif_carrier_off(ndev);
1395 static inline u16 emac_tx_csum(struct emac_instance *dev,
1396 struct sk_buff *skb)
1398 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) &&
1399 (skb->ip_summed == CHECKSUM_PARTIAL)) {
1400 ++dev->stats.tx_packets_csum;
1401 return EMAC_TX_CTRL_TAH_CSUM;
1406 static inline int emac_xmit_finish(struct emac_instance *dev, int len)
1408 struct emac_regs __iomem *p = dev->emacp;
1409 struct net_device *ndev = dev->ndev;
1411 /* Send the packet out. If the if makes a significant perf
1412 * difference, then we can store the TMR0 value in "dev"
1415 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
1416 out_be32(&p->tmr0, EMAC4_TMR0_XMIT);
1418 out_be32(&p->tmr0, EMAC_TMR0_XMIT);
1420 if (unlikely(++dev->tx_cnt == NUM_TX_BUFF)) {
1421 netif_stop_queue(ndev);
1422 DBG2(dev, "stopped TX queue" NL);
1425 netif_trans_update(ndev);
1426 ++dev->stats.tx_packets;
1427 dev->stats.tx_bytes += len;
1429 return NETDEV_TX_OK;
1433 static int emac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1435 struct emac_instance *dev = netdev_priv(ndev);
1436 unsigned int len = skb->len;
1439 u16 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1440 MAL_TX_CTRL_LAST | emac_tx_csum(dev, skb);
1442 slot = dev->tx_slot++;
1443 if (dev->tx_slot == NUM_TX_BUFF) {
1445 ctrl |= MAL_TX_CTRL_WRAP;
1448 DBG2(dev, "xmit(%u) %d" NL, len, slot);
1450 dev->tx_skb[slot] = skb;
1451 dev->tx_desc[slot].data_ptr = dma_map_single(&dev->ofdev->dev,
1454 dev->tx_desc[slot].data_len = (u16) len;
1456 dev->tx_desc[slot].ctrl = ctrl;
1458 return emac_xmit_finish(dev, len);
1461 static inline int emac_xmit_split(struct emac_instance *dev, int slot,
1462 u32 pd, int len, int last, u16 base_ctrl)
1465 u16 ctrl = base_ctrl;
1466 int chunk = min(len, MAL_MAX_TX_SIZE);
1469 slot = (slot + 1) % NUM_TX_BUFF;
1472 ctrl |= MAL_TX_CTRL_LAST;
1473 if (slot == NUM_TX_BUFF - 1)
1474 ctrl |= MAL_TX_CTRL_WRAP;
1476 dev->tx_skb[slot] = NULL;
1477 dev->tx_desc[slot].data_ptr = pd;
1478 dev->tx_desc[slot].data_len = (u16) chunk;
1479 dev->tx_desc[slot].ctrl = ctrl;
1490 /* Tx lock BH disabled (SG version for TAH equipped EMACs) */
1491 static int emac_start_xmit_sg(struct sk_buff *skb, struct net_device *ndev)
1493 struct emac_instance *dev = netdev_priv(ndev);
1494 int nr_frags = skb_shinfo(skb)->nr_frags;
1495 int len = skb->len, chunk;
1500 /* This is common "fast" path */
1501 if (likely(!nr_frags && len <= MAL_MAX_TX_SIZE))
1502 return emac_start_xmit(skb, ndev);
1504 len -= skb->data_len;
1506 /* Note, this is only an *estimation*, we can still run out of empty
1507 * slots because of the additional fragmentation into
1508 * MAL_MAX_TX_SIZE-sized chunks
1510 if (unlikely(dev->tx_cnt + nr_frags + mal_tx_chunks(len) > NUM_TX_BUFF))
1513 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1514 emac_tx_csum(dev, skb);
1515 slot = dev->tx_slot;
1518 dev->tx_skb[slot] = NULL;
1519 chunk = min(len, MAL_MAX_TX_SIZE);
1520 dev->tx_desc[slot].data_ptr = pd =
1521 dma_map_single(&dev->ofdev->dev, skb->data, len, DMA_TO_DEVICE);
1522 dev->tx_desc[slot].data_len = (u16) chunk;
1525 slot = emac_xmit_split(dev, slot, pd + chunk, len, !nr_frags,
1528 for (i = 0; i < nr_frags; ++i) {
1529 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1530 len = skb_frag_size(frag);
1532 if (unlikely(dev->tx_cnt + mal_tx_chunks(len) >= NUM_TX_BUFF))
1535 pd = skb_frag_dma_map(&dev->ofdev->dev, frag, 0, len,
1538 slot = emac_xmit_split(dev, slot, pd, len, i == nr_frags - 1,
1542 DBG2(dev, "xmit_sg(%u) %d - %d" NL, skb->len, dev->tx_slot, slot);
1544 /* Attach skb to the last slot so we don't release it too early */
1545 dev->tx_skb[slot] = skb;
1547 /* Send the packet out */
1548 if (dev->tx_slot == NUM_TX_BUFF - 1)
1549 ctrl |= MAL_TX_CTRL_WRAP;
1551 dev->tx_desc[dev->tx_slot].ctrl = ctrl;
1552 dev->tx_slot = (slot + 1) % NUM_TX_BUFF;
1554 return emac_xmit_finish(dev, skb->len);
1557 /* Well, too bad. Our previous estimation was overly optimistic.
1560 while (slot != dev->tx_slot) {
1561 dev->tx_desc[slot].ctrl = 0;
1564 slot = NUM_TX_BUFF - 1;
1566 ++dev->estats.tx_undo;
1569 netif_stop_queue(ndev);
1570 DBG2(dev, "stopped TX queue" NL);
1571 return NETDEV_TX_BUSY;
1575 static void emac_parse_tx_error(struct emac_instance *dev, u16 ctrl)
1577 struct emac_error_stats *st = &dev->estats;
1579 DBG(dev, "BD TX error %04x" NL, ctrl);
1582 if (ctrl & EMAC_TX_ST_BFCS)
1583 ++st->tx_bd_bad_fcs;
1584 if (ctrl & EMAC_TX_ST_LCS)
1585 ++st->tx_bd_carrier_loss;
1586 if (ctrl & EMAC_TX_ST_ED)
1587 ++st->tx_bd_excessive_deferral;
1588 if (ctrl & EMAC_TX_ST_EC)
1589 ++st->tx_bd_excessive_collisions;
1590 if (ctrl & EMAC_TX_ST_LC)
1591 ++st->tx_bd_late_collision;
1592 if (ctrl & EMAC_TX_ST_MC)
1593 ++st->tx_bd_multple_collisions;
1594 if (ctrl & EMAC_TX_ST_SC)
1595 ++st->tx_bd_single_collision;
1596 if (ctrl & EMAC_TX_ST_UR)
1597 ++st->tx_bd_underrun;
1598 if (ctrl & EMAC_TX_ST_SQE)
1602 static void emac_poll_tx(void *param)
1604 struct emac_instance *dev = param;
1607 DBG2(dev, "poll_tx, %d %d" NL, dev->tx_cnt, dev->ack_slot);
1609 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
1610 bad_mask = EMAC_IS_BAD_TX_TAH;
1612 bad_mask = EMAC_IS_BAD_TX;
1614 netif_tx_lock_bh(dev->ndev);
1617 int slot = dev->ack_slot, n = 0;
1619 ctrl = dev->tx_desc[slot].ctrl;
1620 if (!(ctrl & MAL_TX_CTRL_READY)) {
1621 struct sk_buff *skb = dev->tx_skb[slot];
1626 dev->tx_skb[slot] = NULL;
1628 slot = (slot + 1) % NUM_TX_BUFF;
1630 if (unlikely(ctrl & bad_mask))
1631 emac_parse_tx_error(dev, ctrl);
1637 dev->ack_slot = slot;
1638 if (netif_queue_stopped(dev->ndev) &&
1639 dev->tx_cnt < EMAC_TX_WAKEUP_THRESH)
1640 netif_wake_queue(dev->ndev);
1642 DBG2(dev, "tx %d pkts" NL, n);
1645 netif_tx_unlock_bh(dev->ndev);
1648 static inline void emac_recycle_rx_skb(struct emac_instance *dev, int slot,
1651 struct sk_buff *skb = dev->rx_skb[slot];
1653 DBG2(dev, "recycle %d %d" NL, slot, len);
1656 dma_map_single(&dev->ofdev->dev, skb->data - 2,
1657 EMAC_DMA_ALIGN(len + 2), DMA_FROM_DEVICE);
1659 dev->rx_desc[slot].data_len = 0;
1661 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
1662 (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1665 static void emac_parse_rx_error(struct emac_instance *dev, u16 ctrl)
1667 struct emac_error_stats *st = &dev->estats;
1669 DBG(dev, "BD RX error %04x" NL, ctrl);
1672 if (ctrl & EMAC_RX_ST_OE)
1673 ++st->rx_bd_overrun;
1674 if (ctrl & EMAC_RX_ST_BP)
1675 ++st->rx_bd_bad_packet;
1676 if (ctrl & EMAC_RX_ST_RP)
1677 ++st->rx_bd_runt_packet;
1678 if (ctrl & EMAC_RX_ST_SE)
1679 ++st->rx_bd_short_event;
1680 if (ctrl & EMAC_RX_ST_AE)
1681 ++st->rx_bd_alignment_error;
1682 if (ctrl & EMAC_RX_ST_BFCS)
1683 ++st->rx_bd_bad_fcs;
1684 if (ctrl & EMAC_RX_ST_PTL)
1685 ++st->rx_bd_packet_too_long;
1686 if (ctrl & EMAC_RX_ST_ORE)
1687 ++st->rx_bd_out_of_range;
1688 if (ctrl & EMAC_RX_ST_IRE)
1689 ++st->rx_bd_in_range;
1692 static inline void emac_rx_csum(struct emac_instance *dev,
1693 struct sk_buff *skb, u16 ctrl)
1695 #ifdef CONFIG_IBM_EMAC_TAH
1696 if (!ctrl && dev->tah_dev) {
1697 skb->ip_summed = CHECKSUM_UNNECESSARY;
1698 ++dev->stats.rx_packets_csum;
1703 static inline int emac_rx_sg_append(struct emac_instance *dev, int slot)
1705 if (likely(dev->rx_sg_skb != NULL)) {
1706 int len = dev->rx_desc[slot].data_len;
1707 int tot_len = dev->rx_sg_skb->len + len;
1709 if (unlikely(tot_len + 2 > dev->rx_skb_size)) {
1710 ++dev->estats.rx_dropped_mtu;
1711 dev_kfree_skb(dev->rx_sg_skb);
1712 dev->rx_sg_skb = NULL;
1714 memcpy(skb_tail_pointer(dev->rx_sg_skb),
1715 dev->rx_skb[slot]->data, len);
1716 skb_put(dev->rx_sg_skb, len);
1717 emac_recycle_rx_skb(dev, slot, len);
1721 emac_recycle_rx_skb(dev, slot, 0);
1725 /* NAPI poll context */
1726 static int emac_poll_rx(void *param, int budget)
1728 struct emac_instance *dev = param;
1729 int slot = dev->rx_slot, received = 0;
1731 DBG2(dev, "poll_rx(%d)" NL, budget);
1734 while (budget > 0) {
1736 struct sk_buff *skb;
1737 u16 ctrl = dev->rx_desc[slot].ctrl;
1739 if (ctrl & MAL_RX_CTRL_EMPTY)
1742 skb = dev->rx_skb[slot];
1744 len = dev->rx_desc[slot].data_len;
1746 if (unlikely(!MAL_IS_SINGLE_RX(ctrl)))
1749 ctrl &= EMAC_BAD_RX_MASK;
1750 if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1751 emac_parse_rx_error(dev, ctrl);
1752 ++dev->estats.rx_dropped_error;
1753 emac_recycle_rx_skb(dev, slot, 0);
1758 if (len < ETH_HLEN) {
1759 ++dev->estats.rx_dropped_stack;
1760 emac_recycle_rx_skb(dev, slot, len);
1764 if (len && len < EMAC_RX_COPY_THRESH) {
1765 struct sk_buff *copy_skb =
1766 alloc_skb(len + EMAC_RX_SKB_HEADROOM + 2, GFP_ATOMIC);
1767 if (unlikely(!copy_skb))
1770 skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2);
1771 memcpy(copy_skb->data - 2, skb->data - 2, len + 2);
1772 emac_recycle_rx_skb(dev, slot, len);
1774 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC)))
1779 skb->protocol = eth_type_trans(skb, dev->ndev);
1780 emac_rx_csum(dev, skb, ctrl);
1782 if (unlikely(netif_receive_skb(skb) == NET_RX_DROP))
1783 ++dev->estats.rx_dropped_stack;
1785 ++dev->stats.rx_packets;
1787 dev->stats.rx_bytes += len;
1788 slot = (slot + 1) % NUM_RX_BUFF;
1793 if (ctrl & MAL_RX_CTRL_FIRST) {
1794 BUG_ON(dev->rx_sg_skb);
1795 if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) {
1796 DBG(dev, "rx OOM %d" NL, slot);
1797 ++dev->estats.rx_dropped_oom;
1798 emac_recycle_rx_skb(dev, slot, 0);
1800 dev->rx_sg_skb = skb;
1803 } else if (!emac_rx_sg_append(dev, slot) &&
1804 (ctrl & MAL_RX_CTRL_LAST)) {
1806 skb = dev->rx_sg_skb;
1807 dev->rx_sg_skb = NULL;
1809 ctrl &= EMAC_BAD_RX_MASK;
1810 if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1811 emac_parse_rx_error(dev, ctrl);
1812 ++dev->estats.rx_dropped_error;
1820 DBG(dev, "rx OOM %d" NL, slot);
1821 /* Drop the packet and recycle skb */
1822 ++dev->estats.rx_dropped_oom;
1823 emac_recycle_rx_skb(dev, slot, 0);
1828 DBG2(dev, "rx %d BDs" NL, received);
1829 dev->rx_slot = slot;
1832 if (unlikely(budget && test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) {
1834 if (!(dev->rx_desc[slot].ctrl & MAL_RX_CTRL_EMPTY)) {
1835 DBG2(dev, "rx restart" NL);
1840 if (dev->rx_sg_skb) {
1841 DBG2(dev, "dropping partial rx packet" NL);
1842 ++dev->estats.rx_dropped_error;
1843 dev_kfree_skb(dev->rx_sg_skb);
1844 dev->rx_sg_skb = NULL;
1847 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1848 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1849 emac_rx_enable(dev);
1855 /* NAPI poll context */
1856 static int emac_peek_rx(void *param)
1858 struct emac_instance *dev = param;
1860 return !(dev->rx_desc[dev->rx_slot].ctrl & MAL_RX_CTRL_EMPTY);
1863 /* NAPI poll context */
1864 static int emac_peek_rx_sg(void *param)
1866 struct emac_instance *dev = param;
1868 int slot = dev->rx_slot;
1870 u16 ctrl = dev->rx_desc[slot].ctrl;
1871 if (ctrl & MAL_RX_CTRL_EMPTY)
1873 else if (ctrl & MAL_RX_CTRL_LAST)
1876 slot = (slot + 1) % NUM_RX_BUFF;
1878 /* I'm just being paranoid here :) */
1879 if (unlikely(slot == dev->rx_slot))
1885 static void emac_rxde(void *param)
1887 struct emac_instance *dev = param;
1889 ++dev->estats.rx_stopped;
1890 emac_rx_disable_async(dev);
1894 static irqreturn_t emac_irq(int irq, void *dev_instance)
1896 struct emac_instance *dev = dev_instance;
1897 struct emac_regs __iomem *p = dev->emacp;
1898 struct emac_error_stats *st = &dev->estats;
1901 spin_lock(&dev->lock);
1903 isr = in_be32(&p->isr);
1904 out_be32(&p->isr, isr);
1906 DBG(dev, "isr = %08x" NL, isr);
1908 if (isr & EMAC4_ISR_TXPE)
1910 if (isr & EMAC4_ISR_RXPE)
1912 if (isr & EMAC4_ISR_TXUE)
1914 if (isr & EMAC4_ISR_RXOE)
1915 ++st->rx_fifo_overrun;
1916 if (isr & EMAC_ISR_OVR)
1918 if (isr & EMAC_ISR_BP)
1919 ++st->rx_bad_packet;
1920 if (isr & EMAC_ISR_RP)
1921 ++st->rx_runt_packet;
1922 if (isr & EMAC_ISR_SE)
1923 ++st->rx_short_event;
1924 if (isr & EMAC_ISR_ALE)
1925 ++st->rx_alignment_error;
1926 if (isr & EMAC_ISR_BFCS)
1928 if (isr & EMAC_ISR_PTLE)
1929 ++st->rx_packet_too_long;
1930 if (isr & EMAC_ISR_ORE)
1931 ++st->rx_out_of_range;
1932 if (isr & EMAC_ISR_IRE)
1934 if (isr & EMAC_ISR_SQE)
1936 if (isr & EMAC_ISR_TE)
1939 spin_unlock(&dev->lock);
1944 static struct net_device_stats *emac_stats(struct net_device *ndev)
1946 struct emac_instance *dev = netdev_priv(ndev);
1947 struct emac_stats *st = &dev->stats;
1948 struct emac_error_stats *est = &dev->estats;
1949 struct net_device_stats *nst = &ndev->stats;
1950 unsigned long flags;
1952 DBG2(dev, "stats" NL);
1954 /* Compute "legacy" statistics */
1955 spin_lock_irqsave(&dev->lock, flags);
1956 nst->rx_packets = (unsigned long)st->rx_packets;
1957 nst->rx_bytes = (unsigned long)st->rx_bytes;
1958 nst->tx_packets = (unsigned long)st->tx_packets;
1959 nst->tx_bytes = (unsigned long)st->tx_bytes;
1960 nst->rx_dropped = (unsigned long)(est->rx_dropped_oom +
1961 est->rx_dropped_error +
1962 est->rx_dropped_resize +
1963 est->rx_dropped_mtu);
1964 nst->tx_dropped = (unsigned long)est->tx_dropped;
1966 nst->rx_errors = (unsigned long)est->rx_bd_errors;
1967 nst->rx_fifo_errors = (unsigned long)(est->rx_bd_overrun +
1968 est->rx_fifo_overrun +
1970 nst->rx_frame_errors = (unsigned long)(est->rx_bd_alignment_error +
1971 est->rx_alignment_error);
1972 nst->rx_crc_errors = (unsigned long)(est->rx_bd_bad_fcs +
1974 nst->rx_length_errors = (unsigned long)(est->rx_bd_runt_packet +
1975 est->rx_bd_short_event +
1976 est->rx_bd_packet_too_long +
1977 est->rx_bd_out_of_range +
1978 est->rx_bd_in_range +
1979 est->rx_runt_packet +
1980 est->rx_short_event +
1981 est->rx_packet_too_long +
1982 est->rx_out_of_range +
1985 nst->tx_errors = (unsigned long)(est->tx_bd_errors + est->tx_errors);
1986 nst->tx_fifo_errors = (unsigned long)(est->tx_bd_underrun +
1988 nst->tx_carrier_errors = (unsigned long)est->tx_bd_carrier_loss;
1989 nst->collisions = (unsigned long)(est->tx_bd_excessive_deferral +
1990 est->tx_bd_excessive_collisions +
1991 est->tx_bd_late_collision +
1992 est->tx_bd_multple_collisions);
1993 spin_unlock_irqrestore(&dev->lock, flags);
1997 static struct mal_commac_ops emac_commac_ops = {
1998 .poll_tx = &emac_poll_tx,
1999 .poll_rx = &emac_poll_rx,
2000 .peek_rx = &emac_peek_rx,
2004 static struct mal_commac_ops emac_commac_sg_ops = {
2005 .poll_tx = &emac_poll_tx,
2006 .poll_rx = &emac_poll_rx,
2007 .peek_rx = &emac_peek_rx_sg,
2011 /* Ethtool support */
2012 static int emac_ethtool_get_link_ksettings(struct net_device *ndev,
2013 struct ethtool_link_ksettings *cmd)
2015 struct emac_instance *dev = netdev_priv(ndev);
2016 u32 supported, advertising;
2018 supported = dev->phy.features;
2019 cmd->base.port = PORT_MII;
2020 cmd->base.phy_address = dev->phy.address;
2022 mutex_lock(&dev->link_lock);
2023 advertising = dev->phy.advertising;
2024 cmd->base.autoneg = dev->phy.autoneg;
2025 cmd->base.speed = dev->phy.speed;
2026 cmd->base.duplex = dev->phy.duplex;
2027 mutex_unlock(&dev->link_lock);
2029 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
2031 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
2038 emac_ethtool_set_link_ksettings(struct net_device *ndev,
2039 const struct ethtool_link_ksettings *cmd)
2041 struct emac_instance *dev = netdev_priv(ndev);
2042 u32 f = dev->phy.features;
2045 ethtool_convert_link_mode_to_legacy_u32(&advertising,
2046 cmd->link_modes.advertising);
2048 DBG(dev, "set_settings(%d, %d, %d, 0x%08x)" NL,
2049 cmd->base.autoneg, cmd->base.speed, cmd->base.duplex, advertising);
2051 /* Basic sanity checks */
2052 if (dev->phy.address < 0)
2054 if (cmd->base.autoneg != AUTONEG_ENABLE &&
2055 cmd->base.autoneg != AUTONEG_DISABLE)
2057 if (cmd->base.autoneg == AUTONEG_ENABLE && advertising == 0)
2059 if (cmd->base.duplex != DUPLEX_HALF && cmd->base.duplex != DUPLEX_FULL)
2062 if (cmd->base.autoneg == AUTONEG_DISABLE) {
2063 switch (cmd->base.speed) {
2065 if (cmd->base.duplex == DUPLEX_HALF &&
2066 !(f & SUPPORTED_10baseT_Half))
2068 if (cmd->base.duplex == DUPLEX_FULL &&
2069 !(f & SUPPORTED_10baseT_Full))
2073 if (cmd->base.duplex == DUPLEX_HALF &&
2074 !(f & SUPPORTED_100baseT_Half))
2076 if (cmd->base.duplex == DUPLEX_FULL &&
2077 !(f & SUPPORTED_100baseT_Full))
2081 if (cmd->base.duplex == DUPLEX_HALF &&
2082 !(f & SUPPORTED_1000baseT_Half))
2084 if (cmd->base.duplex == DUPLEX_FULL &&
2085 !(f & SUPPORTED_1000baseT_Full))
2092 mutex_lock(&dev->link_lock);
2093 dev->phy.def->ops->setup_forced(&dev->phy, cmd->base.speed,
2095 mutex_unlock(&dev->link_lock);
2098 if (!(f & SUPPORTED_Autoneg))
2101 mutex_lock(&dev->link_lock);
2102 dev->phy.def->ops->setup_aneg(&dev->phy,
2104 (dev->phy.advertising &
2106 ADVERTISED_Asym_Pause)));
2107 mutex_unlock(&dev->link_lock);
2109 emac_force_link_update(dev);
2114 static void emac_ethtool_get_ringparam(struct net_device *ndev,
2115 struct ethtool_ringparam *rp)
2117 rp->rx_max_pending = rp->rx_pending = NUM_RX_BUFF;
2118 rp->tx_max_pending = rp->tx_pending = NUM_TX_BUFF;
2121 static void emac_ethtool_get_pauseparam(struct net_device *ndev,
2122 struct ethtool_pauseparam *pp)
2124 struct emac_instance *dev = netdev_priv(ndev);
2126 mutex_lock(&dev->link_lock);
2127 if ((dev->phy.features & SUPPORTED_Autoneg) &&
2128 (dev->phy.advertising & (ADVERTISED_Pause | ADVERTISED_Asym_Pause)))
2131 if (dev->phy.duplex == DUPLEX_FULL) {
2133 pp->rx_pause = pp->tx_pause = 1;
2134 else if (dev->phy.asym_pause)
2137 mutex_unlock(&dev->link_lock);
2140 static int emac_get_regs_len(struct emac_instance *dev)
2142 return sizeof(struct emac_ethtool_regs_subhdr) +
2143 sizeof(struct emac_regs);
2146 static int emac_ethtool_get_regs_len(struct net_device *ndev)
2148 struct emac_instance *dev = netdev_priv(ndev);
2151 size = sizeof(struct emac_ethtool_regs_hdr) +
2152 emac_get_regs_len(dev) + mal_get_regs_len(dev->mal);
2153 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
2154 size += zmii_get_regs_len(dev->zmii_dev);
2155 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
2156 size += rgmii_get_regs_len(dev->rgmii_dev);
2157 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
2158 size += tah_get_regs_len(dev->tah_dev);
2163 static void *emac_dump_regs(struct emac_instance *dev, void *buf)
2165 struct emac_ethtool_regs_subhdr *hdr = buf;
2167 hdr->index = dev->cell_index;
2168 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) {
2169 hdr->version = EMAC4SYNC_ETHTOOL_REGS_VER;
2170 } else if (emac_has_feature(dev, EMAC_FTR_EMAC4)) {
2171 hdr->version = EMAC4_ETHTOOL_REGS_VER;
2173 hdr->version = EMAC_ETHTOOL_REGS_VER;
2175 memcpy_fromio(hdr + 1, dev->emacp, sizeof(struct emac_regs));
2176 return (void *)(hdr + 1) + sizeof(struct emac_regs);
2179 static void emac_ethtool_get_regs(struct net_device *ndev,
2180 struct ethtool_regs *regs, void *buf)
2182 struct emac_instance *dev = netdev_priv(ndev);
2183 struct emac_ethtool_regs_hdr *hdr = buf;
2185 hdr->components = 0;
2188 buf = mal_dump_regs(dev->mal, buf);
2189 buf = emac_dump_regs(dev, buf);
2190 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) {
2191 hdr->components |= EMAC_ETHTOOL_REGS_ZMII;
2192 buf = zmii_dump_regs(dev->zmii_dev, buf);
2194 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) {
2195 hdr->components |= EMAC_ETHTOOL_REGS_RGMII;
2196 buf = rgmii_dump_regs(dev->rgmii_dev, buf);
2198 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) {
2199 hdr->components |= EMAC_ETHTOOL_REGS_TAH;
2200 buf = tah_dump_regs(dev->tah_dev, buf);
2204 static int emac_ethtool_nway_reset(struct net_device *ndev)
2206 struct emac_instance *dev = netdev_priv(ndev);
2209 DBG(dev, "nway_reset" NL);
2211 if (dev->phy.address < 0)
2214 mutex_lock(&dev->link_lock);
2215 if (!dev->phy.autoneg) {
2220 dev->phy.def->ops->setup_aneg(&dev->phy, dev->phy.advertising);
2222 mutex_unlock(&dev->link_lock);
2223 emac_force_link_update(dev);
2227 static int emac_ethtool_get_sset_count(struct net_device *ndev, int stringset)
2229 if (stringset == ETH_SS_STATS)
2230 return EMAC_ETHTOOL_STATS_COUNT;
2235 static void emac_ethtool_get_strings(struct net_device *ndev, u32 stringset,
2238 if (stringset == ETH_SS_STATS)
2239 memcpy(buf, &emac_stats_keys, sizeof(emac_stats_keys));
2242 static void emac_ethtool_get_ethtool_stats(struct net_device *ndev,
2243 struct ethtool_stats *estats,
2246 struct emac_instance *dev = netdev_priv(ndev);
2248 memcpy(tmp_stats, &dev->stats, sizeof(dev->stats));
2249 tmp_stats += sizeof(dev->stats) / sizeof(u64);
2250 memcpy(tmp_stats, &dev->estats, sizeof(dev->estats));
2253 static void emac_ethtool_get_drvinfo(struct net_device *ndev,
2254 struct ethtool_drvinfo *info)
2256 struct emac_instance *dev = netdev_priv(ndev);
2258 strlcpy(info->driver, "ibm_emac", sizeof(info->driver));
2259 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2260 snprintf(info->bus_info, sizeof(info->bus_info), "PPC 4xx EMAC-%d %pOF",
2261 dev->cell_index, dev->ofdev->dev.of_node);
2264 static const struct ethtool_ops emac_ethtool_ops = {
2265 .get_drvinfo = emac_ethtool_get_drvinfo,
2267 .get_regs_len = emac_ethtool_get_regs_len,
2268 .get_regs = emac_ethtool_get_regs,
2270 .nway_reset = emac_ethtool_nway_reset,
2272 .get_ringparam = emac_ethtool_get_ringparam,
2273 .get_pauseparam = emac_ethtool_get_pauseparam,
2275 .get_strings = emac_ethtool_get_strings,
2276 .get_sset_count = emac_ethtool_get_sset_count,
2277 .get_ethtool_stats = emac_ethtool_get_ethtool_stats,
2279 .get_link = ethtool_op_get_link,
2280 .get_link_ksettings = emac_ethtool_get_link_ksettings,
2281 .set_link_ksettings = emac_ethtool_set_link_ksettings,
2284 static int emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2286 struct emac_instance *dev = netdev_priv(ndev);
2287 struct mii_ioctl_data *data = if_mii(rq);
2289 DBG(dev, "ioctl %08x" NL, cmd);
2291 if (dev->phy.address < 0)
2296 data->phy_id = dev->phy.address;
2299 data->val_out = emac_mdio_read(ndev, dev->phy.address,
2304 emac_mdio_write(ndev, dev->phy.address, data->reg_num,
2312 struct emac_depentry {
2314 struct device_node *node;
2315 struct platform_device *ofdev;
2319 #define EMAC_DEP_MAL_IDX 0
2320 #define EMAC_DEP_ZMII_IDX 1
2321 #define EMAC_DEP_RGMII_IDX 2
2322 #define EMAC_DEP_TAH_IDX 3
2323 #define EMAC_DEP_MDIO_IDX 4
2324 #define EMAC_DEP_PREV_IDX 5
2325 #define EMAC_DEP_COUNT 6
2327 static int emac_check_deps(struct emac_instance *dev,
2328 struct emac_depentry *deps)
2331 struct device_node *np;
2333 for (i = 0; i < EMAC_DEP_COUNT; i++) {
2334 /* no dependency on that item, allright */
2335 if (deps[i].phandle == 0) {
2339 /* special case for blist as the dependency might go away */
2340 if (i == EMAC_DEP_PREV_IDX) {
2341 np = *(dev->blist - 1);
2343 deps[i].phandle = 0;
2347 if (deps[i].node == NULL)
2348 deps[i].node = of_node_get(np);
2350 if (deps[i].node == NULL)
2351 deps[i].node = of_find_node_by_phandle(deps[i].phandle);
2352 if (deps[i].node == NULL)
2354 if (deps[i].ofdev == NULL)
2355 deps[i].ofdev = of_find_device_by_node(deps[i].node);
2356 if (deps[i].ofdev == NULL)
2358 if (deps[i].drvdata == NULL)
2359 deps[i].drvdata = platform_get_drvdata(deps[i].ofdev);
2360 if (deps[i].drvdata != NULL)
2363 return there == EMAC_DEP_COUNT;
2366 static void emac_put_deps(struct emac_instance *dev)
2368 of_dev_put(dev->mal_dev);
2369 of_dev_put(dev->zmii_dev);
2370 of_dev_put(dev->rgmii_dev);
2371 of_dev_put(dev->mdio_dev);
2372 of_dev_put(dev->tah_dev);
2375 static int emac_of_bus_notify(struct notifier_block *nb, unsigned long action,
2378 /* We are only intereted in device addition */
2379 if (action == BUS_NOTIFY_BOUND_DRIVER)
2380 wake_up_all(&emac_probe_wait);
2384 static struct notifier_block emac_of_bus_notifier = {
2385 .notifier_call = emac_of_bus_notify
2388 static int emac_wait_deps(struct emac_instance *dev)
2390 struct emac_depentry deps[EMAC_DEP_COUNT];
2393 memset(&deps, 0, sizeof(deps));
2395 deps[EMAC_DEP_MAL_IDX].phandle = dev->mal_ph;
2396 deps[EMAC_DEP_ZMII_IDX].phandle = dev->zmii_ph;
2397 deps[EMAC_DEP_RGMII_IDX].phandle = dev->rgmii_ph;
2399 deps[EMAC_DEP_TAH_IDX].phandle = dev->tah_ph;
2401 deps[EMAC_DEP_MDIO_IDX].phandle = dev->mdio_ph;
2402 if (dev->blist && dev->blist > emac_boot_list)
2403 deps[EMAC_DEP_PREV_IDX].phandle = 0xffffffffu;
2404 bus_register_notifier(&platform_bus_type, &emac_of_bus_notifier);
2405 wait_event_timeout(emac_probe_wait,
2406 emac_check_deps(dev, deps),
2407 EMAC_PROBE_DEP_TIMEOUT);
2408 bus_unregister_notifier(&platform_bus_type, &emac_of_bus_notifier);
2409 err = emac_check_deps(dev, deps) ? 0 : -ENODEV;
2410 for (i = 0; i < EMAC_DEP_COUNT; i++) {
2411 of_node_put(deps[i].node);
2413 of_dev_put(deps[i].ofdev);
2416 dev->mal_dev = deps[EMAC_DEP_MAL_IDX].ofdev;
2417 dev->zmii_dev = deps[EMAC_DEP_ZMII_IDX].ofdev;
2418 dev->rgmii_dev = deps[EMAC_DEP_RGMII_IDX].ofdev;
2419 dev->tah_dev = deps[EMAC_DEP_TAH_IDX].ofdev;
2420 dev->mdio_dev = deps[EMAC_DEP_MDIO_IDX].ofdev;
2422 of_dev_put(deps[EMAC_DEP_PREV_IDX].ofdev);
2426 static int emac_read_uint_prop(struct device_node *np, const char *name,
2427 u32 *val, int fatal)
2430 const u32 *prop = of_get_property(np, name, &len);
2431 if (prop == NULL || len < sizeof(u32)) {
2433 printk(KERN_ERR "%pOF: missing %s property\n",
2441 static void emac_adjust_link(struct net_device *ndev)
2443 struct emac_instance *dev = netdev_priv(ndev);
2444 struct phy_device *phy = dev->phy_dev;
2446 dev->phy.autoneg = phy->autoneg;
2447 dev->phy.speed = phy->speed;
2448 dev->phy.duplex = phy->duplex;
2449 dev->phy.pause = phy->pause;
2450 dev->phy.asym_pause = phy->asym_pause;
2451 dev->phy.advertising = phy->advertising;
2454 static int emac_mii_bus_read(struct mii_bus *bus, int addr, int regnum)
2456 int ret = emac_mdio_read(bus->priv, addr, regnum);
2457 /* This is a workaround for powered down ports/phys.
2458 * In the wild, this was seen on the Cisco Meraki MX60(W).
2459 * This hardware disables ports as part of the handoff
2460 * procedure. Accessing the ports will lead to errors
2461 * (-ETIMEDOUT, -EREMOTEIO) that do more harm than good.
2463 return ret < 0 ? 0xffff : ret;
2466 static int emac_mii_bus_write(struct mii_bus *bus, int addr,
2467 int regnum, u16 val)
2469 emac_mdio_write(bus->priv, addr, regnum, val);
2473 static int emac_mii_bus_reset(struct mii_bus *bus)
2475 struct emac_instance *dev = netdev_priv(bus->priv);
2477 return emac_reset(dev);
2480 static int emac_mdio_phy_start_aneg(struct mii_phy *phy,
2481 struct phy_device *phy_dev)
2483 phy_dev->autoneg = phy->autoneg;
2484 phy_dev->speed = phy->speed;
2485 phy_dev->duplex = phy->duplex;
2486 phy_dev->advertising = phy->advertising;
2487 return phy_start_aneg(phy_dev);
2490 static int emac_mdio_setup_aneg(struct mii_phy *phy, u32 advertise)
2492 struct net_device *ndev = phy->dev;
2493 struct emac_instance *dev = netdev_priv(ndev);
2495 phy->autoneg = AUTONEG_ENABLE;
2496 phy->advertising = advertise;
2497 return emac_mdio_phy_start_aneg(phy, dev->phy_dev);
2500 static int emac_mdio_setup_forced(struct mii_phy *phy, int speed, int fd)
2502 struct net_device *ndev = phy->dev;
2503 struct emac_instance *dev = netdev_priv(ndev);
2505 phy->autoneg = AUTONEG_DISABLE;
2508 return emac_mdio_phy_start_aneg(phy, dev->phy_dev);
2511 static int emac_mdio_poll_link(struct mii_phy *phy)
2513 struct net_device *ndev = phy->dev;
2514 struct emac_instance *dev = netdev_priv(ndev);
2517 res = phy_read_status(dev->phy_dev);
2519 dev_err(&dev->ofdev->dev, "link update failed (%d).", res);
2520 return ethtool_op_get_link(ndev);
2523 return dev->phy_dev->link;
2526 static int emac_mdio_read_link(struct mii_phy *phy)
2528 struct net_device *ndev = phy->dev;
2529 struct emac_instance *dev = netdev_priv(ndev);
2530 struct phy_device *phy_dev = dev->phy_dev;
2533 res = phy_read_status(phy_dev);
2537 phy->speed = phy_dev->speed;
2538 phy->duplex = phy_dev->duplex;
2539 phy->pause = phy_dev->pause;
2540 phy->asym_pause = phy_dev->asym_pause;
2544 static int emac_mdio_init_phy(struct mii_phy *phy)
2546 struct net_device *ndev = phy->dev;
2547 struct emac_instance *dev = netdev_priv(ndev);
2549 phy_start(dev->phy_dev);
2550 return phy_init_hw(dev->phy_dev);
2553 static const struct mii_phy_ops emac_dt_mdio_phy_ops = {
2554 .init = emac_mdio_init_phy,
2555 .setup_aneg = emac_mdio_setup_aneg,
2556 .setup_forced = emac_mdio_setup_forced,
2557 .poll_link = emac_mdio_poll_link,
2558 .read_link = emac_mdio_read_link,
2561 static int emac_dt_mdio_probe(struct emac_instance *dev)
2563 struct device_node *mii_np;
2566 mii_np = of_get_child_by_name(dev->ofdev->dev.of_node, "mdio");
2568 dev_err(&dev->ofdev->dev, "no mdio definition found.");
2572 if (!of_device_is_available(mii_np)) {
2577 dev->mii_bus = devm_mdiobus_alloc(&dev->ofdev->dev);
2578 if (!dev->mii_bus) {
2583 dev->mii_bus->priv = dev->ndev;
2584 dev->mii_bus->parent = dev->ndev->dev.parent;
2585 dev->mii_bus->name = "emac_mdio";
2586 dev->mii_bus->read = &emac_mii_bus_read;
2587 dev->mii_bus->write = &emac_mii_bus_write;
2588 dev->mii_bus->reset = &emac_mii_bus_reset;
2589 snprintf(dev->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev->ofdev->name);
2590 res = of_mdiobus_register(dev->mii_bus, mii_np);
2592 dev_err(&dev->ofdev->dev, "cannot register MDIO bus %s (%d)",
2593 dev->mii_bus->name, res);
2597 of_node_put(mii_np);
2601 static int emac_dt_phy_connect(struct emac_instance *dev,
2602 struct device_node *phy_handle)
2604 dev->phy.def = devm_kzalloc(&dev->ofdev->dev, sizeof(*dev->phy.def),
2609 dev->phy_dev = of_phy_connect(dev->ndev, phy_handle, &emac_adjust_link,
2611 if (!dev->phy_dev) {
2612 dev_err(&dev->ofdev->dev, "failed to connect to PHY.\n");
2616 dev->phy.def->phy_id = dev->phy_dev->drv->phy_id;
2617 dev->phy.def->phy_id_mask = dev->phy_dev->drv->phy_id_mask;
2618 dev->phy.def->name = dev->phy_dev->drv->name;
2619 dev->phy.def->ops = &emac_dt_mdio_phy_ops;
2620 dev->phy.features = dev->phy_dev->supported;
2621 dev->phy.address = dev->phy_dev->mdio.addr;
2622 dev->phy.mode = dev->phy_dev->interface;
2626 static int emac_dt_phy_probe(struct emac_instance *dev)
2628 struct device_node *np = dev->ofdev->dev.of_node;
2629 struct device_node *phy_handle;
2632 phy_handle = of_parse_phandle(np, "phy-handle", 0);
2635 res = emac_dt_mdio_probe(dev);
2637 res = emac_dt_phy_connect(dev, phy_handle);
2639 mdiobus_unregister(dev->mii_bus);
2643 of_node_put(phy_handle);
2647 static int emac_init_phy(struct emac_instance *dev)
2649 struct device_node *np = dev->ofdev->dev.of_node;
2650 struct net_device *ndev = dev->ndev;
2654 dev->phy.dev = ndev;
2655 dev->phy.mode = dev->phy_mode;
2657 /* PHY-less configuration. */
2658 if ((dev->phy_address == 0xffffffff && dev->phy_map == 0xffffffff) ||
2659 of_phy_is_fixed_link(np)) {
2662 /* PHY-less configuration. */
2663 dev->phy.address = -1;
2664 dev->phy.features = SUPPORTED_MII;
2665 if (emac_phy_supports_gige(dev->phy_mode))
2666 dev->phy.features |= SUPPORTED_1000baseT_Full;
2668 dev->phy.features |= SUPPORTED_100baseT_Full;
2671 if (of_phy_is_fixed_link(np)) {
2672 int res = emac_dt_mdio_probe(dev);
2677 res = of_phy_register_fixed_link(np);
2678 dev->phy_dev = of_phy_find_device(np);
2679 if (res || !dev->phy_dev) {
2680 mdiobus_unregister(dev->mii_bus);
2681 return res ? res : -EINVAL;
2683 emac_adjust_link(dev->ndev);
2684 put_device(&dev->phy_dev->mdio.dev);
2689 mutex_lock(&emac_phy_map_lock);
2690 phy_map = dev->phy_map | busy_phy_map;
2692 DBG(dev, "PHY maps %08x %08x" NL, dev->phy_map, busy_phy_map);
2694 dev->phy.mdio_read = emac_mdio_read;
2695 dev->phy.mdio_write = emac_mdio_write;
2697 /* Enable internal clock source */
2698 #ifdef CONFIG_PPC_DCR_NATIVE
2699 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2700 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2702 /* PHY clock workaround */
2703 emac_rx_clk_tx(dev);
2705 /* Enable internal clock source on 440GX*/
2706 #ifdef CONFIG_PPC_DCR_NATIVE
2707 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2708 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2710 /* Configure EMAC with defaults so we can at least use MDIO
2711 * This is needed mostly for 440GX
2713 if (emac_phy_gpcs(dev->phy.mode)) {
2715 * Make GPCS PHY address equal to EMAC index.
2716 * We probably should take into account busy_phy_map
2717 * and/or phy_map here.
2719 * Note that the busy_phy_map is currently global
2720 * while it should probably be per-ASIC...
2722 dev->phy.gpcs_address = dev->gpcs_address;
2723 if (dev->phy.gpcs_address == 0xffffffff)
2724 dev->phy.address = dev->cell_index;
2727 emac_configure(dev);
2729 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) {
2730 int res = emac_dt_phy_probe(dev);
2734 /* No phy-handle property configured.
2735 * Continue with the existing phy probe
2741 mutex_unlock(&emac_phy_map_lock);
2745 mutex_unlock(&emac_phy_map_lock);
2746 dev_err(&dev->ofdev->dev, "failed to attach dt phy (%d).\n",
2752 if (dev->phy_address != 0xffffffff)
2753 phy_map = ~(1 << dev->phy_address);
2755 for (i = 0; i < 0x20; phy_map >>= 1, ++i)
2756 if (!(phy_map & 1)) {
2758 busy_phy_map |= 1 << i;
2760 /* Quick check if there is a PHY at the address */
2761 r = emac_mdio_read(dev->ndev, i, MII_BMCR);
2762 if (r == 0xffff || r < 0)
2764 if (!emac_mii_phy_probe(&dev->phy, i))
2768 /* Enable external clock source */
2769 #ifdef CONFIG_PPC_DCR_NATIVE
2770 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2771 dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0);
2773 mutex_unlock(&emac_phy_map_lock);
2775 printk(KERN_WARNING "%pOF: can't find PHY!\n", np);
2781 if (dev->phy.def->ops->init)
2782 dev->phy.def->ops->init(&dev->phy);
2784 /* Disable any PHY features not supported by the platform */
2785 dev->phy.def->features &= ~dev->phy_feat_exc;
2786 dev->phy.features &= ~dev->phy_feat_exc;
2788 /* Setup initial link parameters */
2789 if (dev->phy.features & SUPPORTED_Autoneg) {
2790 adv = dev->phy.features;
2791 if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x))
2792 adv |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
2793 /* Restart autonegotiation */
2794 dev->phy.def->ops->setup_aneg(&dev->phy, adv);
2796 u32 f = dev->phy.def->features;
2797 int speed = SPEED_10, fd = DUPLEX_HALF;
2799 /* Select highest supported speed/duplex */
2800 if (f & SUPPORTED_1000baseT_Full) {
2803 } else if (f & SUPPORTED_1000baseT_Half)
2805 else if (f & SUPPORTED_100baseT_Full) {
2808 } else if (f & SUPPORTED_100baseT_Half)
2810 else if (f & SUPPORTED_10baseT_Full)
2813 /* Force link parameters */
2814 dev->phy.def->ops->setup_forced(&dev->phy, speed, fd);
2819 static int emac_init_config(struct emac_instance *dev)
2821 struct device_node *np = dev->ofdev->dev.of_node;
2824 /* Read config from device-tree */
2825 if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1))
2827 if (emac_read_uint_prop(np, "mal-tx-channel", &dev->mal_tx_chan, 1))
2829 if (emac_read_uint_prop(np, "mal-rx-channel", &dev->mal_rx_chan, 1))
2831 if (emac_read_uint_prop(np, "cell-index", &dev->cell_index, 1))
2833 if (emac_read_uint_prop(np, "max-frame-size", &dev->max_mtu, 0))
2834 dev->max_mtu = ETH_DATA_LEN;
2835 if (emac_read_uint_prop(np, "rx-fifo-size", &dev->rx_fifo_size, 0))
2836 dev->rx_fifo_size = 2048;
2837 if (emac_read_uint_prop(np, "tx-fifo-size", &dev->tx_fifo_size, 0))
2838 dev->tx_fifo_size = 2048;
2839 if (emac_read_uint_prop(np, "rx-fifo-size-gige", &dev->rx_fifo_size_gige, 0))
2840 dev->rx_fifo_size_gige = dev->rx_fifo_size;
2841 if (emac_read_uint_prop(np, "tx-fifo-size-gige", &dev->tx_fifo_size_gige, 0))
2842 dev->tx_fifo_size_gige = dev->tx_fifo_size;
2843 if (emac_read_uint_prop(np, "phy-address", &dev->phy_address, 0))
2844 dev->phy_address = 0xffffffff;
2845 if (emac_read_uint_prop(np, "phy-map", &dev->phy_map, 0))
2846 dev->phy_map = 0xffffffff;
2847 if (emac_read_uint_prop(np, "gpcs-address", &dev->gpcs_address, 0))
2848 dev->gpcs_address = 0xffffffff;
2849 if (emac_read_uint_prop(np->parent, "clock-frequency", &dev->opb_bus_freq, 1))
2851 if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0))
2853 if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0))
2855 if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0))
2857 if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0))
2859 if (emac_read_uint_prop(np, "zmii-channel", &dev->zmii_port, 0))
2860 dev->zmii_port = 0xffffffff;
2861 if (emac_read_uint_prop(np, "rgmii-device", &dev->rgmii_ph, 0))
2863 if (emac_read_uint_prop(np, "rgmii-channel", &dev->rgmii_port, 0))
2864 dev->rgmii_port = 0xffffffff;
2865 if (emac_read_uint_prop(np, "fifo-entry-size", &dev->fifo_entry_size, 0))
2866 dev->fifo_entry_size = 16;
2867 if (emac_read_uint_prop(np, "mal-burst-size", &dev->mal_burst_size, 0))
2868 dev->mal_burst_size = 256;
2870 /* PHY mode needs some decoding */
2871 dev->phy_mode = of_get_phy_mode(np);
2872 if (dev->phy_mode < 0)
2873 dev->phy_mode = PHY_MODE_NA;
2875 /* Check EMAC version */
2876 if (of_device_is_compatible(np, "ibm,emac4sync")) {
2877 dev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC);
2878 if (of_device_is_compatible(np, "ibm,emac-460ex") ||
2879 of_device_is_compatible(np, "ibm,emac-460gt"))
2880 dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
2881 if (of_device_is_compatible(np, "ibm,emac-405ex") ||
2882 of_device_is_compatible(np, "ibm,emac-405exr"))
2883 dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2884 if (of_device_is_compatible(np, "ibm,emac-apm821xx")) {
2885 dev->features |= (EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE |
2886 EMAC_FTR_APM821XX_NO_HALF_DUPLEX |
2887 EMAC_FTR_460EX_PHY_CLK_FIX);
2889 } else if (of_device_is_compatible(np, "ibm,emac4")) {
2890 dev->features |= EMAC_FTR_EMAC4;
2891 if (of_device_is_compatible(np, "ibm,emac-440gx"))
2892 dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
2894 if (of_device_is_compatible(np, "ibm,emac-440ep") ||
2895 of_device_is_compatible(np, "ibm,emac-440gr"))
2896 dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2897 if (of_device_is_compatible(np, "ibm,emac-405ez")) {
2898 #ifdef CONFIG_IBM_EMAC_NO_FLOW_CTRL
2899 dev->features |= EMAC_FTR_NO_FLOW_CONTROL_40x;
2901 printk(KERN_ERR "%pOF: Flow control not disabled!\n",
2909 /* Fixup some feature bits based on the device tree */
2910 if (of_get_property(np, "has-inverted-stacr-oc", NULL))
2911 dev->features |= EMAC_FTR_STACR_OC_INVERT;
2912 if (of_get_property(np, "has-new-stacr-staopc", NULL))
2913 dev->features |= EMAC_FTR_HAS_NEW_STACR;
2915 /* CAB lacks the appropriate properties */
2916 if (of_device_is_compatible(np, "ibm,emac-axon"))
2917 dev->features |= EMAC_FTR_HAS_NEW_STACR |
2918 EMAC_FTR_STACR_OC_INVERT;
2920 /* Enable TAH/ZMII/RGMII features as found */
2921 if (dev->tah_ph != 0) {
2922 #ifdef CONFIG_IBM_EMAC_TAH
2923 dev->features |= EMAC_FTR_HAS_TAH;
2925 printk(KERN_ERR "%pOF: TAH support not enabled !\n", np);
2930 if (dev->zmii_ph != 0) {
2931 #ifdef CONFIG_IBM_EMAC_ZMII
2932 dev->features |= EMAC_FTR_HAS_ZMII;
2934 printk(KERN_ERR "%pOF: ZMII support not enabled !\n", np);
2939 if (dev->rgmii_ph != 0) {
2940 #ifdef CONFIG_IBM_EMAC_RGMII
2941 dev->features |= EMAC_FTR_HAS_RGMII;
2943 printk(KERN_ERR "%pOF: RGMII support not enabled !\n", np);
2948 /* Read MAC-address */
2949 p = of_get_property(np, "local-mac-address", NULL);
2951 printk(KERN_ERR "%pOF: Can't find local-mac-address property\n",
2955 memcpy(dev->ndev->dev_addr, p, ETH_ALEN);
2957 /* IAHT and GAHT filter parameterization */
2958 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) {
2959 dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT;
2960 dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT;
2962 dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT;
2963 dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT;
2966 DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE);
2967 DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige);
2968 DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige);
2969 DBG(dev, "max_mtu : %d\n", dev->max_mtu);
2970 DBG(dev, "OPB freq : %d\n", dev->opb_bus_freq);
2975 static const struct net_device_ops emac_netdev_ops = {
2976 .ndo_open = emac_open,
2977 .ndo_stop = emac_close,
2978 .ndo_get_stats = emac_stats,
2979 .ndo_set_rx_mode = emac_set_multicast_list,
2980 .ndo_do_ioctl = emac_ioctl,
2981 .ndo_tx_timeout = emac_tx_timeout,
2982 .ndo_validate_addr = eth_validate_addr,
2983 .ndo_set_mac_address = emac_set_mac_address,
2984 .ndo_start_xmit = emac_start_xmit,
2987 static const struct net_device_ops emac_gige_netdev_ops = {
2988 .ndo_open = emac_open,
2989 .ndo_stop = emac_close,
2990 .ndo_get_stats = emac_stats,
2991 .ndo_set_rx_mode = emac_set_multicast_list,
2992 .ndo_do_ioctl = emac_ioctl,
2993 .ndo_tx_timeout = emac_tx_timeout,
2994 .ndo_validate_addr = eth_validate_addr,
2995 .ndo_set_mac_address = emac_set_mac_address,
2996 .ndo_start_xmit = emac_start_xmit_sg,
2997 .ndo_change_mtu = emac_change_mtu,
3000 static int emac_probe(struct platform_device *ofdev)
3002 struct net_device *ndev;
3003 struct emac_instance *dev;
3004 struct device_node *np = ofdev->dev.of_node;
3005 struct device_node **blist = NULL;
3008 /* Skip unused/unwired EMACS. We leave the check for an unused
3009 * property here for now, but new flat device trees should set a
3010 * status property to "disabled" instead.
3012 if (of_get_property(np, "unused", NULL) || !of_device_is_available(np))
3015 /* Find ourselves in the bootlist if we are there */
3016 for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++)
3017 if (emac_boot_list[i] == np)
3018 blist = &emac_boot_list[i];
3020 /* Allocate our net_device structure */
3022 ndev = alloc_etherdev(sizeof(struct emac_instance));
3026 dev = netdev_priv(ndev);
3030 SET_NETDEV_DEV(ndev, &ofdev->dev);
3032 /* Initialize some embedded data structures */
3033 mutex_init(&dev->mdio_lock);
3034 mutex_init(&dev->link_lock);
3035 spin_lock_init(&dev->lock);
3036 INIT_WORK(&dev->reset_work, emac_reset_work);
3038 /* Init various config data based on device-tree */
3039 err = emac_init_config(dev);
3043 /* Get interrupts. EMAC irq is mandatory, WOL irq is optional */
3044 dev->emac_irq = irq_of_parse_and_map(np, 0);
3045 dev->wol_irq = irq_of_parse_and_map(np, 1);
3046 if (!dev->emac_irq) {
3047 printk(KERN_ERR "%pOF: Can't map main interrupt\n", np);
3051 ndev->irq = dev->emac_irq;
3054 // TODO : platform_get_resource() and devm_ioremap_resource()
3055 dev->emacp = of_iomap(np, 0);
3056 if (dev->emacp == NULL) {
3057 printk(KERN_ERR "%pOF: Can't map device registers!\n", np);
3062 /* Wait for dependent devices */
3063 err = emac_wait_deps(dev);
3066 "%pOF: Timeout waiting for dependent devices\n", np);
3067 /* display more info about what's missing ? */
3070 dev->mal = platform_get_drvdata(dev->mal_dev);
3071 if (dev->mdio_dev != NULL)
3072 dev->mdio_instance = platform_get_drvdata(dev->mdio_dev);
3074 /* Register with MAL */
3075 dev->commac.ops = &emac_commac_ops;
3076 dev->commac.dev = dev;
3077 dev->commac.tx_chan_mask = MAL_CHAN_MASK(dev->mal_tx_chan);
3078 dev->commac.rx_chan_mask = MAL_CHAN_MASK(dev->mal_rx_chan);
3079 err = mal_register_commac(dev->mal, &dev->commac);
3081 printk(KERN_ERR "%pOF: failed to register with mal %pOF!\n",
3082 np, dev->mal_dev->dev.of_node);
3085 dev->rx_skb_size = emac_rx_skb_size(ndev->mtu);
3086 dev->rx_sync_size = emac_rx_sync_size(ndev->mtu);
3088 /* Get pointers to BD rings */
3090 dev->mal->bd_virt + mal_tx_bd_offset(dev->mal, dev->mal_tx_chan);
3092 dev->mal->bd_virt + mal_rx_bd_offset(dev->mal, dev->mal_rx_chan);
3094 DBG(dev, "tx_desc %p" NL, dev->tx_desc);
3095 DBG(dev, "rx_desc %p" NL, dev->rx_desc);
3098 memset(dev->tx_desc, 0, NUM_TX_BUFF * sizeof(struct mal_descriptor));
3099 memset(dev->rx_desc, 0, NUM_RX_BUFF * sizeof(struct mal_descriptor));
3100 memset(dev->tx_skb, 0, NUM_TX_BUFF * sizeof(struct sk_buff *));
3101 memset(dev->rx_skb, 0, NUM_RX_BUFF * sizeof(struct sk_buff *));
3103 /* Attach to ZMII, if needed */
3104 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII) &&
3105 (err = zmii_attach(dev->zmii_dev, dev->zmii_port, &dev->phy_mode)) != 0)
3106 goto err_unreg_commac;
3108 /* Attach to RGMII, if needed */
3109 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII) &&
3110 (err = rgmii_attach(dev->rgmii_dev, dev->rgmii_port, dev->phy_mode)) != 0)
3111 goto err_detach_zmii;
3113 /* Attach to TAH, if needed */
3114 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) &&
3115 (err = tah_attach(dev->tah_dev, dev->tah_port)) != 0)
3116 goto err_detach_rgmii;
3118 /* Set some link defaults before we can find out real parameters */
3119 dev->phy.speed = SPEED_100;
3120 dev->phy.duplex = DUPLEX_FULL;
3121 dev->phy.autoneg = AUTONEG_DISABLE;
3122 dev->phy.pause = dev->phy.asym_pause = 0;
3123 dev->stop_timeout = STOP_TIMEOUT_100;
3124 INIT_DELAYED_WORK(&dev->link_work, emac_link_timer);
3126 /* Some SoCs like APM821xx does not support Half Duplex mode. */
3127 if (emac_has_feature(dev, EMAC_FTR_APM821XX_NO_HALF_DUPLEX)) {
3128 dev->phy_feat_exc = (SUPPORTED_1000baseT_Half |
3129 SUPPORTED_100baseT_Half |
3130 SUPPORTED_10baseT_Half);
3133 /* Find PHY if any */
3134 err = emac_init_phy(dev);
3136 goto err_detach_tah;
3139 ndev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG;
3140 ndev->features |= ndev->hw_features | NETIF_F_RXCSUM;
3142 ndev->watchdog_timeo = 5 * HZ;
3143 if (emac_phy_supports_gige(dev->phy_mode)) {
3144 ndev->netdev_ops = &emac_gige_netdev_ops;
3145 dev->commac.ops = &emac_commac_sg_ops;
3147 ndev->netdev_ops = &emac_netdev_ops;
3148 ndev->ethtool_ops = &emac_ethtool_ops;
3150 /* MTU range: 46 - 1500 or whatever is in OF */
3151 ndev->min_mtu = EMAC_MIN_MTU;
3152 ndev->max_mtu = dev->max_mtu;
3154 netif_carrier_off(ndev);
3156 err = register_netdev(ndev);
3158 printk(KERN_ERR "%pOF: failed to register net device (%d)!\n",
3160 goto err_detach_tah;
3163 /* Set our drvdata last as we don't want them visible until we are
3167 platform_set_drvdata(ofdev, dev);
3169 /* There's a new kid in town ! Let's tell everybody */
3170 wake_up_all(&emac_probe_wait);
3173 printk(KERN_INFO "%s: EMAC-%d %pOF, MAC %pM\n",
3174 ndev->name, dev->cell_index, np, ndev->dev_addr);
3176 if (dev->phy_mode == PHY_MODE_SGMII)
3177 printk(KERN_NOTICE "%s: in SGMII mode\n", ndev->name);
3179 if (dev->phy.address >= 0)
3180 printk("%s: found %s PHY (0x%02x)\n", ndev->name,
3181 dev->phy.def->name, dev->phy.address);
3186 /* I have a bad feeling about this ... */
3189 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
3190 tah_detach(dev->tah_dev, dev->tah_port);
3192 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
3193 rgmii_detach(dev->rgmii_dev, dev->rgmii_port);
3195 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
3196 zmii_detach(dev->zmii_dev, dev->zmii_port);
3198 mal_unregister_commac(dev->mal, &dev->commac);
3202 iounmap(dev->emacp);
3205 irq_dispose_mapping(dev->wol_irq);
3207 irq_dispose_mapping(dev->emac_irq);
3211 /* if we were on the bootlist, remove us as we won't show up and
3212 * wake up all waiters to notify them in case they were waiting
3217 wake_up_all(&emac_probe_wait);
3222 static int emac_remove(struct platform_device *ofdev)
3224 struct emac_instance *dev = platform_get_drvdata(ofdev);
3226 DBG(dev, "remove" NL);
3228 unregister_netdev(dev->ndev);
3230 cancel_work_sync(&dev->reset_work);
3232 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
3233 tah_detach(dev->tah_dev, dev->tah_port);
3234 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
3235 rgmii_detach(dev->rgmii_dev, dev->rgmii_port);
3236 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
3237 zmii_detach(dev->zmii_dev, dev->zmii_port);
3240 phy_disconnect(dev->phy_dev);
3243 mdiobus_unregister(dev->mii_bus);
3245 busy_phy_map &= ~(1 << dev->phy.address);
3246 DBG(dev, "busy_phy_map now %#x" NL, busy_phy_map);
3248 mal_unregister_commac(dev->mal, &dev->commac);
3251 iounmap(dev->emacp);
3254 irq_dispose_mapping(dev->wol_irq);
3256 irq_dispose_mapping(dev->emac_irq);
3258 free_netdev(dev->ndev);
3263 /* XXX Features in here should be replaced by properties... */
3264 static const struct of_device_id emac_match[] =
3268 .compatible = "ibm,emac",
3272 .compatible = "ibm,emac4",
3276 .compatible = "ibm,emac4sync",
3280 MODULE_DEVICE_TABLE(of, emac_match);
3282 static struct platform_driver emac_driver = {
3285 .of_match_table = emac_match,
3287 .probe = emac_probe,
3288 .remove = emac_remove,
3291 static void __init emac_make_bootlist(void)
3293 struct device_node *np = NULL;
3295 int cell_indices[EMAC_BOOT_LIST_SIZE];
3298 while((np = of_find_all_nodes(np)) != NULL) {
3301 if (of_match_node(emac_match, np) == NULL)
3303 if (of_get_property(np, "unused", NULL))
3305 idx = of_get_property(np, "cell-index", NULL);
3308 cell_indices[i] = *idx;
3309 emac_boot_list[i++] = of_node_get(np);
3310 if (i >= EMAC_BOOT_LIST_SIZE) {
3317 /* Bubble sort them (doh, what a creative algorithm :-) */
3318 for (i = 0; max > 1 && (i < (max - 1)); i++)
3319 for (j = i; j < max; j++) {
3320 if (cell_indices[i] > cell_indices[j]) {
3321 swap(emac_boot_list[i], emac_boot_list[j]);
3322 swap(cell_indices[i], cell_indices[j]);
3327 static int __init emac_init(void)
3331 printk(KERN_INFO DRV_DESC ", version " DRV_VERSION "\n");
3333 /* Build EMAC boot list */
3334 emac_make_bootlist();
3336 /* Init submodules */
3349 rc = platform_driver_register(&emac_driver);
3367 static void __exit emac_exit(void)
3371 platform_driver_unregister(&emac_driver);
3378 /* Destroy EMAC boot list */
3379 for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++)
3380 of_node_put(emac_boot_list[i]);
3383 module_init(emac_init);
3384 module_exit(emac_exit);