drivers/net/ethernet/huawei/hinic/hinic_hw_qp_ctxt.h

   1 /*
   2  * Huawei HiNIC PCI Express Linux driver
   3  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  */
  15
  16 #ifndef HINIC_HW_QP_CTXT_H
  17 #define HINIC_HW_QP_CTXT_H
  18
  19 #include <linux/types.h>
  20
  21 #include "hinic_hw_cmdq.h"
  22
  23 #define HINIC_SQ_CTXT_CEQ_ATTR_GLOBAL_SQ_ID_SHIFT       13
  24 #define HINIC_SQ_CTXT_CEQ_ATTR_EN_SHIFT                 23
  25
  26 #define HINIC_SQ_CTXT_CEQ_ATTR_GLOBAL_SQ_ID_MASK        0x3FF
  27 #define HINIC_SQ_CTXT_CEQ_ATTR_EN_MASK                  0x1
  28
  29 #define HINIC_SQ_CTXT_CEQ_ATTR_SET(val, member)         \
  30         (((u32)(val) & HINIC_SQ_CTXT_CEQ_ATTR_##member##_MASK) \
  31          << HINIC_SQ_CTXT_CEQ_ATTR_##member##_SHIFT)
  32
  33 #define HINIC_SQ_CTXT_CI_IDX_SHIFT                      11
  34 #define HINIC_SQ_CTXT_CI_WRAPPED_SHIFT                  23
  35
  36 #define HINIC_SQ_CTXT_CI_IDX_MASK                       0xFFF
  37 #define HINIC_SQ_CTXT_CI_WRAPPED_MASK                   0x1
  38
  39 #define HINIC_SQ_CTXT_CI_SET(val, member)               \
  40         (((u32)(val) & HINIC_SQ_CTXT_CI_##member##_MASK) \
  41          << HINIC_SQ_CTXT_CI_##member##_SHIFT)
  42
  43 #define HINIC_SQ_CTXT_WQ_PAGE_HI_PFN_SHIFT              0
  44 #define HINIC_SQ_CTXT_WQ_PAGE_PI_SHIFT                  20
  45
  46 #define HINIC_SQ_CTXT_WQ_PAGE_HI_PFN_MASK               0xFFFFF
  47 #define HINIC_SQ_CTXT_WQ_PAGE_PI_MASK                   0xFFF
  48
  49 #define HINIC_SQ_CTXT_WQ_PAGE_SET(val, member)          \
  50         (((u32)(val) & HINIC_SQ_CTXT_WQ_PAGE_##member##_MASK) \
  51          << HINIC_SQ_CTXT_WQ_PAGE_##member##_SHIFT)
  52
  53 #define HINIC_SQ_CTXT_PREF_CACHE_THRESHOLD_SHIFT        0
  54 #define HINIC_SQ_CTXT_PREF_CACHE_MAX_SHIFT              14
  55 #define HINIC_SQ_CTXT_PREF_CACHE_MIN_SHIFT              25
  56
  57 #define HINIC_SQ_CTXT_PREF_CACHE_THRESHOLD_MASK         0x3FFF
  58 #define HINIC_SQ_CTXT_PREF_CACHE_MAX_MASK               0x7FF
  59 #define HINIC_SQ_CTXT_PREF_CACHE_MIN_MASK               0x7F
  60
  61 #define HINIC_SQ_CTXT_PREF_WQ_HI_PFN_SHIFT              0
  62 #define HINIC_SQ_CTXT_PREF_CI_SHIFT                     20
  63
  64 #define HINIC_SQ_CTXT_PREF_WQ_HI_PFN_MASK               0xFFFFF
  65 #define HINIC_SQ_CTXT_PREF_CI_MASK                      0xFFF
  66
  67 #define HINIC_SQ_CTXT_PREF_SET(val, member)             \
  68         (((u32)(val) & HINIC_SQ_CTXT_PREF_##member##_MASK) \
  69          << HINIC_SQ_CTXT_PREF_##member##_SHIFT)
  70
  71 #define HINIC_SQ_CTXT_WQ_BLOCK_HI_PFN_SHIFT             0
  72
  73 #define HINIC_SQ_CTXT_WQ_BLOCK_HI_PFN_MASK              0x7FFFFF
  74
  75 #define HINIC_SQ_CTXT_WQ_BLOCK_SET(val, member)         \
  76         (((u32)(val) & HINIC_SQ_CTXT_WQ_BLOCK_##member##_MASK) \
  77          << HINIC_SQ_CTXT_WQ_BLOCK_##member##_SHIFT)
  78
  79 #define HINIC_RQ_CTXT_CEQ_ATTR_EN_SHIFT                 0
  80 #define HINIC_RQ_CTXT_CEQ_ATTR_WRAPPED_SHIFT            1
  81
  82 #define HINIC_RQ_CTXT_CEQ_ATTR_EN_MASK                  0x1
  83 #define HINIC_RQ_CTXT_CEQ_ATTR_WRAPPED_MASK             0x1
  84
  85 #define HINIC_RQ_CTXT_CEQ_ATTR_SET(val, member)         \
  86         (((u32)(val) & HINIC_RQ_CTXT_CEQ_ATTR_##member##_MASK) \
  87          << HINIC_RQ_CTXT_CEQ_ATTR_##member##_SHIFT)
  88
  89 #define HINIC_RQ_CTXT_PI_IDX_SHIFT                      0
  90 #define HINIC_RQ_CTXT_PI_INTR_SHIFT                     22
  91
  92 #define HINIC_RQ_CTXT_PI_IDX_MASK                       0xFFF
  93 #define HINIC_RQ_CTXT_PI_INTR_MASK                      0x3FF
  94
  95 #define HINIC_RQ_CTXT_PI_SET(val, member)               \
  96         (((u32)(val) & HINIC_RQ_CTXT_PI_##member##_MASK) << \
  97          HINIC_RQ_CTXT_PI_##member##_SHIFT)
  98
  99 #define HINIC_RQ_CTXT_WQ_PAGE_HI_PFN_SHIFT              0
 100 #define HINIC_RQ_CTXT_WQ_PAGE_CI_SHIFT                  20
 101
 102 #define HINIC_RQ_CTXT_WQ_PAGE_HI_PFN_MASK               0xFFFFF
 103 #define HINIC_RQ_CTXT_WQ_PAGE_CI_MASK                   0xFFF
 104
 105 #define HINIC_RQ_CTXT_WQ_PAGE_SET(val, member)          \
 106         (((u32)(val) & HINIC_RQ_CTXT_WQ_PAGE_##member##_MASK) << \
 107          HINIC_RQ_CTXT_WQ_PAGE_##member##_SHIFT)
 108
 109 #define HINIC_RQ_CTXT_PREF_CACHE_THRESHOLD_SHIFT        0
 110 #define HINIC_RQ_CTXT_PREF_CACHE_MAX_SHIFT              14
 111 #define HINIC_RQ_CTXT_PREF_CACHE_MIN_SHIFT              25
 112
 113 #define HINIC_RQ_CTXT_PREF_CACHE_THRESHOLD_MASK         0x3FFF
 114 #define HINIC_RQ_CTXT_PREF_CACHE_MAX_MASK               0x7FF
 115 #define HINIC_RQ_CTXT_PREF_CACHE_MIN_MASK               0x7F
 116
 117 #define HINIC_RQ_CTXT_PREF_WQ_HI_PFN_SHIFT              0
 118 #define HINIC_RQ_CTXT_PREF_CI_SHIFT                     20
 119
 120 #define HINIC_RQ_CTXT_PREF_WQ_HI_PFN_MASK               0xFFFFF
 121 #define HINIC_RQ_CTXT_PREF_CI_MASK                      0xFFF
 122
 123 #define HINIC_RQ_CTXT_PREF_SET(val, member)             \
 124         (((u32)(val) & HINIC_RQ_CTXT_PREF_##member##_MASK) << \
 125          HINIC_RQ_CTXT_PREF_##member##_SHIFT)
 126
 127 #define HINIC_RQ_CTXT_WQ_BLOCK_HI_PFN_SHIFT             0
 128
 129 #define HINIC_RQ_CTXT_WQ_BLOCK_HI_PFN_MASK              0x7FFFFF
 130
 131 #define HINIC_RQ_CTXT_WQ_BLOCK_SET(val, member)         \
 132         (((u32)(val) & HINIC_RQ_CTXT_WQ_BLOCK_##member##_MASK) << \
 133          HINIC_RQ_CTXT_WQ_BLOCK_##member##_SHIFT)
 134
 135 #define HINIC_SQ_CTXT_SIZE(num_sqs) (sizeof(struct hinic_qp_ctxt_header) \
 136                                      + (num_sqs) * sizeof(struct hinic_sq_ctxt))
 137
 138 #define HINIC_RQ_CTXT_SIZE(num_rqs) (sizeof(struct hinic_qp_ctxt_header) \
 139                                      + (num_rqs) * sizeof(struct hinic_rq_ctxt))
 140
 141 #define HINIC_WQ_PAGE_PFN_SHIFT         12
 142 #define HINIC_WQ_BLOCK_PFN_SHIFT        9
 143
 144 #define HINIC_WQ_PAGE_PFN(page_addr)    ((page_addr) >> HINIC_WQ_PAGE_PFN_SHIFT)
 145 #define HINIC_WQ_BLOCK_PFN(page_addr)   ((page_addr) >> \
 146                                          HINIC_WQ_BLOCK_PFN_SHIFT)
 147
 148 #define HINIC_Q_CTXT_MAX                \
 149                 ((HINIC_CMDQ_BUF_SIZE - sizeof(struct hinic_qp_ctxt_header)) \
 150                  / sizeof(struct hinic_sq_ctxt))
 151
 152 enum hinic_qp_ctxt_type {
 153         HINIC_QP_CTXT_TYPE_SQ,
 154         HINIC_QP_CTXT_TYPE_RQ
 155 };
 156
 157 struct hinic_qp_ctxt_header {
 158         u16     num_queues;
 159         u16     queue_type;
 160         u32     addr_offset;
 161 };
 162
 163 struct hinic_sq_ctxt {
 164         u32     ceq_attr;
 165
 166         u32     ci_wrapped;
 167
 168         u32     wq_hi_pfn_pi;
 169         u32     wq_lo_pfn;
 170
 171         u32     pref_cache;
 172         u32     pref_wrapped;
 173         u32     pref_wq_hi_pfn_ci;
 174         u32     pref_wq_lo_pfn;
 175
 176         u32     rsvd0;
 177         u32     rsvd1;
 178
 179         u32     wq_block_hi_pfn;
 180         u32     wq_block_lo_pfn;
 181 };
 182
 183 struct hinic_rq_ctxt {
 184         u32     ceq_attr;
 185
 186         u32     pi_intr_attr;
 187
 188         u32     wq_hi_pfn_ci;
 189         u32     wq_lo_pfn;
 190
 191         u32     pref_cache;
 192         u32     pref_wrapped;
 193
 194         u32     pref_wq_hi_pfn_ci;
 195         u32     pref_wq_lo_pfn;
 196
 197         u32     pi_paddr_hi;
 198         u32     pi_paddr_lo;
 199
 200         u32     wq_block_hi_pfn;
 201         u32     wq_block_lo_pfn;
 202 };
 203
 204 struct hinic_sq_ctxt_block {
 205         struct hinic_qp_ctxt_header hdr;
 206         struct hinic_sq_ctxt sq_ctxt[HINIC_Q_CTXT_MAX];
 207 };
 208
 209 struct hinic_rq_ctxt_block {
 210         struct hinic_qp_ctxt_header hdr;
 211         struct hinic_rq_ctxt rq_ctxt[HINIC_Q_CTXT_MAX];
 212 };
 213
 214 #endif