drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #ifndef __HNAE3_H
   5 #define __HNAE3_H
   6
   7 /* Names used in this framework:
   8  *      ae handle (handle):
   9  *        a set of queues provided by AE
  10  *      ring buffer queue (rbq):
  11  *        the channel between upper layer and the AE, can do tx and rx
  12  *      ring:
  13  *        a tx or rx channel within a rbq
  14  *      ring description (desc):
  15  *        an element in the ring with packet information
  16  *      buffer:
  17  *        a memory region referred by desc with the full packet payload
  18  *
  19  * "num" means a static number set as a parameter, "count" mean a dynamic
  20  *   number set while running
  21  * "cb" means control block
  22  */
  23
  24 #include <linux/acpi.h>
  25 #include <linux/dcbnl.h>
  26 #include <linux/delay.h>
  27 #include <linux/device.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/module.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/pci.h>
  32 #include <linux/pkt_sched.h>
  33 #include <linux/types.h>
  34 #include <linux/bitmap.h>
  35 #include <net/pkt_cls.h>
  36 #include <net/pkt_sched.h>
  37
  38 #define HNAE3_MOD_VERSION "1.0"
  39
  40 #define HNAE3_MIN_VECTOR_NUM    2 /* first one for misc, another for IO */
  41
  42 /* Device version */
  43 #define HNAE3_DEVICE_VERSION_V1   0x00020
  44 #define HNAE3_DEVICE_VERSION_V2   0x00021
  45 #define HNAE3_DEVICE_VERSION_V3   0x00030
  46
  47 #define HNAE3_PCI_REVISION_BIT_SIZE             8
  48
  49 /* Device IDs */
  50 #define HNAE3_DEV_ID_GE                         0xA220
  51 #define HNAE3_DEV_ID_25GE                       0xA221
  52 #define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  53 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  54 #define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  55 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  56 #define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  57 #define HNAE3_DEV_ID_200G_RDMA                  0xA228
  58 #define HNAE3_DEV_ID_VF                         0xA22E
  59 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF            0xA22F
  60
  61 #define HNAE3_CLASS_NAME_SIZE 16
  62
  63 #define HNAE3_DEV_INITED_B                      0x0
  64 #define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  65 #define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  66 #define HNAE3_KNIC_CLIENT_INITED_B              0x3
  67 #define HNAE3_UNIC_CLIENT_INITED_B              0x4
  68 #define HNAE3_ROCE_CLIENT_INITED_B              0x5
  69
  70 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) | \
  71                 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  72
  73 #define hnae3_dev_roce_supported(hdev) \
  74         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  75
  76 #define hnae3_dev_dcb_supported(hdev) \
  77         hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  78
  79 enum HNAE3_DEV_CAP_BITS {
  80         HNAE3_DEV_SUPPORT_FD_B,
  81         HNAE3_DEV_SUPPORT_GRO_B,
  82         HNAE3_DEV_SUPPORT_FEC_B,
  83         HNAE3_DEV_SUPPORT_UDP_GSO_B,
  84         HNAE3_DEV_SUPPORT_QB_B,
  85         HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
  86         HNAE3_DEV_SUPPORT_PTP_B,
  87         HNAE3_DEV_SUPPORT_INT_QL_B,
  88         HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
  89         HNAE3_DEV_SUPPORT_TX_PUSH_B,
  90         HNAE3_DEV_SUPPORT_PHY_IMP_B,
  91         HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
  92         HNAE3_DEV_SUPPORT_HW_PAD_B,
  93         HNAE3_DEV_SUPPORT_STASH_B,
  94         HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
  95         HNAE3_DEV_SUPPORT_PAUSE_B,
  96         HNAE3_DEV_SUPPORT_RAS_IMP_B,
  97         HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
  98         HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,
  99         HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,
 100         HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
 101         HNAE3_DEV_SUPPORT_CQ_B,
 102         HNAE3_DEV_SUPPORT_FEC_STATS_B,
 103         HNAE3_DEV_SUPPORT_LANE_NUM_B,
 104         HNAE3_DEV_SUPPORT_WOL_B,
 105         HNAE3_DEV_SUPPORT_TM_FLUSH_B,
 106         HNAE3_DEV_SUPPORT_VF_FAULT_B,
 107 };
 108
 109 #define hnae3_ae_dev_fd_supported(ae_dev) \
 110                 test_bit(HNAE3_DEV_SUPPORT_FD_B, (ae_dev)->caps)
 111
 112 #define hnae3_ae_dev_gro_supported(ae_dev) \
 113                 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (ae_dev)->caps)
 114
 115 #define hnae3_dev_fec_supported(hdev) \
 116         test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
 117
 118 #define hnae3_dev_udp_gso_supported(hdev) \
 119         test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
 120
 121 #define hnae3_dev_qb_supported(hdev) \
 122         test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
 123
 124 #define hnae3_dev_fd_forward_tc_supported(hdev) \
 125         test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
 126
 127 #define hnae3_dev_ptp_supported(hdev) \
 128         test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
 129
 130 #define hnae3_dev_int_ql_supported(hdev) \
 131         test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
 132
 133 #define hnae3_dev_hw_csum_supported(hdev) \
 134         test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
 135
 136 #define hnae3_dev_tx_push_supported(hdev) \
 137         test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
 138
 139 #define hnae3_dev_phy_imp_supported(hdev) \
 140         test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
 141
 142 #define hnae3_dev_ras_imp_supported(hdev) \
 143         test_bit(HNAE3_DEV_SUPPORT_RAS_IMP_B, (hdev)->ae_dev->caps)
 144
 145 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
 146         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
 147
 148 #define hnae3_dev_hw_pad_supported(hdev) \
 149         test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
 150
 151 #define hnae3_dev_stash_supported(hdev) \
 152         test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
 153
 154 #define hnae3_dev_pause_supported(hdev) \
 155         test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
 156
 157 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
 158         test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
 159
 160 #define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
 161         test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
 162
 163 #define hnae3_ae_dev_mc_mac_mng_supported(ae_dev) \
 164         test_bit(HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, (ae_dev)->caps)
 165
 166 #define hnae3_ae_dev_cq_supported(ae_dev) \
 167         test_bit(HNAE3_DEV_SUPPORT_CQ_B, (ae_dev)->caps)
 168
 169 #define hnae3_ae_dev_fec_stats_supported(ae_dev) \
 170         test_bit(HNAE3_DEV_SUPPORT_FEC_STATS_B, (ae_dev)->caps)
 171
 172 #define hnae3_ae_dev_lane_num_supported(ae_dev) \
 173         test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps)
 174
 175 #define hnae3_ae_dev_wol_supported(ae_dev) \
 176         test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps)
 177
 178 #define hnae3_ae_dev_tm_flush_supported(hdev) \
 179         test_bit(HNAE3_DEV_SUPPORT_TM_FLUSH_B, (hdev)->ae_dev->caps)
 180
 181 #define hnae3_ae_dev_vf_fault_supported(ae_dev) \
 182         test_bit(HNAE3_DEV_SUPPORT_VF_FAULT_B, (ae_dev)->caps)
 183
 184 enum HNAE3_PF_CAP_BITS {
 185         HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,
 186 };
 187 #define ring_ptr_move_fw(ring, p) \
 188         ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 189 #define ring_ptr_move_bw(ring, p) \
 190         ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
 191
 192 struct hnae3_handle;
 193
 194 struct hnae3_queue {
 195         void __iomem *io_base;
 196         void __iomem *mem_base;
 197         struct hnae3_ae_algo *ae_algo;
 198         struct hnae3_handle *handle;
 199         int tqp_index;          /* index in a handle */
 200         u32 buf_size;           /* size for hnae_desc->addr, preset by AE */
 201         u16 tx_desc_num;        /* total number of tx desc */
 202         u16 rx_desc_num;        /* total number of rx desc */
 203 };
 204
 205 struct hns3_mac_stats {
 206         u64 tx_pause_cnt;
 207         u64 rx_pause_cnt;
 208 };
 209
 210 /* hnae3 loop mode */
 211 enum hnae3_loop {
 212         HNAE3_LOOP_EXTERNAL,
 213         HNAE3_LOOP_APP,
 214         HNAE3_LOOP_SERIAL_SERDES,
 215         HNAE3_LOOP_PARALLEL_SERDES,
 216         HNAE3_LOOP_PHY,
 217         HNAE3_LOOP_NONE,
 218 };
 219
 220 enum hnae3_client_type {
 221         HNAE3_CLIENT_KNIC,
 222         HNAE3_CLIENT_ROCE,
 223 };
 224
 225 /* mac media type */
 226 enum hnae3_media_type {
 227         HNAE3_MEDIA_TYPE_UNKNOWN,
 228         HNAE3_MEDIA_TYPE_FIBER,
 229         HNAE3_MEDIA_TYPE_COPPER,
 230         HNAE3_MEDIA_TYPE_BACKPLANE,
 231         HNAE3_MEDIA_TYPE_NONE,
 232 };
 233
 234 /* must be consistent with definition in firmware */
 235 enum hnae3_module_type {
 236         HNAE3_MODULE_TYPE_UNKNOWN       = 0x00,
 237         HNAE3_MODULE_TYPE_FIBRE_LR      = 0x01,
 238         HNAE3_MODULE_TYPE_FIBRE_SR      = 0x02,
 239         HNAE3_MODULE_TYPE_AOC           = 0x03,
 240         HNAE3_MODULE_TYPE_CR            = 0x04,
 241         HNAE3_MODULE_TYPE_KR            = 0x05,
 242         HNAE3_MODULE_TYPE_TP            = 0x06,
 243 };
 244
 245 enum hnae3_fec_mode {
 246         HNAE3_FEC_AUTO = 0,
 247         HNAE3_FEC_BASER,
 248         HNAE3_FEC_RS,
 249         HNAE3_FEC_LLRS,
 250         HNAE3_FEC_NONE,
 251         HNAE3_FEC_USER_DEF,
 252 };
 253
 254 enum hnae3_reset_notify_type {
 255         HNAE3_UP_CLIENT,
 256         HNAE3_DOWN_CLIENT,
 257         HNAE3_INIT_CLIENT,
 258         HNAE3_UNINIT_CLIENT,
 259 };
 260
 261 enum hnae3_hw_error_type {
 262         HNAE3_PPU_POISON_ERROR,
 263         HNAE3_CMDQ_ECC_ERROR,
 264         HNAE3_IMP_RD_POISON_ERROR,
 265         HNAE3_ROCEE_AXI_RESP_ERROR,
 266 };
 267
 268 enum hnae3_reset_type {
 269         HNAE3_VF_RESET,
 270         HNAE3_VF_FUNC_RESET,
 271         HNAE3_VF_PF_FUNC_RESET,
 272         HNAE3_VF_FULL_RESET,
 273         HNAE3_FLR_RESET,
 274         HNAE3_FUNC_RESET,
 275         HNAE3_GLOBAL_RESET,
 276         HNAE3_IMP_RESET,
 277         HNAE3_NONE_RESET,
 278         HNAE3_VF_EXP_RESET,
 279         HNAE3_MAX_RESET,
 280 };
 281
 282 enum hnae3_port_base_vlan_state {
 283         HNAE3_PORT_BASE_VLAN_DISABLE,
 284         HNAE3_PORT_BASE_VLAN_ENABLE,
 285         HNAE3_PORT_BASE_VLAN_MODIFY,
 286         HNAE3_PORT_BASE_VLAN_NOCHANGE,
 287 };
 288
 289 enum hnae3_dbg_cmd {
 290         HNAE3_DBG_CMD_TM_NODES,
 291         HNAE3_DBG_CMD_TM_PRI,
 292         HNAE3_DBG_CMD_TM_QSET,
 293         HNAE3_DBG_CMD_TM_MAP,
 294         HNAE3_DBG_CMD_TM_PG,
 295         HNAE3_DBG_CMD_TM_PORT,
 296         HNAE3_DBG_CMD_TC_SCH_INFO,
 297         HNAE3_DBG_CMD_QOS_PAUSE_CFG,
 298         HNAE3_DBG_CMD_QOS_PRI_MAP,
 299         HNAE3_DBG_CMD_QOS_DSCP_MAP,
 300         HNAE3_DBG_CMD_QOS_BUF_CFG,
 301         HNAE3_DBG_CMD_DEV_INFO,
 302         HNAE3_DBG_CMD_TX_BD,
 303         HNAE3_DBG_CMD_RX_BD,
 304         HNAE3_DBG_CMD_MAC_UC,
 305         HNAE3_DBG_CMD_MAC_MC,
 306         HNAE3_DBG_CMD_MNG_TBL,
 307         HNAE3_DBG_CMD_LOOPBACK,
 308         HNAE3_DBG_CMD_PTP_INFO,
 309         HNAE3_DBG_CMD_INTERRUPT_INFO,
 310         HNAE3_DBG_CMD_RESET_INFO,
 311         HNAE3_DBG_CMD_IMP_INFO,
 312         HNAE3_DBG_CMD_NCL_CONFIG,
 313         HNAE3_DBG_CMD_REG_BIOS_COMMON,
 314         HNAE3_DBG_CMD_REG_SSU,
 315         HNAE3_DBG_CMD_REG_IGU_EGU,
 316         HNAE3_DBG_CMD_REG_RPU,
 317         HNAE3_DBG_CMD_REG_NCSI,
 318         HNAE3_DBG_CMD_REG_RTC,
 319         HNAE3_DBG_CMD_REG_PPP,
 320         HNAE3_DBG_CMD_REG_RCB,
 321         HNAE3_DBG_CMD_REG_TQP,
 322         HNAE3_DBG_CMD_REG_MAC,
 323         HNAE3_DBG_CMD_REG_DCB,
 324         HNAE3_DBG_CMD_VLAN_CONFIG,
 325         HNAE3_DBG_CMD_QUEUE_MAP,
 326         HNAE3_DBG_CMD_RX_QUEUE_INFO,
 327         HNAE3_DBG_CMD_TX_QUEUE_INFO,
 328         HNAE3_DBG_CMD_FD_TCAM,
 329         HNAE3_DBG_CMD_FD_COUNTER,
 330         HNAE3_DBG_CMD_MAC_TNL_STATUS,
 331         HNAE3_DBG_CMD_SERV_INFO,
 332         HNAE3_DBG_CMD_UMV_INFO,
 333         HNAE3_DBG_CMD_PAGE_POOL_INFO,
 334         HNAE3_DBG_CMD_COAL_INFO,
 335         HNAE3_DBG_CMD_UNKNOWN,
 336 };
 337
 338 enum hnae3_tc_map_mode {
 339         HNAE3_TC_MAP_MODE_PRIO,
 340         HNAE3_TC_MAP_MODE_DSCP,
 341 };
 342
 343 struct hnae3_vector_info {
 344         u8 __iomem *io_addr;
 345         int vector;
 346 };
 347
 348 #define HNAE3_RING_TYPE_B 0
 349 #define HNAE3_RING_TYPE_TX 0
 350 #define HNAE3_RING_TYPE_RX 1
 351 #define HNAE3_RING_GL_IDX_S 0
 352 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
 353 #define HNAE3_RING_GL_RX 0
 354 #define HNAE3_RING_GL_TX 1
 355
 356 #define HNAE3_FW_VERSION_BYTE3_SHIFT    24
 357 #define HNAE3_FW_VERSION_BYTE3_MASK     GENMASK(31, 24)
 358 #define HNAE3_FW_VERSION_BYTE2_SHIFT    16
 359 #define HNAE3_FW_VERSION_BYTE2_MASK     GENMASK(23, 16)
 360 #define HNAE3_FW_VERSION_BYTE1_SHIFT    8
 361 #define HNAE3_FW_VERSION_BYTE1_MASK     GENMASK(15, 8)
 362 #define HNAE3_FW_VERSION_BYTE0_SHIFT    0
 363 #define HNAE3_FW_VERSION_BYTE0_MASK     GENMASK(7, 0)
 364
 365 struct hnae3_ring_chain_node {
 366         struct hnae3_ring_chain_node *next;
 367         u32 tqp_index;
 368         u32 flag;
 369         u32 int_gl_idx;
 370 };
 371
 372 #define HNAE3_IS_TX_RING(node) \
 373         (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
 374
 375 /* device specification info from firmware */
 376 struct hnae3_dev_specs {
 377         u32 mac_entry_num; /* number of mac-vlan table entry */
 378         u32 mng_entry_num; /* number of manager table entry */
 379         u32 max_tm_rate;
 380         u16 rss_ind_tbl_size;
 381         u16 rss_key_size;
 382         u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
 383         u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
 384         u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
 385         u16 max_frm_size;
 386         u16 max_qset_num;
 387         u16 umv_size;
 388         u16 mc_mac_size;
 389         u32 mac_stats_num;
 390         u8 tnl_num;
 391 };
 392
 393 struct hnae3_client_ops {
 394         int (*init_instance)(struct hnae3_handle *handle);
 395         void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 396         void (*link_status_change)(struct hnae3_handle *handle, bool state);
 397         int (*reset_notify)(struct hnae3_handle *handle,
 398                             enum hnae3_reset_notify_type type);
 399         void (*process_hw_error)(struct hnae3_handle *handle,
 400                                  enum hnae3_hw_error_type);
 401 };
 402
 403 #define HNAE3_CLIENT_NAME_LENGTH 16
 404 struct hnae3_client {
 405         char name[HNAE3_CLIENT_NAME_LENGTH];
 406         unsigned long state;
 407         enum hnae3_client_type type;
 408         const struct hnae3_client_ops *ops;
 409         struct list_head node;
 410 };
 411
 412 #define HNAE3_DEV_CAPS_MAX_NUM  96
 413 struct hnae3_ae_dev {
 414         struct pci_dev *pdev;
 415         const struct hnae3_ae_ops *ops;
 416         struct list_head node;
 417         u32 flag;
 418         unsigned long hw_err_reset_req;
 419         struct hnae3_dev_specs dev_specs;
 420         u32 dev_version;
 421         DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM);
 422         void *priv;
 423 };
 424
 425 /* This struct defines the operation on the handle.
 426  *
 427  * init_ae_dev(): (mandatory)
 428  *   Get PF configure from pci_dev and initialize PF hardware
 429  * uninit_ae_dev()
 430  *   Disable PF device and release PF resource
 431  * register_client
 432  *   Register client to ae_dev
 433  * unregister_client()
 434  *   Unregister client from ae_dev
 435  * start()
 436  *   Enable the hardware
 437  * stop()
 438  *   Disable the hardware
 439  * start_client()
 440  *   Inform the hclge that client has been started
 441  * stop_client()
 442  *   Inform the hclge that client has been stopped
 443  * get_status()
 444  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 445  *   non-ok
 446  * get_ksettings_an_result()
 447  *   Get negotiation status,speed and duplex
 448  * get_media_type()
 449  *   Get media type of MAC
 450  * check_port_speed()
 451  *   Check target speed whether is supported
 452  * adjust_link()
 453  *   Adjust link status
 454  * set_loopback()
 455  *   Set loopback
 456  * set_promisc_mode
 457  *   Set promisc mode
 458  * request_update_promisc_mode
 459  *   request to hclge(vf) to update promisc mode
 460  * set_mtu()
 461  *   set mtu
 462  * get_pauseparam()
 463  *   get tx and rx of pause frame use
 464  * set_pauseparam()
 465  *   set tx and rx of pause frame use
 466  * set_autoneg()
 467  *   set auto autonegotiation of pause frame use
 468  * get_autoneg()
 469  *   get auto autonegotiation of pause frame use
 470  * restart_autoneg()
 471  *   restart autonegotiation
 472  * halt_autoneg()
 473  *   halt/resume autonegotiation when autonegotiation on
 474  * get_coalesce_usecs()
 475  *   get usecs to delay a TX interrupt after a packet is sent
 476  * get_rx_max_coalesced_frames()
 477  *   get Maximum number of packets to be sent before a TX interrupt.
 478  * set_coalesce_usecs()
 479  *   set usecs to delay a TX interrupt after a packet is sent
 480  * set_coalesce_frames()
 481  *   set Maximum number of packets to be sent before a TX interrupt.
 482  * get_mac_addr()
 483  *   get mac address
 484  * set_mac_addr()
 485  *   set mac address
 486  * add_uc_addr
 487  *   Add unicast addr to mac table
 488  * rm_uc_addr
 489  *   Remove unicast addr from mac table
 490  * set_mc_addr()
 491  *   Set multicast address
 492  * add_mc_addr
 493  *   Add multicast address to mac table
 494  * rm_mc_addr
 495  *   Remove multicast address from mac table
 496  * update_stats()
 497  *   Update Old network device statistics
 498  * get_mac_stats()
 499  *   get mac pause statistics including tx_cnt and rx_cnt
 500  * get_ethtool_stats()
 501  *   Get ethtool network device statistics
 502  * get_strings()
 503  *   Get a set of strings that describe the requested objects
 504  * get_sset_count()
 505  *   Get number of strings that @get_strings will write
 506  * update_led_status()
 507  *   Update the led status
 508  * set_led_id()
 509  *   Set led id
 510  * get_regs()
 511  *   Get regs dump
 512  * get_regs_len()
 513  *   Get the len of the regs dump
 514  * get_rss_key_size()
 515  *   Get rss key size
 516  * get_rss()
 517  *   Get rss table
 518  * set_rss()
 519  *   Set rss table
 520  * get_tc_size()
 521  *   Get tc size of handle
 522  * get_vector()
 523  *   Get vector number and vector information
 524  * put_vector()
 525  *   Put the vector in hdev
 526  * map_ring_to_vector()
 527  *   Map rings to vector
 528  * unmap_ring_from_vector()
 529  *   Unmap rings from vector
 530  * reset_queue()
 531  *   Reset queue
 532  * get_fw_version()
 533  *   Get firmware version
 534  * get_mdix_mode()
 535  *   Get media typr of phy
 536  * enable_vlan_filter()
 537  *   Enable vlan filter
 538  * set_vlan_filter()
 539  *   Set vlan filter config of Ports
 540  * set_vf_vlan_filter()
 541  *   Set vlan filter config of vf
 542  * enable_hw_strip_rxvtag()
 543  *   Enable/disable hardware strip vlan tag of packets received
 544  * set_gro_en
 545  *   Enable/disable HW GRO
 546  * add_arfs_entry
 547  *   Check the 5-tuples of flow, and create flow director rule
 548  * get_vf_config
 549  *   Get the VF configuration setting by the host
 550  * set_vf_link_state
 551  *   Set VF link status
 552  * set_vf_spoofchk
 553  *   Enable/disable spoof check for specified vf
 554  * set_vf_trust
 555  *   Enable/disable trust for specified vf, if the vf being trusted, then
 556  *   it can enable promisc mode
 557  * set_vf_rate
 558  *   Set the max tx rate of specified vf.
 559  * set_vf_mac
 560  *   Configure the default MAC for specified VF
 561  * get_module_eeprom
 562  *   Get the optical module eeprom info.
 563  * add_cls_flower
 564  *   Add clsflower rule
 565  * del_cls_flower
 566  *   Delete clsflower rule
 567  * cls_flower_active
 568  *   Check if any cls flower rule exist
 569  * dbg_read_cmd
 570  *   Execute debugfs read command.
 571  * set_tx_hwts_info
 572  *   Save information for 1588 tx packet
 573  * get_rx_hwts
 574  *   Get 1588 rx hwstamp
 575  * get_ts_info
 576  *   Get phc info
 577  * clean_vf_config
 578  *   Clean residual vf info after disable sriov
 579  * get_wol
 580  *   Get wake on lan info
 581  * set_wol
 582  *   Config wake on lan
 583  */
 584 struct hnae3_ae_ops {
 585         int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 586         void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 587         void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
 588                               enum hnae3_reset_type rst_type);
 589         void (*reset_done)(struct hnae3_ae_dev *ae_dev);
 590         int (*init_client_instance)(struct hnae3_client *client,
 591                                     struct hnae3_ae_dev *ae_dev);
 592         void (*uninit_client_instance)(struct hnae3_client *client,
 593                                        struct hnae3_ae_dev *ae_dev);
 594         int (*start)(struct hnae3_handle *handle);
 595         void (*stop)(struct hnae3_handle *handle);
 596         int (*client_start)(struct hnae3_handle *handle);
 597         void (*client_stop)(struct hnae3_handle *handle);
 598         int (*get_status)(struct hnae3_handle *handle);
 599         void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 600                                         u8 *auto_neg, u32 *speed, u8 *duplex,
 601                                         u32 *lane_num);
 602
 603         int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 604                                    u8 duplex, u8 lane_num);
 605
 606         void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
 607                                u8 *module_type);
 608         int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
 609         void (*get_fec_stats)(struct hnae3_handle *handle,
 610                               struct ethtool_fec_stats *fec_stats);
 611         void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
 612                         u8 *fec_mode);
 613         int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
 614         void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 615         int (*set_loopback)(struct hnae3_handle *handle,
 616                             enum hnae3_loop loop_mode, bool en);
 617
 618         int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
 619                                 bool en_mc_pmc);
 620         void (*request_update_promisc_mode)(struct hnae3_handle *handle);
 621         int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 622
 623         void (*get_pauseparam)(struct hnae3_handle *handle,
 624                                u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 625         int (*set_pauseparam)(struct hnae3_handle *handle,
 626                               u32 auto_neg, u32 rx_en, u32 tx_en);
 627
 628         int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 629         int (*get_autoneg)(struct hnae3_handle *handle);
 630         int (*restart_autoneg)(struct hnae3_handle *handle);
 631         int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
 632
 633         void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 634                                    u32 *tx_usecs, u32 *rx_usecs);
 635         void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 636                                             u32 *tx_frames, u32 *rx_frames);
 637         int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 638         int (*set_coalesce_frames)(struct hnae3_handle *handle,
 639                                    u32 coalesce_frames);
 640         void (*get_coalesce_range)(struct hnae3_handle *handle,
 641                                    u32 *tx_frames_low, u32 *rx_frames_low,
 642                                    u32 *tx_frames_high, u32 *rx_frames_high,
 643                                    u32 *tx_usecs_low, u32 *rx_usecs_low,
 644                                    u32 *tx_usecs_high, u32 *rx_usecs_high);
 645
 646         void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 647         int (*set_mac_addr)(struct hnae3_handle *handle, const void *p,
 648                             bool is_first);
 649         int (*do_ioctl)(struct hnae3_handle *handle,
 650                         struct ifreq *ifr, int cmd);
 651         int (*add_uc_addr)(struct hnae3_handle *handle,
 652                            const unsigned char *addr);
 653         int (*rm_uc_addr)(struct hnae3_handle *handle,
 654                           const unsigned char *addr);
 655         int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 656         int (*add_mc_addr)(struct hnae3_handle *handle,
 657                            const unsigned char *addr);
 658         int (*rm_mc_addr)(struct hnae3_handle *handle,
 659                           const unsigned char *addr);
 660         void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 661         void (*update_stats)(struct hnae3_handle *handle);
 662         void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 663         void (*get_mac_stats)(struct hnae3_handle *handle,
 664                               struct hns3_mac_stats *mac_stats);
 665         void (*get_strings)(struct hnae3_handle *handle,
 666                             u32 stringset, u8 *data);
 667         int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 668
 669         void (*get_regs)(struct hnae3_handle *handle, u32 *version,
 670                          void *data);
 671         int (*get_regs_len)(struct hnae3_handle *handle);
 672
 673         u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 674         int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 675                        u8 *hfunc);
 676         int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 677                        const u8 *key, const u8 hfunc);
 678         int (*set_rss_tuple)(struct hnae3_handle *handle,
 679                              struct ethtool_rxnfc *cmd);
 680         int (*get_rss_tuple)(struct hnae3_handle *handle,
 681                              struct ethtool_rxnfc *cmd);
 682
 683         int (*get_tc_size)(struct hnae3_handle *handle);
 684
 685         int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 686                           struct hnae3_vector_info *vector_info);
 687         int (*put_vector)(struct hnae3_handle *handle, int vector_num);
 688         int (*map_ring_to_vector)(struct hnae3_handle *handle,
 689                                   int vector_num,
 690                                   struct hnae3_ring_chain_node *vr_chain);
 691         int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 692                                       int vector_num,
 693                                       struct hnae3_ring_chain_node *vr_chain);
 694
 695         int (*reset_queue)(struct hnae3_handle *handle);
 696         u32 (*get_fw_version)(struct hnae3_handle *handle);
 697         void (*get_mdix_mode)(struct hnae3_handle *handle,
 698                               u8 *tp_mdix_ctrl, u8 *tp_mdix);
 699
 700         int (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
 701         int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 702                                u16 vlan_id, bool is_kill);
 703         int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 704                                   u16 vlan, u8 qos, __be16 proto);
 705         int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
 706         void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
 707         enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
 708                                                  unsigned long *addr);
 709         void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
 710                                           enum hnae3_reset_type rst_type);
 711         void (*get_channels)(struct hnae3_handle *handle,
 712                              struct ethtool_channels *ch);
 713         void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
 714                                       u16 *alloc_tqps, u16 *max_rss_size);
 715         int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
 716                             bool rxfh_configured);
 717         void (*get_flowctrl_adv)(struct hnae3_handle *handle,
 718                                  u32 *flowctrl_adv);
 719         int (*set_led_id)(struct hnae3_handle *handle,
 720                           enum ethtool_phys_id_state status);
 721         void (*get_link_mode)(struct hnae3_handle *handle,
 722                               unsigned long *supported,
 723                               unsigned long *advertising);
 724         int (*add_fd_entry)(struct hnae3_handle *handle,
 725                             struct ethtool_rxnfc *cmd);
 726         int (*del_fd_entry)(struct hnae3_handle *handle,
 727                             struct ethtool_rxnfc *cmd);
 728         int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
 729                                struct ethtool_rxnfc *cmd);
 730         int (*get_fd_rule_info)(struct hnae3_handle *handle,
 731                                 struct ethtool_rxnfc *cmd);
 732         int (*get_fd_all_rules)(struct hnae3_handle *handle,
 733                                 struct ethtool_rxnfc *cmd, u32 *rule_locs);
 734         void (*enable_fd)(struct hnae3_handle *handle, bool enable);
 735         int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
 736                               u16 flow_id, struct flow_keys *fkeys);
 737         int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
 738                             char *buf, int len);
 739         pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
 740         bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
 741         bool (*ae_dev_resetting)(struct hnae3_handle *handle);
 742         unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
 743         int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
 744         u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
 745         void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
 746         int (*mac_connect_phy)(struct hnae3_handle *handle);
 747         void (*mac_disconnect_phy)(struct hnae3_handle *handle);
 748         int (*get_vf_config)(struct hnae3_handle *handle, int vf,
 749                              struct ifla_vf_info *ivf);
 750         int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
 751                                  int link_state);
 752         int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
 753                                bool enable);
 754         int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
 755         int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
 756                            int min_tx_rate, int max_tx_rate, bool force);
 757         int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
 758         int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
 759                                  u32 len, u8 *data);
 760         bool (*get_cmdq_stat)(struct hnae3_handle *handle);
 761         int (*add_cls_flower)(struct hnae3_handle *handle,
 762                               struct flow_cls_offload *cls_flower, int tc);
 763         int (*del_cls_flower)(struct hnae3_handle *handle,
 764                               struct flow_cls_offload *cls_flower);
 765         bool (*cls_flower_active)(struct hnae3_handle *handle);
 766         int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
 767                                       struct ethtool_link_ksettings *cmd);
 768         int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
 769                                       const struct ethtool_link_ksettings *cmd);
 770         bool (*set_tx_hwts_info)(struct hnae3_handle *handle,
 771                                  struct sk_buff *skb);
 772         void (*get_rx_hwts)(struct hnae3_handle *handle, struct sk_buff *skb,
 773                             u32 nsec, u32 sec);
 774         int (*get_ts_info)(struct hnae3_handle *handle,
 775                            struct ethtool_ts_info *info);
 776         int (*get_link_diagnosis_info)(struct hnae3_handle *handle,
 777                                        u32 *status_code);
 778         void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);
 779         int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp,
 780                              u8 *tc_map_mode, u8 *priority);
 781         void (*get_wol)(struct hnae3_handle *handle,
 782                         struct ethtool_wolinfo *wol);
 783         int (*set_wol)(struct hnae3_handle *handle,
 784                        struct ethtool_wolinfo *wol);
 785 };
 786
 787 struct hnae3_dcb_ops {
 788         /* IEEE 802.1Qaz std */
 789         int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 790         int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 791         int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 792         int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 793         int (*ieee_setapp)(struct hnae3_handle *h, struct dcb_app *app);
 794         int (*ieee_delapp)(struct hnae3_handle *h, struct dcb_app *app);
 795
 796         /* DCBX configuration */
 797         u8   (*getdcbx)(struct hnae3_handle *);
 798         u8   (*setdcbx)(struct hnae3_handle *, u8);
 799
 800         int (*setup_tc)(struct hnae3_handle *handle,
 801                         struct tc_mqprio_qopt_offload *mqprio_qopt);
 802 };
 803
 804 struct hnae3_ae_algo {
 805         const struct hnae3_ae_ops *ops;
 806         struct list_head node;
 807         const struct pci_device_id *pdev_id_table;
 808 };
 809
 810 #define HNAE3_INT_NAME_LEN        32
 811 #define HNAE3_ITR_COUNTDOWN_START 100
 812
 813 #define HNAE3_MAX_TC            8
 814 #define HNAE3_MAX_USER_PRIO     8
 815 struct hnae3_tc_info {
 816         u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
 817         u16 tqp_count[HNAE3_MAX_TC];
 818         u16 tqp_offset[HNAE3_MAX_TC];
 819         u8 max_tc; /* Total number of TCs */
 820         u8 num_tc; /* Total number of enabled TCs */
 821         bool mqprio_active;
 822         bool dcb_ets_active;
 823 };
 824
 825 #define HNAE3_MAX_DSCP                  64
 826 #define HNAE3_PRIO_ID_INVALID           0xff
 827 struct hnae3_knic_private_info {
 828         struct net_device *netdev; /* Set by KNIC client when init instance */
 829         u16 rss_size;              /* Allocated RSS queues */
 830         u16 req_rss_size;
 831         u16 rx_buf_len;
 832         u16 num_tx_desc;
 833         u16 num_rx_desc;
 834         u32 tx_spare_buf_size;
 835
 836         struct hnae3_tc_info tc_info;
 837         u8 tc_map_mode;
 838         u8 dscp_app_cnt;
 839         u8 dscp_prio[HNAE3_MAX_DSCP];
 840
 841         u16 num_tqps;             /* total number of TQPs in this handle */
 842         struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 843         const struct hnae3_dcb_ops *dcb_ops;
 844
 845         u16 int_rl_setting;
 846         void __iomem *io_base;
 847 };
 848
 849 struct hnae3_roce_private_info {
 850         struct net_device *netdev;
 851         void __iomem *roce_io_base;
 852         void __iomem *roce_mem_base;
 853         int base_vector;
 854         int num_vectors;
 855
 856         /* The below attributes defined for RoCE client, hnae3 gives
 857          * initial values to them, and RoCE client can modify and use
 858          * them.
 859          */
 860         unsigned long reset_state;
 861         unsigned long instance_state;
 862         unsigned long state;
 863 };
 864
 865 #define HNAE3_SUPPORT_APP_LOOPBACK    BIT(0)
 866 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 867 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK    BIT(2)
 868 #define HNAE3_SUPPORT_VF              BIT(3)
 869 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK  BIT(4)
 870 #define HNAE3_SUPPORT_EXTERNAL_LOOPBACK BIT(5)
 871
 872 #define HNAE3_USER_UPE          BIT(0)  /* unicast promisc enabled by user */
 873 #define HNAE3_USER_MPE          BIT(1)  /* mulitcast promisc enabled by user */
 874 #define HNAE3_BPE               BIT(2)  /* broadcast promisc enable */
 875 #define HNAE3_OVERFLOW_UPE      BIT(3)  /* unicast mac vlan overflow */
 876 #define HNAE3_OVERFLOW_MPE      BIT(4)  /* multicast mac vlan overflow */
 877 #define HNAE3_UPE               (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
 878 #define HNAE3_MPE               (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
 879
 880 enum hnae3_pflag {
 881         HNAE3_PFLAG_LIMIT_PROMISC,
 882         HNAE3_PFLAG_MAX
 883 };
 884
 885 struct hnae3_handle {
 886         struct hnae3_client *client;
 887         struct pci_dev *pdev;
 888         void *priv;
 889         struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 890         u64 flags; /* Indicate the capabilities for this handle */
 891
 892         union {
 893                 struct net_device *netdev; /* first member */
 894                 struct hnae3_knic_private_info kinfo;
 895                 struct hnae3_roce_private_info rinfo;
 896         };
 897
 898         u32 numa_node_mask;     /* for multi-chip support */
 899
 900         enum hnae3_port_base_vlan_state port_base_vlan_state;
 901
 902         u8 netdev_flags;
 903         struct dentry *hnae3_dbgfs;
 904         /* protects concurrent contention between debugfs commands */
 905         struct mutex dbgfs_lock;
 906         char **dbgfs_buf;
 907
 908         /* Network interface message level enabled bits */
 909         u32 msg_enable;
 910
 911         unsigned long supported_pflags;
 912         unsigned long priv_flags;
 913 };
 914
 915 #define hnae3_set_field(origin, mask, shift, val) \
 916         do { \
 917                 (origin) &= (~(mask)); \
 918                 (origin) |= ((val) << (shift)) & (mask); \
 919         } while (0)
 920 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 921
 922 #define hnae3_set_bit(origin, shift, val) \
 923         hnae3_set_field(origin, 0x1 << (shift), shift, val)
 924 #define hnae3_get_bit(origin, shift) \
 925         hnae3_get_field(origin, 0x1 << (shift), shift)
 926
 927 #define HNAE3_FORMAT_MAC_ADDR_LEN       18
 928 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_0  0
 929 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_4  4
 930 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_5  5
 931
 932 static inline void hnae3_format_mac_addr(char *format_mac_addr,
 933                                          const u8 *mac_addr)
 934 {
 935         snprintf(format_mac_addr, HNAE3_FORMAT_MAC_ADDR_LEN, "%02x:**:**:**:%02x:%02x",
 936                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_0],
 937                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_4],
 938                  mac_addr[HNAE3_FORMAT_MAC_ADDR_OFFSET_5]);
 939 }
 940
 941 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 942 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 943
 944 void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo);
 945 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 946 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 947
 948 void hnae3_unregister_client(struct hnae3_client *client);
 949 int hnae3_register_client(struct hnae3_client *client);
 950
 951 void hnae3_set_client_init_flag(struct hnae3_client *client,
 952                                 struct hnae3_ae_dev *ae_dev,
 953                                 unsigned int inited);
 954 #endif