drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "hns_dsaf_mac.h"
  11 #include "hns_dsaf_misc.h"
  12 #include "hns_dsaf_ppe.h"
  13 #include "hns_dsaf_reg.h"
  14
  15 enum _dsm_op_index {
  16         HNS_OP_RESET_FUNC               = 0x1,
  17         HNS_OP_SERDES_LP_FUNC           = 0x2,
  18         HNS_OP_LED_SET_FUNC             = 0x3,
  19         HNS_OP_GET_PORT_TYPE_FUNC       = 0x4,
  20         HNS_OP_GET_SFP_STAT_FUNC        = 0x5,
  21 };
  22
  23 enum _dsm_rst_type {
  24         HNS_DSAF_RESET_FUNC     = 0x1,
  25         HNS_PPE_RESET_FUNC      = 0x2,
  26         HNS_XGE_CORE_RESET_FUNC = 0x3,
  27         HNS_XGE_RESET_FUNC      = 0x4,
  28         HNS_GE_RESET_FUNC       = 0x5,
  29         HNS_DSAF_CHN_RESET_FUNC = 0x6,
  30         HNS_ROCE_RESET_FUNC     = 0x7,
  31 };
  32
  33 const u8 hns_dsaf_acpi_dsm_uuid[] = {
  34         0x1A, 0xAA, 0x85, 0x1A, 0x93, 0xE2, 0x5E, 0x41,
  35         0x8E, 0x28, 0x8D, 0x69, 0x0A, 0x0F, 0x82, 0x0A
  36 };
  37
  38 static void dsaf_write_sub(struct dsaf_device *dsaf_dev, u32 reg, u32 val)
  39 {
  40         if (dsaf_dev->sub_ctrl)
  41                 dsaf_write_syscon(dsaf_dev->sub_ctrl, reg, val);
  42         else
  43                 dsaf_write_reg(dsaf_dev->sc_base, reg, val);
  44 }
  45
  46 static u32 dsaf_read_sub(struct dsaf_device *dsaf_dev, u32 reg)
  47 {
  48         u32 ret;
  49
  50         if (dsaf_dev->sub_ctrl)
  51                 ret = dsaf_read_syscon(dsaf_dev->sub_ctrl, reg);
  52         else
  53                 ret = dsaf_read_reg(dsaf_dev->sc_base, reg);
  54
  55         return ret;
  56 }
  57
  58 static void hns_cpld_set_led(struct hns_mac_cb *mac_cb, int link_status,
  59                              u16 speed, int data)
  60 {
  61         int speed_reg = 0;
  62         u8 value;
  63
  64         if (!mac_cb) {
  65                 pr_err("sfp_led_opt mac_dev is null!\n");
  66                 return;
  67         }
  68         if (!mac_cb->cpld_ctrl) {
  69                 dev_err(mac_cb->dev, "mac_id=%d, cpld syscon is null !\n",
  70                         mac_cb->mac_id);
  71                 return;
  72         }
  73
  74         if (speed == MAC_SPEED_10000)
  75                 speed_reg = 1;
  76
  77         value = mac_cb->cpld_led_value;
  78
  79         if (link_status) {
  80                 dsaf_set_bit(value, DSAF_LED_LINK_B, link_status);
  81                 dsaf_set_field(value, DSAF_LED_SPEED_M,
  82                                DSAF_LED_SPEED_S, speed_reg);
  83                 dsaf_set_bit(value, DSAF_LED_DATA_B, data);
  84
  85                 if (value != mac_cb->cpld_led_value) {
  86                         dsaf_write_syscon(mac_cb->cpld_ctrl,
  87                                           mac_cb->cpld_ctrl_reg, value);
  88                         mac_cb->cpld_led_value = value;
  89                 }
  90         } else {
  91                 value = (mac_cb->cpld_led_value) & (0x1 << DSAF_LED_ANCHOR_B);
  92                 dsaf_write_syscon(mac_cb->cpld_ctrl,
  93                                   mac_cb->cpld_ctrl_reg, value);
  94                 mac_cb->cpld_led_value = value;
  95         }
  96 }
  97
  98 static void cpld_led_reset(struct hns_mac_cb *mac_cb)
  99 {
 100         if (!mac_cb || !mac_cb->cpld_ctrl)
 101                 return;
 102
 103         dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 104                           CPLD_LED_DEFAULT_VALUE);
 105         mac_cb->cpld_led_value = CPLD_LED_DEFAULT_VALUE;
 106 }
 107
 108 static int cpld_set_led_id(struct hns_mac_cb *mac_cb,
 109                            enum hnae_led_state status)
 110 {
 111         switch (status) {
 112         case HNAE_LED_ACTIVE:
 113                 mac_cb->cpld_led_value =
 114                         dsaf_read_syscon(mac_cb->cpld_ctrl,
 115                                          mac_cb->cpld_ctrl_reg);
 116                 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
 117                              CPLD_LED_ON_VALUE);
 118                 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 119                                   mac_cb->cpld_led_value);
 120                 break;
 121         case HNAE_LED_INACTIVE:
 122                 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
 123                              CPLD_LED_DEFAULT_VALUE);
 124                 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
 125                                   mac_cb->cpld_led_value);
 126                 break;
 127         default:
 128                 dev_err(mac_cb->dev, "invalid led state: %d!", status);
 129                 return -EINVAL;
 130         }
 131
 132         return 0;
 133 }
 134
 135 #define RESET_REQ_OR_DREQ 1
 136
 137 static void hns_dsaf_acpi_srst_by_port(struct dsaf_device *dsaf_dev, u8 op_type,
 138                                        u32 port_type, u32 port, u32 val)
 139 {
 140         union acpi_object *obj;
 141         union acpi_object obj_args[3], argv4;
 142
 143         obj_args[0].integer.type = ACPI_TYPE_INTEGER;
 144         obj_args[0].integer.value = port_type;
 145         obj_args[1].integer.type = ACPI_TYPE_INTEGER;
 146         obj_args[1].integer.value = port;
 147         obj_args[2].integer.type = ACPI_TYPE_INTEGER;
 148         obj_args[2].integer.value = val;
 149
 150         argv4.type = ACPI_TYPE_PACKAGE;
 151         argv4.package.count = 3;
 152         argv4.package.elements = obj_args;
 153
 154         obj = acpi_evaluate_dsm(ACPI_HANDLE(dsaf_dev->dev),
 155                                 hns_dsaf_acpi_dsm_uuid, 0, op_type, &argv4);
 156         if (!obj) {
 157                 dev_warn(dsaf_dev->dev, "reset port_type%d port%d fail!",
 158                          port_type, port);
 159                 return;
 160         }
 161
 162         ACPI_FREE(obj);
 163 }
 164
 165 static void hns_dsaf_rst(struct dsaf_device *dsaf_dev, bool dereset)
 166 {
 167         u32 xbar_reg_addr;
 168         u32 nt_reg_addr;
 169
 170         if (!dereset) {
 171                 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_REQ_REG;
 172                 nt_reg_addr = DSAF_SUB_SC_NT_RESET_REQ_REG;
 173         } else {
 174                 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_DREQ_REG;
 175                 nt_reg_addr = DSAF_SUB_SC_NT_RESET_DREQ_REG;
 176         }
 177
 178         dsaf_write_sub(dsaf_dev, xbar_reg_addr, RESET_REQ_OR_DREQ);
 179         dsaf_write_sub(dsaf_dev, nt_reg_addr, RESET_REQ_OR_DREQ);
 180 }
 181
 182 static void hns_dsaf_rst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
 183 {
 184         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 185                                    HNS_DSAF_RESET_FUNC,
 186                                    0, dereset);
 187 }
 188
 189 static void hns_dsaf_xge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 190                                       bool dereset)
 191 {
 192         u32 reg_val = 0;
 193         u32 reg_addr;
 194
 195         if (port >= DSAF_XGE_NUM)
 196                 return;
 197
 198         reg_val |= RESET_REQ_OR_DREQ;
 199         reg_val |= 0x2082082 << dsaf_dev->mac_cb[port]->port_rst_off;
 200
 201         if (!dereset)
 202                 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
 203         else
 204                 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
 205
 206         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 207 }
 208
 209 static void hns_dsaf_xge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 210                                            u32 port, bool dereset)
 211 {
 212         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 213                                    HNS_XGE_RESET_FUNC, port, dereset);
 214 }
 215
 216 static void hns_dsaf_xge_core_srst_by_port(struct dsaf_device *dsaf_dev,
 217                                            u32 port, bool dereset)
 218 {
 219         u32 reg_val = 0;
 220         u32 reg_addr;
 221
 222         if (port >= DSAF_XGE_NUM)
 223                 return;
 224
 225         reg_val |= XGMAC_TRX_CORE_SRST_M
 226                 << dsaf_dev->mac_cb[port]->port_rst_off;
 227
 228         if (!dereset)
 229                 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
 230         else
 231                 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
 232
 233         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 234 }
 235
 236 /**
 237  * hns_dsaf_srst_chns - reset dsaf channels
 238  * @dsaf_dev: dsaf device struct pointer
 239  * @msk: xbar channels mask value:
 240  * bit0-5 for xge0-5
 241  * bit6-11 for ppe0-5
 242  * bit12-17 for roce0-5
 243  * bit18-19 for com/dfx
 244  * @enable: false - request reset , true - drop reset
 245  */
 246 void hns_dsaf_srst_chns(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)
 247 {
 248         u32 reg_addr;
 249
 250         if (!dereset)
 251                 reg_addr = DSAF_SUB_SC_DSAF_RESET_REQ_REG;
 252         else
 253                 reg_addr = DSAF_SUB_SC_DSAF_RESET_DREQ_REG;
 254
 255         dsaf_write_sub(dsaf_dev, reg_addr, msk);
 256 }
 257
 258 /**
 259  * hns_dsaf_srst_chns - reset dsaf channels
 260  * @dsaf_dev: dsaf device struct pointer
 261  * @msk: xbar channels mask value:
 262  * bit0-5 for xge0-5
 263  * bit6-11 for ppe0-5
 264  * bit12-17 for roce0-5
 265  * bit18-19 for com/dfx
 266  * @enable: false - request reset , true - drop reset
 267  */
 268 void
 269 hns_dsaf_srst_chns_acpi(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)
 270 {
 271         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 272                                    HNS_DSAF_CHN_RESET_FUNC,
 273                                    msk, dereset);
 274 }
 275
 276 void hns_dsaf_roce_srst(struct dsaf_device *dsaf_dev, bool dereset)
 277 {
 278         if (!dereset) {
 279                 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_RESET_REQ_REG, 1);
 280         } else {
 281                 dsaf_write_sub(dsaf_dev,
 282                                DSAF_SUB_SC_ROCEE_CLK_DIS_REG, 1);
 283                 dsaf_write_sub(dsaf_dev,
 284                                DSAF_SUB_SC_ROCEE_RESET_DREQ_REG, 1);
 285                 msleep(20);
 286                 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_CLK_EN_REG, 1);
 287         }
 288 }
 289
 290 void hns_dsaf_roce_srst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
 291 {
 292         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 293                                    HNS_ROCE_RESET_FUNC, 0, dereset);
 294 }
 295
 296 static void
 297 hns_dsaf_xge_core_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 298                                     u32 port, bool dereset)
 299 {
 300         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 301                                    HNS_XGE_CORE_RESET_FUNC, port, dereset);
 302 }
 303
 304 static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 305                                      bool dereset)
 306 {
 307         u32 reg_val_1;
 308         u32 reg_val_2;
 309         u32 port_rst_off;
 310
 311         if (port >= DSAF_GE_NUM)
 312                 return;
 313
 314         if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
 315                 /* DSAF_MAX_PORT_NUM is 6, but DSAF_GE_NUM is 8.
 316                    We need check to prevent array overflow */
 317                 if (port >= DSAF_MAX_PORT_NUM)
 318                         return;
 319                 reg_val_1  = 0x1 << port;
 320                 port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off;
 321                 /* there is difference between V1 and V2 in register.*/
 322                 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ?
 323                                 0x1041041 : 0x2082082;
 324                 reg_val_2 <<= port_rst_off;
 325
 326                 if (!dereset) {
 327                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
 328                                        reg_val_1);
 329
 330                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ0_REG,
 331                                        reg_val_2);
 332                 } else {
 333                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ0_REG,
 334                                        reg_val_2);
 335
 336                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
 337                                        reg_val_1);
 338                 }
 339         } else {
 340                 reg_val_1 = 0x15540;
 341                 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ? 0x100 : 0x40;
 342
 343                 reg_val_1 <<= dsaf_dev->reset_offset;
 344                 reg_val_2 <<= dsaf_dev->reset_offset;
 345
 346                 if (!dereset) {
 347                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
 348                                        reg_val_1);
 349
 350                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_REQ_REG,
 351                                        reg_val_2);
 352                 } else {
 353                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
 354                                        reg_val_1);
 355
 356                         dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_DREQ_REG,
 357                                        reg_val_2);
 358                 }
 359         }
 360 }
 361
 362 static void hns_dsaf_ge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
 363                                           u32 port, bool dereset)
 364 {
 365         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 366                                    HNS_GE_RESET_FUNC, port, dereset);
 367 }
 368
 369 static void hns_ppe_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
 370                                  bool dereset)
 371 {
 372         u32 reg_val = 0;
 373         u32 reg_addr;
 374
 375         reg_val |= RESET_REQ_OR_DREQ << dsaf_dev->mac_cb[port]->port_rst_off;
 376
 377         if (!dereset)
 378                 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
 379         else
 380                 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
 381
 382         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 383 }
 384
 385 static void
 386 hns_ppe_srst_by_port_acpi(struct dsaf_device *dsaf_dev, u32 port, bool dereset)
 387 {
 388         hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
 389                                    HNS_PPE_RESET_FUNC, port, dereset);
 390 }
 391
 392 static void hns_ppe_com_srst(struct dsaf_device *dsaf_dev, bool dereset)
 393 {
 394         u32 reg_val;
 395         u32 reg_addr;
 396
 397         if (!(dev_of_node(dsaf_dev->dev)))
 398                 return;
 399
 400         if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
 401                 reg_val = RESET_REQ_OR_DREQ;
 402                 if (!dereset)
 403                         reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG;
 404                 else
 405                         reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG;
 406
 407         } else {
 408                 reg_val = 0x100 << dsaf_dev->reset_offset;
 409
 410                 if (!dereset)
 411                         reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
 412                 else
 413                         reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
 414         }
 415
 416         dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
 417 }
 418
 419 /**
 420  * hns_mac_get_sds_mode - get phy ifterface form serdes mode
 421  * @mac_cb: mac control block
 422  * retuen phy interface
 423  */
 424 static phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
 425 {
 426         u32 mode;
 427         u32 reg;
 428         bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
 429         int mac_id = mac_cb->mac_id;
 430         phy_interface_t phy_if;
 431
 432         if (is_ver1) {
 433                 if (HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev))
 434                         return PHY_INTERFACE_MODE_SGMII;
 435
 436                 if (mac_id >= 0 && mac_id <= 3)
 437                         reg = HNS_MAC_HILINK4_REG;
 438                 else
 439                         reg = HNS_MAC_HILINK3_REG;
 440         } else{
 441                 if (!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev) && mac_id <= 3)
 442                         reg = HNS_MAC_HILINK4V2_REG;
 443                 else
 444                         reg = HNS_MAC_HILINK3V2_REG;
 445         }
 446
 447         mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
 448         if (dsaf_get_bit(mode, mac_cb->port_mode_off))
 449                 phy_if = PHY_INTERFACE_MODE_XGMII;
 450         else
 451                 phy_if = PHY_INTERFACE_MODE_SGMII;
 452
 453         return phy_if;
 454 }
 455
 456 static phy_interface_t hns_mac_get_phy_if_acpi(struct hns_mac_cb *mac_cb)
 457 {
 458         phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
 459         union acpi_object *obj;
 460         union acpi_object obj_args, argv4;
 461
 462         obj_args.integer.type = ACPI_TYPE_INTEGER;
 463         obj_args.integer.value = mac_cb->mac_id;
 464
 465         argv4.type = ACPI_TYPE_PACKAGE,
 466         argv4.package.count = 1,
 467         argv4.package.elements = &obj_args,
 468
 469         obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
 470                                 hns_dsaf_acpi_dsm_uuid, 0,
 471                                 HNS_OP_GET_PORT_TYPE_FUNC, &argv4);
 472
 473         if (!obj || obj->type != ACPI_TYPE_INTEGER)
 474                 return phy_if;
 475
 476         phy_if = obj->integer.value ?
 477                 PHY_INTERFACE_MODE_XGMII : PHY_INTERFACE_MODE_SGMII;
 478
 479         dev_dbg(mac_cb->dev, "mac_id=%d, phy_if=%d\n", mac_cb->mac_id, phy_if);
 480
 481         ACPI_FREE(obj);
 482
 483         return phy_if;
 484 }
 485
 486 int hns_mac_get_sfp_prsnt(struct hns_mac_cb *mac_cb, int *sfp_prsnt)
 487 {
 488         if (!mac_cb->cpld_ctrl)
 489                 return -ENODEV;
 490
 491         *sfp_prsnt = !dsaf_read_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg
 492                                         + MAC_SFP_PORT_OFFSET);
 493
 494         return 0;
 495 }
 496
 497 /**
 498  * hns_mac_config_sds_loopback - set loop back for serdes
 499  * @mac_cb: mac control block
 500  * retuen 0 == success
 501  */
 502 static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en)
 503 {
 504         const u8 lane_id[] = {
 505                 0,      /* mac 0 -> lane 0 */
 506                 1,      /* mac 1 -> lane 1 */
 507                 2,      /* mac 2 -> lane 2 */
 508                 3,      /* mac 3 -> lane 3 */
 509                 2,      /* mac 4 -> lane 2 */
 510                 3,      /* mac 5 -> lane 3 */
 511                 0,      /* mac 6 -> lane 0 */
 512                 1       /* mac 7 -> lane 1 */
 513         };
 514 #define RX_CSR(lane, reg) ((0x4080 + (reg) * 0x0002 + (lane) * 0x0200) * 2)
 515         u64 reg_offset = RX_CSR(lane_id[mac_cb->mac_id], 0);
 516
 517         int sfp_prsnt;
 518         int ret = hns_mac_get_sfp_prsnt(mac_cb, &sfp_prsnt);
 519
 520         if (!mac_cb->phy_dev) {
 521                 if (ret)
 522                         pr_info("please confirm sfp is present or not\n");
 523                 else
 524                         if (!sfp_prsnt)
 525                                 pr_info("no sfp in this eth\n");
 526         }
 527
 528         if (mac_cb->serdes_ctrl) {
 529                 u32 origin;
 530
 531                 if (!AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver)) {
 532 #define HILINK_ACCESS_SEL_CFG           0x40008
 533                         /* hilink4 & hilink3 use the same xge training and
 534                          * xge u adaptor. There is a hilink access sel cfg
 535                          * register to select which one to be configed
 536                          */
 537                         if ((!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev)) &&
 538                             (mac_cb->mac_id <= 3))
 539                                 dsaf_write_syscon(mac_cb->serdes_ctrl,
 540                                                   HILINK_ACCESS_SEL_CFG, 0);
 541                         else
 542                                 dsaf_write_syscon(mac_cb->serdes_ctrl,
 543                                                   HILINK_ACCESS_SEL_CFG, 3);
 544                 }
 545
 546                 origin = dsaf_read_syscon(mac_cb->serdes_ctrl, reg_offset);
 547
 548                 dsaf_set_field(origin, 1ull << 10, 10, en);
 549                 dsaf_write_syscon(mac_cb->serdes_ctrl, reg_offset, origin);
 550         } else {
 551                 u8 *base_addr = (u8 *)mac_cb->serdes_vaddr +
 552                                 (mac_cb->mac_id <= 3 ? 0x00280000 : 0x00200000);
 553                 dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en);
 554         }
 555
 556         return 0;
 557 }
 558
 559 static int
 560 hns_mac_config_sds_loopback_acpi(struct hns_mac_cb *mac_cb, bool en)
 561 {
 562         union acpi_object *obj;
 563         union acpi_object obj_args[3], argv4;
 564
 565         obj_args[0].integer.type = ACPI_TYPE_INTEGER;
 566         obj_args[0].integer.value = mac_cb->mac_id;
 567         obj_args[1].integer.type = ACPI_TYPE_INTEGER;
 568         obj_args[1].integer.value = !!en;
 569
 570         argv4.type = ACPI_TYPE_PACKAGE;
 571         argv4.package.count = 2;
 572         argv4.package.elements = obj_args;
 573
 574         obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dsaf_dev->dev),
 575                                 hns_dsaf_acpi_dsm_uuid, 0,
 576                                 HNS_OP_SERDES_LP_FUNC, &argv4);
 577         if (!obj) {
 578                 dev_warn(mac_cb->dsaf_dev->dev, "set port%d serdes lp fail!",
 579                          mac_cb->mac_id);
 580
 581                 return -ENOTSUPP;
 582         }
 583
 584         ACPI_FREE(obj);
 585
 586         return 0;
 587 }
 588
 589 struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)
 590 {
 591         struct dsaf_misc_op *misc_op;
 592
 593         misc_op = devm_kzalloc(dsaf_dev->dev, sizeof(*misc_op), GFP_KERNEL);
 594         if (!misc_op)
 595                 return NULL;
 596
 597         if (dev_of_node(dsaf_dev->dev)) {
 598                 misc_op->cpld_set_led = hns_cpld_set_led;
 599                 misc_op->cpld_reset_led = cpld_led_reset;
 600                 misc_op->cpld_set_led_id = cpld_set_led_id;
 601
 602                 misc_op->dsaf_reset = hns_dsaf_rst;
 603                 misc_op->xge_srst = hns_dsaf_xge_srst_by_port;
 604                 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port;
 605                 misc_op->ge_srst = hns_dsaf_ge_srst_by_port;
 606                 misc_op->ppe_srst = hns_ppe_srst_by_port;
 607                 misc_op->ppe_comm_srst = hns_ppe_com_srst;
 608                 misc_op->hns_dsaf_srst_chns = hns_dsaf_srst_chns;
 609                 misc_op->hns_dsaf_roce_srst = hns_dsaf_roce_srst;
 610
 611                 misc_op->get_phy_if = hns_mac_get_phy_if;
 612                 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
 613
 614                 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback;
 615         } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
 616                 misc_op->cpld_set_led = hns_cpld_set_led;
 617                 misc_op->cpld_reset_led = cpld_led_reset;
 618                 misc_op->cpld_set_led_id = cpld_set_led_id;
 619
 620                 misc_op->dsaf_reset = hns_dsaf_rst_acpi;
 621                 misc_op->xge_srst = hns_dsaf_xge_srst_by_port_acpi;
 622                 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port_acpi;
 623                 misc_op->ge_srst = hns_dsaf_ge_srst_by_port_acpi;
 624                 misc_op->ppe_srst = hns_ppe_srst_by_port_acpi;
 625                 misc_op->ppe_comm_srst = hns_ppe_com_srst;
 626                 misc_op->hns_dsaf_srst_chns = hns_dsaf_srst_chns_acpi;
 627                 misc_op->hns_dsaf_roce_srst = hns_dsaf_roce_srst_acpi;
 628
 629                 misc_op->get_phy_if = hns_mac_get_phy_if_acpi;
 630                 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
 631
 632                 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback_acpi;
 633         } else {
 634                 devm_kfree(dsaf_dev->dev, (void *)misc_op);
 635                 misc_op = NULL;
 636         }
 637
 638         return (void *)misc_op;
 639 }
 640
 641 static int hns_dsaf_dev_match(struct device *dev, void *fwnode)
 642 {
 643         return dev->fwnode == fwnode;
 644 }
 645
 646 struct
 647 platform_device *hns_dsaf_find_platform_device(struct fwnode_handle *fwnode)
 648 {
 649         struct device *dev;
 650
 651         dev = bus_find_device(&platform_bus_type, NULL,
 652                               fwnode, hns_dsaf_dev_match);
 653         return dev ? to_platform_device(dev) : NULL;
 654 }