1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2014-2015 Hisilicon Limited.
9 /* Names used in this framework:
11 * a set of queues provided by AE
12 * ring buffer queue (rbq):
13 * the channel between upper layer and the AE, can do tx and rx
15 * a tx or rx channel within a rbq
16 * ring description (desc):
17 * an element in the ring with packet information
19 * a memory region referred by desc with the full packet payload
21 * "num" means a static number set as a parameter, "count" mean a dynamic
22 * number set while running
23 * "cb" means control block
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
31 #include <linux/notifier.h>
32 #include <linux/phy.h>
33 #include <linux/types.h>
35 #define HNAE_DRIVER_VERSION "2.0"
36 #define HNAE_DRIVER_NAME "hns"
37 #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation."
38 #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver"
39 #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem"
44 #define assert(expr) \
47 pr_err("Assertion failed! %s, %s, %s, line %d\n", \
48 #expr, __FILE__, __func__, __LINE__); \
61 #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0')
62 #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0')
63 #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1)
64 #define AE_NAME_SIZE 16
66 #define BD_SIZE_2048_MAX_MTU 6000
68 /* some said the RX and TX RCB format should not be the same in the future. But
69 * it is the same now...
71 #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */
72 #define RCB_REG_BASEADDR_H 0x04
73 #define RCB_REG_BD_NUM 0x08
74 #define RCB_REG_BD_LEN 0x0C
75 #define RCB_REG_PKTLINE 0x10
76 #define RCB_REG_TAIL 0x18
77 #define RCB_REG_HEAD 0x1C
78 #define RCB_REG_FBDNUM 0x20
79 #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */
80 #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */
82 #define HNS_RX_HEAD_SIZE 256
84 #define HNAE_AE_REGISTER 0x1
86 #define RCB_RING_NAME_LEN (IFNAMSIZ + 4)
88 #define HNAE_LOWEST_LATENCY_COAL_PARAM 30
89 #define HNAE_LOW_LATENCY_COAL_PARAM 80
90 #define HNAE_BULK_LATENCY_COAL_PARAM 150
99 #define HNS_RX_FLAG_VLAN_PRESENT 0x1
100 #define HNS_RX_FLAG_L3ID_IPV4 0x0
101 #define HNS_RX_FLAG_L3ID_IPV6 0x1
102 #define HNS_RX_FLAG_L4ID_UDP 0x0
103 #define HNS_RX_FLAG_L4ID_TCP 0x1
104 #define HNS_RX_FLAG_L4ID_SCTP 0x3
106 #define HNS_TXD_ASID_S 0
107 #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S)
108 #define HNS_TXD_BUFNUM_S 8
109 #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S)
110 #define HNS_TXD_PORTID_S 10
111 #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S)
113 #define HNS_TXD_RA_B 8
114 #define HNS_TXD_RI_B 9
115 #define HNS_TXD_L4CS_B 10
116 #define HNS_TXD_L3CS_B 11
117 #define HNS_TXD_FE_B 12
118 #define HNS_TXD_VLD_B 13
119 #define HNS_TXD_IPOFFSET_S 14
120 #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
122 #define HNS_RXD_IPOFFSET_S 0
123 #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
124 #define HNS_RXD_BUFNUM_S 8
125 #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S)
126 #define HNS_RXD_PORTID_S 10
127 #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S)
128 #define HNS_RXD_DMAC_S 13
129 #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S)
130 #define HNS_RXD_VLAN_S 15
131 #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S)
132 #define HNS_RXD_L3ID_S 17
133 #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S)
134 #define HNS_RXD_L4ID_S 21
135 #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S)
136 #define HNS_RXD_FE_B 25
137 #define HNS_RXD_FRAG_B 26
138 #define HNS_RXD_VLD_B 27
139 #define HNS_RXD_L2E_B 28
140 #define HNS_RXD_L3E_B 29
141 #define HNS_RXD_L4E_B 30
142 #define HNS_RXD_DROP_B 31
144 #define HNS_RXD_VLANID_S 8
145 #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S)
146 #define HNS_RXD_CFI_B 20
147 #define HNS_RXD_PRI_S 21
148 #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S)
149 #define HNS_RXD_ASID_S 24
150 #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S)
152 #define HNSV2_TXD_BUFNUM_S 0
153 #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S)
154 #define HNSV2_TXD_PORTID_S 4
155 #define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S)
156 #define HNSV2_TXD_RI_B 1
157 #define HNSV2_TXD_L4CS_B 2
158 #define HNSV2_TXD_L3CS_B 3
159 #define HNSV2_TXD_FE_B 4
160 #define HNSV2_TXD_VLD_B 5
162 #define HNSV2_TXD_TSE_B 0
163 #define HNSV2_TXD_VLAN_EN_B 1
164 #define HNSV2_TXD_SNAP_B 2
165 #define HNSV2_TXD_IPV6_B 3
166 #define HNSV2_TXD_SCTP_B 4
168 /* hardware spec ring buffer format */
169 struct __packed hnae_desc {
174 __le16 asid_bufnum_pid;
179 __le32 flag_ipoffset;
182 __u8 ra_ri_cs_fe_vld;
184 __u8 tse_vlan_snap_v6_sctp_nth;
197 __le32 ipoff_bnum_pid_flag;
201 __le32 vlan_pri_asid;
208 __le32 reserved_1[2];
213 struct hnae_desc_cb {
214 dma_addr_t dma; /* dma address of this desc */
215 void *buf; /* cpu addr for a desc */
217 /* priv data for the desc, e.g. skb when use with ip stack*/
220 u32 length; /* length of the buffer */
224 /* desc type, used by the ring user to mark the type of the priv data */
228 #define setflags(flags, bits) ((flags) |= (bits))
229 #define unsetflags(flags, bits) ((flags) &= ~(bits))
231 /* hnae_ring->flags fields */
232 #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */
233 #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR)
234 #define is_rx_ring(ring) (!is_tx_ring(ring))
235 #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \
236 DMA_TO_DEVICE : DMA_FROM_DEVICE)
267 u8 __iomem *io_base; /* base io address for the ring */
268 struct hnae_desc *desc; /* dma map address space */
269 struct hnae_desc_cb *desc_cb;
270 struct hnae_queue *q;
272 char ring_name[RCB_RING_NAME_LEN];
275 struct ring_stats stats;
277 dma_addr_t desc_dma_addr;
278 u32 buf_size; /* size for hnae_desc->addr, preset by AE */
279 u16 desc_num; /* total number of desc */
280 u16 max_desc_num_per_pkt;
281 u16 max_raw_data_sz_per_desc;
283 int next_to_use; /* idx of next spare desc */
285 /* idx of lastest sent desc, the ring is empty when equal to
290 int flags; /* ring attribute */
293 /* total rx bytes after last rx rate calucated */
294 u64 coal_last_rx_bytes;
295 unsigned long coal_last_jiffies;
297 u32 coal_rx_rate; /* rx rate in MB */
300 #define ring_ptr_move_fw(ring, p) \
301 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
302 #define ring_ptr_move_bw(ring, p) \
303 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
310 #define assert_is_ring_idx(ring, idx) \
311 assert((idx) >= 0 && (idx) < (ring)->desc_num)
313 /* the distance between [begin, end) in a ring buffer
314 * note: there is a unuse slot between the begin and the end
316 static inline int ring_dist(struct hnae_ring *ring, int begin, int end)
318 assert_is_ring_idx(ring, begin);
319 assert_is_ring_idx(ring, end);
321 return (end - begin + ring->desc_num) % ring->desc_num;
324 static inline int ring_space(struct hnae_ring *ring)
326 return ring->desc_num -
327 ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1;
330 static inline int is_ring_empty(struct hnae_ring *ring)
332 assert_is_ring_idx(ring, ring->next_to_use);
333 assert_is_ring_idx(ring, ring->next_to_clean);
335 return ring->next_to_use == ring->next_to_clean;
338 #define hnae_buf_size(_ring) ((_ring)->buf_size)
339 #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring)))
340 #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring))
344 /* allocate and dma map space for hnae desc */
345 struct hnae_buf_ops {
346 int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
347 void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
348 int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
349 void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
354 phys_addr_t phy_base;
355 struct hnae_ae_dev *dev; /* the device who use this queue */
356 struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp;
357 struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp;
358 struct hnae_handle *handle;
363 MAC_INTERNALLOOP_MAC = 0,
364 MAC_INTERNALLOOP_SERDES,
365 MAC_INTERNALLOOP_PHY,
371 enum hnae_port_type {
372 HNAE_PORT_SERVICE = 0,
377 enum hnae_media_type {
378 HNAE_MEDIA_TYPE_UNKNOWN = 0,
379 HNAE_MEDIA_TYPE_FIBER,
380 HNAE_MEDIA_TYPE_COPPER,
381 HNAE_MEDIA_TYPE_BACKPLANE,
384 /* This struct defines the operation on the handle.
386 * get_handle(): (mandatory)
387 * Get a handle from AE according to its name and options.
388 * the AE driver should manage the space used by handle and its queues while
389 * the HNAE framework will allocate desc and desc_cb for all rings in the
392 * Release the handle.
394 * Enable the hardware, include all queues
396 * Disable the hardware
397 * set_opts(): (mandatory)
398 * Set options to the AE
399 * get_opts(): (mandatory)
400 * Get options from the AE
402 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
404 * toggle_ring_irq(): (mandatory)
405 * Set the ring irq to be enabled(0) or disable(1)
406 * toggle_queue_status(): (mandatory)
407 * Set the queue to be enabled(1) or disable(0), this will not change the
413 * get_ring_bdnum_limit()
414 * get ring bd number limit
416 * get tx and rx of pause frame use
418 * set tx and rx of pause frame use
419 * get_coalesce_usecs()
420 * get usecs to delay a TX interrupt after a packet is sent
421 * get_rx_max_coalesced_frames()
422 * get Maximum number of packets to be sent before a TX interrupt.
423 * set_coalesce_usecs()
424 * set usecs to delay a TX interrupt after a packet is sent
425 * set_coalesce_frames()
426 * set Maximum number of packets to be sent before a TX interrupt.
428 * get RX/TX ring number
430 * get RX/TX ring maximum number
436 * clear mcast tcam table
442 * remove ucast address
446 * update Old network device statistics
447 * get_ethtool_stats()
448 * get ethtool network device statistics
450 * get a set of strings that describe the requested objects
452 * get number of strings that @get_strings will write
453 * update_led_status()
454 * update the led status
460 * get the len of the regs dump
463 struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev,
465 void (*put_handle)(struct hnae_handle *handle);
466 void (*init_queue)(struct hnae_queue *q);
467 void (*fini_queue)(struct hnae_queue *q);
468 int (*start)(struct hnae_handle *handle);
469 void (*stop)(struct hnae_handle *handle);
470 void (*reset)(struct hnae_handle *handle);
471 int (*set_opts)(struct hnae_handle *handle, int type, void *opts);
472 int (*get_opts)(struct hnae_handle *handle, int type, void **opts);
473 int (*get_status)(struct hnae_handle *handle);
474 int (*get_info)(struct hnae_handle *handle,
475 u8 *auto_neg, u16 *speed, u8 *duplex);
476 void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val);
477 void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex);
478 bool (*need_adjust_link)(struct hnae_handle *handle,
479 int speed, int duplex);
480 int (*set_loopback)(struct hnae_handle *handle,
481 enum hnae_loop loop_mode, int en);
482 void (*get_ring_bdnum_limit)(struct hnae_queue *queue,
484 void (*get_pauseparam)(struct hnae_handle *handle,
485 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
486 int (*set_pauseparam)(struct hnae_handle *handle,
487 u32 auto_neg, u32 rx_en, u32 tx_en);
488 void (*get_coalesce_usecs)(struct hnae_handle *handle,
489 u32 *tx_usecs, u32 *rx_usecs);
490 void (*get_max_coalesced_frames)(struct hnae_handle *handle,
491 u32 *tx_frames, u32 *rx_frames);
492 int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout);
493 int (*set_coalesce_frames)(struct hnae_handle *handle,
494 u32 tx_frames, u32 rx_frames);
495 void (*get_coalesce_range)(struct hnae_handle *handle,
496 u32 *tx_frames_low, u32 *rx_frames_low,
497 u32 *tx_frames_high, u32 *rx_frames_high,
498 u32 *tx_usecs_low, u32 *rx_usecs_low,
499 u32 *tx_usecs_high, u32 *rx_usecs_high);
500 void (*set_promisc_mode)(struct hnae_handle *handle, u32 en);
501 int (*get_mac_addr)(struct hnae_handle *handle, void **p);
502 int (*set_mac_addr)(struct hnae_handle *handle, const void *p);
503 int (*add_uc_addr)(struct hnae_handle *handle,
504 const unsigned char *addr);
505 int (*rm_uc_addr)(struct hnae_handle *handle,
506 const unsigned char *addr);
507 int (*clr_mc_addr)(struct hnae_handle *handle);
508 int (*set_mc_addr)(struct hnae_handle *handle, void *addr);
509 int (*set_mtu)(struct hnae_handle *handle, int new_mtu);
510 void (*set_tso_stats)(struct hnae_handle *handle, int enable);
511 void (*update_stats)(struct hnae_handle *handle,
512 struct net_device_stats *net_stats);
513 void (*get_stats)(struct hnae_handle *handle, u64 *data);
514 void (*get_strings)(struct hnae_handle *handle,
515 u32 stringset, u8 *data);
516 int (*get_sset_count)(struct hnae_handle *handle, int stringset);
517 void (*update_led_status)(struct hnae_handle *handle);
518 int (*set_led_id)(struct hnae_handle *handle,
519 enum hnae_led_state status);
520 void (*get_regs)(struct hnae_handle *handle, void *data);
521 int (*get_regs_len)(struct hnae_handle *handle);
522 u32 (*get_rss_key_size)(struct hnae_handle *handle);
523 u32 (*get_rss_indir_size)(struct hnae_handle *handle);
524 int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key,
526 int (*set_rss)(struct hnae_handle *handle, const u32 *indir,
527 const u8 *key, const u8 hfunc);
531 struct device cls_dev; /* the class dev */
532 struct device *dev; /* the presented dev */
533 struct hnae_ae_ops *ops;
534 struct list_head node;
535 struct module *owner; /* the module who provides this dev */
537 char name[AE_NAME_SIZE];
538 struct list_head handle_list;
539 spinlock_t lock; /* lock to protect the handle_list */
543 struct device *owner_dev; /* the device which make use of this handle */
544 struct hnae_ae_dev *dev; /* the device who provides this handle */
545 struct phy_device *phy_dev;
546 phy_interface_t phy_if;
550 unsigned long coal_last_jiffies;
551 u32 coal_param; /* self adapt coalesce param */
552 /* the ring index of last ring that set coal param */
555 u32 dport_id; /* v2 tx bd should fill the dport_id */
557 enum hnae_port_type port_type;
558 enum hnae_media_type media_type;
559 struct list_head node; /* list to hnae_ae_dev->handle_list */
560 struct hnae_buf_ops *bops; /* operation for the buffer */
561 struct hnae_queue *qs[]; /* flexible array of all queues */
564 #define ring_to_dev(ring) ((ring)->q->dev->dev)
566 struct hnae_handle *hnae_get_handle(struct device *owner_dev,
567 const struct fwnode_handle *fwnode,
569 struct hnae_buf_ops *bops);
571 void hnae_put_handle(struct hnae_handle *handle);
572 int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner);
573 void hnae_ae_unregister(struct hnae_ae_dev *dev);
575 int hnae_register_notifier(struct notifier_block *nb);
576 void hnae_unregister_notifier(struct notifier_block *nb);
577 int hnae_reinit_handle(struct hnae_handle *handle);
579 #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \
580 (q)->tx_ring.io_base + RCB_REG_TAIL)
586 static inline int hnae_reserve_buffer_map(struct hnae_ring *ring,
587 struct hnae_desc_cb *cb)
589 struct hnae_buf_ops *bops = ring->q->handle->bops;
592 ret = bops->alloc_buffer(ring, cb);
596 ret = bops->map_buffer(ring, cb);
603 bops->free_buffer(ring, cb);
608 static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i)
610 int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]);
615 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
620 static inline void hnae_buffer_detach(struct hnae_ring *ring, int i)
622 ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]);
623 ring->desc[i].addr = 0;
626 static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i)
628 struct hnae_buf_ops *bops = ring->q->handle->bops;
629 struct hnae_desc_cb *cb = &ring->desc_cb[i];
631 if (!ring->desc_cb[i].dma)
634 hnae_buffer_detach(ring, i);
635 bops->free_buffer(ring, cb);
638 /* detach a in-used buffer and replace with a reserved one */
639 static inline void hnae_replace_buffer(struct hnae_ring *ring, int i,
640 struct hnae_desc_cb *res_cb)
642 struct hnae_buf_ops *bops = ring->q->handle->bops;
644 bops->unmap_buffer(ring, &ring->desc_cb[i]);
645 ring->desc_cb[i] = *res_cb;
646 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
647 ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
650 static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i)
652 ring->desc_cb[i].reuse_flag = 0;
653 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
654 + ring->desc_cb[i].page_offset);
655 ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
658 /* when reinit buffer size, we should reinit buffer description */
659 static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h)
662 struct hnae_ring *ring;
664 for (i = 0; i < h->q_num; i++) {
665 ring = &h->qs[i]->rx_ring;
666 for (j = 0; j < ring->desc_num; j++)
667 ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma);
670 wmb(); /* commit all data before submit */
673 /* when reinit buffer size, we should reinit page offset */
674 static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h)
677 struct hnae_ring *ring;
679 for (i = 0; i < h->q_num; i++) {
680 ring = &h->qs[i]->rx_ring;
681 for (j = 0; j < ring->desc_num; j++) {
682 ring->desc_cb[j].page_offset = 0;
683 if (ring->desc[j].addr !=
684 cpu_to_le64(ring->desc_cb[j].dma))
686 cpu_to_le64(ring->desc_cb[j].dma);
690 wmb(); /* commit all data before submit */
693 #define hnae_set_field(origin, mask, shift, val) \
695 (origin) &= (~(mask)); \
696 (origin) |= ((val) << (shift)) & (mask); \
699 #define hnae_set_bit(origin, shift, val) \
700 hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
702 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
704 #define hnae_get_bit(origin, shift) \
705 hnae_get_field((origin), (0x1 << (shift)), (shift))