1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2014-2016 Freescale Semiconductor Inc.
4 * Copyright 2017-2021 NXP
8 #ifndef __FSL_DPSW_CMD_H
9 #define __FSL_DPSW_CMD_H
14 #define DPSW_VER_MAJOR 8
15 #define DPSW_VER_MINOR 9
17 #define DPSW_CMD_BASE_VERSION 1
18 #define DPSW_CMD_VERSION_2 2
19 #define DPSW_CMD_ID_OFFSET 4
21 #define DPSW_CMD_ID(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_BASE_VERSION)
22 #define DPSW_CMD_V2(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_VERSION_2)
25 #define DPSW_CMDID_CLOSE DPSW_CMD_ID(0x800)
26 #define DPSW_CMDID_OPEN DPSW_CMD_ID(0x802)
28 #define DPSW_CMDID_GET_API_VERSION DPSW_CMD_ID(0xa02)
30 #define DPSW_CMDID_ENABLE DPSW_CMD_ID(0x002)
31 #define DPSW_CMDID_DISABLE DPSW_CMD_ID(0x003)
32 #define DPSW_CMDID_GET_ATTR DPSW_CMD_V2(0x004)
33 #define DPSW_CMDID_RESET DPSW_CMD_ID(0x005)
35 #define DPSW_CMDID_SET_IRQ_ENABLE DPSW_CMD_ID(0x012)
37 #define DPSW_CMDID_SET_IRQ_MASK DPSW_CMD_ID(0x014)
39 #define DPSW_CMDID_GET_IRQ_STATUS DPSW_CMD_ID(0x016)
40 #define DPSW_CMDID_CLEAR_IRQ_STATUS DPSW_CMD_ID(0x017)
42 #define DPSW_CMDID_SET_REFLECTION_IF DPSW_CMD_ID(0x022)
44 #define DPSW_CMDID_IF_SET_TCI DPSW_CMD_ID(0x030)
45 #define DPSW_CMDID_IF_SET_STP DPSW_CMD_ID(0x031)
47 #define DPSW_CMDID_IF_GET_COUNTER DPSW_CMD_V2(0x034)
49 #define DPSW_CMDID_IF_ADD_REFLECTION DPSW_CMD_ID(0x037)
50 #define DPSW_CMDID_IF_REMOVE_REFLECTION DPSW_CMD_ID(0x038)
52 #define DPSW_CMDID_IF_ENABLE DPSW_CMD_ID(0x03D)
53 #define DPSW_CMDID_IF_DISABLE DPSW_CMD_ID(0x03E)
55 #define DPSW_CMDID_IF_GET_ATTR DPSW_CMD_ID(0x042)
57 #define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH DPSW_CMD_ID(0x044)
59 #define DPSW_CMDID_IF_GET_LINK_STATE DPSW_CMD_ID(0x046)
61 #define DPSW_CMDID_IF_GET_TCI DPSW_CMD_ID(0x04A)
63 #define DPSW_CMDID_IF_SET_LINK_CFG DPSW_CMD_ID(0x04C)
65 #define DPSW_CMDID_VLAN_ADD DPSW_CMD_ID(0x060)
66 #define DPSW_CMDID_VLAN_ADD_IF DPSW_CMD_V2(0x061)
67 #define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED DPSW_CMD_ID(0x062)
69 #define DPSW_CMDID_VLAN_REMOVE_IF DPSW_CMD_ID(0x064)
70 #define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED DPSW_CMD_ID(0x065)
71 #define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING DPSW_CMD_ID(0x066)
72 #define DPSW_CMDID_VLAN_REMOVE DPSW_CMD_ID(0x067)
74 #define DPSW_CMDID_FDB_ADD DPSW_CMD_ID(0x082)
75 #define DPSW_CMDID_FDB_REMOVE DPSW_CMD_ID(0x083)
76 #define DPSW_CMDID_FDB_ADD_UNICAST DPSW_CMD_ID(0x084)
77 #define DPSW_CMDID_FDB_REMOVE_UNICAST DPSW_CMD_ID(0x085)
78 #define DPSW_CMDID_FDB_ADD_MULTICAST DPSW_CMD_ID(0x086)
79 #define DPSW_CMDID_FDB_REMOVE_MULTICAST DPSW_CMD_ID(0x087)
80 #define DPSW_CMDID_FDB_DUMP DPSW_CMD_ID(0x08A)
82 #define DPSW_CMDID_ACL_ADD DPSW_CMD_ID(0x090)
83 #define DPSW_CMDID_ACL_REMOVE DPSW_CMD_ID(0x091)
84 #define DPSW_CMDID_ACL_ADD_ENTRY DPSW_CMD_ID(0x092)
85 #define DPSW_CMDID_ACL_REMOVE_ENTRY DPSW_CMD_ID(0x093)
86 #define DPSW_CMDID_ACL_ADD_IF DPSW_CMD_ID(0x094)
87 #define DPSW_CMDID_ACL_REMOVE_IF DPSW_CMD_ID(0x095)
89 #define DPSW_CMDID_IF_GET_PORT_MAC_ADDR DPSW_CMD_ID(0x0A7)
91 #define DPSW_CMDID_CTRL_IF_GET_ATTR DPSW_CMD_ID(0x0A0)
92 #define DPSW_CMDID_CTRL_IF_SET_POOLS DPSW_CMD_ID(0x0A1)
93 #define DPSW_CMDID_CTRL_IF_ENABLE DPSW_CMD_ID(0x0A2)
94 #define DPSW_CMDID_CTRL_IF_DISABLE DPSW_CMD_ID(0x0A3)
95 #define DPSW_CMDID_CTRL_IF_SET_QUEUE DPSW_CMD_ID(0x0A6)
97 #define DPSW_CMDID_SET_EGRESS_FLOOD DPSW_CMD_ID(0x0AC)
98 #define DPSW_CMDID_IF_SET_LEARNING_MODE DPSW_CMD_ID(0x0AD)
100 /* Macros for accessing command fields smaller than 1byte */
101 #define DPSW_MASK(field) \
102 GENMASK(DPSW_##field##_SHIFT + DPSW_##field##_SIZE - 1, \
103 DPSW_##field##_SHIFT)
104 #define dpsw_set_field(var, field, val) \
105 ((var) |= (((val) << DPSW_##field##_SHIFT) & DPSW_MASK(field)))
106 #define dpsw_get_field(var, field) \
107 (((var) & DPSW_MASK(field)) >> DPSW_##field##_SHIFT)
108 #define dpsw_get_bit(var, bit) \
109 (((var) >> (bit)) & GENMASK(0, 0))
111 #pragma pack(push, 1)
112 struct dpsw_cmd_open {
116 #define DPSW_COMPONENT_TYPE_SHIFT 0
117 #define DPSW_COMPONENT_TYPE_SIZE 4
119 struct dpsw_cmd_create {
123 u8 max_meters_per_if;
124 /* from LSB: only the first 4 bits */
129 __le16 max_fdb_entries;
130 __le16 fdb_aging_time;
131 __le16 max_fdb_mc_groups;
136 struct dpsw_cmd_destroy {
140 #define DPSW_ENABLE_SHIFT 0
141 #define DPSW_ENABLE_SIZE 1
143 struct dpsw_rsp_is_enabled {
144 /* from LSB: enable:1 */
148 struct dpsw_cmd_set_irq_enable {
154 struct dpsw_cmd_get_irq_enable {
159 struct dpsw_rsp_get_irq_enable {
163 struct dpsw_cmd_set_irq_mask {
168 struct dpsw_cmd_get_irq_mask {
173 struct dpsw_rsp_get_irq_mask {
177 struct dpsw_cmd_get_irq_status {
182 struct dpsw_rsp_get_irq_status {
186 struct dpsw_cmd_clear_irq_status {
191 #define DPSW_COMPONENT_TYPE_SHIFT 0
192 #define DPSW_COMPONENT_TYPE_SIZE 4
194 #define DPSW_FLOODING_CFG_SHIFT 0
195 #define DPSW_FLOODING_CFG_SIZE 4
197 #define DPSW_BROADCAST_CFG_SHIFT 4
198 #define DPSW_BROADCAST_CFG_SIZE 4
200 struct dpsw_rsp_get_attr {
208 __le16 max_fdb_entries;
209 __le16 fdb_aging_time;
213 __le16 max_fdb_mc_groups;
214 u8 max_meters_per_if;
215 /* from LSB only the first 4 bits */
217 /* [0:3] - flooding configuration
218 * [4:7] - broadcast configuration
226 #define DPSW_VLAN_ID_SHIFT 0
227 #define DPSW_VLAN_ID_SIZE 12
228 #define DPSW_DEI_SHIFT 12
229 #define DPSW_DEI_SIZE 1
230 #define DPSW_PCP_SHIFT 13
231 #define DPSW_PCP_SIZE 3
233 struct dpsw_cmd_if_set_tci {
235 /* from LSB: VLAN_ID:12 DEI:1 PCP:3 */
239 struct dpsw_cmd_if_get_tci {
243 struct dpsw_rsp_if_get_tci {
250 #define DPSW_STATE_SHIFT 0
251 #define DPSW_STATE_SIZE 4
253 struct dpsw_cmd_if_set_stp {
256 /* only the first LSB 4 bits */
260 #define DPSW_COUNTER_TYPE_SHIFT 0
261 #define DPSW_COUNTER_TYPE_SIZE 5
263 struct dpsw_cmd_if_get_counter {
265 /* from LSB: type:5 */
269 struct dpsw_rsp_if_get_counter {
278 #define DPSW_ADMIT_UNTAGGED_SHIFT 0
279 #define DPSW_ADMIT_UNTAGGED_SIZE 4
280 #define DPSW_ENABLED_SHIFT 5
281 #define DPSW_ENABLED_SIZE 1
282 #define DPSW_ACCEPT_ALL_VLAN_SHIFT 6
283 #define DPSW_ACCEPT_ALL_VLAN_SIZE 1
285 struct dpsw_rsp_if_get_attr {
287 /* from LSB: admit_untagged:4 enabled:1 accept_all_vlan:1 */
300 struct dpsw_cmd_if_set_max_frame_length {
305 struct dpsw_cmd_if_set_link_cfg {
316 struct dpsw_cmd_if_get_link_state {
320 #define DPSW_UP_SHIFT 0
321 #define DPSW_UP_SIZE 1
323 struct dpsw_rsp_if_get_link_state {
335 struct dpsw_vlan_add {
340 struct dpsw_cmd_vlan_add_if {
350 struct dpsw_cmd_vlan_manage_if {
359 struct dpsw_cmd_vlan_remove {
364 struct dpsw_cmd_fdb_add {
366 __le16 fdb_ageing_time;
367 __le16 num_fdb_entries;
370 struct dpsw_rsp_fdb_add {
374 struct dpsw_cmd_fdb_remove {
378 #define DPSW_ENTRY_TYPE_SHIFT 0
379 #define DPSW_ENTRY_TYPE_SIZE 4
381 struct dpsw_cmd_fdb_unicast_op {
387 /* only the first 4 bits from LSB */
391 struct dpsw_cmd_fdb_multicast_op {
395 /* only the first 4 bits from LSB */
405 struct dpsw_cmd_fdb_dump {
413 struct dpsw_rsp_fdb_dump {
417 struct dpsw_rsp_ctrl_if_get_attr {
421 __le32 tx_err_conf_fqid;
424 #define DPSW_BACKUP_POOL(val, order) (((val) & 0x1) << (order))
425 struct dpsw_cmd_ctrl_if_set_pools {
429 __le32 dpbp_id[DPSW_MAX_DPBP];
430 __le16 buffer_size[DPSW_MAX_DPBP];
433 #define DPSW_DEST_TYPE_SHIFT 0
434 #define DPSW_DEST_TYPE_SIZE 4
436 struct dpsw_cmd_ctrl_if_set_queue {
440 /* from LSB: dest_type:4 */
447 struct dpsw_rsp_get_api_version {
448 __le16 version_major;
449 __le16 version_minor;
452 struct dpsw_rsp_if_get_mac_addr {
457 struct dpsw_cmd_set_egress_flood {
464 #define DPSW_LEARNING_MODE_SHIFT 0
465 #define DPSW_LEARNING_MODE_SIZE 4
467 struct dpsw_cmd_if_set_learning_mode {
469 /* only the first 4 bits from LSB */
473 struct dpsw_cmd_acl_add {
478 struct dpsw_rsp_acl_add {
482 struct dpsw_cmd_acl_remove {
486 struct dpsw_cmd_acl_if {
493 struct dpsw_prep_acl_entry {
494 u8 match_l2_dest_mac[6];
495 __le16 match_l2_tpid;
497 u8 match_l2_source_mac[6];
498 __le16 match_l2_vlan_id;
500 __le32 match_l3_dest_ip;
501 __le32 match_l3_source_ip;
503 __le16 match_l4_dest_port;
504 __le16 match_l4_source_port;
505 __le16 match_l2_ether_type;
509 u8 mask_l2_dest_mac[6];
512 u8 mask_l2_source_mac[6];
513 __le16 mask_l2_vlan_id;
515 __le32 mask_l3_dest_ip;
516 __le32 mask_l3_source_ip;
518 __le16 mask_l4_dest_port;
519 __le16 mask_l4_source_port;
520 __le16 mask_l2_ether_type;
524 u8 match_l3_protocol;
528 #define DPSW_RESULT_ACTION_SHIFT 0
529 #define DPSW_RESULT_ACTION_SIZE 4
531 struct dpsw_cmd_acl_entry {
535 /* from LSB only the first 4 bits */
542 struct dpsw_cmd_set_reflection_if {
546 #define DPSW_FILTER_SHIFT 0
547 #define DPSW_FILTER_SIZE 2
549 struct dpsw_cmd_if_reflection {
552 /* only 2 bits from the LSB */
556 #endif /* __FSL_DPSW_CMD_H */