2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
32 #include <linux/of_net.h>
33 #include <linux/ethtool.h>
34 #include <linux/dm9000.h>
35 #include <linux/delay.h>
36 #include <linux/platform_device.h>
37 #include <linux/irq.h>
38 #include <linux/slab.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/gpio.h>
41 #include <linux/of_gpio.h>
43 #include <asm/delay.h>
49 /* Board/System/Debug information/definition ---------------- */
51 #define DM9000_PHY 0x40 /* PHY address 0x01 */
53 #define CARDNAME "dm9000"
54 #define DRV_VERSION "1.31"
57 * Transmit timeout, default 5 seconds.
59 static int watchdog = 5000;
60 module_param(watchdog, int, 0400);
61 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
64 * Debug messages level
67 module_param(debug, int, 0644);
68 MODULE_PARM_DESC(debug, "dm9000 debug level (0-6)");
70 /* DM9000 register address locking.
72 * The DM9000 uses an address register to control where data written
73 * to the data register goes. This means that the address register
74 * must be preserved over interrupts or similar calls.
76 * During interrupt and other critical calls, a spinlock is used to
77 * protect the system, but the calls themselves save the address
78 * in the address register in case they are interrupting another
79 * access to the device.
81 * For general accesses a lock is provided so that calls which are
82 * allowed to sleep are serialised so that the address register does
83 * not need to be saved. This lock also serves to serialise access
84 * to the EEPROM and PHY access registers which are shared between
88 /* The driver supports the original DM9000E, and now the two newer
89 * devices, DM9000A and DM9000B.
93 TYPE_DM9000E, /* original DM9000 */
98 /* Structure/enum declaration ------------------------------- */
101 void __iomem *io_addr; /* Register I/O base address */
102 void __iomem *io_data; /* Data I/O address */
107 u16 queue_start_addr;
110 u8 io_mode; /* 0:word, 2:byte */
115 unsigned int in_timeout:1;
116 unsigned int in_suspend:1;
117 unsigned int wake_supported:1;
119 enum dm9000_type type;
121 void (*inblk)(void __iomem *port, void *data, int length);
122 void (*outblk)(void __iomem *port, void *data, int length);
123 void (*dumpblk)(void __iomem *port, int length);
125 struct device *dev; /* parent device */
127 struct resource *addr_res; /* resources found */
128 struct resource *data_res;
129 struct resource *addr_req; /* resources requested */
130 struct resource *data_req;
134 struct mutex addr_lock; /* phy and eeprom access lock */
136 struct delayed_work phy_poll;
137 struct net_device *ndev;
141 struct mii_if_info mii;
147 struct regulator *power_supply;
152 #define dm9000_dbg(db, lev, msg...) do { \
153 if ((lev) < debug) { \
154 dev_dbg(db->dev, msg); \
158 static inline struct board_info *to_dm9000_board(struct net_device *dev)
160 return netdev_priv(dev);
163 /* DM9000 network board routine ---------------------------- */
166 * Read a byte from I/O port
169 ior(struct board_info *db, int reg)
171 writeb(reg, db->io_addr);
172 return readb(db->io_data);
176 * Write a byte to I/O port
180 iow(struct board_info *db, int reg, int value)
182 writeb(reg, db->io_addr);
183 writeb(value, db->io_data);
187 dm9000_reset(struct board_info *db)
189 dev_dbg(db->dev, "resetting device\n");
191 /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29
192 * The essential point is that we have to do a double reset, and the
193 * instruction is to set LBK into MAC internal loopback mode.
195 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
196 udelay(100); /* Application note says at least 20 us */
197 if (ior(db, DM9000_NCR) & 1)
198 dev_err(db->dev, "dm9000 did not respond to first reset\n");
200 iow(db, DM9000_NCR, 0);
201 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
203 if (ior(db, DM9000_NCR) & 1)
204 dev_err(db->dev, "dm9000 did not respond to second reset\n");
207 /* routines for sending block to chip */
209 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
211 iowrite8_rep(reg, data, count);
214 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
216 iowrite16_rep(reg, data, (count+1) >> 1);
219 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
221 iowrite32_rep(reg, data, (count+3) >> 2);
224 /* input block from chip to memory */
226 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
228 ioread8_rep(reg, data, count);
232 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
234 ioread16_rep(reg, data, (count+1) >> 1);
237 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
239 ioread32_rep(reg, data, (count+3) >> 2);
242 /* dump block from chip to null */
244 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
249 for (i = 0; i < count; i++)
253 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
258 count = (count + 1) >> 1;
260 for (i = 0; i < count; i++)
264 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
269 count = (count + 3) >> 2;
271 for (i = 0; i < count; i++)
276 * Sleep, either by using msleep() or if we are suspending, then
277 * use mdelay() to sleep.
279 static void dm9000_msleep(struct board_info *db, unsigned int ms)
281 if (db->in_suspend || db->in_timeout)
287 /* Read a word from phyxcer */
289 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
291 struct board_info *db = netdev_priv(dev);
293 unsigned int reg_save;
296 mutex_lock(&db->addr_lock);
298 spin_lock_irqsave(&db->lock, flags);
300 /* Save previous register address */
301 reg_save = readb(db->io_addr);
303 /* Fill the phyxcer register into REG_0C */
304 iow(db, DM9000_EPAR, DM9000_PHY | reg);
306 /* Issue phyxcer read command */
307 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS);
309 writeb(reg_save, db->io_addr);
310 spin_unlock_irqrestore(&db->lock, flags);
312 dm9000_msleep(db, 1); /* Wait read complete */
314 spin_lock_irqsave(&db->lock, flags);
315 reg_save = readb(db->io_addr);
317 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
319 /* The read data keeps on REG_0D & REG_0E */
320 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
322 /* restore the previous address */
323 writeb(reg_save, db->io_addr);
324 spin_unlock_irqrestore(&db->lock, flags);
326 mutex_unlock(&db->addr_lock);
328 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
332 /* Write a word to phyxcer */
334 dm9000_phy_write(struct net_device *dev,
335 int phyaddr_unused, int reg, int value)
337 struct board_info *db = netdev_priv(dev);
339 unsigned long reg_save;
341 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
343 mutex_lock(&db->addr_lock);
345 spin_lock_irqsave(&db->lock, flags);
347 /* Save previous register address */
348 reg_save = readb(db->io_addr);
350 /* Fill the phyxcer register into REG_0C */
351 iow(db, DM9000_EPAR, DM9000_PHY | reg);
353 /* Fill the written data into REG_0D & REG_0E */
354 iow(db, DM9000_EPDRL, value);
355 iow(db, DM9000_EPDRH, value >> 8);
357 /* Issue phyxcer write command */
358 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW);
360 writeb(reg_save, db->io_addr);
361 spin_unlock_irqrestore(&db->lock, flags);
363 dm9000_msleep(db, 1); /* Wait write complete */
365 spin_lock_irqsave(&db->lock, flags);
366 reg_save = readb(db->io_addr);
368 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
370 /* restore the previous address */
371 writeb(reg_save, db->io_addr);
373 spin_unlock_irqrestore(&db->lock, flags);
375 mutex_unlock(&db->addr_lock);
380 * select the specified set of io routines to use with the
384 static void dm9000_set_io(struct board_info *db, int byte_width)
386 /* use the size of the data resource to work out what IO
387 * routines we want to use
390 switch (byte_width) {
392 db->dumpblk = dm9000_dumpblk_8bit;
393 db->outblk = dm9000_outblk_8bit;
394 db->inblk = dm9000_inblk_8bit;
399 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
401 db->dumpblk = dm9000_dumpblk_16bit;
402 db->outblk = dm9000_outblk_16bit;
403 db->inblk = dm9000_inblk_16bit;
408 db->dumpblk = dm9000_dumpblk_32bit;
409 db->outblk = dm9000_outblk_32bit;
410 db->inblk = dm9000_inblk_32bit;
415 static void dm9000_schedule_poll(struct board_info *db)
417 if (db->type == TYPE_DM9000E)
418 schedule_delayed_work(&db->phy_poll, HZ * 2);
421 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
423 struct board_info *dm = to_dm9000_board(dev);
425 if (!netif_running(dev))
428 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
432 dm9000_read_locked(struct board_info *db, int reg)
437 spin_lock_irqsave(&db->lock, flags);
439 spin_unlock_irqrestore(&db->lock, flags);
444 static int dm9000_wait_eeprom(struct board_info *db)
447 int timeout = 8; /* wait max 8msec */
449 /* The DM9000 data sheets say we should be able to
450 * poll the ERRE bit in EPCR to wait for the EEPROM
451 * operation. From testing several chips, this bit
452 * does not seem to work.
454 * We attempt to use the bit, but fall back to the
455 * timeout (which is why we do not return an error
456 * on expiry) to say that the EEPROM operation has
461 status = dm9000_read_locked(db, DM9000_EPCR);
463 if ((status & EPCR_ERRE) == 0)
469 dev_dbg(db->dev, "timeout waiting EEPROM\n");
478 * Read a word data from EEPROM
481 dm9000_read_eeprom(struct board_info *db, int offset, u8 *to)
485 if (db->flags & DM9000_PLATF_NO_EEPROM) {
491 mutex_lock(&db->addr_lock);
493 spin_lock_irqsave(&db->lock, flags);
495 iow(db, DM9000_EPAR, offset);
496 iow(db, DM9000_EPCR, EPCR_ERPRR);
498 spin_unlock_irqrestore(&db->lock, flags);
500 dm9000_wait_eeprom(db);
502 /* delay for at-least 150uS */
505 spin_lock_irqsave(&db->lock, flags);
507 iow(db, DM9000_EPCR, 0x0);
509 to[0] = ior(db, DM9000_EPDRL);
510 to[1] = ior(db, DM9000_EPDRH);
512 spin_unlock_irqrestore(&db->lock, flags);
514 mutex_unlock(&db->addr_lock);
518 * Write a word data to SROM
521 dm9000_write_eeprom(struct board_info *db, int offset, u8 *data)
525 if (db->flags & DM9000_PLATF_NO_EEPROM)
528 mutex_lock(&db->addr_lock);
530 spin_lock_irqsave(&db->lock, flags);
531 iow(db, DM9000_EPAR, offset);
532 iow(db, DM9000_EPDRH, data[1]);
533 iow(db, DM9000_EPDRL, data[0]);
534 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
535 spin_unlock_irqrestore(&db->lock, flags);
537 dm9000_wait_eeprom(db);
539 mdelay(1); /* wait at least 150uS to clear */
541 spin_lock_irqsave(&db->lock, flags);
542 iow(db, DM9000_EPCR, 0);
543 spin_unlock_irqrestore(&db->lock, flags);
545 mutex_unlock(&db->addr_lock);
550 static void dm9000_get_drvinfo(struct net_device *dev,
551 struct ethtool_drvinfo *info)
553 struct board_info *dm = to_dm9000_board(dev);
555 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
556 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
557 strlcpy(info->bus_info, to_platform_device(dm->dev)->name,
558 sizeof(info->bus_info));
561 static u32 dm9000_get_msglevel(struct net_device *dev)
563 struct board_info *dm = to_dm9000_board(dev);
565 return dm->msg_enable;
568 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
570 struct board_info *dm = to_dm9000_board(dev);
572 dm->msg_enable = value;
575 static int dm9000_get_link_ksettings(struct net_device *dev,
576 struct ethtool_link_ksettings *cmd)
578 struct board_info *dm = to_dm9000_board(dev);
580 mii_ethtool_get_link_ksettings(&dm->mii, cmd);
584 static int dm9000_set_link_ksettings(struct net_device *dev,
585 const struct ethtool_link_ksettings *cmd)
587 struct board_info *dm = to_dm9000_board(dev);
589 return mii_ethtool_set_link_ksettings(&dm->mii, cmd);
592 static int dm9000_nway_reset(struct net_device *dev)
594 struct board_info *dm = to_dm9000_board(dev);
595 return mii_nway_restart(&dm->mii);
598 static int dm9000_set_features(struct net_device *dev,
599 netdev_features_t features)
601 struct board_info *dm = to_dm9000_board(dev);
602 netdev_features_t changed = dev->features ^ features;
605 if (!(changed & NETIF_F_RXCSUM))
608 spin_lock_irqsave(&dm->lock, flags);
609 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
610 spin_unlock_irqrestore(&dm->lock, flags);
615 static u32 dm9000_get_link(struct net_device *dev)
617 struct board_info *dm = to_dm9000_board(dev);
620 if (dm->flags & DM9000_PLATF_EXT_PHY)
621 ret = mii_link_ok(&dm->mii);
623 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
628 #define DM_EEPROM_MAGIC (0x444D394B)
630 static int dm9000_get_eeprom_len(struct net_device *dev)
635 static int dm9000_get_eeprom(struct net_device *dev,
636 struct ethtool_eeprom *ee, u8 *data)
638 struct board_info *dm = to_dm9000_board(dev);
639 int offset = ee->offset;
643 /* EEPROM access is aligned to two bytes */
645 if ((len & 1) != 0 || (offset & 1) != 0)
648 if (dm->flags & DM9000_PLATF_NO_EEPROM)
651 ee->magic = DM_EEPROM_MAGIC;
653 for (i = 0; i < len; i += 2)
654 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
659 static int dm9000_set_eeprom(struct net_device *dev,
660 struct ethtool_eeprom *ee, u8 *data)
662 struct board_info *dm = to_dm9000_board(dev);
663 int offset = ee->offset;
667 /* EEPROM access is aligned to two bytes */
669 if (dm->flags & DM9000_PLATF_NO_EEPROM)
672 if (ee->magic != DM_EEPROM_MAGIC)
676 if (len & 1 || offset & 1) {
677 int which = offset & 1;
680 dm9000_read_eeprom(dm, offset / 2, tmp);
682 dm9000_write_eeprom(dm, offset / 2, tmp);
686 dm9000_write_eeprom(dm, offset / 2, data);
698 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
700 struct board_info *dm = to_dm9000_board(dev);
702 memset(w, 0, sizeof(struct ethtool_wolinfo));
704 /* note, we could probably support wake-phy too */
705 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
706 w->wolopts = dm->wake_state;
709 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
711 struct board_info *dm = to_dm9000_board(dev);
713 u32 opts = w->wolopts;
716 if (!dm->wake_supported)
719 if (opts & ~WAKE_MAGIC)
722 if (opts & WAKE_MAGIC)
725 mutex_lock(&dm->addr_lock);
727 spin_lock_irqsave(&dm->lock, flags);
728 iow(dm, DM9000_WCR, wcr);
729 spin_unlock_irqrestore(&dm->lock, flags);
731 mutex_unlock(&dm->addr_lock);
733 if (dm->wake_state != opts) {
734 /* change in wol state, update IRQ state */
737 irq_set_irq_wake(dm->irq_wake, 1);
738 else if (dm->wake_state && !opts)
739 irq_set_irq_wake(dm->irq_wake, 0);
742 dm->wake_state = opts;
746 static const struct ethtool_ops dm9000_ethtool_ops = {
747 .get_drvinfo = dm9000_get_drvinfo,
748 .get_msglevel = dm9000_get_msglevel,
749 .set_msglevel = dm9000_set_msglevel,
750 .nway_reset = dm9000_nway_reset,
751 .get_link = dm9000_get_link,
752 .get_wol = dm9000_get_wol,
753 .set_wol = dm9000_set_wol,
754 .get_eeprom_len = dm9000_get_eeprom_len,
755 .get_eeprom = dm9000_get_eeprom,
756 .set_eeprom = dm9000_set_eeprom,
757 .get_link_ksettings = dm9000_get_link_ksettings,
758 .set_link_ksettings = dm9000_set_link_ksettings,
761 static void dm9000_show_carrier(struct board_info *db,
762 unsigned carrier, unsigned nsr)
765 struct net_device *ndev = db->ndev;
766 struct mii_if_info *mii = &db->mii;
767 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
770 lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
772 "%s: link up, %dMbps, %s-duplex, lpa 0x%04X\n",
773 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
774 (ncr & NCR_FDX) ? "full" : "half", lpa);
776 dev_info(db->dev, "%s: link down\n", ndev->name);
781 dm9000_poll_work(struct work_struct *w)
783 struct delayed_work *dw = to_delayed_work(w);
784 struct board_info *db = container_of(dw, struct board_info, phy_poll);
785 struct net_device *ndev = db->ndev;
787 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
788 !(db->flags & DM9000_PLATF_EXT_PHY)) {
789 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
790 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
791 unsigned new_carrier;
793 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
795 if (old_carrier != new_carrier) {
796 if (netif_msg_link(db))
797 dm9000_show_carrier(db, new_carrier, nsr);
800 netif_carrier_off(ndev);
802 netif_carrier_on(ndev);
805 mii_check_media(&db->mii, netif_msg_link(db), 0);
807 if (netif_running(ndev))
808 dm9000_schedule_poll(db);
811 /* dm9000_release_board
813 * release a board, and any mapped resources
817 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
819 /* unmap our resources */
821 iounmap(db->io_addr);
822 iounmap(db->io_data);
824 /* release the resources */
827 release_resource(db->data_req);
831 release_resource(db->addr_req);
835 static unsigned char dm9000_type_to_char(enum dm9000_type type)
838 case TYPE_DM9000E: return 'e';
839 case TYPE_DM9000A: return 'a';
840 case TYPE_DM9000B: return 'b';
847 * Set DM9000 multicast address
850 dm9000_hash_table_unlocked(struct net_device *dev)
852 struct board_info *db = netdev_priv(dev);
853 struct netdev_hw_addr *ha;
856 u16 hash_table[4] = { 0, 0, 0, 0x8000 }; /* broadcast address */
857 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
859 dm9000_dbg(db, 1, "entering %s\n", __func__);
861 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
862 iow(db, oft, dev->dev_addr[i]);
864 if (dev->flags & IFF_PROMISC)
867 if (dev->flags & IFF_ALLMULTI)
870 /* the multicast address in Hash Table : 64 bits */
871 netdev_for_each_mc_addr(ha, dev) {
872 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
873 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
876 /* Write the hash table to MAC MD table */
877 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
878 iow(db, oft++, hash_table[i]);
879 iow(db, oft++, hash_table[i] >> 8);
882 iow(db, DM9000_RCR, rcr);
886 dm9000_hash_table(struct net_device *dev)
888 struct board_info *db = netdev_priv(dev);
891 spin_lock_irqsave(&db->lock, flags);
892 dm9000_hash_table_unlocked(dev);
893 spin_unlock_irqrestore(&db->lock, flags);
897 dm9000_mask_interrupts(struct board_info *db)
899 iow(db, DM9000_IMR, IMR_PAR);
903 dm9000_unmask_interrupts(struct board_info *db)
905 iow(db, DM9000_IMR, db->imr_all);
909 * Initialize dm9000 board
912 dm9000_init_dm9000(struct net_device *dev)
914 struct board_info *db = netdev_priv(dev);
918 dm9000_dbg(db, 1, "entering %s\n", __func__);
921 dm9000_mask_interrupts(db);
924 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
927 if (dev->hw_features & NETIF_F_RXCSUM)
929 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
931 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
932 iow(db, DM9000_GPR, 0);
934 /* If we are dealing with DM9000B, some extra steps are required: a
935 * manual phy reset, and setting init params.
937 if (db->type == TYPE_DM9000B) {
938 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET);
939 dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM);
942 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
944 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
945 * up dumping the wake events if we disable this. There is already
946 * a wake-mask in DM9000_WCR */
947 if (db->wake_supported)
950 iow(db, DM9000_NCR, ncr);
952 /* Program operating register */
953 iow(db, DM9000_TCR, 0); /* TX Polling clear */
954 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
955 iow(db, DM9000_FCR, 0xff); /* Flow Control */
956 iow(db, DM9000_SMCR, 0); /* Special Mode */
957 /* clear TX status */
958 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
959 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
961 /* Set address filter table */
962 dm9000_hash_table_unlocked(dev);
964 imr = IMR_PAR | IMR_PTM | IMR_PRM;
965 if (db->type != TYPE_DM9000E)
970 /* Init Driver variable */
972 db->queue_pkt_len = 0;
973 netif_trans_update(dev);
976 /* Our watchdog timed out. Called by the networking layer */
977 static void dm9000_timeout(struct net_device *dev)
979 struct board_info *db = netdev_priv(dev);
983 /* Save previous register address */
984 spin_lock_irqsave(&db->lock, flags);
986 reg_save = readb(db->io_addr);
988 netif_stop_queue(dev);
989 dm9000_init_dm9000(dev);
990 dm9000_unmask_interrupts(db);
991 /* We can accept TX packets again */
992 netif_trans_update(dev); /* prevent tx timeout */
993 netif_wake_queue(dev);
995 /* Restore previous register address */
996 writeb(reg_save, db->io_addr);
998 spin_unlock_irqrestore(&db->lock, flags);
1001 static void dm9000_send_packet(struct net_device *dev,
1005 struct board_info *dm = to_dm9000_board(dev);
1007 /* The DM9000 is not smart enough to leave fragmented packets alone. */
1008 if (dm->ip_summed != ip_summed) {
1009 if (ip_summed == CHECKSUM_NONE)
1010 iow(dm, DM9000_TCCR, 0);
1012 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
1013 dm->ip_summed = ip_summed;
1016 /* Set TX length to DM9000 */
1017 iow(dm, DM9000_TXPLL, pkt_len);
1018 iow(dm, DM9000_TXPLH, pkt_len >> 8);
1020 /* Issue TX polling command */
1021 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
1025 * Hardware start transmission.
1026 * Send a packet to media from the upper layer.
1029 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
1031 unsigned long flags;
1032 struct board_info *db = netdev_priv(dev);
1034 dm9000_dbg(db, 3, "%s:\n", __func__);
1036 if (db->tx_pkt_cnt > 1)
1037 return NETDEV_TX_BUSY;
1039 spin_lock_irqsave(&db->lock, flags);
1041 /* Move data to DM9000 TX RAM */
1042 writeb(DM9000_MWCMD, db->io_addr);
1044 (db->outblk)(db->io_data, skb->data, skb->len);
1045 dev->stats.tx_bytes += skb->len;
1048 /* TX control: First packet immediately send, second packet queue */
1049 if (db->tx_pkt_cnt == 1) {
1050 dm9000_send_packet(dev, skb->ip_summed, skb->len);
1053 db->queue_pkt_len = skb->len;
1054 db->queue_ip_summed = skb->ip_summed;
1055 netif_stop_queue(dev);
1058 spin_unlock_irqrestore(&db->lock, flags);
1061 dev_consume_skb_any(skb);
1063 return NETDEV_TX_OK;
1067 * DM9000 interrupt handler
1068 * receive the packet to upper layer, free the transmitted packet
1071 static void dm9000_tx_done(struct net_device *dev, struct board_info *db)
1073 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
1075 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
1076 /* One packet sent complete */
1078 dev->stats.tx_packets++;
1080 if (netif_msg_tx_done(db))
1081 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
1083 /* Queue packet check & send */
1084 if (db->tx_pkt_cnt > 0)
1085 dm9000_send_packet(dev, db->queue_ip_summed,
1087 netif_wake_queue(dev);
1091 struct dm9000_rxhdr {
1098 * Received a packet and pass to upper layer
1101 dm9000_rx(struct net_device *dev)
1103 struct board_info *db = netdev_priv(dev);
1104 struct dm9000_rxhdr rxhdr;
1105 struct sk_buff *skb;
1110 /* Check packet ready or not */
1112 ior(db, DM9000_MRCMDX); /* Dummy read */
1114 /* Get most updated data */
1115 rxbyte = readb(db->io_data);
1117 /* Status check: this byte must be 0 or 1 */
1118 if (rxbyte & DM9000_PKT_ERR) {
1119 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1120 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1124 if (!(rxbyte & DM9000_PKT_RDY))
1127 /* A packet ready now & Get status/length */
1129 writeb(DM9000_MRCMD, db->io_addr);
1131 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1133 RxLen = le16_to_cpu(rxhdr.RxLen);
1135 if (netif_msg_rx_status(db))
1136 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1137 rxhdr.RxStatus, RxLen);
1139 /* Packet Status check */
1142 if (netif_msg_rx_err(db))
1143 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1146 if (RxLen > DM9000_PKT_MAX) {
1147 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1150 /* rxhdr.RxStatus is identical to RSR register. */
1151 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1152 RSR_PLE | RSR_RWTO |
1153 RSR_LCS | RSR_RF)) {
1155 if (rxhdr.RxStatus & RSR_FOE) {
1156 if (netif_msg_rx_err(db))
1157 dev_dbg(db->dev, "fifo error\n");
1158 dev->stats.rx_fifo_errors++;
1160 if (rxhdr.RxStatus & RSR_CE) {
1161 if (netif_msg_rx_err(db))
1162 dev_dbg(db->dev, "crc error\n");
1163 dev->stats.rx_crc_errors++;
1165 if (rxhdr.RxStatus & RSR_RF) {
1166 if (netif_msg_rx_err(db))
1167 dev_dbg(db->dev, "length error\n");
1168 dev->stats.rx_length_errors++;
1172 /* Move data from DM9000 */
1174 ((skb = netdev_alloc_skb(dev, RxLen + 4)) != NULL)) {
1175 skb_reserve(skb, 2);
1176 rdptr = skb_put(skb, RxLen - 4);
1178 /* Read received packet from RX SRAM */
1180 (db->inblk)(db->io_data, rdptr, RxLen);
1181 dev->stats.rx_bytes += RxLen;
1183 /* Pass to upper layer */
1184 skb->protocol = eth_type_trans(skb, dev);
1185 if (dev->features & NETIF_F_RXCSUM) {
1186 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1187 skb->ip_summed = CHECKSUM_UNNECESSARY;
1189 skb_checksum_none_assert(skb);
1192 dev->stats.rx_packets++;
1195 /* need to dump the packet's data */
1197 (db->dumpblk)(db->io_data, RxLen);
1199 } while (rxbyte & DM9000_PKT_RDY);
1202 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1204 struct net_device *dev = dev_id;
1205 struct board_info *db = netdev_priv(dev);
1207 unsigned long flags;
1210 dm9000_dbg(db, 3, "entering %s\n", __func__);
1212 /* A real interrupt coming */
1214 /* holders of db->lock must always block IRQs */
1215 spin_lock_irqsave(&db->lock, flags);
1217 /* Save previous register address */
1218 reg_save = readb(db->io_addr);
1220 dm9000_mask_interrupts(db);
1221 /* Got DM9000 interrupt status */
1222 int_status = ior(db, DM9000_ISR); /* Got ISR */
1223 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1225 if (netif_msg_intr(db))
1226 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1228 /* Received the coming packet */
1229 if (int_status & ISR_PRS)
1232 /* Transmit Interrupt check */
1233 if (int_status & ISR_PTS)
1234 dm9000_tx_done(dev, db);
1236 if (db->type != TYPE_DM9000E) {
1237 if (int_status & ISR_LNKCHNG) {
1238 /* fire a link-change request */
1239 schedule_delayed_work(&db->phy_poll, 1);
1243 dm9000_unmask_interrupts(db);
1244 /* Restore previous register address */
1245 writeb(reg_save, db->io_addr);
1247 spin_unlock_irqrestore(&db->lock, flags);
1252 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1254 struct net_device *dev = dev_id;
1255 struct board_info *db = netdev_priv(dev);
1256 unsigned long flags;
1259 spin_lock_irqsave(&db->lock, flags);
1261 nsr = ior(db, DM9000_NSR);
1262 wcr = ior(db, DM9000_WCR);
1264 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1266 if (nsr & NSR_WAKEST) {
1267 /* clear, so we can avoid */
1268 iow(db, DM9000_NSR, NSR_WAKEST);
1270 if (wcr & WCR_LINKST)
1271 dev_info(db->dev, "wake by link status change\n");
1272 if (wcr & WCR_SAMPLEST)
1273 dev_info(db->dev, "wake by sample packet\n");
1274 if (wcr & WCR_MAGICST)
1275 dev_info(db->dev, "wake by magic packet\n");
1276 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1277 dev_err(db->dev, "wake signalled with no reason? "
1278 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1281 spin_unlock_irqrestore(&db->lock, flags);
1283 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1286 #ifdef CONFIG_NET_POLL_CONTROLLER
1290 static void dm9000_poll_controller(struct net_device *dev)
1292 disable_irq(dev->irq);
1293 dm9000_interrupt(dev->irq, dev);
1294 enable_irq(dev->irq);
1299 * Open the interface.
1300 * The interface is opened whenever "ifconfig" actives it.
1303 dm9000_open(struct net_device *dev)
1305 struct board_info *db = netdev_priv(dev);
1306 unsigned int irq_flags = irq_get_trigger_type(dev->irq);
1308 if (netif_msg_ifup(db))
1309 dev_dbg(db->dev, "enabling %s\n", dev->name);
1311 /* If there is no IRQ type specified, tell the user that this is a
1314 if (irq_flags == IRQF_TRIGGER_NONE)
1315 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1317 irq_flags |= IRQF_SHARED;
1319 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1320 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1321 mdelay(1); /* delay needs by DM9000B */
1323 /* Initialize DM9000 board */
1324 dm9000_init_dm9000(dev);
1326 if (request_irq(dev->irq, dm9000_interrupt, irq_flags, dev->name, dev))
1328 /* Now that we have an interrupt handler hooked up we can unmask
1331 dm9000_unmask_interrupts(db);
1333 /* Init driver variable */
1336 mii_check_media(&db->mii, netif_msg_link(db), 1);
1337 netif_start_queue(dev);
1339 /* Poll initial link status */
1340 schedule_delayed_work(&db->phy_poll, 1);
1346 dm9000_shutdown(struct net_device *dev)
1348 struct board_info *db = netdev_priv(dev);
1351 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1352 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1353 dm9000_mask_interrupts(db);
1354 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1358 * Stop the interface.
1359 * The interface is stopped when it is brought.
1362 dm9000_stop(struct net_device *ndev)
1364 struct board_info *db = netdev_priv(ndev);
1366 if (netif_msg_ifdown(db))
1367 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1369 cancel_delayed_work_sync(&db->phy_poll);
1371 netif_stop_queue(ndev);
1372 netif_carrier_off(ndev);
1374 /* free interrupt */
1375 free_irq(ndev->irq, ndev);
1377 dm9000_shutdown(ndev);
1382 static const struct net_device_ops dm9000_netdev_ops = {
1383 .ndo_open = dm9000_open,
1384 .ndo_stop = dm9000_stop,
1385 .ndo_start_xmit = dm9000_start_xmit,
1386 .ndo_tx_timeout = dm9000_timeout,
1387 .ndo_set_rx_mode = dm9000_hash_table,
1388 .ndo_do_ioctl = dm9000_ioctl,
1389 .ndo_set_features = dm9000_set_features,
1390 .ndo_validate_addr = eth_validate_addr,
1391 .ndo_set_mac_address = eth_mac_addr,
1392 #ifdef CONFIG_NET_POLL_CONTROLLER
1393 .ndo_poll_controller = dm9000_poll_controller,
1397 static struct dm9000_plat_data *dm9000_parse_dt(struct device *dev)
1399 struct dm9000_plat_data *pdata;
1400 struct device_node *np = dev->of_node;
1401 const void *mac_addr;
1403 if (!IS_ENABLED(CONFIG_OF) || !np)
1404 return ERR_PTR(-ENXIO);
1406 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1408 return ERR_PTR(-ENOMEM);
1410 if (of_find_property(np, "davicom,ext-phy", NULL))
1411 pdata->flags |= DM9000_PLATF_EXT_PHY;
1412 if (of_find_property(np, "davicom,no-eeprom", NULL))
1413 pdata->flags |= DM9000_PLATF_NO_EEPROM;
1415 mac_addr = of_get_mac_address(np);
1417 memcpy(pdata->dev_addr, mac_addr, sizeof(pdata->dev_addr));
1423 * Search DM9000 board, allocate space and register it
1426 dm9000_probe(struct platform_device *pdev)
1428 struct dm9000_plat_data *pdata = dev_get_platdata(&pdev->dev);
1429 struct board_info *db; /* Point a board information structure */
1430 struct net_device *ndev;
1431 struct device *dev = &pdev->dev;
1432 const unsigned char *mac_src;
1438 enum of_gpio_flags flags;
1439 struct regulator *power;
1440 bool inv_mac_addr = false;
1442 power = devm_regulator_get(dev, "vcc");
1443 if (IS_ERR(power)) {
1444 if (PTR_ERR(power) == -EPROBE_DEFER)
1445 return -EPROBE_DEFER;
1446 dev_dbg(dev, "no regulator provided\n");
1448 ret = regulator_enable(power);
1451 "Failed to enable power regulator: %d\n", ret);
1454 dev_dbg(dev, "regulator enabled\n");
1457 reset_gpios = of_get_named_gpio_flags(dev->of_node, "reset-gpios", 0,
1459 if (gpio_is_valid(reset_gpios)) {
1460 ret = devm_gpio_request_one(dev, reset_gpios, flags,
1463 dev_err(dev, "failed to request reset gpio %d: %d\n",
1465 goto out_regulator_disable;
1468 /* According to manual PWRST# Low Period Min 1ms */
1470 gpio_set_value(reset_gpios, 1);
1471 /* Needs 3ms to read eeprom when PWRST is deasserted */
1476 pdata = dm9000_parse_dt(&pdev->dev);
1477 if (IS_ERR(pdata)) {
1478 ret = PTR_ERR(pdata);
1479 goto out_regulator_disable;
1483 /* Init network device */
1484 ndev = alloc_etherdev(sizeof(struct board_info));
1487 goto out_regulator_disable;
1490 SET_NETDEV_DEV(ndev, &pdev->dev);
1492 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1494 /* setup board info structure */
1495 db = netdev_priv(ndev);
1497 db->dev = &pdev->dev;
1500 db->power_supply = power;
1502 spin_lock_init(&db->lock);
1503 mutex_init(&db->addr_lock);
1505 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1507 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1508 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1510 if (!db->addr_res || !db->data_res) {
1511 dev_err(db->dev, "insufficient resources addr=%p data=%p\n",
1512 db->addr_res, db->data_res);
1517 ndev->irq = platform_get_irq(pdev, 0);
1518 if (ndev->irq < 0) {
1519 dev_err(db->dev, "interrupt resource unavailable: %d\n",
1525 db->irq_wake = platform_get_irq(pdev, 1);
1526 if (db->irq_wake >= 0) {
1527 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1529 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1530 IRQF_SHARED, dev_name(db->dev), ndev);
1532 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1535 /* test to see if irq is really wakeup capable */
1536 ret = irq_set_irq_wake(db->irq_wake, 1);
1538 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1542 irq_set_irq_wake(db->irq_wake, 0);
1543 db->wake_supported = 1;
1548 iosize = resource_size(db->addr_res);
1549 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1552 if (db->addr_req == NULL) {
1553 dev_err(db->dev, "cannot claim address reg area\n");
1558 db->io_addr = ioremap(db->addr_res->start, iosize);
1560 if (db->io_addr == NULL) {
1561 dev_err(db->dev, "failed to ioremap address reg\n");
1566 iosize = resource_size(db->data_res);
1567 db->data_req = request_mem_region(db->data_res->start, iosize,
1570 if (db->data_req == NULL) {
1571 dev_err(db->dev, "cannot claim data reg area\n");
1576 db->io_data = ioremap(db->data_res->start, iosize);
1578 if (db->io_data == NULL) {
1579 dev_err(db->dev, "failed to ioremap data reg\n");
1584 /* fill in parameters for net-dev structure */
1585 ndev->base_addr = (unsigned long)db->io_addr;
1587 /* ensure at least we have a default set of IO routines */
1588 dm9000_set_io(db, iosize);
1590 /* check to see if anything is being over-ridden */
1591 if (pdata != NULL) {
1592 /* check to see if the driver wants to over-ride the
1593 * default IO width */
1595 if (pdata->flags & DM9000_PLATF_8BITONLY)
1596 dm9000_set_io(db, 1);
1598 if (pdata->flags & DM9000_PLATF_16BITONLY)
1599 dm9000_set_io(db, 2);
1601 if (pdata->flags & DM9000_PLATF_32BITONLY)
1602 dm9000_set_io(db, 4);
1604 /* check to see if there are any IO routine
1607 if (pdata->inblk != NULL)
1608 db->inblk = pdata->inblk;
1610 if (pdata->outblk != NULL)
1611 db->outblk = pdata->outblk;
1613 if (pdata->dumpblk != NULL)
1614 db->dumpblk = pdata->dumpblk;
1616 db->flags = pdata->flags;
1619 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1620 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1625 /* try multiple times, DM9000 sometimes gets the read wrong */
1626 for (i = 0; i < 8; i++) {
1627 id_val = ior(db, DM9000_VIDL);
1628 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1629 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1630 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1632 if (id_val == DM9000_ID)
1634 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1637 if (id_val != DM9000_ID) {
1638 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1643 /* Identify what type of DM9000 we are working on */
1645 id_val = ior(db, DM9000_CHIPR);
1646 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1650 db->type = TYPE_DM9000A;
1653 db->type = TYPE_DM9000B;
1656 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1657 db->type = TYPE_DM9000E;
1660 /* dm9000a/b are capable of hardware checksum offload */
1661 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1662 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1663 ndev->features |= ndev->hw_features;
1666 /* from this point we assume that we have found a DM9000 */
1668 ndev->netdev_ops = &dm9000_netdev_ops;
1669 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1670 ndev->ethtool_ops = &dm9000_ethtool_ops;
1672 db->msg_enable = NETIF_MSG_LINK;
1673 db->mii.phy_id_mask = 0x1f;
1674 db->mii.reg_num_mask = 0x1f;
1675 db->mii.force_media = 0;
1676 db->mii.full_duplex = 0;
1678 db->mii.mdio_read = dm9000_phy_read;
1679 db->mii.mdio_write = dm9000_phy_write;
1683 /* try reading the node address from the attached EEPROM */
1684 for (i = 0; i < 6; i += 2)
1685 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1687 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1688 mac_src = "platform data";
1689 memcpy(ndev->dev_addr, pdata->dev_addr, ETH_ALEN);
1692 if (!is_valid_ether_addr(ndev->dev_addr)) {
1693 /* try reading from mac */
1696 for (i = 0; i < 6; i++)
1697 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1700 if (!is_valid_ether_addr(ndev->dev_addr)) {
1701 inv_mac_addr = true;
1702 eth_hw_addr_random(ndev);
1707 platform_set_drvdata(pdev, ndev);
1708 ret = register_netdev(ndev);
1712 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please set using ip\n",
1714 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1715 ndev->name, dm9000_type_to_char(db->type),
1716 db->io_addr, db->io_data, ndev->irq,
1717 ndev->dev_addr, mac_src);
1722 dev_err(db->dev, "not found (%d).\n", ret);
1724 dm9000_release_board(pdev, db);
1727 out_regulator_disable:
1729 regulator_disable(power);
1735 dm9000_drv_suspend(struct device *dev)
1737 struct platform_device *pdev = to_platform_device(dev);
1738 struct net_device *ndev = platform_get_drvdata(pdev);
1739 struct board_info *db;
1742 db = netdev_priv(ndev);
1745 if (!netif_running(ndev))
1748 netif_device_detach(ndev);
1750 /* only shutdown if not using WoL */
1751 if (!db->wake_state)
1752 dm9000_shutdown(ndev);
1758 dm9000_drv_resume(struct device *dev)
1760 struct platform_device *pdev = to_platform_device(dev);
1761 struct net_device *ndev = platform_get_drvdata(pdev);
1762 struct board_info *db = netdev_priv(ndev);
1765 if (netif_running(ndev)) {
1766 /* reset if we were not in wake mode to ensure if
1767 * the device was powered off it is in a known state */
1768 if (!db->wake_state) {
1769 dm9000_init_dm9000(ndev);
1770 dm9000_unmask_interrupts(db);
1773 netif_device_attach(ndev);
1781 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1782 .suspend = dm9000_drv_suspend,
1783 .resume = dm9000_drv_resume,
1787 dm9000_drv_remove(struct platform_device *pdev)
1789 struct net_device *ndev = platform_get_drvdata(pdev);
1790 struct board_info *dm = to_dm9000_board(ndev);
1792 unregister_netdev(ndev);
1793 dm9000_release_board(pdev, dm);
1794 free_netdev(ndev); /* free device structure */
1795 if (dm->power_supply)
1796 regulator_disable(dm->power_supply);
1798 dev_dbg(&pdev->dev, "released and freed device\n");
1803 static const struct of_device_id dm9000_of_matches[] = {
1804 { .compatible = "davicom,dm9000", },
1807 MODULE_DEVICE_TABLE(of, dm9000_of_matches);
1810 static struct platform_driver dm9000_driver = {
1813 .pm = &dm9000_drv_pm_ops,
1814 .of_match_table = of_match_ptr(dm9000_of_matches),
1816 .probe = dm9000_probe,
1817 .remove = dm9000_drv_remove,
1820 module_platform_driver(dm9000_driver);
1822 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1823 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1824 MODULE_LICENSE("GPL");
1825 MODULE_ALIAS("platform:dm9000");