2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
43 #include "t4_values.h"
45 #include "cxgb4_debugfs.h"
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
52 pos -= tb->skip_first;
53 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
56 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
58 struct seq_tab *tb = seq->private;
60 if (tb->skip_first && *pos == 0)
61 return SEQ_START_TOKEN;
63 return seq_tab_get_idx(tb, *pos);
66 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
68 v = seq_tab_get_idx(seq->private, *pos + 1);
73 static void seq_tab_stop(struct seq_file *seq, void *v)
77 static int seq_tab_show(struct seq_file *seq, void *v)
79 const struct seq_tab *tb = seq->private;
81 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
84 static const struct seq_operations seq_tab_ops = {
85 .start = seq_tab_start,
91 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
92 unsigned int width, unsigned int have_header,
93 int (*show)(struct seq_file *seq, void *v, int i))
97 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
102 p->skip_first = have_header != 0;
107 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
110 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 if (new_rows > p->rows)
118 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 if (v == SEQ_START_TOKEN)
121 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
127 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
128 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
129 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
135 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 if (v == SEQ_START_TOKEN) {
138 seq_puts(seq, "Status Data PC\n");
142 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
144 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
145 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
146 p[4] & 0xff, p[5] >> 8);
147 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
148 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
153 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
155 if (v == SEQ_START_TOKEN) {
156 seq_puts(seq, "Status Inst Data PC LS0Stat "
157 "LS0Addr LS0Data LS1Stat LS1Addr LS1Data\n");
161 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
162 (p[9] >> 16) & 0xff, /* Status */
163 p[9] & 0xffff, p[8] >> 16, /* Inst */
164 p[8] & 0xffff, p[7] >> 16, /* Data */
165 p[7] & 0xffff, p[6] >> 16, /* PC */
166 p[2], p[1], p[0], /* LS0 Stat, Addr and Data */
167 p[5], p[4], p[3]); /* LS1 Stat, Addr and Data */
172 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
174 if (v == SEQ_START_TOKEN) {
175 seq_puts(seq, "Status Inst Data PC\n");
179 seq_printf(seq, " %02x %08x %08x %08x\n",
180 p[3] & 0xff, p[2], p[1], p[0]);
181 seq_printf(seq, " %02x %02x%06x %02x%06x %02x%06x\n",
182 (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
183 p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
184 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x\n",
185 (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
186 p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
192 static int cim_la_open(struct inode *inode, struct file *file)
197 struct adapter *adap = inode->i_private;
199 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
203 if (is_t6(adap->params.chip)) {
204 /* +1 to account for integer division of CIMLA_SIZE/10 */
205 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
207 cfg & UPDBGLACAPTPCONLY_F ?
208 cim_la_show_pc_t6 : cim_la_show_t6);
210 p = seq_open_tab(file, adap->params.cim_la_size / 8,
212 cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
218 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
220 seq_release_private(inode, file);
224 static const struct file_operations cim_la_fops = {
225 .owner = THIS_MODULE,
229 .release = seq_release_private
232 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
236 if (v == SEQ_START_TOKEN) {
237 seq_puts(seq, "Cntl ID DataBE Addr Data\n");
238 } else if (idx < CIM_PIFLA_SIZE) {
239 seq_printf(seq, " %02x %02x %04x %08x %08x%08x%08x%08x\n",
240 (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
241 p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
243 if (idx == CIM_PIFLA_SIZE)
244 seq_puts(seq, "\nCntl ID Data\n");
245 seq_printf(seq, " %02x %02x %08x%08x%08x%08x\n",
246 (p[4] >> 6) & 0xff, p[4] & 0x3f,
247 p[3], p[2], p[1], p[0]);
252 static int cim_pif_la_open(struct inode *inode, struct file *file)
255 struct adapter *adap = inode->i_private;
257 p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
262 t4_cim_read_pif_la(adap, (u32 *)p->data,
263 (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
267 static const struct file_operations cim_pif_la_fops = {
268 .owner = THIS_MODULE,
269 .open = cim_pif_la_open,
272 .release = seq_release_private
275 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
279 if (v == SEQ_START_TOKEN) {
281 } else if (idx < CIM_MALA_SIZE) {
282 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
283 p[4], p[3], p[2], p[1], p[0]);
285 if (idx == CIM_MALA_SIZE)
287 "\nCnt ID Tag UE Data RDY VLD\n");
288 seq_printf(seq, "%3u %2u %x %u %08x%08x %u %u\n",
289 (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
290 (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
291 (p[1] >> 2) | ((p[2] & 3) << 30),
292 (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
298 static int cim_ma_la_open(struct inode *inode, struct file *file)
301 struct adapter *adap = inode->i_private;
303 p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
308 t4_cim_read_ma_la(adap, (u32 *)p->data,
309 (u32 *)p->data + 5 * CIM_MALA_SIZE);
313 static const struct file_operations cim_ma_la_fops = {
314 .owner = THIS_MODULE,
315 .open = cim_ma_la_open,
318 .release = seq_release_private
321 static int cim_qcfg_show(struct seq_file *seq, void *v)
323 static const char * const qname[] = {
324 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
325 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
330 struct adapter *adap = seq->private;
331 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
332 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
333 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
334 u16 thres[CIM_NUM_IBQ];
335 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
336 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
338 int cim_num_obq = is_t4(adap->params.chip) ?
339 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
341 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
342 UP_IBQ_0_SHADOW_RDADDR_A,
343 ARRAY_SIZE(stat), stat);
345 if (is_t4(adap->params.chip)) {
346 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
347 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
350 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
351 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
358 t4_read_cimq_cfg(adap, base, size, thres);
361 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
362 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
363 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
364 qname[i], base[i], size[i], thres[i],
365 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
366 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
367 QUEREMFLITS_G(p[2]) * 16);
368 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
369 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
370 qname[i], base[i], size[i],
371 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
372 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
373 QUEREMFLITS_G(p[2]) * 16);
377 static int cim_qcfg_open(struct inode *inode, struct file *file)
379 return single_open(file, cim_qcfg_show, inode->i_private);
382 static const struct file_operations cim_qcfg_fops = {
383 .owner = THIS_MODULE,
384 .open = cim_qcfg_open,
387 .release = single_release,
390 static int cimq_show(struct seq_file *seq, void *v, int idx)
394 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
399 static int cim_ibq_open(struct inode *inode, struct file *file)
403 unsigned int qid = (uintptr_t)inode->i_private & 7;
404 struct adapter *adap = inode->i_private - qid;
406 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
410 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
412 seq_release_private(inode, file);
418 static const struct file_operations cim_ibq_fops = {
419 .owner = THIS_MODULE,
420 .open = cim_ibq_open,
423 .release = seq_release_private
426 static int cim_obq_open(struct inode *inode, struct file *file)
430 unsigned int qid = (uintptr_t)inode->i_private & 7;
431 struct adapter *adap = inode->i_private - qid;
433 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
437 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
439 seq_release_private(inode, file);
441 seq_tab_trim(p, ret / 4);
447 static const struct file_operations cim_obq_fops = {
448 .owner = THIS_MODULE,
449 .open = cim_obq_open,
452 .release = seq_release_private
461 static void field_desc_show(struct seq_file *seq, u64 v,
462 const struct field_desc *p)
468 u64 mask = (1ULL << p->width) - 1;
469 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
470 ((unsigned long long)v >> p->start) & mask);
472 if (line_size + len >= 79) {
474 seq_puts(seq, "\n ");
476 seq_printf(seq, "%s ", buf);
477 line_size += len + 1;
483 static struct field_desc tp_la0[] = {
484 { "RcfOpCodeOut", 60, 4 },
486 { "WcfState", 52, 4 },
487 { "RcfOpcSrcOut", 50, 2 },
488 { "CRxError", 49, 1 },
489 { "ERxError", 48, 1 },
490 { "SanityFailed", 47, 1 },
491 { "SpuriousMsg", 46, 1 },
492 { "FlushInputMsg", 45, 1 },
493 { "FlushInputCpl", 44, 1 },
494 { "RssUpBit", 43, 1 },
495 { "RssFilterHit", 42, 1 },
497 { "InitTcb", 31, 1 },
498 { "LineNumber", 24, 7 },
500 { "EdataOut", 22, 1 },
502 { "CdataOut", 20, 1 },
503 { "EreadPdu", 19, 1 },
504 { "CreadPdu", 18, 1 },
505 { "TunnelPkt", 17, 1 },
506 { "RcfPeerFin", 16, 1 },
507 { "RcfReasonOut", 12, 4 },
508 { "TxCchannel", 10, 2 },
509 { "RcfTxChannel", 8, 2 },
510 { "RxEchannel", 6, 2 },
511 { "RcfRxChannel", 5, 1 },
512 { "RcfDataOutSrdy", 4, 1 },
514 { "RxOoDvld", 2, 1 },
515 { "RxCongestion", 1, 1 },
516 { "TxCongestion", 0, 1 },
520 static int tp_la_show(struct seq_file *seq, void *v, int idx)
524 field_desc_show(seq, *p, tp_la0);
528 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
534 field_desc_show(seq, p[0], tp_la0);
535 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
536 field_desc_show(seq, p[1], tp_la0);
540 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
542 static struct field_desc tp_la1[] = {
543 { "CplCmdIn", 56, 8 },
544 { "CplCmdOut", 48, 8 },
545 { "ESynOut", 47, 1 },
546 { "EAckOut", 46, 1 },
547 { "EFinOut", 45, 1 },
548 { "ERstOut", 44, 1 },
554 { "DataInVld", 38, 1 },
556 { "RxBufEmpty", 36, 1 },
558 { "RxFbCongestion", 34, 1 },
559 { "TxFbCongestion", 33, 1 },
560 { "TxPktSumSrdy", 32, 1 },
561 { "RcfUlpType", 28, 4 },
563 { "Ebypass", 26, 1 },
565 { "Static0", 24, 1 },
567 { "Cbypass", 22, 1 },
569 { "CPktOut", 20, 1 },
570 { "RxPagePoolFull", 18, 2 },
571 { "RxLpbkPkt", 17, 1 },
572 { "TxLpbkPkt", 16, 1 },
573 { "RxVfValid", 15, 1 },
574 { "SynLearned", 14, 1 },
575 { "SetDelEntry", 13, 1 },
576 { "SetInvEntry", 12, 1 },
577 { "CpcmdDvld", 11, 1 },
578 { "CpcmdSave", 10, 1 },
579 { "RxPstructsFull", 8, 2 },
580 { "EpcmdDvld", 7, 1 },
581 { "EpcmdFlush", 6, 1 },
582 { "EpcmdTrimPrefix", 5, 1 },
583 { "EpcmdTrimPostfix", 4, 1 },
584 { "ERssIp4Pkt", 3, 1 },
585 { "ERssIp6Pkt", 2, 1 },
586 { "ERssTcpUdpPkt", 1, 1 },
587 { "ERssFceFipPkt", 0, 1 },
590 static struct field_desc tp_la2[] = {
591 { "CplCmdIn", 56, 8 },
592 { "MpsVfVld", 55, 1 },
600 { "DataInVld", 38, 1 },
602 { "RxBufEmpty", 36, 1 },
604 { "RxFbCongestion", 34, 1 },
605 { "TxFbCongestion", 33, 1 },
606 { "TxPktSumSrdy", 32, 1 },
607 { "RcfUlpType", 28, 4 },
609 { "Ebypass", 26, 1 },
611 { "Static0", 24, 1 },
613 { "Cbypass", 22, 1 },
615 { "CPktOut", 20, 1 },
616 { "RxPagePoolFull", 18, 2 },
617 { "RxLpbkPkt", 17, 1 },
618 { "TxLpbkPkt", 16, 1 },
619 { "RxVfValid", 15, 1 },
620 { "SynLearned", 14, 1 },
621 { "SetDelEntry", 13, 1 },
622 { "SetInvEntry", 12, 1 },
623 { "CpcmdDvld", 11, 1 },
624 { "CpcmdSave", 10, 1 },
625 { "RxPstructsFull", 8, 2 },
626 { "EpcmdDvld", 7, 1 },
627 { "EpcmdFlush", 6, 1 },
628 { "EpcmdTrimPrefix", 5, 1 },
629 { "EpcmdTrimPostfix", 4, 1 },
630 { "ERssIp4Pkt", 3, 1 },
631 { "ERssIp6Pkt", 2, 1 },
632 { "ERssTcpUdpPkt", 1, 1 },
633 { "ERssFceFipPkt", 0, 1 },
640 field_desc_show(seq, p[0], tp_la0);
641 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
642 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
646 static int tp_la_open(struct inode *inode, struct file *file)
649 struct adapter *adap = inode->i_private;
651 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
653 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
657 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
661 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
666 t4_tp_read_la(adap, (u64 *)p->data, NULL);
670 static ssize_t tp_la_write(struct file *file, const char __user *buf,
671 size_t count, loff_t *pos)
676 size_t size = min(sizeof(s) - 1, count);
677 struct adapter *adap = file_inode(file)->i_private;
679 if (copy_from_user(s, buf, size))
682 err = kstrtoul(s, 0, &val);
687 adap->params.tp.la_mask = val << 16;
688 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
689 adap->params.tp.la_mask);
693 static const struct file_operations tp_la_fops = {
694 .owner = THIS_MODULE,
698 .release = seq_release_private,
702 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
706 if (v == SEQ_START_TOKEN)
707 seq_puts(seq, " Pcmd Type Message"
710 seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
711 p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
715 static int ulprx_la_open(struct inode *inode, struct file *file)
718 struct adapter *adap = inode->i_private;
720 p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
725 t4_ulprx_read_la(adap, (u32 *)p->data);
729 static const struct file_operations ulprx_la_fops = {
730 .owner = THIS_MODULE,
731 .open = ulprx_la_open,
734 .release = seq_release_private
737 /* Show the PM memory stats. These stats include:
740 * Read: memory read operation
741 * Write Bypass: cut-through
742 * Bypass + mem: cut-through and save copy
746 * Write Bypass: cut-through
747 * Flush: payload trim or drop
749 static int pm_stats_show(struct seq_file *seq, void *v)
751 static const char * const tx_pm_stats[] = {
752 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
754 static const char * const rx_pm_stats[] = {
755 "Read:", "Write bypass:", "Write mem:", "Flush:"
759 u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
760 u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
761 struct adapter *adap = seq->private;
763 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
764 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
766 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
767 for (i = 0; i < PM_NSTATS - 1; i++)
768 seq_printf(seq, "%-13s %10u %20llu\n",
769 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
771 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
772 for (i = 0; i < PM_NSTATS - 1; i++)
773 seq_printf(seq, "%-13s %10u %20llu\n",
774 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
778 static int pm_stats_open(struct inode *inode, struct file *file)
780 return single_open(file, pm_stats_show, inode->i_private);
783 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
784 size_t count, loff_t *pos)
786 struct adapter *adap = file_inode(file)->i_private;
788 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
789 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
793 static const struct file_operations pm_stats_debugfs_fops = {
794 .owner = THIS_MODULE,
795 .open = pm_stats_open,
798 .release = single_release,
799 .write = pm_stats_clear
802 static int tx_rate_show(struct seq_file *seq, void *v)
804 u64 nrate[NCHAN], orate[NCHAN];
805 struct adapter *adap = seq->private;
807 t4_get_chan_txrate(adap, nrate, orate);
808 if (adap->params.arch.nchan == NCHAN) {
809 seq_puts(seq, " channel 0 channel 1 "
810 "channel 2 channel 3\n");
811 seq_printf(seq, "NIC B/s: %10llu %10llu %10llu %10llu\n",
812 (unsigned long long)nrate[0],
813 (unsigned long long)nrate[1],
814 (unsigned long long)nrate[2],
815 (unsigned long long)nrate[3]);
816 seq_printf(seq, "Offload B/s: %10llu %10llu %10llu %10llu\n",
817 (unsigned long long)orate[0],
818 (unsigned long long)orate[1],
819 (unsigned long long)orate[2],
820 (unsigned long long)orate[3]);
822 seq_puts(seq, " channel 0 channel 1\n");
823 seq_printf(seq, "NIC B/s: %10llu %10llu\n",
824 (unsigned long long)nrate[0],
825 (unsigned long long)nrate[1]);
826 seq_printf(seq, "Offload B/s: %10llu %10llu\n",
827 (unsigned long long)orate[0],
828 (unsigned long long)orate[1]);
833 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
835 static int cctrl_tbl_show(struct seq_file *seq, void *v)
837 static const char * const dec_fac[] = {
838 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
842 u16 (*incr)[NCCTRL_WIN];
843 struct adapter *adap = seq->private;
845 incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
849 t4_read_cong_tbl(adap, incr);
851 for (i = 0; i < NCCTRL_WIN; ++i) {
852 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
853 incr[0][i], incr[1][i], incr[2][i], incr[3][i],
854 incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
855 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
856 incr[8][i], incr[9][i], incr[10][i], incr[11][i],
857 incr[12][i], incr[13][i], incr[14][i], incr[15][i],
858 adap->params.a_wnd[i],
859 dec_fac[adap->params.b_wnd[i]]);
866 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
868 /* Format a value in a unit that differs from the value's native unit by the
871 static char *unit_conv(char *buf, size_t len, unsigned int val,
874 unsigned int rem = val % factor;
877 snprintf(buf, len, "%u", val / factor);
879 while (rem % 10 == 0)
881 snprintf(buf, len, "%u.%u", val / factor, rem);
886 static int clk_show(struct seq_file *seq, void *v)
889 struct adapter *adap = seq->private;
890 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
891 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
892 unsigned int tre = TIMERRESOLUTION_G(res);
893 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
894 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
896 seq_printf(seq, "Core clock period: %s ns\n",
897 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
898 seq_printf(seq, "TP timer tick: %s us\n",
899 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
900 seq_printf(seq, "TCP timestamp tick: %s us\n",
901 unit_conv(buf, sizeof(buf),
902 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
903 seq_printf(seq, "DACK tick: %s us\n",
904 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
905 seq_printf(seq, "DACK timer: %u us\n",
906 ((cclk_ps << dack_re) / 1000000) *
907 t4_read_reg(adap, TP_DACK_TIMER_A));
908 seq_printf(seq, "Retransmit min: %llu us\n",
909 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
910 seq_printf(seq, "Retransmit max: %llu us\n",
911 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
912 seq_printf(seq, "Persist timer min: %llu us\n",
913 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
914 seq_printf(seq, "Persist timer max: %llu us\n",
915 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
916 seq_printf(seq, "Keepalive idle timer: %llu us\n",
917 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
918 seq_printf(seq, "Keepalive interval: %llu us\n",
919 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
920 seq_printf(seq, "Initial SRTT: %llu us\n",
921 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
922 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
923 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
928 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
930 /* Firmware Device Log dump. */
931 static const char * const devlog_level_strings[] = {
932 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
933 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
934 [FW_DEVLOG_LEVEL_ERR] = "ERR",
935 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
936 [FW_DEVLOG_LEVEL_INFO] = "INFO",
937 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
940 static const char * const devlog_facility_strings[] = {
941 [FW_DEVLOG_FACILITY_CORE] = "CORE",
942 [FW_DEVLOG_FACILITY_CF] = "CF",
943 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
944 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
945 [FW_DEVLOG_FACILITY_RES] = "RES",
946 [FW_DEVLOG_FACILITY_HW] = "HW",
947 [FW_DEVLOG_FACILITY_FLR] = "FLR",
948 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
949 [FW_DEVLOG_FACILITY_PHY] = "PHY",
950 [FW_DEVLOG_FACILITY_MAC] = "MAC",
951 [FW_DEVLOG_FACILITY_PORT] = "PORT",
952 [FW_DEVLOG_FACILITY_VI] = "VI",
953 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
954 [FW_DEVLOG_FACILITY_ACL] = "ACL",
955 [FW_DEVLOG_FACILITY_TM] = "TM",
956 [FW_DEVLOG_FACILITY_QFC] = "QFC",
957 [FW_DEVLOG_FACILITY_DCB] = "DCB",
958 [FW_DEVLOG_FACILITY_ETH] = "ETH",
959 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
960 [FW_DEVLOG_FACILITY_RI] = "RI",
961 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
962 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
963 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
964 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
967 /* Information gathered by Device Log Open routine for the display routine.
970 unsigned int nentries; /* number of entries in log[] */
971 unsigned int first; /* first [temporal] entry in log[] */
972 struct fw_devlog_e log[0]; /* Firmware Device Log */
975 /* Dump a Firmaware Device Log entry.
977 static int devlog_show(struct seq_file *seq, void *v)
979 if (v == SEQ_START_TOKEN)
980 seq_printf(seq, "%10s %15s %8s %8s %s\n",
981 "Seq#", "Tstamp", "Level", "Facility", "Message");
983 struct devlog_info *dinfo = seq->private;
984 int fidx = (uintptr_t)v - 2;
986 struct fw_devlog_e *e;
988 /* Get a pointer to the log entry to display. Skip unused log
991 index = dinfo->first + fidx;
992 if (index >= dinfo->nentries)
993 index -= dinfo->nentries;
994 e = &dinfo->log[index];
995 if (e->timestamp == 0)
998 /* Print the message. This depends on the firmware using
999 * exactly the same formating strings as the kernel so we may
1000 * eventually have to put a format interpreter in here ...
1002 seq_printf(seq, "%10d %15llu %8s %8s ",
1003 be32_to_cpu(e->seqno),
1004 be64_to_cpu(e->timestamp),
1005 (e->level < ARRAY_SIZE(devlog_level_strings)
1006 ? devlog_level_strings[e->level]
1008 (e->facility < ARRAY_SIZE(devlog_facility_strings)
1009 ? devlog_facility_strings[e->facility]
1011 seq_printf(seq, e->fmt,
1012 be32_to_cpu(e->params[0]),
1013 be32_to_cpu(e->params[1]),
1014 be32_to_cpu(e->params[2]),
1015 be32_to_cpu(e->params[3]),
1016 be32_to_cpu(e->params[4]),
1017 be32_to_cpu(e->params[5]),
1018 be32_to_cpu(e->params[6]),
1019 be32_to_cpu(e->params[7]));
1024 /* Sequential File Operations for Device Log.
1026 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1028 if (pos > dinfo->nentries)
1031 return (void *)(uintptr_t)(pos + 1);
1034 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1036 struct devlog_info *dinfo = seq->private;
1039 ? devlog_get_idx(dinfo, *pos)
1043 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1045 struct devlog_info *dinfo = seq->private;
1048 return devlog_get_idx(dinfo, *pos);
1051 static void devlog_stop(struct seq_file *seq, void *v)
1055 static const struct seq_operations devlog_seq_ops = {
1056 .start = devlog_start,
1057 .next = devlog_next,
1058 .stop = devlog_stop,
1062 /* Set up for reading the firmware's device log. We read the entire log here
1063 * and then display it incrementally in devlog_show().
1065 static int devlog_open(struct inode *inode, struct file *file)
1067 struct adapter *adap = inode->i_private;
1068 struct devlog_params *dparams = &adap->params.devlog;
1069 struct devlog_info *dinfo;
1074 /* If we don't know where the log is we can't do anything.
1076 if (dparams->start == 0)
1079 /* Allocate the space to read in the firmware's device log and set up
1080 * for the iterated call to our display function.
1082 dinfo = __seq_open_private(file, &devlog_seq_ops,
1083 sizeof(*dinfo) + dparams->size);
1087 /* Record the basic log buffer information and read in the raw log.
1089 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1091 spin_lock(&adap->win0_lock);
1092 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1093 dparams->start, dparams->size, (__be32 *)dinfo->log,
1095 spin_unlock(&adap->win0_lock);
1097 seq_release_private(inode, file);
1101 /* Find the earliest (lowest Sequence Number) log entry in the
1102 * circular Device Log.
1104 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1105 struct fw_devlog_e *e = &dinfo->log[index];
1108 if (e->timestamp == 0)
1111 seqno = be32_to_cpu(e->seqno);
1112 if (seqno < fseqno) {
1114 dinfo->first = index;
1120 static const struct file_operations devlog_fops = {
1121 .owner = THIS_MODULE,
1122 .open = devlog_open,
1124 .llseek = seq_lseek,
1125 .release = seq_release_private
1128 static int mbox_show(struct seq_file *seq, void *v)
1130 static const char * const owner[] = { "none", "FW", "driver",
1131 "unknown", "<unread>" };
1134 unsigned int mbox = (uintptr_t)seq->private & 7;
1135 struct adapter *adap = seq->private - mbox;
1136 void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1138 /* For T4 we don't have a shadow copy of the Mailbox Control register.
1139 * And since reading that real register causes a side effect of
1140 * granting ownership, we're best of simply not reading it at all.
1142 if (is_t4(adap->params.chip)) {
1143 i = 4; /* index of "<unread>" */
1145 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A;
1146 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1148 i = MBOWNER_G(readl(ctrl));
1151 seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1153 for (i = 0; i < MBOX_LEN; i += 8)
1154 seq_printf(seq, "%016llx\n",
1155 (unsigned long long)readq(addr + i));
1159 static int mbox_open(struct inode *inode, struct file *file)
1161 return single_open(file, mbox_show, inode->i_private);
1164 static ssize_t mbox_write(struct file *file, const char __user *buf,
1165 size_t count, loff_t *pos)
1168 char c = '\n', s[256];
1169 unsigned long long data[8];
1170 const struct inode *ino;
1172 struct adapter *adap;
1176 if (count > sizeof(s) - 1 || !count)
1178 if (copy_from_user(s, buf, count))
1182 if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1183 &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1184 &data[7], &c) < 8 || c != '\n')
1187 ino = file_inode(file);
1188 mbox = (uintptr_t)ino->i_private & 7;
1189 adap = ino->i_private - mbox;
1190 addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1191 ctrl = addr + MBOX_LEN;
1193 if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1196 for (i = 0; i < 8; i++)
1197 writeq(data[i], addr + 8 * i);
1199 writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1203 static const struct file_operations mbox_debugfs_fops = {
1204 .owner = THIS_MODULE,
1207 .llseek = seq_lseek,
1208 .release = single_release,
1212 static int mps_trc_show(struct seq_file *seq, void *v)
1215 struct trace_params tp;
1216 unsigned int trcidx = (uintptr_t)seq->private & 3;
1217 struct adapter *adap = seq->private - trcidx;
1219 t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1221 seq_puts(seq, "tracer is disabled\n");
1225 if (tp.skip_ofst * 8 >= TRACE_LEN) {
1226 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1230 i = adap->chan_map[tp.port & 3];
1231 if (i >= MAX_NPORTS) {
1232 dev_err(adap->pdev_dev, "tracer %u is assigned "
1233 "to non-existing port\n", trcidx);
1236 seq_printf(seq, "tracer is capturing %s %s, ",
1237 adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1239 seq_printf(seq, "tracer is capturing loopback %d, ",
1241 seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1243 seq_printf(seq, "packets captured %smatch filter\n",
1244 tp.invert ? "do not " : "");
1247 seq_puts(seq, "filter pattern: ");
1248 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1249 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1251 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1252 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1253 seq_puts(seq, "@0\n");
1256 seq_puts(seq, "filter pattern: ");
1257 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1258 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1260 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1261 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1262 seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1266 static int mps_trc_open(struct inode *inode, struct file *file)
1268 return single_open(file, mps_trc_show, inode->i_private);
1271 static unsigned int xdigit2int(unsigned char c)
1273 return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1276 #define TRC_PORT_NONE 0xff
1277 #define TRC_RSS_ENABLE 0x33
1278 #define TRC_RSS_DISABLE 0x13
1280 /* Set an MPS trace filter. Syntax is:
1284 * to disable tracing, or
1286 * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1288 * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1289 * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1291 * <pattern data>[/<pattern mask>][@<anchor>]
1293 * Up to 2 filter patterns can be specified. If 2 are supplied the first one
1294 * must be anchored at 0. An omited mask is taken as a mask of 1s, an omitted
1295 * anchor is taken as 0.
1297 static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1298 size_t count, loff_t *pos)
1302 struct trace_params tp;
1303 const struct inode *ino;
1304 unsigned int trcidx;
1305 char *s, *p, *word, *end;
1306 struct adapter *adap;
1309 ino = file_inode(file);
1310 trcidx = (uintptr_t)ino->i_private & 3;
1311 adap = ino->i_private - trcidx;
1313 /* Don't accept input more than 1K, can't be anything valid except lots
1314 * of whitespace. Well, use less.
1318 p = s = kzalloc(count + 1, GFP_USER);
1321 if (copy_from_user(s, buf, count)) {
1326 if (s[count - 1] == '\n')
1327 s[count - 1] = '\0';
1329 enable = strcmp("disable", s) != 0;
1333 /* enable or disable trace multi rss filter */
1334 if (adap->trace_rss)
1335 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1337 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1339 memset(&tp, 0, sizeof(tp));
1340 tp.port = TRC_PORT_NONE;
1341 i = 0; /* counts pattern nibbles */
1346 word = strsep(&p, " ");
1350 if (!strncmp(word, "qid=", 4)) {
1351 end = (char *)word + 4;
1352 ret = kstrtouint(end, 10, &j);
1355 if (!adap->trace_rss) {
1356 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1362 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1366 MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1370 MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1374 MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1379 if (!strncmp(word, "snaplen=", 8)) {
1380 end = (char *)word + 8;
1381 ret = kstrtouint(end, 10, &j);
1382 if (ret || j > 9600) {
1383 inval: count = -EINVAL;
1389 if (!strncmp(word, "minlen=", 7)) {
1390 end = (char *)word + 7;
1391 ret = kstrtouint(end, 10, &j);
1392 if (ret || j > TFMINPKTSIZE_M)
1397 if (!strcmp(word, "not")) {
1398 tp.invert = !tp.invert;
1401 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1402 if (word[8] < '0' || word[8] > '3' || word[9])
1404 tp.port = word[8] - '0' + 8;
1407 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1408 if (word[2] < '0' || word[2] > '3' || word[3])
1410 tp.port = word[2] - '0' + 4;
1411 if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1415 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1416 if (word[2] < '0' || word[2] > '3' || word[3])
1418 tp.port = word[2] - '0';
1419 if (adap->chan_map[tp.port] >= MAX_NPORTS)
1423 if (!isxdigit(*word))
1426 /* we have found a trace pattern */
1427 if (i) { /* split pattern */
1428 if (tp.skip_len) /* too many splits */
1430 tp.skip_ofst = i / 16;
1433 data = &tp.data[i / 8];
1434 mask = &tp.mask[i / 8];
1437 while (isxdigit(*word)) {
1438 if (i >= TRACE_LEN * 2) {
1442 *data = (*data << 4) + xdigit2int(*word++);
1448 while (isxdigit(*word)) {
1449 if (j >= i) /* mask longer than data */
1451 *mask = (*mask << 4) + xdigit2int(*word++);
1455 if (i != j) /* mask shorter than data */
1457 } else { /* no mask, use all 1s */
1458 for ( ; i - j >= 8; j += 8)
1459 *mask++ = 0xffffffff;
1461 *mask = (1 << (i % 8) * 4) - 1;
1464 end = (char *)word + 1;
1465 ret = kstrtouint(end, 10, &j);
1466 if (*end && *end != '\n')
1468 if (j & 7) /* doesn't start at multiple of 8 */
1471 if (j < tp.skip_ofst) /* overlaps earlier pattern */
1473 if (j - tp.skip_ofst > 31) /* skip too big */
1475 tp.skip_len = j - tp.skip_ofst;
1478 *data <<= (8 - i % 8) * 4;
1479 *mask <<= (8 - i % 8) * 4;
1480 i = (i + 15) & ~15; /* 8-byte align */
1484 if (tp.port == TRC_PORT_NONE)
1488 i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1496 static const struct file_operations mps_trc_debugfs_fops = {
1497 .owner = THIS_MODULE,
1498 .open = mps_trc_open,
1500 .llseek = seq_lseek,
1501 .release = single_release,
1502 .write = mps_trc_write
1505 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1509 loff_t avail = file_inode(file)->i_size;
1510 struct adapter *adap = file->private_data;
1516 if (count > avail - pos)
1517 count = avail - pos;
1525 len = min(count + ofst, sizeof(data));
1526 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1532 if (copy_to_user(buf, data + ofst, len))
1539 count = pos - *ppos;
1544 static const struct file_operations flash_debugfs_fops = {
1545 .owner = THIS_MODULE,
1550 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1553 y = (__force u64)cpu_to_be64(y);
1554 memcpy(addr, (char *)&y + 2, ETH_ALEN);
1557 static int mps_tcam_show(struct seq_file *seq, void *v)
1559 struct adapter *adap = seq->private;
1560 unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1562 if (v == SEQ_START_TOKEN) {
1563 if (adap->params.arch.mps_rplc_size > 128)
1564 seq_puts(seq, "Idx Ethernet address Mask "
1567 " P0 P1 P2 P3 ML\n");
1569 seq_puts(seq, "Idx Ethernet address Mask "
1570 "Vld Ports PF VF Replication"
1571 " P0 P1 P2 P3 ML\n");
1576 unsigned int idx = (uintptr_t)v - 2;
1577 u64 tcamy, tcamx, val;
1578 u32 cls_lo, cls_hi, ctl;
1581 if (chip_ver > CHELSIO_T5) {
1582 /* CtlCmdType - 0: Read, 1: Write
1583 * CtlTcamSel - 0: TCAM0, 1: TCAM1
1584 * CtlXYBitSel- 0: Y bit, 1: X bit
1588 ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1590 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1592 ctl |= CTLTCAMINDEX_V(idx - 256) |
1594 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1595 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1596 tcamy = DMACH_G(val) << 32;
1597 tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1599 /* Read tcamx. Change the control param */
1600 ctl |= CTLXYBITSEL_V(1);
1601 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1602 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1603 tcamx = DMACH_G(val) << 32;
1604 tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1606 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1607 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1610 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1611 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1613 if (tcamx & tcamy) {
1614 seq_printf(seq, "%3u -\n", idx);
1618 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1619 if (chip_ver > CHELSIO_T5)
1620 replicate = (cls_lo & T6_REPLICATE_F);
1622 replicate = (cls_lo & REPLICATE_F);
1625 struct fw_ldst_cmd ldst_cmd;
1627 struct fw_ldst_mps_rplc mps_rplc;
1630 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1632 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1633 ldst_cmd.op_to_addrspace =
1634 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1638 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1639 ldst_cmd.u.mps.rplc.fid_idx =
1640 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1641 FW_LDST_CMD_IDX_V(idx));
1642 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1643 sizeof(ldst_cmd), &ldst_cmd);
1645 dev_warn(adap->pdev_dev, "Can't read MPS "
1646 "replication map for idx %d: %d\n",
1649 mps_rplc = ldst_cmd.u.mps.rplc;
1650 rplc[0] = ntohl(mps_rplc.rplc31_0);
1651 rplc[1] = ntohl(mps_rplc.rplc63_32);
1652 rplc[2] = ntohl(mps_rplc.rplc95_64);
1653 rplc[3] = ntohl(mps_rplc.rplc127_96);
1654 if (adap->params.arch.mps_rplc_size > 128) {
1655 rplc[4] = ntohl(mps_rplc.rplc159_128);
1656 rplc[5] = ntohl(mps_rplc.rplc191_160);
1657 rplc[6] = ntohl(mps_rplc.rplc223_192);
1658 rplc[7] = ntohl(mps_rplc.rplc255_224);
1663 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1664 if (chip_ver > CHELSIO_T5)
1665 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1666 "%012llx%3c %#x%4u%4d",
1667 idx, addr[0], addr[1], addr[2], addr[3],
1668 addr[4], addr[5], (unsigned long long)mask,
1669 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1672 (cls_lo & T6_VF_VALID_F) ?
1673 T6_VF_G(cls_lo) : -1);
1675 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1676 "%012llx%3c %#x%4u%4d",
1677 idx, addr[0], addr[1], addr[2], addr[3],
1678 addr[4], addr[5], (unsigned long long)mask,
1679 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1682 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1685 if (adap->params.arch.mps_rplc_size > 128)
1686 seq_printf(seq, " %08x %08x %08x %08x "
1687 "%08x %08x %08x %08x",
1688 rplc[7], rplc[6], rplc[5], rplc[4],
1689 rplc[3], rplc[2], rplc[1], rplc[0]);
1691 seq_printf(seq, " %08x %08x %08x %08x",
1692 rplc[3], rplc[2], rplc[1], rplc[0]);
1694 if (adap->params.arch.mps_rplc_size > 128)
1695 seq_printf(seq, "%72c", ' ');
1697 seq_printf(seq, "%36c", ' ');
1700 if (chip_ver > CHELSIO_T5)
1701 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1702 T6_SRAM_PRIO0_G(cls_lo),
1703 T6_SRAM_PRIO1_G(cls_lo),
1704 T6_SRAM_PRIO2_G(cls_lo),
1705 T6_SRAM_PRIO3_G(cls_lo),
1706 (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1708 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1709 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1710 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1711 (cls_lo >> MULTILISTEN0_S) & 0xf);
1716 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1718 struct adapter *adap = seq->private;
1719 int max_mac_addr = is_t4(adap->params.chip) ?
1720 NUM_MPS_CLS_SRAM_L_INSTANCES :
1721 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1722 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1725 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1727 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1730 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1733 return mps_tcam_get_idx(seq, *pos);
1736 static void mps_tcam_stop(struct seq_file *seq, void *v)
1740 static const struct seq_operations mps_tcam_seq_ops = {
1741 .start = mps_tcam_start,
1742 .next = mps_tcam_next,
1743 .stop = mps_tcam_stop,
1744 .show = mps_tcam_show
1747 static int mps_tcam_open(struct inode *inode, struct file *file)
1749 int res = seq_open(file, &mps_tcam_seq_ops);
1752 struct seq_file *seq = file->private_data;
1754 seq->private = inode->i_private;
1759 static const struct file_operations mps_tcam_debugfs_fops = {
1760 .owner = THIS_MODULE,
1761 .open = mps_tcam_open,
1763 .llseek = seq_lseek,
1764 .release = seq_release,
1767 /* Display various sensor information.
1769 static int sensors_show(struct seq_file *seq, void *v)
1771 struct adapter *adap = seq->private;
1772 u32 param[7], val[7];
1775 /* Note that if the sensors haven't been initialized and turned on
1776 * we'll get values of 0, so treat those as "<unknown>" ...
1778 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1779 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1780 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1781 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1782 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1783 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1784 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1787 if (ret < 0 || val[0] == 0)
1788 seq_puts(seq, "Temperature: <unknown>\n");
1790 seq_printf(seq, "Temperature: %dC\n", val[0]);
1792 if (ret < 0 || val[1] == 0)
1793 seq_puts(seq, "Core VDD: <unknown>\n");
1795 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
1800 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1802 #if IS_ENABLED(CONFIG_IPV6)
1803 static int clip_tbl_open(struct inode *inode, struct file *file)
1805 return single_open(file, clip_tbl_show, inode->i_private);
1808 static const struct file_operations clip_tbl_debugfs_fops = {
1809 .owner = THIS_MODULE,
1810 .open = clip_tbl_open,
1812 .llseek = seq_lseek,
1813 .release = single_release
1820 static int rss_show(struct seq_file *seq, void *v, int idx)
1824 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
1825 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1826 entry[5], entry[6], entry[7]);
1830 static int rss_open(struct inode *inode, struct file *file)
1834 struct adapter *adap = inode->i_private;
1836 p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1840 ret = t4_read_rss(adap, (u16 *)p->data);
1842 seq_release_private(inode, file);
1847 static const struct file_operations rss_debugfs_fops = {
1848 .owner = THIS_MODULE,
1851 .llseek = seq_lseek,
1852 .release = seq_release_private
1855 /* RSS Configuration.
1858 /* Small utility function to return the strings "yes" or "no" if the supplied
1859 * argument is non-zero.
1861 static const char *yesno(int x)
1863 static const char *yes = "yes";
1864 static const char *no = "no";
1866 return x ? yes : no;
1869 static int rss_config_show(struct seq_file *seq, void *v)
1871 struct adapter *adapter = seq->private;
1872 static const char * const keymode[] = {
1874 "global and per-VF scramble",
1875 "per-PF and per-VF scramble",
1876 "per-VF and per-VF scramble",
1880 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1881 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1882 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1884 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1886 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1888 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1890 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
1891 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
1892 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
1893 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
1894 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
1896 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
1897 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
1898 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
1899 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1901 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1903 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1905 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1907 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1909 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
1910 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
1911 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
1912 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
1913 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
1915 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
1917 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
1919 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
1921 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
1922 CONGESTIONENABLE_F));
1923 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
1925 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
1926 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
1928 seq_puts(seq, "\n");
1930 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
1931 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
1932 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1933 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
1934 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1935 seq_printf(seq, " HashAll: %3s\n",
1936 yesno(rssconf & HASHALL_F));
1937 seq_printf(seq, " HashEth: %3s\n",
1938 yesno(rssconf & HASHETH_F));
1940 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
1942 seq_puts(seq, "\n");
1944 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
1945 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
1946 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1947 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
1949 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
1951 seq_puts(seq, "\n");
1953 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1954 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1955 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
1956 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
1958 seq_puts(seq, "\n");
1960 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1961 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1962 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1963 seq_printf(seq, " KeyWrAddrX: %3d\n",
1964 KEYWRADDRX_G(rssconf));
1965 seq_printf(seq, " KeyExtend: %3s\n",
1966 yesno(rssconf & KEYEXTEND_F));
1968 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
1969 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
1970 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
1971 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
1972 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
1974 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
1975 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
1976 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1977 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
1979 seq_printf(seq, " VfWrAddr: %3d\n",
1980 T6_VFWRADDR_G(rssconf));
1981 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
1982 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
1983 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
1984 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
1986 seq_puts(seq, "\n");
1988 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1989 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1990 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
1991 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
1992 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
1993 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
1994 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
1996 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
1998 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
2000 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
2002 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
2003 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
2004 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
2005 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
2006 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
2007 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
2008 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
2009 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
2010 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
2011 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
2012 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
2017 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
2022 static int rss_key_show(struct seq_file *seq, void *v)
2026 t4_read_rss_key(seq->private, key);
2027 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2028 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2029 key[2], key[1], key[0]);
2033 static int rss_key_open(struct inode *inode, struct file *file)
2035 return single_open(file, rss_key_show, inode->i_private);
2038 static ssize_t rss_key_write(struct file *file, const char __user *buf,
2039 size_t count, loff_t *pos)
2044 struct adapter *adap = file_inode(file)->i_private;
2046 if (count > sizeof(s) - 1)
2048 if (copy_from_user(s, buf, count))
2050 for (i = count; i > 0 && isspace(s[i - 1]); i--)
2054 for (p = s, i = 9; i >= 0; i--) {
2056 for (j = 0; j < 8; j++, p++) {
2059 key[i] = (key[i] << 4) | hex2val(*p);
2063 t4_write_rss_key(adap, key, -1);
2067 static const struct file_operations rss_key_debugfs_fops = {
2068 .owner = THIS_MODULE,
2069 .open = rss_key_open,
2071 .llseek = seq_lseek,
2072 .release = single_release,
2073 .write = rss_key_write
2076 /* PF RSS Configuration.
2079 struct rss_pf_conf {
2085 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2087 struct rss_pf_conf *pfconf;
2089 if (v == SEQ_START_TOKEN) {
2090 /* use the 0th entry to dump the PF Map Index Size */
2091 pfconf = seq->private + offsetof(struct seq_tab, data);
2092 seq_printf(seq, "PF Map Index Size = %d\n\n",
2093 LKPIDXSIZE_G(pfconf->rss_pf_map));
2095 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
2096 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
2097 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
2099 #define G_PFnLKPIDX(map, n) \
2100 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2101 #define G_PFnMSKSIZE(mask, n) \
2102 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2105 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
2107 yesno(pfconf->rss_pf_config & MAPENABLE_F),
2108 yesno(pfconf->rss_pf_config & CHNENABLE_F),
2109 yesno(pfconf->rss_pf_config & PRTENABLE_F),
2110 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2111 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2112 IVFWIDTH_G(pfconf->rss_pf_config),
2113 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2114 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2115 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2116 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2117 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2118 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2119 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2127 static int rss_pf_config_open(struct inode *inode, struct file *file)
2129 struct adapter *adapter = inode->i_private;
2131 u32 rss_pf_map, rss_pf_mask;
2132 struct rss_pf_conf *pfconf;
2135 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2139 pfconf = (struct rss_pf_conf *)p->data;
2140 rss_pf_map = t4_read_rss_pf_map(adapter);
2141 rss_pf_mask = t4_read_rss_pf_mask(adapter);
2142 for (pf = 0; pf < 8; pf++) {
2143 pfconf[pf].rss_pf_map = rss_pf_map;
2144 pfconf[pf].rss_pf_mask = rss_pf_mask;
2145 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
2150 static const struct file_operations rss_pf_config_debugfs_fops = {
2151 .owner = THIS_MODULE,
2152 .open = rss_pf_config_open,
2154 .llseek = seq_lseek,
2155 .release = seq_release_private
2158 /* VF RSS Configuration.
2161 struct rss_vf_conf {
2166 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2168 if (v == SEQ_START_TOKEN) {
2169 seq_puts(seq, " RSS Hash Tuple Enable\n");
2170 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
2171 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
2173 struct rss_vf_conf *vfconf = v;
2175 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
2177 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2178 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2179 VFLKPIDX_G(vfconf->rss_vf_vfh),
2180 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2181 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2182 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2183 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2184 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2185 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2186 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2187 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2188 KEYINDEX_G(vfconf->rss_vf_vfh),
2189 vfconf->rss_vf_vfl);
2194 static int rss_vf_config_open(struct inode *inode, struct file *file)
2196 struct adapter *adapter = inode->i_private;
2198 struct rss_vf_conf *vfconf;
2199 int vf, vfcount = adapter->params.arch.vfcount;
2201 p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
2205 vfconf = (struct rss_vf_conf *)p->data;
2206 for (vf = 0; vf < vfcount; vf++) {
2207 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
2208 &vfconf[vf].rss_vf_vfh);
2213 static const struct file_operations rss_vf_config_debugfs_fops = {
2214 .owner = THIS_MODULE,
2215 .open = rss_vf_config_open,
2217 .llseek = seq_lseek,
2218 .release = seq_release_private
2222 * ethqset2pinfo - return port_info of an Ethernet Queue Set
2223 * @adap: the adapter
2224 * @qset: Ethernet Queue Set
2226 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2230 for_each_port(adap, pidx) {
2231 struct port_info *pi = adap2pinfo(adap, pidx);
2233 if (qset >= pi->first_qset &&
2234 qset < pi->first_qset + pi->nqsets)
2238 /* should never happen! */
2243 static int sge_qinfo_show(struct seq_file *seq, void *v)
2245 struct adapter *adap = seq->private;
2246 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2247 int iscsi_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
2248 int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
2249 int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
2250 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2251 int i, r = (uintptr_t)v - 1;
2252 int iscsi_idx = r - eth_entries;
2253 int rdma_idx = iscsi_idx - iscsi_entries;
2254 int ciq_idx = rdma_idx - rdma_entries;
2255 int ctrl_idx = ciq_idx - ciq_entries;
2256 int fq_idx = ctrl_idx - ctrl_entries;
2259 seq_putc(seq, '\n');
2261 #define S3(fmt_spec, s, v) \
2263 seq_printf(seq, "%-12s", s); \
2264 for (i = 0; i < n; ++i) \
2265 seq_printf(seq, " %16" fmt_spec, v); \
2266 seq_putc(seq, '\n'); \
2268 #define S(s, v) S3("s", s, v)
2269 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
2270 #define T(s, v) S3("u", s, tx[i].v)
2271 #define TL(s, v) T3("lu", s, v)
2272 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
2273 #define R(s, v) S3("u", s, rx[i].v)
2274 #define RL(s, v) R3("lu", s, v)
2276 if (r < eth_entries) {
2277 int base_qset = r * 4;
2278 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
2279 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
2280 int n = min(4, adap->sge.ethqsets - 4 * r);
2282 S("QType:", "Ethernet");
2284 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2285 T("TxQ ID:", q.cntxt_id);
2286 T("TxQ size:", q.size);
2287 T("TxQ inuse:", q.in_use);
2288 T("TxQ CIDX:", q.cidx);
2289 T("TxQ PIDX:", q.pidx);
2290 #ifdef CONFIG_CHELSIO_T4_DCB
2291 T("DCB Prio:", dcb_prio);
2292 S3("u", "DCB PGID:",
2293 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2294 4*(7-tx[i].dcb_prio)) & 0xf);
2296 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2297 1*(7-tx[i].dcb_prio)) & 0x1);
2299 R("RspQ ID:", rspq.abs_id);
2300 R("RspQ size:", rspq.size);
2301 R("RspQE size:", rspq.iqe_len);
2302 R("RspQ CIDX:", rspq.cidx);
2303 R("RspQ Gen:", rspq.gen);
2304 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2305 S3("u", "Intr pktcnt:",
2306 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2307 R("FL ID:", fl.cntxt_id);
2308 R("FL size:", fl.size - 8);
2309 R("FL pend:", fl.pend_cred);
2310 R("FL avail:", fl.avail);
2311 R("FL PIDX:", fl.pidx);
2312 R("FL CIDX:", fl.cidx);
2313 RL("RxPackets:", stats.pkts);
2314 RL("RxCSO:", stats.rx_cso);
2315 RL("VLANxtract:", stats.vlan_ex);
2316 RL("LROmerged:", stats.lro_merged);
2317 RL("LROpackets:", stats.lro_pkts);
2318 RL("RxDrops:", stats.rx_drops);
2320 TL("TxCSO:", tx_cso);
2321 TL("VLANins:", vlan_ins);
2322 TL("TxQFull:", q.stops);
2323 TL("TxQRestarts:", q.restarts);
2324 TL("TxMapErr:", mapping_err);
2325 RL("FLAllocErr:", fl.alloc_failed);
2326 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2327 RL("FLStarving:", fl.starving);
2329 } else if (iscsi_idx < iscsi_entries) {
2330 const struct sge_ofld_rxq *rx =
2331 &adap->sge.ofldrxq[iscsi_idx * 4];
2332 const struct sge_ofld_txq *tx =
2333 &adap->sge.ofldtxq[iscsi_idx * 4];
2334 int n = min(4, adap->sge.ofldqsets - 4 * iscsi_idx);
2336 S("QType:", "iSCSI");
2337 T("TxQ ID:", q.cntxt_id);
2338 T("TxQ size:", q.size);
2339 T("TxQ inuse:", q.in_use);
2340 T("TxQ CIDX:", q.cidx);
2341 T("TxQ PIDX:", q.pidx);
2342 R("RspQ ID:", rspq.abs_id);
2343 R("RspQ size:", rspq.size);
2344 R("RspQE size:", rspq.iqe_len);
2345 R("RspQ CIDX:", rspq.cidx);
2346 R("RspQ Gen:", rspq.gen);
2347 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2348 S3("u", "Intr pktcnt:",
2349 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2350 R("FL ID:", fl.cntxt_id);
2351 R("FL size:", fl.size - 8);
2352 R("FL pend:", fl.pend_cred);
2353 R("FL avail:", fl.avail);
2354 R("FL PIDX:", fl.pidx);
2355 R("FL CIDX:", fl.cidx);
2356 RL("RxPackets:", stats.pkts);
2357 RL("RxImmPkts:", stats.imm);
2358 RL("RxNoMem:", stats.nomem);
2359 RL("FLAllocErr:", fl.alloc_failed);
2360 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2361 RL("FLStarving:", fl.starving);
2363 } else if (rdma_idx < rdma_entries) {
2364 const struct sge_ofld_rxq *rx =
2365 &adap->sge.rdmarxq[rdma_idx * 4];
2366 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
2368 S("QType:", "RDMA-CPL");
2370 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2371 R("RspQ ID:", rspq.abs_id);
2372 R("RspQ size:", rspq.size);
2373 R("RspQE size:", rspq.iqe_len);
2374 R("RspQ CIDX:", rspq.cidx);
2375 R("RspQ Gen:", rspq.gen);
2376 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2377 S3("u", "Intr pktcnt:",
2378 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2379 R("FL ID:", fl.cntxt_id);
2380 R("FL size:", fl.size - 8);
2381 R("FL pend:", fl.pend_cred);
2382 R("FL avail:", fl.avail);
2383 R("FL PIDX:", fl.pidx);
2384 R("FL CIDX:", fl.cidx);
2385 RL("RxPackets:", stats.pkts);
2386 RL("RxImmPkts:", stats.imm);
2387 RL("RxNoMem:", stats.nomem);
2388 RL("FLAllocErr:", fl.alloc_failed);
2389 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2390 RL("FLStarving:", fl.starving);
2392 } else if (ciq_idx < ciq_entries) {
2393 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
2394 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
2396 S("QType:", "RDMA-CIQ");
2398 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2399 R("RspQ ID:", rspq.abs_id);
2400 R("RspQ size:", rspq.size);
2401 R("RspQE size:", rspq.iqe_len);
2402 R("RspQ CIDX:", rspq.cidx);
2403 R("RspQ Gen:", rspq.gen);
2404 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2405 S3("u", "Intr pktcnt:",
2406 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2407 RL("RxAN:", stats.an);
2408 RL("RxNoMem:", stats.nomem);
2410 } else if (ctrl_idx < ctrl_entries) {
2411 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
2412 int n = min(4, adap->params.nports - 4 * ctrl_idx);
2414 S("QType:", "Control");
2415 T("TxQ ID:", q.cntxt_id);
2416 T("TxQ size:", q.size);
2417 T("TxQ inuse:", q.in_use);
2418 T("TxQ CIDX:", q.cidx);
2419 T("TxQ PIDX:", q.pidx);
2420 TL("TxQFull:", q.stops);
2421 TL("TxQRestarts:", q.restarts);
2422 } else if (fq_idx == 0) {
2423 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
2425 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2426 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2427 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2428 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2429 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2430 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2431 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2432 qtimer_val(adap, evtq));
2433 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
2434 adap->sge.counter_val[evtq->pktcnt_idx]);
2447 static int sge_queue_entries(const struct adapter *adap)
2449 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
2450 DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
2451 DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
2452 DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
2453 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
2456 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
2458 int entries = sge_queue_entries(seq->private);
2460 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2463 static void sge_queue_stop(struct seq_file *seq, void *v)
2467 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
2469 int entries = sge_queue_entries(seq->private);
2472 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2475 static const struct seq_operations sge_qinfo_seq_ops = {
2476 .start = sge_queue_start,
2477 .next = sge_queue_next,
2478 .stop = sge_queue_stop,
2479 .show = sge_qinfo_show
2482 static int sge_qinfo_open(struct inode *inode, struct file *file)
2484 int res = seq_open(file, &sge_qinfo_seq_ops);
2487 struct seq_file *seq = file->private_data;
2489 seq->private = inode->i_private;
2494 static const struct file_operations sge_qinfo_debugfs_fops = {
2495 .owner = THIS_MODULE,
2496 .open = sge_qinfo_open,
2498 .llseek = seq_lseek,
2499 .release = seq_release,
2502 int mem_open(struct inode *inode, struct file *file)
2505 struct adapter *adap;
2507 file->private_data = inode->i_private;
2509 mem = (uintptr_t)file->private_data & 0x3;
2510 adap = file->private_data - mem;
2512 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
2517 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2521 loff_t avail = file_inode(file)->i_size;
2522 unsigned int mem = (uintptr_t)file->private_data & 3;
2523 struct adapter *adap = file->private_data - mem;
2531 if (count > avail - pos)
2532 count = avail - pos;
2534 data = t4_alloc_mem(count);
2538 spin_lock(&adap->win0_lock);
2539 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
2540 spin_unlock(&adap->win0_lock);
2545 ret = copy_to_user(buf, data, count);
2551 *ppos = pos + count;
2554 static const struct file_operations mem_debugfs_fops = {
2555 .owner = THIS_MODULE,
2556 .open = simple_open,
2558 .llseek = default_llseek,
2561 static int tid_info_show(struct seq_file *seq, void *v)
2563 struct adapter *adap = seq->private;
2564 const struct tid_info *t = &adap->tids;
2565 enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
2567 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2570 if (chip <= CHELSIO_T5)
2571 sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
2573 sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
2576 seq_printf(seq, "TID range: 0..%u/%u..%u", sb - 1,
2577 adap->tids.hash_base,
2579 seq_printf(seq, ", in use: %u/%u\n",
2580 atomic_read(&t->tids_in_use),
2581 atomic_read(&t->hash_tids_in_use));
2582 } else if (adap->flags & FW_OFLD_CONN) {
2583 seq_printf(seq, "TID range: %u..%u/%u..%u",
2586 adap->tids.hash_base,
2588 seq_printf(seq, ", in use: %u/%u\n",
2589 atomic_read(&t->tids_in_use),
2590 atomic_read(&t->hash_tids_in_use));
2592 seq_printf(seq, "TID range: %u..%u",
2593 adap->tids.hash_base,
2595 seq_printf(seq, ", in use: %u\n",
2596 atomic_read(&t->hash_tids_in_use));
2598 } else if (t->ntids) {
2599 seq_printf(seq, "TID range: 0..%u", t->ntids - 1);
2600 seq_printf(seq, ", in use: %u\n",
2601 atomic_read(&t->tids_in_use));
2605 seq_printf(seq, "STID range: %u..%u, in use: %u\n",
2607 (chip <= CHELSIO_T5)) ?
2608 t->stid_base + 1 : t->stid_base,
2609 t->stid_base + t->nstids - 1, t->stids_in_use);
2611 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
2612 t->natids - 1, t->atids_in_use);
2613 seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
2614 t->ftid_base + t->nftids - 1);
2616 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
2617 t->sftid_base, t->sftid_base + t->nsftids - 2,
2620 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
2621 t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
2622 t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
2626 DEFINE_SIMPLE_DEBUGFS_FILE(tid_info);
2628 static void add_debugfs_mem(struct adapter *adap, const char *name,
2629 unsigned int idx, unsigned int size_mb)
2631 debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
2632 (void *)adap + idx, &mem_debugfs_fops,
2636 static int blocked_fl_open(struct inode *inode, struct file *file)
2638 file->private_data = inode->i_private;
2642 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
2643 size_t count, loff_t *ppos)
2646 const struct adapter *adap = filp->private_data;
2648 ssize_t size = (adap->sge.egr_sz + 3) / 4 +
2649 adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
2651 buf = kzalloc(size, GFP_KERNEL);
2655 len = snprintf(buf, size - 1, "%*pb\n",
2656 adap->sge.egr_sz, adap->sge.blocked_fl);
2657 len += sprintf(buf + len, "\n");
2658 size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
2663 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
2664 size_t count, loff_t *ppos)
2668 struct adapter *adap = filp->private_data;
2670 t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
2674 err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
2680 bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
2685 static const struct file_operations blocked_fl_fops = {
2686 .owner = THIS_MODULE,
2687 .open = blocked_fl_open,
2688 .read = blocked_fl_read,
2689 .write = blocked_fl_write,
2690 .llseek = generic_file_llseek,
2699 static int mem_desc_cmp(const void *a, const void *b)
2701 return ((const struct mem_desc *)a)->base -
2702 ((const struct mem_desc *)b)->base;
2705 static void mem_region_show(struct seq_file *seq, const char *name,
2706 unsigned int from, unsigned int to)
2710 string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
2712 seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
2715 static int meminfo_show(struct seq_file *seq, void *v)
2717 static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
2719 static const char * const region[] = {
2720 "DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:",
2721 "Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:",
2722 "Tx payload:", "Rx payload:", "LE hash:", "iSCSI region:",
2723 "TDDP region:", "TPT region:", "STAG region:", "RQ region:",
2724 "RQUDP region:", "PBL region:", "TXPBL region:",
2725 "DBVFIFO region:", "ULPRX state:", "ULPTX state:",
2730 u32 lo, hi, used, alloc;
2731 struct mem_desc avail[4];
2732 struct mem_desc mem[ARRAY_SIZE(region) + 3]; /* up to 3 holes */
2733 struct mem_desc *md = mem;
2734 struct adapter *adap = seq->private;
2736 for (i = 0; i < ARRAY_SIZE(mem); i++) {
2741 /* Find and sort the populated memory ranges */
2743 lo = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2744 if (lo & EDRAM0_ENABLE_F) {
2745 hi = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2746 avail[i].base = EDRAM0_BASE_G(hi) << 20;
2747 avail[i].limit = avail[i].base + (EDRAM0_SIZE_G(hi) << 20);
2751 if (lo & EDRAM1_ENABLE_F) {
2752 hi = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2753 avail[i].base = EDRAM1_BASE_G(hi) << 20;
2754 avail[i].limit = avail[i].base + (EDRAM1_SIZE_G(hi) << 20);
2759 if (is_t5(adap->params.chip)) {
2760 if (lo & EXT_MEM0_ENABLE_F) {
2761 hi = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2762 avail[i].base = EXT_MEM0_BASE_G(hi) << 20;
2764 avail[i].base + (EXT_MEM0_SIZE_G(hi) << 20);
2768 if (lo & EXT_MEM1_ENABLE_F) {
2769 hi = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2770 avail[i].base = EXT_MEM1_BASE_G(hi) << 20;
2772 avail[i].base + (EXT_MEM1_SIZE_G(hi) << 20);
2777 if (lo & EXT_MEM_ENABLE_F) {
2778 hi = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2779 avail[i].base = EXT_MEM_BASE_G(hi) << 20;
2781 avail[i].base + (EXT_MEM_SIZE_G(hi) << 20);
2786 if (!i) /* no memory available */
2788 sort(avail, i, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2790 (md++)->base = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A);
2791 (md++)->base = t4_read_reg(adap, SGE_IMSG_CTXT_BADDR_A);
2792 (md++)->base = t4_read_reg(adap, SGE_FLM_CACHE_BADDR_A);
2793 (md++)->base = t4_read_reg(adap, TP_CMM_TCB_BASE_A);
2794 (md++)->base = t4_read_reg(adap, TP_CMM_MM_BASE_A);
2795 (md++)->base = t4_read_reg(adap, TP_CMM_TIMER_BASE_A);
2796 (md++)->base = t4_read_reg(adap, TP_CMM_MM_RX_FLST_BASE_A);
2797 (md++)->base = t4_read_reg(adap, TP_CMM_MM_TX_FLST_BASE_A);
2798 (md++)->base = t4_read_reg(adap, TP_CMM_MM_PS_FLST_BASE_A);
2800 /* the next few have explicit upper bounds */
2801 md->base = t4_read_reg(adap, TP_PMM_TX_BASE_A);
2802 md->limit = md->base - 1 +
2803 t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A) *
2804 PMTXMAXPAGE_G(t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A));
2807 md->base = t4_read_reg(adap, TP_PMM_RX_BASE_A);
2808 md->limit = md->base - 1 +
2809 t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) *
2810 PMRXMAXPAGE_G(t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A));
2813 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2814 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) {
2815 hi = t4_read_reg(adap, LE_DB_TID_HASHBASE_A) / 4;
2816 md->base = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2818 hi = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2819 md->base = t4_read_reg(adap,
2820 LE_DB_HASH_TBL_BASE_ADDR_A);
2825 md->idx = ARRAY_SIZE(region); /* hide it */
2829 #define ulp_region(reg) do { \
2830 md->base = t4_read_reg(adap, ULP_ ## reg ## _LLIMIT_A);\
2831 (md++)->limit = t4_read_reg(adap, ULP_ ## reg ## _ULIMIT_A); \
2834 ulp_region(RX_ISCSI);
2835 ulp_region(RX_TDDP);
2837 ulp_region(RX_STAG);
2839 ulp_region(RX_RQUDP);
2844 md->idx = ARRAY_SIZE(region);
2845 if (!is_t4(adap->params.chip)) {
2847 u32 sge_ctrl = t4_read_reg(adap, SGE_CONTROL2_A);
2848 u32 fifo_size = t4_read_reg(adap, SGE_DBVFIFO_SIZE_A);
2850 if (is_t5(adap->params.chip)) {
2851 if (sge_ctrl & VFIFO_ENABLE_F)
2852 size = DBVFIFO_SIZE_G(fifo_size);
2854 size = T6_DBVFIFO_SIZE_G(fifo_size);
2858 md->base = BASEADDR_G(t4_read_reg(adap,
2859 SGE_DBVFIFO_BADDR_A));
2860 md->limit = md->base + (size << 2) - 1;
2866 md->base = t4_read_reg(adap, ULP_RX_CTX_BASE_A);
2869 md->base = t4_read_reg(adap, ULP_TX_ERR_TABLE_BASE_A);
2873 md->base = adap->vres.ocq.start;
2874 if (adap->vres.ocq.size)
2875 md->limit = md->base + adap->vres.ocq.size - 1;
2877 md->idx = ARRAY_SIZE(region); /* hide it */
2880 /* add any address-space holes, there can be up to 3 */
2881 for (n = 0; n < i - 1; n++)
2882 if (avail[n].limit < avail[n + 1].base)
2883 (md++)->base = avail[n].limit;
2885 (md++)->base = avail[n].limit;
2888 sort(mem, n, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2890 for (lo = 0; lo < i; lo++)
2891 mem_region_show(seq, memory[avail[lo].idx], avail[lo].base,
2892 avail[lo].limit - 1);
2894 seq_putc(seq, '\n');
2895 for (i = 0; i < n; i++) {
2896 if (mem[i].idx >= ARRAY_SIZE(region))
2897 continue; /* skip holes */
2899 mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0;
2900 mem_region_show(seq, region[mem[i].idx], mem[i].base,
2904 seq_putc(seq, '\n');
2905 lo = t4_read_reg(adap, CIM_SDRAM_BASE_ADDR_A);
2906 hi = t4_read_reg(adap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1;
2907 mem_region_show(seq, "uP RAM:", lo, hi);
2909 lo = t4_read_reg(adap, CIM_EXTMEM2_BASE_ADDR_A);
2910 hi = t4_read_reg(adap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1;
2911 mem_region_show(seq, "uP Extmem2:", lo, hi);
2913 lo = t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A);
2914 seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n",
2916 t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) >> 10,
2917 (lo & PMRXNUMCHN_F) ? 2 : 1);
2919 lo = t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A);
2920 hi = t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A);
2921 seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n",
2923 hi >= (1 << 20) ? (hi >> 20) : (hi >> 10),
2924 hi >= (1 << 20) ? 'M' : 'K', 1 << PMTXNUMCHN_G(lo));
2925 seq_printf(seq, "%u p-structs\n\n",
2926 t4_read_reg(adap, TP_CMM_MM_MAX_PSTRUCT_A));
2928 for (i = 0; i < 4; i++) {
2929 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2930 lo = t4_read_reg(adap, MPS_RX_MAC_BG_PG_CNT0_A + i * 4);
2932 lo = t4_read_reg(adap, MPS_RX_PG_RSV0_A + i * 4);
2933 if (is_t5(adap->params.chip)) {
2934 used = T5_USED_G(lo);
2935 alloc = T5_ALLOC_G(lo);
2938 alloc = ALLOC_G(lo);
2940 /* For T6 these are MAC buffer groups */
2941 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
2944 for (i = 0; i < adap->params.arch.nchan; i++) {
2945 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2946 lo = t4_read_reg(adap,
2947 MPS_RX_LPBK_BG_PG_CNT0_A + i * 4);
2949 lo = t4_read_reg(adap, MPS_RX_PG_RSV4_A + i * 4);
2950 if (is_t5(adap->params.chip)) {
2951 used = T5_USED_G(lo);
2952 alloc = T5_ALLOC_G(lo);
2955 alloc = ALLOC_G(lo);
2957 /* For T6 these are MAC buffer groups */
2959 "Loopback %d using %u pages out of %u allocated\n",
2965 static int meminfo_open(struct inode *inode, struct file *file)
2967 return single_open(file, meminfo_show, inode->i_private);
2970 static const struct file_operations meminfo_fops = {
2971 .owner = THIS_MODULE,
2972 .open = meminfo_open,
2974 .llseek = seq_lseek,
2975 .release = single_release,
2977 /* Add an array of Debug FS files.
2979 void add_debugfs_files(struct adapter *adap,
2980 struct t4_debugfs_entry *files,
2981 unsigned int nfiles)
2985 /* debugfs support is best effort */
2986 for (i = 0; i < nfiles; i++)
2987 debugfs_create_file(files[i].name, files[i].mode,
2989 (void *)adap + files[i].data,
2993 int t4_setup_debugfs(struct adapter *adap)
2999 static struct t4_debugfs_entry t4_debugfs_files[] = {
3000 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
3001 { "cim_pif_la", &cim_pif_la_fops, S_IRUSR, 0 },
3002 { "cim_ma_la", &cim_ma_la_fops, S_IRUSR, 0 },
3003 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
3004 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
3005 { "devlog", &devlog_fops, S_IRUSR, 0 },
3006 { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
3007 { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
3008 { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
3009 { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
3010 { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
3011 { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
3012 { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
3013 { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
3014 { "trace0", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
3015 { "trace1", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
3016 { "trace2", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
3017 { "trace3", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
3018 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
3019 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
3020 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
3021 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
3022 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
3023 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
3024 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
3025 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
3026 { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
3027 { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
3028 { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
3029 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
3030 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
3031 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
3032 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
3033 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
3034 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
3035 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
3036 { "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
3037 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
3038 { "tp_la", &tp_la_fops, S_IRUSR, 0 },
3039 { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
3040 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
3041 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
3042 { "tx_rate", &tx_rate_debugfs_fops, S_IRUSR, 0 },
3043 { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
3044 #if IS_ENABLED(CONFIG_IPV6)
3045 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
3047 { "tids", &tid_info_debugfs_fops, S_IRUSR, 0},
3048 { "blocked_fl", &blocked_fl_fops, S_IRUSR | S_IWUSR, 0 },
3049 { "meminfo", &meminfo_fops, S_IRUSR, 0 },
3052 /* Debug FS nodes common to all T5 and later adapters.
3054 static struct t4_debugfs_entry t5_debugfs_files[] = {
3055 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
3056 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
3059 add_debugfs_files(adap,
3061 ARRAY_SIZE(t4_debugfs_files));
3062 if (!is_t4(adap->params.chip))
3063 add_debugfs_files(adap,
3065 ARRAY_SIZE(t5_debugfs_files));
3067 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3068 if (i & EDRAM0_ENABLE_F) {
3069 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3070 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
3072 if (i & EDRAM1_ENABLE_F) {
3073 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3074 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
3076 if (is_t5(adap->params.chip)) {
3077 if (i & EXT_MEM0_ENABLE_F) {
3078 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
3079 add_debugfs_mem(adap, "mc0", MEM_MC0,
3080 EXT_MEM0_SIZE_G(size));
3082 if (i & EXT_MEM1_ENABLE_F) {
3083 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3084 add_debugfs_mem(adap, "mc1", MEM_MC1,
3085 EXT_MEM1_SIZE_G(size));
3088 if (i & EXT_MEM_ENABLE_F) {
3089 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3090 add_debugfs_mem(adap, "mc", MEM_MC,
3091 EXT_MEM_SIZE_G(size));
3095 de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,
3096 &flash_debugfs_fops, adap->params.sf_size);
3097 debugfs_create_bool("use_backdoor", S_IWUSR | S_IRUSR,
3098 adap->debugfs_root, &adap->use_bd);
3099 debugfs_create_bool("trace_rss", S_IWUSR | S_IRUSR,
3100 adap->debugfs_root, &adap->trace_rss);