2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
19 #include <linux/iommu.h>
20 #include <linux/bpf.h>
21 #include <linux/bpf_trace.h>
22 #include <linux/filter.h>
26 #include "nicvf_queues.h"
27 #include "thunder_bgx.h"
29 #define DRV_NAME "thunder-nicvf"
30 #define DRV_VERSION "1.0"
32 /* NOTE: Packets bigger than 1530 are split across multiple pages and XDP needs
33 * the buffer to be contiguous. Allow XDP to be set up only if we don't exceed
34 * this value, keeping headroom for the 14 byte Ethernet header and two
35 * VLAN tags (for QinQ)
37 #define MAX_XDP_MTU (1530 - ETH_HLEN - VLAN_HLEN * 2)
39 /* Supported devices */
40 static const struct pci_device_id nicvf_id_table[] = {
41 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
42 PCI_DEVICE_ID_THUNDER_NIC_VF,
44 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
45 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
46 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
48 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
49 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
50 PCI_DEVICE_ID_THUNDER_NIC_VF,
52 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
53 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
54 PCI_DEVICE_ID_THUNDER_NIC_VF,
56 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
57 { 0, } /* end of table */
60 MODULE_AUTHOR("Sunil Goutham");
61 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
62 MODULE_LICENSE("GPL v2");
63 MODULE_VERSION(DRV_VERSION);
64 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
66 static int debug = 0x00;
67 module_param(debug, int, 0644);
68 MODULE_PARM_DESC(debug, "Debug message level bitmap");
70 static int cpi_alg = CPI_ALG_NONE;
71 module_param(cpi_alg, int, S_IRUGO);
72 MODULE_PARM_DESC(cpi_alg,
73 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
75 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
78 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
83 /* The Cavium ThunderX network controller can *only* be found in SoCs
84 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
85 * registers on this platform are implicitly strongly ordered with respect
86 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
87 * with no memory barriers in this driver. The readq()/writeq() functions add
88 * explicit ordering operation which in this case are redundant, and only
92 /* Register read/write APIs */
93 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
95 writeq_relaxed(val, nic->reg_base + offset);
98 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
100 return readq_relaxed(nic->reg_base + offset);
103 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
106 void __iomem *addr = nic->reg_base + offset;
108 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
111 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
113 void __iomem *addr = nic->reg_base + offset;
115 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
118 /* VF -> PF mailbox communication */
119 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
121 u64 *msg = (u64 *)mbx;
123 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
124 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
127 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
129 int timeout = NIC_MBOX_MSG_TIMEOUT;
132 nic->pf_acked = false;
133 nic->pf_nacked = false;
135 nicvf_write_to_mbx(nic, mbx);
137 /* Wait for previous message to be acked, timeout 2sec */
138 while (!nic->pf_acked) {
139 if (nic->pf_nacked) {
140 netdev_err(nic->netdev,
141 "PF NACK to mbox msg 0x%02x from VF%d\n",
142 (mbx->msg.msg & 0xFF), nic->vf_id);
150 netdev_err(nic->netdev,
151 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
152 (mbx->msg.msg & 0xFF), nic->vf_id);
159 /* Checks if VF is able to comminicate with PF
160 * and also gets the VNIC number this VF is associated to.
162 static int nicvf_check_pf_ready(struct nicvf *nic)
164 union nic_mbx mbx = {};
166 mbx.msg.msg = NIC_MBOX_MSG_READY;
167 if (nicvf_send_msg_to_pf(nic, &mbx)) {
168 netdev_err(nic->netdev,
169 "PF didn't respond to READY msg\n");
176 static void nicvf_send_cfg_done(struct nicvf *nic)
178 union nic_mbx mbx = {};
180 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
181 if (nicvf_send_msg_to_pf(nic, &mbx)) {
182 netdev_err(nic->netdev,
183 "PF didn't respond to CFG DONE msg\n");
187 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
190 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
192 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
195 static void nicvf_handle_mbx_intr(struct nicvf *nic)
197 union nic_mbx mbx = {};
202 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
203 mbx_data = (u64 *)&mbx;
205 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
206 *mbx_data = nicvf_reg_read(nic, mbx_addr);
208 mbx_addr += sizeof(u64);
211 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
212 switch (mbx.msg.msg) {
213 case NIC_MBOX_MSG_READY:
214 nic->pf_acked = true;
215 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
216 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
217 nic->node = mbx.nic_cfg.node_id;
218 if (!nic->set_mac_pending)
219 ether_addr_copy(nic->netdev->dev_addr,
220 mbx.nic_cfg.mac_addr);
221 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
222 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
223 nic->link_up = false;
227 case NIC_MBOX_MSG_ACK:
228 nic->pf_acked = true;
230 case NIC_MBOX_MSG_NACK:
231 nic->pf_nacked = true;
233 case NIC_MBOX_MSG_RSS_SIZE:
234 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
235 nic->pf_acked = true;
237 case NIC_MBOX_MSG_BGX_STATS:
238 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
239 nic->pf_acked = true;
241 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
242 nic->pf_acked = true;
243 nic->link_up = mbx.link_status.link_up;
244 nic->duplex = mbx.link_status.duplex;
245 nic->speed = mbx.link_status.speed;
246 nic->mac_type = mbx.link_status.mac_type;
248 netdev_info(nic->netdev, "Link is Up %d Mbps %s duplex\n",
250 nic->duplex == DUPLEX_FULL ?
252 netif_carrier_on(nic->netdev);
253 netif_tx_start_all_queues(nic->netdev);
255 netdev_info(nic->netdev, "Link is Down\n");
256 netif_carrier_off(nic->netdev);
257 netif_tx_stop_all_queues(nic->netdev);
260 case NIC_MBOX_MSG_ALLOC_SQS:
261 nic->sqs_count = mbx.sqs_alloc.qs_count;
262 nic->pf_acked = true;
264 case NIC_MBOX_MSG_SNICVF_PTR:
265 /* Primary VF: make note of secondary VF's pointer
266 * to be used while packet transmission.
268 nic->snicvf[mbx.nicvf.sqs_id] =
269 (struct nicvf *)mbx.nicvf.nicvf;
270 nic->pf_acked = true;
272 case NIC_MBOX_MSG_PNICVF_PTR:
273 /* Secondary VF/Qset: make note of primary VF's pointer
274 * to be used while packet reception, to handover packet
275 * to primary VF's netdev.
277 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
278 nic->pf_acked = true;
280 case NIC_MBOX_MSG_PFC:
281 nic->pfc.autoneg = mbx.pfc.autoneg;
282 nic->pfc.fc_rx = mbx.pfc.fc_rx;
283 nic->pfc.fc_tx = mbx.pfc.fc_tx;
284 nic->pf_acked = true;
287 netdev_err(nic->netdev,
288 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
291 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
294 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
296 union nic_mbx mbx = {};
298 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
299 mbx.mac.vf_id = nic->vf_id;
300 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
302 return nicvf_send_msg_to_pf(nic, &mbx);
305 static void nicvf_config_cpi(struct nicvf *nic)
307 union nic_mbx mbx = {};
309 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
310 mbx.cpi_cfg.vf_id = nic->vf_id;
311 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
312 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
314 nicvf_send_msg_to_pf(nic, &mbx);
317 static void nicvf_get_rss_size(struct nicvf *nic)
319 union nic_mbx mbx = {};
321 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
322 mbx.rss_size.vf_id = nic->vf_id;
323 nicvf_send_msg_to_pf(nic, &mbx);
326 void nicvf_config_rss(struct nicvf *nic)
328 union nic_mbx mbx = {};
329 struct nicvf_rss_info *rss = &nic->rss_info;
330 int ind_tbl_len = rss->rss_size;
333 mbx.rss_cfg.vf_id = nic->vf_id;
334 mbx.rss_cfg.hash_bits = rss->hash_bits;
335 while (ind_tbl_len) {
336 mbx.rss_cfg.tbl_offset = nextq;
337 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
338 RSS_IND_TBL_LEN_PER_MBX_MSG);
339 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
340 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
342 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
343 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
345 nicvf_send_msg_to_pf(nic, &mbx);
347 ind_tbl_len -= mbx.rss_cfg.tbl_len;
351 void nicvf_set_rss_key(struct nicvf *nic)
353 struct nicvf_rss_info *rss = &nic->rss_info;
354 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
357 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
358 nicvf_reg_write(nic, key_addr, rss->key[idx]);
359 key_addr += sizeof(u64);
363 static int nicvf_rss_init(struct nicvf *nic)
365 struct nicvf_rss_info *rss = &nic->rss_info;
368 nicvf_get_rss_size(nic);
370 if (cpi_alg != CPI_ALG_NONE) {
378 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
379 nicvf_set_rss_key(nic);
381 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
382 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
384 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
386 for (idx = 0; idx < rss->rss_size; idx++)
387 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
389 nicvf_config_rss(nic);
393 /* Request PF to allocate additional Qsets */
394 static void nicvf_request_sqs(struct nicvf *nic)
396 union nic_mbx mbx = {};
398 int sqs_count = nic->sqs_count;
399 int rx_queues = 0, tx_queues = 0;
401 /* Only primary VF should request */
402 if (nic->sqs_mode || !nic->sqs_count)
405 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
406 mbx.sqs_alloc.vf_id = nic->vf_id;
407 mbx.sqs_alloc.qs_count = nic->sqs_count;
408 if (nicvf_send_msg_to_pf(nic, &mbx)) {
409 /* No response from PF */
414 /* Return if no Secondary Qsets available */
418 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
419 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
421 tx_queues = nic->tx_queues + nic->xdp_tx_queues;
422 if (tx_queues > MAX_SND_QUEUES_PER_QS)
423 tx_queues = tx_queues - MAX_SND_QUEUES_PER_QS;
425 /* Set no of Rx/Tx queues in each of the SQsets */
426 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
427 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
428 mbx.nicvf.vf_id = nic->vf_id;
429 mbx.nicvf.sqs_id = sqs;
430 nicvf_send_msg_to_pf(nic, &mbx);
432 nic->snicvf[sqs]->sqs_id = sqs;
433 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
434 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
435 rx_queues -= MAX_RCV_QUEUES_PER_QS;
437 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
441 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
442 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
443 tx_queues -= MAX_SND_QUEUES_PER_QS;
445 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
449 nic->snicvf[sqs]->qs->cq_cnt =
450 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
452 /* Initialize secondary Qset's queues and its interrupts */
453 nicvf_open(nic->snicvf[sqs]->netdev);
456 /* Update stack with actual Rx/Tx queue count allocated */
457 if (sqs_count != nic->sqs_count)
458 nicvf_set_real_num_queues(nic->netdev,
459 nic->tx_queues, nic->rx_queues);
462 /* Send this Qset's nicvf pointer to PF.
463 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
464 * so that packets received by these Qsets can use primary VF's netdev
466 static void nicvf_send_vf_struct(struct nicvf *nic)
468 union nic_mbx mbx = {};
470 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
471 mbx.nicvf.sqs_mode = nic->sqs_mode;
472 mbx.nicvf.nicvf = (u64)nic;
473 nicvf_send_msg_to_pf(nic, &mbx);
476 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
478 union nic_mbx mbx = {};
480 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
481 nicvf_send_msg_to_pf(nic, &mbx);
484 int nicvf_set_real_num_queues(struct net_device *netdev,
485 int tx_queues, int rx_queues)
489 err = netif_set_real_num_tx_queues(netdev, tx_queues);
492 "Failed to set no of Tx queues: %d\n", tx_queues);
496 err = netif_set_real_num_rx_queues(netdev, rx_queues);
499 "Failed to set no of Rx queues: %d\n", rx_queues);
503 static int nicvf_init_resources(struct nicvf *nic)
508 nicvf_qset_config(nic, true);
510 /* Initialize queues and HW for data transfer */
511 err = nicvf_config_data_transfer(nic, true);
513 netdev_err(nic->netdev,
514 "Failed to alloc/config VF's QSet resources\n");
521 static inline bool nicvf_xdp_rx(struct nicvf *nic, struct bpf_prog *prog,
522 struct cqe_rx_t *cqe_rx, struct snd_queue *sq,
523 struct sk_buff **skb)
529 u64 dma_addr, cpu_addr;
532 /* Retrieve packet buffer's DMA address and length */
533 len = *((u16 *)((void *)cqe_rx + (3 * sizeof(u64))));
534 dma_addr = *((u64 *)((void *)cqe_rx + (7 * sizeof(u64))));
536 cpu_addr = nicvf_iova_to_phys(nic, dma_addr);
539 cpu_addr = (u64)phys_to_virt(cpu_addr);
540 page = virt_to_page((void *)cpu_addr);
542 xdp.data_hard_start = page_address(page);
543 xdp.data = (void *)cpu_addr;
544 xdp.data_end = xdp.data + len;
545 orig_data = xdp.data;
548 action = bpf_prog_run_xdp(prog, &xdp);
551 /* Check if XDP program has changed headers */
552 if (orig_data != xdp.data) {
553 len = xdp.data_end - xdp.data;
554 offset = orig_data - xdp.data;
560 /* Check if it's a recycled page, if not
561 * unmap the DMA mapping.
563 * Recycled page holds an extra reference.
565 if (page_ref_count(page) == 1) {
566 dma_addr &= PAGE_MASK;
567 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
568 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
570 DMA_ATTR_SKIP_CPU_SYNC);
573 /* Build SKB and pass on packet to network stack */
574 *skb = build_skb(xdp.data,
575 RCV_FRAG_LEN - cqe_rx->align_pad + offset);
582 nicvf_xdp_sq_append_pkt(nic, sq, (u64)xdp.data, dma_addr, len);
585 bpf_warn_invalid_xdp_action(action);
588 trace_xdp_exception(nic->netdev, prog, action);
591 /* Check if it's a recycled page, if not
592 * unmap the DMA mapping.
594 * Recycled page holds an extra reference.
596 if (page_ref_count(page) == 1) {
597 dma_addr &= PAGE_MASK;
598 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
599 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
601 DMA_ATTR_SKIP_CPU_SYNC);
609 static void nicvf_snd_pkt_handler(struct net_device *netdev,
610 struct cqe_send_t *cqe_tx,
611 int budget, int *subdesc_cnt,
612 unsigned int *tx_pkts, unsigned int *tx_bytes)
614 struct sk_buff *skb = NULL;
616 struct nicvf *nic = netdev_priv(netdev);
617 struct snd_queue *sq;
618 struct sq_hdr_subdesc *hdr;
619 struct sq_hdr_subdesc *tso_sqe;
621 sq = &nic->qs->sq[cqe_tx->sq_idx];
623 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
624 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
627 /* Check for errors */
628 if (cqe_tx->send_status)
629 nicvf_check_cqe_tx_errs(nic->pnicvf, cqe_tx);
631 /* Is this a XDP designated Tx queue */
633 page = (struct page *)sq->xdp_page[cqe_tx->sqe_ptr];
634 /* Check if it's recycled page or else unmap DMA mapping */
635 if (page && (page_ref_count(page) == 1))
636 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
639 /* Release page reference for recycling */
642 sq->xdp_page[cqe_tx->sqe_ptr] = (u64)NULL;
643 *subdesc_cnt += hdr->subdesc_cnt + 1;
647 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
649 /* Check for dummy descriptor used for HW TSO offload on 88xx */
650 if (hdr->dont_send) {
651 /* Get actual TSO descriptors and free them */
653 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
654 nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2,
655 tso_sqe->subdesc_cnt);
656 *subdesc_cnt += tso_sqe->subdesc_cnt + 1;
658 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
661 *subdesc_cnt += hdr->subdesc_cnt + 1;
664 *tx_bytes += skb->len;
665 napi_consume_skb(skb, budget);
666 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
668 /* In case of SW TSO on 88xx, only last segment will have
669 * a SKB attached, so just free SQEs here.
672 *subdesc_cnt += hdr->subdesc_cnt + 1;
676 static inline void nicvf_set_rxhash(struct net_device *netdev,
677 struct cqe_rx_t *cqe_rx,
683 if (!(netdev->features & NETIF_F_RXHASH))
686 switch (cqe_rx->rss_alg) {
689 hash_type = PKT_HASH_TYPE_L4;
690 hash = cqe_rx->rss_tag;
693 hash_type = PKT_HASH_TYPE_L3;
694 hash = cqe_rx->rss_tag;
697 hash_type = PKT_HASH_TYPE_NONE;
701 skb_set_hash(skb, hash, hash_type);
704 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
705 struct napi_struct *napi,
706 struct cqe_rx_t *cqe_rx, struct snd_queue *sq)
708 struct sk_buff *skb = NULL;
709 struct nicvf *nic = netdev_priv(netdev);
710 struct nicvf *snic = nic;
714 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
717 /* Use primary VF's 'nicvf' struct */
719 netdev = nic->netdev;
722 /* Check for errors */
723 if (cqe_rx->err_level || cqe_rx->err_opcode) {
724 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
725 if (err && !cqe_rx->rb_cnt)
729 /* For XDP, ignore pkts spanning multiple pages */
730 if (nic->xdp_prog && (cqe_rx->rb_cnt == 1)) {
731 /* Packet consumed by XDP */
732 if (nicvf_xdp_rx(snic, nic->xdp_prog, cqe_rx, sq, &skb))
735 skb = nicvf_get_rcv_skb(snic, cqe_rx,
736 nic->xdp_prog ? true : false);
742 if (netif_msg_pktdata(nic)) {
743 netdev_info(nic->netdev, "skb 0x%p, len=%d\n", skb, skb->len);
744 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
745 skb->data, skb->len, true);
748 /* If error packet, drop it here */
750 dev_kfree_skb_any(skb);
754 nicvf_set_rxhash(netdev, cqe_rx, skb);
756 skb_record_rx_queue(skb, rq_idx);
757 if (netdev->hw_features & NETIF_F_RXCSUM) {
758 /* HW by default verifies TCP/UDP/SCTP checksums */
759 skb->ip_summed = CHECKSUM_UNNECESSARY;
761 skb_checksum_none_assert(skb);
764 skb->protocol = eth_type_trans(skb, netdev);
766 /* Check for stripped VLAN */
767 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
768 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
769 ntohs((__force __be16)cqe_rx->vlan_tci));
771 if (napi && (netdev->features & NETIF_F_GRO))
772 napi_gro_receive(napi, skb);
774 netif_receive_skb(skb);
777 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
778 struct napi_struct *napi, int budget)
780 int processed_cqe, work_done = 0, tx_done = 0;
781 int cqe_count, cqe_head;
783 struct nicvf *nic = netdev_priv(netdev);
784 struct queue_set *qs = nic->qs;
785 struct cmp_queue *cq = &qs->cq[cq_idx];
786 struct cqe_rx_t *cq_desc;
787 struct netdev_queue *txq;
788 struct snd_queue *sq = &qs->sq[cq_idx];
789 unsigned int tx_pkts = 0, tx_bytes = 0, txq_idx;
791 spin_lock_bh(&cq->lock);
794 /* Get no of valid CQ entries to process */
795 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
796 cqe_count &= CQ_CQE_COUNT;
800 /* Get head of the valid CQ entries */
801 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
804 while (processed_cqe < cqe_count) {
805 /* Get the CQ descriptor */
806 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
808 cqe_head &= (cq->dmem.q_len - 1);
809 /* Initiate prefetch for next descriptor */
810 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
812 if ((work_done >= budget) && napi &&
813 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
817 switch (cq_desc->cqe_type) {
819 nicvf_rcv_pkt_handler(netdev, napi, cq_desc, sq);
823 nicvf_snd_pkt_handler(netdev, (void *)cq_desc,
824 budget, &subdesc_cnt,
825 &tx_pkts, &tx_bytes);
828 case CQE_TYPE_INVALID:
829 case CQE_TYPE_RX_SPLIT:
830 case CQE_TYPE_RX_TCP:
831 case CQE_TYPE_SEND_PTP:
838 /* Ring doorbell to inform H/W to reuse processed CQEs */
839 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
840 cq_idx, processed_cqe);
842 if ((work_done < budget) && napi)
846 /* Update SQ's descriptor free count */
848 nicvf_put_sq_desc(sq, subdesc_cnt);
850 txq_idx = nicvf_netdev_qidx(nic, cq_idx);
851 /* Handle XDP TX queues */
852 if (nic->pnicvf->xdp_prog) {
853 if (txq_idx < nic->pnicvf->xdp_tx_queues) {
854 nicvf_xdp_sq_doorbell(nic, sq, cq_idx);
858 txq_idx -= nic->pnicvf->xdp_tx_queues;
861 /* Wakeup TXQ if its stopped earlier due to SQ full */
863 (atomic_read(&sq->free_cnt) >= MIN_SQ_DESC_PER_PKT_XMIT)) {
864 netdev = nic->pnicvf->netdev;
865 txq = netdev_get_tx_queue(netdev, txq_idx);
867 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
869 /* To read updated queue and carrier status */
871 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
872 netif_tx_wake_queue(txq);
874 this_cpu_inc(nic->drv_stats->txq_wake);
875 netif_warn(nic, tx_err, netdev,
876 "Transmit queue wakeup SQ%d\n", txq_idx);
881 spin_unlock_bh(&cq->lock);
885 static int nicvf_poll(struct napi_struct *napi, int budget)
889 struct net_device *netdev = napi->dev;
890 struct nicvf *nic = netdev_priv(netdev);
891 struct nicvf_cq_poll *cq;
893 cq = container_of(napi, struct nicvf_cq_poll, napi);
894 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
896 if (work_done < budget) {
897 /* Slow packet rate, exit polling */
898 napi_complete_done(napi, work_done);
899 /* Re-enable interrupts */
900 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
902 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
903 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
904 cq->cq_idx, cq_head);
905 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
910 /* Qset error interrupt handler
912 * As of now only CQ errors are handled
914 static void nicvf_handle_qs_err(unsigned long data)
916 struct nicvf *nic = (struct nicvf *)data;
917 struct queue_set *qs = nic->qs;
921 netif_tx_disable(nic->netdev);
923 /* Check if it is CQ err */
924 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
925 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
927 if (!(status & CQ_ERR_MASK))
929 /* Process already queued CQEs and reconfig CQ */
930 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
931 nicvf_sq_disable(nic, qidx);
932 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
933 nicvf_cmp_queue_config(nic, qs, qidx, true);
934 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
935 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
937 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
940 netif_tx_start_all_queues(nic->netdev);
941 /* Re-enable Qset error interrupt */
942 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
945 static void nicvf_dump_intr_status(struct nicvf *nic)
947 netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n",
948 nicvf_reg_read(nic, NIC_VF_INT));
951 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
953 struct nicvf *nic = (struct nicvf *)nicvf_irq;
956 nicvf_dump_intr_status(nic);
958 intr = nicvf_reg_read(nic, NIC_VF_INT);
959 /* Check for spurious interrupt */
960 if (!(intr & NICVF_INTR_MBOX_MASK))
963 nicvf_handle_mbx_intr(nic);
968 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
970 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
971 struct nicvf *nic = cq_poll->nicvf;
972 int qidx = cq_poll->cq_idx;
974 nicvf_dump_intr_status(nic);
976 /* Disable interrupts */
977 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
980 napi_schedule_irqoff(&cq_poll->napi);
982 /* Clear interrupt */
983 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
988 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
990 struct nicvf *nic = (struct nicvf *)nicvf_irq;
994 nicvf_dump_intr_status(nic);
996 /* Disable RBDR interrupt and schedule softirq */
997 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
998 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
1000 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1001 tasklet_hi_schedule(&nic->rbdr_task);
1002 /* Clear interrupt */
1003 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1009 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
1011 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1013 nicvf_dump_intr_status(nic);
1015 /* Disable Qset err interrupt and schedule softirq */
1016 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1017 tasklet_hi_schedule(&nic->qs_err_task);
1018 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1023 static void nicvf_set_irq_affinity(struct nicvf *nic)
1027 for (vec = 0; vec < nic->num_vec; vec++) {
1028 if (!nic->irq_allocated[vec])
1031 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
1034 if (vec < NICVF_INTR_ID_SQ)
1035 /* Leave CPU0 for RBDR and other interrupts */
1036 cpu = nicvf_netdev_qidx(nic, vec) + 1;
1040 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
1041 nic->affinity_mask[vec]);
1042 irq_set_affinity_hint(pci_irq_vector(nic->pdev, vec),
1043 nic->affinity_mask[vec]);
1047 static int nicvf_register_interrupts(struct nicvf *nic)
1051 for_each_cq_irq(irq)
1052 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
1053 nic->pnicvf->netdev->name,
1054 nicvf_netdev_qidx(nic, irq));
1056 for_each_sq_irq(irq)
1057 sprintf(nic->irq_name[irq], "%s-sq-%d",
1058 nic->pnicvf->netdev->name,
1059 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
1061 for_each_rbdr_irq(irq)
1062 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
1063 nic->pnicvf->netdev->name,
1064 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1066 /* Register CQ interrupts */
1067 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
1068 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1070 0, nic->irq_name[irq], nic->napi[irq]);
1073 nic->irq_allocated[irq] = true;
1076 /* Register RBDR interrupt */
1077 for (irq = NICVF_INTR_ID_RBDR;
1078 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
1079 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1080 nicvf_rbdr_intr_handler,
1081 0, nic->irq_name[irq], nic);
1084 nic->irq_allocated[irq] = true;
1087 /* Register QS error interrupt */
1088 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
1089 nic->pnicvf->netdev->name,
1090 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1091 irq = NICVF_INTR_ID_QS_ERR;
1092 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1093 nicvf_qs_err_intr_handler,
1094 0, nic->irq_name[irq], nic);
1098 nic->irq_allocated[irq] = true;
1100 /* Set IRQ affinities */
1101 nicvf_set_irq_affinity(nic);
1105 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
1110 static void nicvf_unregister_interrupts(struct nicvf *nic)
1112 struct pci_dev *pdev = nic->pdev;
1115 /* Free registered interrupts */
1116 for (irq = 0; irq < nic->num_vec; irq++) {
1117 if (!nic->irq_allocated[irq])
1120 irq_set_affinity_hint(pci_irq_vector(pdev, irq), NULL);
1121 free_cpumask_var(nic->affinity_mask[irq]);
1123 if (irq < NICVF_INTR_ID_SQ)
1124 free_irq(pci_irq_vector(pdev, irq), nic->napi[irq]);
1126 free_irq(pci_irq_vector(pdev, irq), nic);
1128 nic->irq_allocated[irq] = false;
1132 pci_free_irq_vectors(pdev);
1136 /* Initialize MSIX vectors and register MISC interrupt.
1137 * Send READY message to PF to check if its alive
1139 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1142 int irq = NICVF_INTR_ID_MISC;
1144 /* Return if mailbox interrupt is already registered */
1145 if (nic->pdev->msix_enabled)
1149 nic->num_vec = pci_msix_vec_count(nic->pdev);
1150 ret = pci_alloc_irq_vectors(nic->pdev, nic->num_vec, nic->num_vec,
1153 netdev_err(nic->netdev,
1154 "Req for #%d msix vectors failed\n", nic->num_vec);
1158 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1159 /* Register Misc interrupt */
1160 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1161 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1165 nic->irq_allocated[irq] = true;
1167 /* Enable mailbox interrupt */
1168 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1170 /* Check if VF is able to communicate with PF */
1171 if (!nicvf_check_pf_ready(nic)) {
1172 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1173 nicvf_unregister_interrupts(nic);
1180 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1182 struct nicvf *nic = netdev_priv(netdev);
1183 int qid = skb_get_queue_mapping(skb);
1184 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1186 struct snd_queue *sq;
1189 /* Check for minimum packet length */
1190 if (skb->len <= ETH_HLEN) {
1192 return NETDEV_TX_OK;
1195 /* In XDP case, initial HW tx queues are used for XDP,
1196 * but stack's queue mapping starts at '0', so skip the
1197 * Tx queues attached to Rx queues for XDP.
1200 qid += nic->xdp_tx_queues;
1203 /* Get secondary Qset's SQ structure */
1204 if (qid >= MAX_SND_QUEUES_PER_QS) {
1205 tmp = qid / MAX_SND_QUEUES_PER_QS;
1206 snic = (struct nicvf *)nic->snicvf[tmp - 1];
1208 netdev_warn(nic->netdev,
1209 "Secondary Qset#%d's ptr not initialized\n",
1212 return NETDEV_TX_OK;
1214 qid = qid % MAX_SND_QUEUES_PER_QS;
1217 sq = &snic->qs->sq[qid];
1218 if (!netif_tx_queue_stopped(txq) &&
1219 !nicvf_sq_append_skb(snic, sq, skb, qid)) {
1220 netif_tx_stop_queue(txq);
1222 /* Barrier, so that stop_queue visible to other cpus */
1225 /* Check again, incase another cpu freed descriptors */
1226 if (atomic_read(&sq->free_cnt) > MIN_SQ_DESC_PER_PKT_XMIT) {
1227 netif_tx_wake_queue(txq);
1229 this_cpu_inc(nic->drv_stats->txq_stop);
1230 netif_warn(nic, tx_err, netdev,
1231 "Transmit ring full, stopping SQ%d\n", qid);
1233 return NETDEV_TX_BUSY;
1236 return NETDEV_TX_OK;
1239 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1241 struct nicvf_cq_poll *cq_poll;
1244 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1245 cq_poll = nic->napi[qidx];
1248 nic->napi[qidx] = NULL;
1253 int nicvf_stop(struct net_device *netdev)
1256 struct nicvf *nic = netdev_priv(netdev);
1257 struct queue_set *qs = nic->qs;
1258 struct nicvf_cq_poll *cq_poll = NULL;
1259 union nic_mbx mbx = {};
1261 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1262 nicvf_send_msg_to_pf(nic, &mbx);
1264 netif_carrier_off(netdev);
1265 netif_tx_stop_all_queues(nic->netdev);
1266 nic->link_up = false;
1268 /* Teardown secondary qsets first */
1269 if (!nic->sqs_mode) {
1270 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1271 if (!nic->snicvf[qidx])
1273 nicvf_stop(nic->snicvf[qidx]->netdev);
1274 nic->snicvf[qidx] = NULL;
1278 /* Disable RBDR & QS error interrupts */
1279 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1280 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1281 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1283 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1284 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1286 /* Wait for pending IRQ handlers to finish */
1287 for (irq = 0; irq < nic->num_vec; irq++)
1288 synchronize_irq(pci_irq_vector(nic->pdev, irq));
1290 tasklet_kill(&nic->rbdr_task);
1291 tasklet_kill(&nic->qs_err_task);
1292 if (nic->rb_work_scheduled)
1293 cancel_delayed_work_sync(&nic->rbdr_work);
1295 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1296 cq_poll = nic->napi[qidx];
1299 napi_synchronize(&cq_poll->napi);
1300 /* CQ intr is enabled while napi_complete,
1303 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1304 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1305 napi_disable(&cq_poll->napi);
1306 netif_napi_del(&cq_poll->napi);
1309 netif_tx_disable(netdev);
1311 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1312 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1314 /* Free resources */
1315 nicvf_config_data_transfer(nic, false);
1317 /* Disable HW Qset */
1318 nicvf_qset_config(nic, false);
1320 /* disable mailbox interrupt */
1321 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1323 nicvf_unregister_interrupts(nic);
1325 nicvf_free_cq_poll(nic);
1327 /* Clear multiqset info */
1333 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1335 union nic_mbx mbx = {};
1337 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1338 mbx.frs.max_frs = mtu;
1339 mbx.frs.vf_id = nic->vf_id;
1341 return nicvf_send_msg_to_pf(nic, &mbx);
1344 int nicvf_open(struct net_device *netdev)
1347 struct nicvf *nic = netdev_priv(netdev);
1348 struct queue_set *qs = nic->qs;
1349 struct nicvf_cq_poll *cq_poll = NULL;
1351 netif_carrier_off(netdev);
1353 err = nicvf_register_misc_interrupt(nic);
1357 /* Register NAPI handler for processing CQEs */
1358 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1359 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1364 cq_poll->cq_idx = qidx;
1365 cq_poll->nicvf = nic;
1366 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1368 napi_enable(&cq_poll->napi);
1369 nic->napi[qidx] = cq_poll;
1372 /* Check if we got MAC address from PF or else generate a radom MAC */
1373 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1374 eth_hw_addr_random(netdev);
1375 nicvf_hw_set_mac_addr(nic, netdev);
1378 if (nic->set_mac_pending) {
1379 nic->set_mac_pending = false;
1380 nicvf_hw_set_mac_addr(nic, netdev);
1383 /* Init tasklet for handling Qset err interrupt */
1384 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1385 (unsigned long)nic);
1387 /* Init RBDR tasklet which will refill RBDR */
1388 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1389 (unsigned long)nic);
1390 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1392 /* Configure CPI alorithm */
1393 nic->cpi_alg = cpi_alg;
1395 nicvf_config_cpi(nic);
1397 nicvf_request_sqs(nic);
1399 nicvf_get_primary_vf_struct(nic);
1401 /* Configure receive side scaling and MTU */
1402 if (!nic->sqs_mode) {
1403 nicvf_rss_init(nic);
1404 err = nicvf_update_hw_max_frs(nic, netdev->mtu);
1408 /* Clear percpu stats */
1409 for_each_possible_cpu(cpu)
1410 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1411 sizeof(struct nicvf_drv_stats));
1414 err = nicvf_register_interrupts(nic);
1418 /* Initialize the queues */
1419 err = nicvf_init_resources(nic);
1423 /* Make sure queue initialization is written */
1426 nicvf_reg_write(nic, NIC_VF_INT, -1);
1427 /* Enable Qset err interrupt */
1428 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1430 /* Enable completion queue interrupt */
1431 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1432 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1434 /* Enable RBDR threshold interrupt */
1435 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1436 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1438 /* Send VF config done msg to PF */
1439 nicvf_send_cfg_done(nic);
1443 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1444 nicvf_unregister_interrupts(nic);
1445 tasklet_kill(&nic->qs_err_task);
1446 tasklet_kill(&nic->rbdr_task);
1448 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1449 cq_poll = nic->napi[qidx];
1452 napi_disable(&cq_poll->napi);
1453 netif_napi_del(&cq_poll->napi);
1455 nicvf_free_cq_poll(nic);
1459 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1461 struct nicvf *nic = netdev_priv(netdev);
1462 int orig_mtu = netdev->mtu;
1464 /* For now just support only the usual MTU sized frames,
1465 * plus some headroom for VLAN, QinQ.
1467 if (nic->xdp_prog && new_mtu > MAX_XDP_MTU) {
1468 netdev_warn(netdev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1473 netdev->mtu = new_mtu;
1475 if (!netif_running(netdev))
1478 if (nicvf_update_hw_max_frs(nic, new_mtu)) {
1479 netdev->mtu = orig_mtu;
1486 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1488 struct sockaddr *addr = p;
1489 struct nicvf *nic = netdev_priv(netdev);
1491 if (!is_valid_ether_addr(addr->sa_data))
1492 return -EADDRNOTAVAIL;
1494 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1496 if (nic->pdev->msix_enabled) {
1497 if (nicvf_hw_set_mac_addr(nic, netdev))
1500 nic->set_mac_pending = true;
1506 void nicvf_update_lmac_stats(struct nicvf *nic)
1509 union nic_mbx mbx = {};
1511 if (!netif_running(nic->netdev))
1514 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1515 mbx.bgx_stats.vf_id = nic->vf_id;
1517 mbx.bgx_stats.rx = 1;
1518 while (stat < BGX_RX_STATS_COUNT) {
1519 mbx.bgx_stats.idx = stat;
1520 if (nicvf_send_msg_to_pf(nic, &mbx))
1528 mbx.bgx_stats.rx = 0;
1529 while (stat < BGX_TX_STATS_COUNT) {
1530 mbx.bgx_stats.idx = stat;
1531 if (nicvf_send_msg_to_pf(nic, &mbx))
1537 void nicvf_update_stats(struct nicvf *nic)
1541 struct nicvf_hw_stats *stats = &nic->hw_stats;
1542 struct nicvf_drv_stats *drv_stats;
1543 struct queue_set *qs = nic->qs;
1545 #define GET_RX_STATS(reg) \
1546 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1547 #define GET_TX_STATS(reg) \
1548 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1550 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1551 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1552 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1553 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1554 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1555 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1556 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1557 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1558 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1559 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1560 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1561 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1562 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1563 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1565 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1566 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1567 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1568 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1569 stats->tx_drops = GET_TX_STATS(TX_DROP);
1571 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1572 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1573 * pointed by dummy SQE and results in tx_drops counter being
1574 * incremented. Subtracting it from tx_tso counter will give
1575 * exact tx_drops counter.
1577 if (nic->t88 && nic->hw_tso) {
1578 for_each_possible_cpu(cpu) {
1579 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1580 tmp_stats += drv_stats->tx_tso;
1582 stats->tx_drops = tmp_stats - stats->tx_drops;
1584 stats->tx_frames = stats->tx_ucast_frames +
1585 stats->tx_bcast_frames +
1586 stats->tx_mcast_frames;
1587 stats->rx_frames = stats->rx_ucast_frames +
1588 stats->rx_bcast_frames +
1589 stats->rx_mcast_frames;
1590 stats->rx_drops = stats->rx_drop_red +
1591 stats->rx_drop_overrun;
1593 /* Update RQ and SQ stats */
1594 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1595 nicvf_update_rq_stats(nic, qidx);
1596 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1597 nicvf_update_sq_stats(nic, qidx);
1600 static void nicvf_get_stats64(struct net_device *netdev,
1601 struct rtnl_link_stats64 *stats)
1603 struct nicvf *nic = netdev_priv(netdev);
1604 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1606 nicvf_update_stats(nic);
1608 stats->rx_bytes = hw_stats->rx_bytes;
1609 stats->rx_packets = hw_stats->rx_frames;
1610 stats->rx_dropped = hw_stats->rx_drops;
1611 stats->multicast = hw_stats->rx_mcast_frames;
1613 stats->tx_bytes = hw_stats->tx_bytes;
1614 stats->tx_packets = hw_stats->tx_frames;
1615 stats->tx_dropped = hw_stats->tx_drops;
1619 static void nicvf_tx_timeout(struct net_device *dev)
1621 struct nicvf *nic = netdev_priv(dev);
1623 netif_warn(nic, tx_err, dev, "Transmit timed out, resetting\n");
1625 this_cpu_inc(nic->drv_stats->tx_timeout);
1626 schedule_work(&nic->reset_task);
1629 static void nicvf_reset_task(struct work_struct *work)
1633 nic = container_of(work, struct nicvf, reset_task);
1635 if (!netif_running(nic->netdev))
1638 nicvf_stop(nic->netdev);
1639 nicvf_open(nic->netdev);
1640 netif_trans_update(nic->netdev);
1643 static int nicvf_config_loopback(struct nicvf *nic,
1644 netdev_features_t features)
1646 union nic_mbx mbx = {};
1648 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1649 mbx.lbk.vf_id = nic->vf_id;
1650 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1652 return nicvf_send_msg_to_pf(nic, &mbx);
1655 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1656 netdev_features_t features)
1658 struct nicvf *nic = netdev_priv(netdev);
1660 if ((features & NETIF_F_LOOPBACK) &&
1661 netif_running(netdev) && !nic->loopback_supported)
1662 features &= ~NETIF_F_LOOPBACK;
1667 static int nicvf_set_features(struct net_device *netdev,
1668 netdev_features_t features)
1670 struct nicvf *nic = netdev_priv(netdev);
1671 netdev_features_t changed = features ^ netdev->features;
1673 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1674 nicvf_config_vlan_stripping(nic, features);
1676 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1677 return nicvf_config_loopback(nic, features);
1682 static void nicvf_set_xdp_queues(struct nicvf *nic, bool bpf_attached)
1684 u8 cq_count, txq_count;
1686 /* Set XDP Tx queue count same as Rx queue count */
1688 nic->xdp_tx_queues = 0;
1690 nic->xdp_tx_queues = nic->rx_queues;
1692 /* If queue count > MAX_CMP_QUEUES_PER_QS, then additional qsets
1693 * needs to be allocated, check how many.
1695 txq_count = nic->xdp_tx_queues + nic->tx_queues;
1696 cq_count = max(nic->rx_queues, txq_count);
1697 if (cq_count > MAX_CMP_QUEUES_PER_QS) {
1698 nic->sqs_count = roundup(cq_count, MAX_CMP_QUEUES_PER_QS);
1699 nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1;
1704 /* Set primary Qset's resources */
1705 nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS);
1706 nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS);
1707 nic->qs->cq_cnt = max_t(u8, nic->qs->rq_cnt, nic->qs->sq_cnt);
1710 nicvf_set_real_num_queues(nic->netdev, nic->tx_queues, nic->rx_queues);
1713 static int nicvf_xdp_setup(struct nicvf *nic, struct bpf_prog *prog)
1715 struct net_device *dev = nic->netdev;
1716 bool if_up = netif_running(nic->netdev);
1717 struct bpf_prog *old_prog;
1718 bool bpf_attached = false;
1721 /* For now just support only the usual MTU sized frames,
1722 * plus some headroom for VLAN, QinQ.
1724 if (prog && dev->mtu > MAX_XDP_MTU) {
1725 netdev_warn(dev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1730 /* ALL SQs attached to CQs i.e same as RQs, are treated as
1731 * XDP Tx queues and more Tx queues are allocated for
1732 * network stack to send pkts out.
1734 * No of Tx queues are either same as Rx queues or whatever
1735 * is left in max no of queues possible.
1737 if ((nic->rx_queues + nic->tx_queues) > nic->max_queues) {
1739 "Failed to attach BPF prog, RXQs + TXQs > Max %d\n",
1745 nicvf_stop(nic->netdev);
1747 old_prog = xchg(&nic->xdp_prog, prog);
1748 /* Detach old prog, if any */
1750 bpf_prog_put(old_prog);
1752 if (nic->xdp_prog) {
1753 /* Attach BPF program */
1754 nic->xdp_prog = bpf_prog_add(nic->xdp_prog, nic->rx_queues - 1);
1755 if (!IS_ERR(nic->xdp_prog)) {
1756 bpf_attached = true;
1758 ret = PTR_ERR(nic->xdp_prog);
1759 nic->xdp_prog = NULL;
1763 /* Calculate Tx queues needed for XDP and network stack */
1764 nicvf_set_xdp_queues(nic, bpf_attached);
1767 /* Reinitialize interface, clean slate */
1768 nicvf_open(nic->netdev);
1769 netif_trans_update(nic->netdev);
1775 static int nicvf_xdp(struct net_device *netdev, struct netdev_xdp *xdp)
1777 struct nicvf *nic = netdev_priv(netdev);
1779 /* To avoid checks while retrieving buffer address from CQE_RX,
1780 * do not support XDP for T88 pass1.x silicons which are anyway
1781 * not in use widely.
1783 if (pass1_silicon(nic->pdev))
1786 switch (xdp->command) {
1787 case XDP_SETUP_PROG:
1788 return nicvf_xdp_setup(nic, xdp->prog);
1789 case XDP_QUERY_PROG:
1790 xdp->prog_attached = !!nic->xdp_prog;
1791 xdp->prog_id = nic->xdp_prog ? nic->xdp_prog->aux->id : 0;
1798 static const struct net_device_ops nicvf_netdev_ops = {
1799 .ndo_open = nicvf_open,
1800 .ndo_stop = nicvf_stop,
1801 .ndo_start_xmit = nicvf_xmit,
1802 .ndo_change_mtu = nicvf_change_mtu,
1803 .ndo_set_mac_address = nicvf_set_mac_address,
1804 .ndo_get_stats64 = nicvf_get_stats64,
1805 .ndo_tx_timeout = nicvf_tx_timeout,
1806 .ndo_fix_features = nicvf_fix_features,
1807 .ndo_set_features = nicvf_set_features,
1808 .ndo_xdp = nicvf_xdp,
1811 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1813 struct device *dev = &pdev->dev;
1814 struct net_device *netdev;
1819 err = pci_enable_device(pdev);
1821 dev_err(dev, "Failed to enable PCI device\n");
1825 err = pci_request_regions(pdev, DRV_NAME);
1827 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1828 goto err_disable_device;
1831 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1833 dev_err(dev, "Unable to get usable DMA configuration\n");
1834 goto err_release_regions;
1837 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1839 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1840 goto err_release_regions;
1843 qcount = netif_get_num_default_rss_queues();
1845 /* Restrict multiqset support only for host bound VFs */
1846 if (pdev->is_virtfn) {
1847 /* Set max number of queues per VF */
1848 qcount = min_t(int, num_online_cpus(),
1849 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1852 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1855 goto err_release_regions;
1858 pci_set_drvdata(pdev, netdev);
1860 SET_NETDEV_DEV(netdev, &pdev->dev);
1862 nic = netdev_priv(netdev);
1863 nic->netdev = netdev;
1866 nic->max_queues = qcount;
1867 /* If no of CPUs are too low, there won't be any queues left
1868 * for XDP_TX, hence double it.
1871 nic->max_queues *= 2;
1873 /* MAP VF's configuration registers */
1874 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1875 if (!nic->reg_base) {
1876 dev_err(dev, "Cannot map config register space, aborting\n");
1878 goto err_free_netdev;
1881 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
1882 if (!nic->drv_stats) {
1884 goto err_free_netdev;
1887 err = nicvf_set_qset_resources(nic);
1889 goto err_free_netdev;
1891 /* Check if PF is alive and get MAC address for this VF */
1892 err = nicvf_register_misc_interrupt(nic);
1894 goto err_free_netdev;
1896 nicvf_send_vf_struct(nic);
1898 if (!pass1_silicon(nic->pdev))
1901 /* Get iommu domain for iova to physical addr conversion */
1902 nic->iommu_domain = iommu_get_domain_for_dev(dev);
1904 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
1905 if (sdevid == 0xA134)
1908 /* Check if this VF is in QS only mode */
1912 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1914 goto err_unregister_interrupts;
1916 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_SG |
1917 NETIF_F_TSO | NETIF_F_GRO | NETIF_F_TSO6 |
1918 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1919 NETIF_F_HW_VLAN_CTAG_RX);
1921 netdev->hw_features |= NETIF_F_RXHASH;
1923 netdev->features |= netdev->hw_features;
1924 netdev->hw_features |= NETIF_F_LOOPBACK;
1926 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
1927 NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
1929 netdev->netdev_ops = &nicvf_netdev_ops;
1930 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1932 /* MTU range: 64 - 9200 */
1933 netdev->min_mtu = NIC_HW_MIN_FRS;
1934 netdev->max_mtu = NIC_HW_MAX_FRS;
1936 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1938 err = register_netdev(netdev);
1940 dev_err(dev, "Failed to register netdevice\n");
1941 goto err_unregister_interrupts;
1944 nic->msg_enable = debug;
1946 nicvf_set_ethtool_ops(netdev);
1950 err_unregister_interrupts:
1951 nicvf_unregister_interrupts(nic);
1953 pci_set_drvdata(pdev, NULL);
1955 free_percpu(nic->drv_stats);
1956 free_netdev(netdev);
1957 err_release_regions:
1958 pci_release_regions(pdev);
1960 pci_disable_device(pdev);
1964 static void nicvf_remove(struct pci_dev *pdev)
1966 struct net_device *netdev = pci_get_drvdata(pdev);
1968 struct net_device *pnetdev;
1973 nic = netdev_priv(netdev);
1974 pnetdev = nic->pnicvf->netdev;
1976 /* Check if this Qset is assigned to different VF.
1977 * If yes, clean primary and all secondary Qsets.
1979 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1980 unregister_netdev(pnetdev);
1981 nicvf_unregister_interrupts(nic);
1982 pci_set_drvdata(pdev, NULL);
1984 free_percpu(nic->drv_stats);
1985 free_netdev(netdev);
1986 pci_release_regions(pdev);
1987 pci_disable_device(pdev);
1990 static void nicvf_shutdown(struct pci_dev *pdev)
1995 static struct pci_driver nicvf_driver = {
1997 .id_table = nicvf_id_table,
1998 .probe = nicvf_probe,
1999 .remove = nicvf_remove,
2000 .shutdown = nicvf_shutdown,
2003 static int __init nicvf_init_module(void)
2005 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
2007 return pci_register_driver(&nicvf_driver);
2010 static void __exit nicvf_cleanup_module(void)
2012 pci_unregister_driver(&nicvf_driver);
2015 module_init(nicvf_init_module);
2016 module_exit(nicvf_cleanup_module);