2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
22 #include "nicvf_queues.h"
23 #include "thunder_bgx.h"
25 #define DRV_NAME "thunder-nicvf"
26 #define DRV_VERSION "1.0"
28 /* Supported devices */
29 static const struct pci_device_id nicvf_id_table[] = {
30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVICE_ID_THUNDER_NIC_VF,
33 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
34 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
35 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
37 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
38 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
39 PCI_DEVICE_ID_THUNDER_NIC_VF,
41 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
42 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
43 PCI_DEVICE_ID_THUNDER_NIC_VF,
45 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
46 { 0, } /* end of table */
49 MODULE_AUTHOR("Sunil Goutham");
50 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
51 MODULE_LICENSE("GPL v2");
52 MODULE_VERSION(DRV_VERSION);
53 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
55 static int debug = 0x00;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug, "Debug message level bitmap");
59 static int cpi_alg = CPI_ALG_NONE;
60 module_param(cpi_alg, int, S_IRUGO);
61 MODULE_PARM_DESC(cpi_alg,
62 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
64 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
67 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
72 /* The Cavium ThunderX network controller can *only* be found in SoCs
73 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
74 * registers on this platform are implicitly strongly ordered with respect
75 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
76 * with no memory barriers in this driver. The readq()/writeq() functions add
77 * explicit ordering operation which in this case are redundant, and only
81 /* Register read/write APIs */
82 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
84 writeq_relaxed(val, nic->reg_base + offset);
87 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
89 return readq_relaxed(nic->reg_base + offset);
92 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
95 void __iomem *addr = nic->reg_base + offset;
97 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
100 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
102 void __iomem *addr = nic->reg_base + offset;
104 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
107 /* VF -> PF mailbox communication */
108 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
110 u64 *msg = (u64 *)mbx;
112 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
113 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
116 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
118 int timeout = NIC_MBOX_MSG_TIMEOUT;
121 nic->pf_acked = false;
122 nic->pf_nacked = false;
124 nicvf_write_to_mbx(nic, mbx);
126 /* Wait for previous message to be acked, timeout 2sec */
127 while (!nic->pf_acked) {
128 if (nic->pf_nacked) {
129 netdev_err(nic->netdev,
130 "PF NACK to mbox msg 0x%02x from VF%d\n",
131 (mbx->msg.msg & 0xFF), nic->vf_id);
139 netdev_err(nic->netdev,
140 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
141 (mbx->msg.msg & 0xFF), nic->vf_id);
148 /* Checks if VF is able to comminicate with PF
149 * and also gets the VNIC number this VF is associated to.
151 static int nicvf_check_pf_ready(struct nicvf *nic)
153 union nic_mbx mbx = {};
155 mbx.msg.msg = NIC_MBOX_MSG_READY;
156 if (nicvf_send_msg_to_pf(nic, &mbx)) {
157 netdev_err(nic->netdev,
158 "PF didn't respond to READY msg\n");
165 static void nicvf_send_cfg_done(struct nicvf *nic)
167 union nic_mbx mbx = {};
169 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
170 if (nicvf_send_msg_to_pf(nic, &mbx)) {
171 netdev_err(nic->netdev,
172 "PF didn't respond to CFG DONE msg\n");
176 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
179 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
181 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
184 static void nicvf_handle_mbx_intr(struct nicvf *nic)
186 union nic_mbx mbx = {};
191 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
192 mbx_data = (u64 *)&mbx;
194 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
195 *mbx_data = nicvf_reg_read(nic, mbx_addr);
197 mbx_addr += sizeof(u64);
200 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
201 switch (mbx.msg.msg) {
202 case NIC_MBOX_MSG_READY:
203 nic->pf_acked = true;
204 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
205 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
206 nic->node = mbx.nic_cfg.node_id;
207 if (!nic->set_mac_pending)
208 ether_addr_copy(nic->netdev->dev_addr,
209 mbx.nic_cfg.mac_addr);
210 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
211 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
212 nic->link_up = false;
216 case NIC_MBOX_MSG_ACK:
217 nic->pf_acked = true;
219 case NIC_MBOX_MSG_NACK:
220 nic->pf_nacked = true;
222 case NIC_MBOX_MSG_RSS_SIZE:
223 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
224 nic->pf_acked = true;
226 case NIC_MBOX_MSG_BGX_STATS:
227 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
228 nic->pf_acked = true;
230 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
231 nic->pf_acked = true;
232 nic->link_up = mbx.link_status.link_up;
233 nic->duplex = mbx.link_status.duplex;
234 nic->speed = mbx.link_status.speed;
236 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
237 nic->netdev->name, nic->speed,
238 nic->duplex == DUPLEX_FULL ?
239 "Full duplex" : "Half duplex");
240 netif_carrier_on(nic->netdev);
241 netif_tx_start_all_queues(nic->netdev);
243 netdev_info(nic->netdev, "%s: Link is Down\n",
245 netif_carrier_off(nic->netdev);
246 netif_tx_stop_all_queues(nic->netdev);
249 case NIC_MBOX_MSG_ALLOC_SQS:
250 nic->sqs_count = mbx.sqs_alloc.qs_count;
251 nic->pf_acked = true;
253 case NIC_MBOX_MSG_SNICVF_PTR:
254 /* Primary VF: make note of secondary VF's pointer
255 * to be used while packet transmission.
257 nic->snicvf[mbx.nicvf.sqs_id] =
258 (struct nicvf *)mbx.nicvf.nicvf;
259 nic->pf_acked = true;
261 case NIC_MBOX_MSG_PNICVF_PTR:
262 /* Secondary VF/Qset: make note of primary VF's pointer
263 * to be used while packet reception, to handover packet
264 * to primary VF's netdev.
266 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
267 nic->pf_acked = true;
270 netdev_err(nic->netdev,
271 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
274 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
277 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
279 union nic_mbx mbx = {};
281 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
282 mbx.mac.vf_id = nic->vf_id;
283 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
285 return nicvf_send_msg_to_pf(nic, &mbx);
288 static void nicvf_config_cpi(struct nicvf *nic)
290 union nic_mbx mbx = {};
292 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
293 mbx.cpi_cfg.vf_id = nic->vf_id;
294 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
295 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
297 nicvf_send_msg_to_pf(nic, &mbx);
300 static void nicvf_get_rss_size(struct nicvf *nic)
302 union nic_mbx mbx = {};
304 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
305 mbx.rss_size.vf_id = nic->vf_id;
306 nicvf_send_msg_to_pf(nic, &mbx);
309 void nicvf_config_rss(struct nicvf *nic)
311 union nic_mbx mbx = {};
312 struct nicvf_rss_info *rss = &nic->rss_info;
313 int ind_tbl_len = rss->rss_size;
316 mbx.rss_cfg.vf_id = nic->vf_id;
317 mbx.rss_cfg.hash_bits = rss->hash_bits;
318 while (ind_tbl_len) {
319 mbx.rss_cfg.tbl_offset = nextq;
320 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
321 RSS_IND_TBL_LEN_PER_MBX_MSG);
322 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
323 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
325 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
326 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
328 nicvf_send_msg_to_pf(nic, &mbx);
330 ind_tbl_len -= mbx.rss_cfg.tbl_len;
334 void nicvf_set_rss_key(struct nicvf *nic)
336 struct nicvf_rss_info *rss = &nic->rss_info;
337 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
340 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
341 nicvf_reg_write(nic, key_addr, rss->key[idx]);
342 key_addr += sizeof(u64);
346 static int nicvf_rss_init(struct nicvf *nic)
348 struct nicvf_rss_info *rss = &nic->rss_info;
351 nicvf_get_rss_size(nic);
353 if (cpi_alg != CPI_ALG_NONE) {
361 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
362 nicvf_set_rss_key(nic);
364 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
365 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
367 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
369 for (idx = 0; idx < rss->rss_size; idx++)
370 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
372 nicvf_config_rss(nic);
376 /* Request PF to allocate additional Qsets */
377 static void nicvf_request_sqs(struct nicvf *nic)
379 union nic_mbx mbx = {};
381 int sqs_count = nic->sqs_count;
382 int rx_queues = 0, tx_queues = 0;
384 /* Only primary VF should request */
385 if (nic->sqs_mode || !nic->sqs_count)
388 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
389 mbx.sqs_alloc.vf_id = nic->vf_id;
390 mbx.sqs_alloc.qs_count = nic->sqs_count;
391 if (nicvf_send_msg_to_pf(nic, &mbx)) {
392 /* No response from PF */
397 /* Return if no Secondary Qsets available */
401 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
402 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
403 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
404 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
406 /* Set no of Rx/Tx queues in each of the SQsets */
407 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
408 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
409 mbx.nicvf.vf_id = nic->vf_id;
410 mbx.nicvf.sqs_id = sqs;
411 nicvf_send_msg_to_pf(nic, &mbx);
413 nic->snicvf[sqs]->sqs_id = sqs;
414 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
415 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
416 rx_queues -= MAX_RCV_QUEUES_PER_QS;
418 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
422 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
423 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
424 tx_queues -= MAX_SND_QUEUES_PER_QS;
426 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
430 nic->snicvf[sqs]->qs->cq_cnt =
431 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
433 /* Initialize secondary Qset's queues and its interrupts */
434 nicvf_open(nic->snicvf[sqs]->netdev);
437 /* Update stack with actual Rx/Tx queue count allocated */
438 if (sqs_count != nic->sqs_count)
439 nicvf_set_real_num_queues(nic->netdev,
440 nic->tx_queues, nic->rx_queues);
443 /* Send this Qset's nicvf pointer to PF.
444 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
445 * so that packets received by these Qsets can use primary VF's netdev
447 static void nicvf_send_vf_struct(struct nicvf *nic)
449 union nic_mbx mbx = {};
451 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
452 mbx.nicvf.sqs_mode = nic->sqs_mode;
453 mbx.nicvf.nicvf = (u64)nic;
454 nicvf_send_msg_to_pf(nic, &mbx);
457 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
459 union nic_mbx mbx = {};
461 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
462 nicvf_send_msg_to_pf(nic, &mbx);
465 int nicvf_set_real_num_queues(struct net_device *netdev,
466 int tx_queues, int rx_queues)
470 err = netif_set_real_num_tx_queues(netdev, tx_queues);
473 "Failed to set no of Tx queues: %d\n", tx_queues);
477 err = netif_set_real_num_rx_queues(netdev, rx_queues);
480 "Failed to set no of Rx queues: %d\n", rx_queues);
484 static int nicvf_init_resources(struct nicvf *nic)
489 nicvf_qset_config(nic, true);
491 /* Initialize queues and HW for data transfer */
492 err = nicvf_config_data_transfer(nic, true);
494 netdev_err(nic->netdev,
495 "Failed to alloc/config VF's QSet resources\n");
502 static void nicvf_snd_pkt_handler(struct net_device *netdev,
503 struct cqe_send_t *cqe_tx,
504 int cqe_type, int budget,
505 unsigned int *tx_pkts, unsigned int *tx_bytes)
507 struct sk_buff *skb = NULL;
508 struct nicvf *nic = netdev_priv(netdev);
509 struct snd_queue *sq;
510 struct sq_hdr_subdesc *hdr;
511 struct sq_hdr_subdesc *tso_sqe;
513 sq = &nic->qs->sq[cqe_tx->sq_idx];
515 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
516 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
519 netdev_dbg(nic->netdev,
520 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
521 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
522 cqe_tx->sqe_ptr, hdr->subdesc_cnt);
524 nicvf_check_cqe_tx_errs(nic, cqe_tx);
525 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
527 /* Check for dummy descriptor used for HW TSO offload on 88xx */
528 if (hdr->dont_send) {
529 /* Get actual TSO descriptors and free them */
531 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
532 nicvf_put_sq_desc(sq, tso_sqe->subdesc_cnt + 1);
534 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
537 *tx_bytes += skb->len;
538 napi_consume_skb(skb, budget);
539 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
541 /* In case of SW TSO on 88xx, only last segment will have
542 * a SKB attached, so just free SQEs here.
545 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
549 static inline void nicvf_set_rxhash(struct net_device *netdev,
550 struct cqe_rx_t *cqe_rx,
556 if (!(netdev->features & NETIF_F_RXHASH))
559 switch (cqe_rx->rss_alg) {
562 hash_type = PKT_HASH_TYPE_L4;
563 hash = cqe_rx->rss_tag;
566 hash_type = PKT_HASH_TYPE_L3;
567 hash = cqe_rx->rss_tag;
570 hash_type = PKT_HASH_TYPE_NONE;
574 skb_set_hash(skb, hash, hash_type);
577 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
578 struct napi_struct *napi,
579 struct cqe_rx_t *cqe_rx)
582 struct nicvf *nic = netdev_priv(netdev);
586 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
589 /* Use primary VF's 'nicvf' struct */
591 netdev = nic->netdev;
594 /* Check for errors */
595 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
596 if (err && !cqe_rx->rb_cnt)
599 skb = nicvf_get_rcv_skb(nic, cqe_rx);
601 netdev_dbg(nic->netdev, "Packet not received\n");
605 if (netif_msg_pktdata(nic)) {
606 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
608 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
609 skb->data, skb->len, true);
612 /* If error packet, drop it here */
614 dev_kfree_skb_any(skb);
618 nicvf_set_rxhash(netdev, cqe_rx, skb);
620 skb_record_rx_queue(skb, rq_idx);
621 if (netdev->hw_features & NETIF_F_RXCSUM) {
622 /* HW by default verifies TCP/UDP/SCTP checksums */
623 skb->ip_summed = CHECKSUM_UNNECESSARY;
625 skb_checksum_none_assert(skb);
628 skb->protocol = eth_type_trans(skb, netdev);
630 /* Check for stripped VLAN */
631 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
632 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
633 ntohs((__force __be16)cqe_rx->vlan_tci));
635 if (napi && (netdev->features & NETIF_F_GRO))
636 napi_gro_receive(napi, skb);
638 netif_receive_skb(skb);
641 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
642 struct napi_struct *napi, int budget)
644 int processed_cqe, work_done = 0, tx_done = 0;
645 int cqe_count, cqe_head;
646 struct nicvf *nic = netdev_priv(netdev);
647 struct queue_set *qs = nic->qs;
648 struct cmp_queue *cq = &qs->cq[cq_idx];
649 struct cqe_rx_t *cq_desc;
650 struct netdev_queue *txq;
651 unsigned int tx_pkts = 0, tx_bytes = 0;
653 spin_lock_bh(&cq->lock);
656 /* Get no of valid CQ entries to process */
657 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
658 cqe_count &= CQ_CQE_COUNT;
662 /* Get head of the valid CQ entries */
663 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
666 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
667 __func__, cq_idx, cqe_count, cqe_head);
668 while (processed_cqe < cqe_count) {
669 /* Get the CQ descriptor */
670 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
672 cqe_head &= (cq->dmem.q_len - 1);
673 /* Initiate prefetch for next descriptor */
674 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
676 if ((work_done >= budget) && napi &&
677 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
681 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
682 cq_idx, cq_desc->cqe_type);
683 switch (cq_desc->cqe_type) {
685 nicvf_rcv_pkt_handler(netdev, napi, cq_desc);
689 nicvf_snd_pkt_handler(netdev,
690 (void *)cq_desc, CQE_TYPE_SEND,
691 budget, &tx_pkts, &tx_bytes);
694 case CQE_TYPE_INVALID:
695 case CQE_TYPE_RX_SPLIT:
696 case CQE_TYPE_RX_TCP:
697 case CQE_TYPE_SEND_PTP:
703 netdev_dbg(nic->netdev,
704 "%s CQ%d processed_cqe %d work_done %d budget %d\n",
705 __func__, cq_idx, processed_cqe, work_done, budget);
707 /* Ring doorbell to inform H/W to reuse processed CQEs */
708 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
709 cq_idx, processed_cqe);
711 if ((work_done < budget) && napi)
715 /* Wakeup TXQ if its stopped earlier due to SQ full */
717 netdev = nic->pnicvf->netdev;
718 txq = netdev_get_tx_queue(netdev,
719 nicvf_netdev_qidx(nic, cq_idx));
721 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
724 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
725 netif_tx_start_queue(txq);
726 this_cpu_inc(nic->drv_stats->txq_wake);
727 if (netif_msg_tx_err(nic))
729 "%s: Transmit queue wakeup SQ%d\n",
730 netdev->name, cq_idx);
734 spin_unlock_bh(&cq->lock);
738 static int nicvf_poll(struct napi_struct *napi, int budget)
742 struct net_device *netdev = napi->dev;
743 struct nicvf *nic = netdev_priv(netdev);
744 struct nicvf_cq_poll *cq;
746 cq = container_of(napi, struct nicvf_cq_poll, napi);
747 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
749 if (work_done < budget) {
750 /* Slow packet rate, exit polling */
752 /* Re-enable interrupts */
753 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
755 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
756 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
757 cq->cq_idx, cq_head);
758 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
763 /* Qset error interrupt handler
765 * As of now only CQ errors are handled
767 static void nicvf_handle_qs_err(unsigned long data)
769 struct nicvf *nic = (struct nicvf *)data;
770 struct queue_set *qs = nic->qs;
774 netif_tx_disable(nic->netdev);
776 /* Check if it is CQ err */
777 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
778 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
780 if (!(status & CQ_ERR_MASK))
782 /* Process already queued CQEs and reconfig CQ */
783 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
784 nicvf_sq_disable(nic, qidx);
785 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
786 nicvf_cmp_queue_config(nic, qs, qidx, true);
787 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
788 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
790 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
793 netif_tx_start_all_queues(nic->netdev);
794 /* Re-enable Qset error interrupt */
795 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
798 static void nicvf_dump_intr_status(struct nicvf *nic)
800 if (netif_msg_intr(nic))
801 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
802 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
805 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
807 struct nicvf *nic = (struct nicvf *)nicvf_irq;
810 nicvf_dump_intr_status(nic);
812 intr = nicvf_reg_read(nic, NIC_VF_INT);
813 /* Check for spurious interrupt */
814 if (!(intr & NICVF_INTR_MBOX_MASK))
817 nicvf_handle_mbx_intr(nic);
822 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
824 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
825 struct nicvf *nic = cq_poll->nicvf;
826 int qidx = cq_poll->cq_idx;
828 nicvf_dump_intr_status(nic);
830 /* Disable interrupts */
831 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
834 napi_schedule_irqoff(&cq_poll->napi);
836 /* Clear interrupt */
837 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
842 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
844 struct nicvf *nic = (struct nicvf *)nicvf_irq;
848 nicvf_dump_intr_status(nic);
850 /* Disable RBDR interrupt and schedule softirq */
851 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
852 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
854 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
855 tasklet_hi_schedule(&nic->rbdr_task);
856 /* Clear interrupt */
857 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
863 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
865 struct nicvf *nic = (struct nicvf *)nicvf_irq;
867 nicvf_dump_intr_status(nic);
869 /* Disable Qset err interrupt and schedule softirq */
870 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
871 tasklet_hi_schedule(&nic->qs_err_task);
872 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
877 static int nicvf_enable_msix(struct nicvf *nic)
881 nic->num_vec = NIC_VF_MSIX_VECTORS;
883 for (vec = 0; vec < nic->num_vec; vec++)
884 nic->msix_entries[vec].entry = vec;
886 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
888 netdev_err(nic->netdev,
889 "Req for #%d msix vectors failed\n", nic->num_vec);
892 nic->msix_enabled = 1;
896 static void nicvf_disable_msix(struct nicvf *nic)
898 if (nic->msix_enabled) {
899 pci_disable_msix(nic->pdev);
900 nic->msix_enabled = 0;
905 static void nicvf_set_irq_affinity(struct nicvf *nic)
910 for (vec = 0; vec < nic->num_vec; vec++) {
911 if (!nic->irq_allocated[vec])
914 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
917 if (vec < NICVF_INTR_ID_SQ)
918 /* Leave CPU0 for RBDR and other interrupts */
919 cpu = nicvf_netdev_qidx(nic, vec) + 1;
923 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
924 nic->affinity_mask[vec]);
925 irqnum = nic->msix_entries[vec].vector;
926 irq_set_affinity_hint(irqnum, nic->affinity_mask[vec]);
930 static int nicvf_register_interrupts(struct nicvf *nic)
936 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
937 nic->pnicvf->netdev->name,
938 nicvf_netdev_qidx(nic, irq));
941 sprintf(nic->irq_name[irq], "%s-sq-%d",
942 nic->pnicvf->netdev->name,
943 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
945 for_each_rbdr_irq(irq)
946 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
947 nic->pnicvf->netdev->name,
948 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
950 /* Register CQ interrupts */
951 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
952 vector = nic->msix_entries[irq].vector;
953 ret = request_irq(vector, nicvf_intr_handler,
954 0, nic->irq_name[irq], nic->napi[irq]);
957 nic->irq_allocated[irq] = true;
960 /* Register RBDR interrupt */
961 for (irq = NICVF_INTR_ID_RBDR;
962 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
963 vector = nic->msix_entries[irq].vector;
964 ret = request_irq(vector, nicvf_rbdr_intr_handler,
965 0, nic->irq_name[irq], nic);
968 nic->irq_allocated[irq] = true;
971 /* Register QS error interrupt */
972 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
973 nic->pnicvf->netdev->name,
974 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
975 irq = NICVF_INTR_ID_QS_ERR;
976 ret = request_irq(nic->msix_entries[irq].vector,
977 nicvf_qs_err_intr_handler,
978 0, nic->irq_name[irq], nic);
982 nic->irq_allocated[irq] = true;
984 /* Set IRQ affinities */
985 nicvf_set_irq_affinity(nic);
989 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
994 static void nicvf_unregister_interrupts(struct nicvf *nic)
998 /* Free registered interrupts */
999 for (irq = 0; irq < nic->num_vec; irq++) {
1000 if (!nic->irq_allocated[irq])
1003 irq_set_affinity_hint(nic->msix_entries[irq].vector, NULL);
1004 free_cpumask_var(nic->affinity_mask[irq]);
1006 if (irq < NICVF_INTR_ID_SQ)
1007 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
1009 free_irq(nic->msix_entries[irq].vector, nic);
1011 nic->irq_allocated[irq] = false;
1015 nicvf_disable_msix(nic);
1018 /* Initialize MSIX vectors and register MISC interrupt.
1019 * Send READY message to PF to check if its alive
1021 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1024 int irq = NICVF_INTR_ID_MISC;
1026 /* Return if mailbox interrupt is already registered */
1027 if (nic->msix_enabled)
1031 if (!nicvf_enable_msix(nic))
1034 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1035 /* Register Misc interrupt */
1036 ret = request_irq(nic->msix_entries[irq].vector,
1037 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1041 nic->irq_allocated[irq] = true;
1043 /* Enable mailbox interrupt */
1044 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1046 /* Check if VF is able to communicate with PF */
1047 if (!nicvf_check_pf_ready(nic)) {
1048 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1049 nicvf_unregister_interrupts(nic);
1056 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1058 struct nicvf *nic = netdev_priv(netdev);
1059 int qid = skb_get_queue_mapping(skb);
1060 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1062 /* Check for minimum packet length */
1063 if (skb->len <= ETH_HLEN) {
1065 return NETDEV_TX_OK;
1068 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1069 netif_tx_stop_queue(txq);
1070 this_cpu_inc(nic->drv_stats->txq_stop);
1071 if (netif_msg_tx_err(nic))
1073 "%s: Transmit ring full, stopping SQ%d\n",
1075 return NETDEV_TX_BUSY;
1078 return NETDEV_TX_OK;
1081 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1083 struct nicvf_cq_poll *cq_poll;
1086 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1087 cq_poll = nic->napi[qidx];
1090 nic->napi[qidx] = NULL;
1095 int nicvf_stop(struct net_device *netdev)
1098 struct nicvf *nic = netdev_priv(netdev);
1099 struct queue_set *qs = nic->qs;
1100 struct nicvf_cq_poll *cq_poll = NULL;
1101 union nic_mbx mbx = {};
1103 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1104 nicvf_send_msg_to_pf(nic, &mbx);
1106 netif_carrier_off(netdev);
1107 netif_tx_stop_all_queues(nic->netdev);
1108 nic->link_up = false;
1110 /* Teardown secondary qsets first */
1111 if (!nic->sqs_mode) {
1112 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1113 if (!nic->snicvf[qidx])
1115 nicvf_stop(nic->snicvf[qidx]->netdev);
1116 nic->snicvf[qidx] = NULL;
1120 /* Disable RBDR & QS error interrupts */
1121 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1122 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1123 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1125 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1126 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1128 /* Wait for pending IRQ handlers to finish */
1129 for (irq = 0; irq < nic->num_vec; irq++)
1130 synchronize_irq(nic->msix_entries[irq].vector);
1132 tasklet_kill(&nic->rbdr_task);
1133 tasklet_kill(&nic->qs_err_task);
1134 if (nic->rb_work_scheduled)
1135 cancel_delayed_work_sync(&nic->rbdr_work);
1137 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1138 cq_poll = nic->napi[qidx];
1141 napi_synchronize(&cq_poll->napi);
1142 /* CQ intr is enabled while napi_complete,
1145 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1146 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1147 napi_disable(&cq_poll->napi);
1148 netif_napi_del(&cq_poll->napi);
1151 netif_tx_disable(netdev);
1153 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1154 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1156 /* Free resources */
1157 nicvf_config_data_transfer(nic, false);
1159 /* Disable HW Qset */
1160 nicvf_qset_config(nic, false);
1162 /* disable mailbox interrupt */
1163 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1165 nicvf_unregister_interrupts(nic);
1167 nicvf_free_cq_poll(nic);
1169 /* Clear multiqset info */
1175 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1177 union nic_mbx mbx = {};
1179 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1180 mbx.frs.max_frs = mtu;
1181 mbx.frs.vf_id = nic->vf_id;
1183 return nicvf_send_msg_to_pf(nic, &mbx);
1186 int nicvf_open(struct net_device *netdev)
1189 struct nicvf *nic = netdev_priv(netdev);
1190 struct queue_set *qs = nic->qs;
1191 struct nicvf_cq_poll *cq_poll = NULL;
1193 netif_carrier_off(netdev);
1195 err = nicvf_register_misc_interrupt(nic);
1199 /* Register NAPI handler for processing CQEs */
1200 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1201 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1206 cq_poll->cq_idx = qidx;
1207 cq_poll->nicvf = nic;
1208 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1210 napi_enable(&cq_poll->napi);
1211 nic->napi[qidx] = cq_poll;
1214 /* Check if we got MAC address from PF or else generate a radom MAC */
1215 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1216 eth_hw_addr_random(netdev);
1217 nicvf_hw_set_mac_addr(nic, netdev);
1220 if (nic->set_mac_pending) {
1221 nic->set_mac_pending = false;
1222 nicvf_hw_set_mac_addr(nic, netdev);
1225 /* Init tasklet for handling Qset err interrupt */
1226 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1227 (unsigned long)nic);
1229 /* Init RBDR tasklet which will refill RBDR */
1230 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1231 (unsigned long)nic);
1232 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1234 /* Configure CPI alorithm */
1235 nic->cpi_alg = cpi_alg;
1237 nicvf_config_cpi(nic);
1239 nicvf_request_sqs(nic);
1241 nicvf_get_primary_vf_struct(nic);
1243 /* Configure receive side scaling and MTU */
1244 if (!nic->sqs_mode) {
1245 nicvf_rss_init(nic);
1246 if (nicvf_update_hw_max_frs(nic, netdev->mtu))
1249 /* Clear percpu stats */
1250 for_each_possible_cpu(cpu)
1251 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1252 sizeof(struct nicvf_drv_stats));
1255 err = nicvf_register_interrupts(nic);
1259 /* Initialize the queues */
1260 err = nicvf_init_resources(nic);
1264 /* Make sure queue initialization is written */
1267 nicvf_reg_write(nic, NIC_VF_INT, -1);
1268 /* Enable Qset err interrupt */
1269 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1271 /* Enable completion queue interrupt */
1272 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1273 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1275 /* Enable RBDR threshold interrupt */
1276 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1277 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1279 /* Send VF config done msg to PF */
1280 nicvf_send_cfg_done(nic);
1284 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1285 nicvf_unregister_interrupts(nic);
1286 tasklet_kill(&nic->qs_err_task);
1287 tasklet_kill(&nic->rbdr_task);
1289 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1290 cq_poll = nic->napi[qidx];
1293 napi_disable(&cq_poll->napi);
1294 netif_napi_del(&cq_poll->napi);
1296 nicvf_free_cq_poll(nic);
1300 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1302 struct nicvf *nic = netdev_priv(netdev);
1304 if (new_mtu > NIC_HW_MAX_FRS)
1307 if (new_mtu < NIC_HW_MIN_FRS)
1310 netdev->mtu = new_mtu;
1312 if (!netif_running(netdev))
1315 if (nicvf_update_hw_max_frs(nic, new_mtu))
1321 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1323 struct sockaddr *addr = p;
1324 struct nicvf *nic = netdev_priv(netdev);
1326 if (!is_valid_ether_addr(addr->sa_data))
1327 return -EADDRNOTAVAIL;
1329 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1331 if (nic->msix_enabled) {
1332 if (nicvf_hw_set_mac_addr(nic, netdev))
1335 nic->set_mac_pending = true;
1341 void nicvf_update_lmac_stats(struct nicvf *nic)
1344 union nic_mbx mbx = {};
1346 if (!netif_running(nic->netdev))
1349 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1350 mbx.bgx_stats.vf_id = nic->vf_id;
1352 mbx.bgx_stats.rx = 1;
1353 while (stat < BGX_RX_STATS_COUNT) {
1354 mbx.bgx_stats.idx = stat;
1355 if (nicvf_send_msg_to_pf(nic, &mbx))
1363 mbx.bgx_stats.rx = 0;
1364 while (stat < BGX_TX_STATS_COUNT) {
1365 mbx.bgx_stats.idx = stat;
1366 if (nicvf_send_msg_to_pf(nic, &mbx))
1372 void nicvf_update_stats(struct nicvf *nic)
1376 struct nicvf_hw_stats *stats = &nic->hw_stats;
1377 struct nicvf_drv_stats *drv_stats;
1378 struct queue_set *qs = nic->qs;
1380 #define GET_RX_STATS(reg) \
1381 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1382 #define GET_TX_STATS(reg) \
1383 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1385 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1386 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1387 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1388 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1389 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1390 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1391 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1392 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1393 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1394 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1395 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1396 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1397 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1398 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1400 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1401 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1402 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1403 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1404 stats->tx_drops = GET_TX_STATS(TX_DROP);
1406 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1407 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1408 * pointed by dummy SQE and results in tx_drops counter being
1409 * incremented. Subtracting it from tx_tso counter will give
1410 * exact tx_drops counter.
1412 if (nic->t88 && nic->hw_tso) {
1413 for_each_possible_cpu(cpu) {
1414 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1415 tmp_stats += drv_stats->tx_tso;
1417 stats->tx_drops = tmp_stats - stats->tx_drops;
1419 stats->tx_frames = stats->tx_ucast_frames +
1420 stats->tx_bcast_frames +
1421 stats->tx_mcast_frames;
1422 stats->rx_frames = stats->rx_ucast_frames +
1423 stats->rx_bcast_frames +
1424 stats->rx_mcast_frames;
1425 stats->rx_drops = stats->rx_drop_red +
1426 stats->rx_drop_overrun;
1428 /* Update RQ and SQ stats */
1429 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1430 nicvf_update_rq_stats(nic, qidx);
1431 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1432 nicvf_update_sq_stats(nic, qidx);
1435 static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
1436 struct rtnl_link_stats64 *stats)
1438 struct nicvf *nic = netdev_priv(netdev);
1439 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1441 nicvf_update_stats(nic);
1443 stats->rx_bytes = hw_stats->rx_bytes;
1444 stats->rx_packets = hw_stats->rx_frames;
1445 stats->rx_dropped = hw_stats->rx_drops;
1446 stats->multicast = hw_stats->rx_mcast_frames;
1448 stats->tx_bytes = hw_stats->tx_bytes;
1449 stats->tx_packets = hw_stats->tx_frames;
1450 stats->tx_dropped = hw_stats->tx_drops;
1455 static void nicvf_tx_timeout(struct net_device *dev)
1457 struct nicvf *nic = netdev_priv(dev);
1459 if (netif_msg_tx_err(nic))
1460 netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1463 this_cpu_inc(nic->drv_stats->tx_timeout);
1464 schedule_work(&nic->reset_task);
1467 static void nicvf_reset_task(struct work_struct *work)
1471 nic = container_of(work, struct nicvf, reset_task);
1473 if (!netif_running(nic->netdev))
1476 nicvf_stop(nic->netdev);
1477 nicvf_open(nic->netdev);
1478 netif_trans_update(nic->netdev);
1481 static int nicvf_config_loopback(struct nicvf *nic,
1482 netdev_features_t features)
1484 union nic_mbx mbx = {};
1486 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1487 mbx.lbk.vf_id = nic->vf_id;
1488 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1490 return nicvf_send_msg_to_pf(nic, &mbx);
1493 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1494 netdev_features_t features)
1496 struct nicvf *nic = netdev_priv(netdev);
1498 if ((features & NETIF_F_LOOPBACK) &&
1499 netif_running(netdev) && !nic->loopback_supported)
1500 features &= ~NETIF_F_LOOPBACK;
1505 static int nicvf_set_features(struct net_device *netdev,
1506 netdev_features_t features)
1508 struct nicvf *nic = netdev_priv(netdev);
1509 netdev_features_t changed = features ^ netdev->features;
1511 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1512 nicvf_config_vlan_stripping(nic, features);
1514 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1515 return nicvf_config_loopback(nic, features);
1520 static const struct net_device_ops nicvf_netdev_ops = {
1521 .ndo_open = nicvf_open,
1522 .ndo_stop = nicvf_stop,
1523 .ndo_start_xmit = nicvf_xmit,
1524 .ndo_change_mtu = nicvf_change_mtu,
1525 .ndo_set_mac_address = nicvf_set_mac_address,
1526 .ndo_get_stats64 = nicvf_get_stats64,
1527 .ndo_tx_timeout = nicvf_tx_timeout,
1528 .ndo_fix_features = nicvf_fix_features,
1529 .ndo_set_features = nicvf_set_features,
1532 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1534 struct device *dev = &pdev->dev;
1535 struct net_device *netdev;
1540 err = pci_enable_device(pdev);
1542 dev_err(dev, "Failed to enable PCI device\n");
1546 err = pci_request_regions(pdev, DRV_NAME);
1548 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1549 goto err_disable_device;
1552 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1554 dev_err(dev, "Unable to get usable DMA configuration\n");
1555 goto err_release_regions;
1558 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1560 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1561 goto err_release_regions;
1564 qcount = netif_get_num_default_rss_queues();
1566 /* Restrict multiqset support only for host bound VFs */
1567 if (pdev->is_virtfn) {
1568 /* Set max number of queues per VF */
1569 qcount = min_t(int, num_online_cpus(),
1570 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1573 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1576 goto err_release_regions;
1579 pci_set_drvdata(pdev, netdev);
1581 SET_NETDEV_DEV(netdev, &pdev->dev);
1583 nic = netdev_priv(netdev);
1584 nic->netdev = netdev;
1587 nic->max_queues = qcount;
1588 /* If no of CPUs are too low, there won't be any queues left
1589 * for XDP_TX, hence double it.
1592 nic->max_queues *= 2;
1594 /* MAP VF's configuration registers */
1595 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1596 if (!nic->reg_base) {
1597 dev_err(dev, "Cannot map config register space, aborting\n");
1599 goto err_free_netdev;
1602 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
1603 if (!nic->drv_stats) {
1605 goto err_free_netdev;
1608 err = nicvf_set_qset_resources(nic);
1610 goto err_free_netdev;
1612 /* Check if PF is alive and get MAC address for this VF */
1613 err = nicvf_register_misc_interrupt(nic);
1615 goto err_free_netdev;
1617 nicvf_send_vf_struct(nic);
1619 if (!pass1_silicon(nic->pdev))
1622 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
1623 if (sdevid == 0xA134)
1626 /* Check if this VF is in QS only mode */
1630 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1632 goto err_unregister_interrupts;
1634 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
1635 NETIF_F_TSO | NETIF_F_GRO |
1636 NETIF_F_HW_VLAN_CTAG_RX);
1638 netdev->hw_features |= NETIF_F_RXHASH;
1640 netdev->features |= netdev->hw_features;
1641 netdev->hw_features |= NETIF_F_LOOPBACK;
1643 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
1645 netdev->netdev_ops = &nicvf_netdev_ops;
1646 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1648 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1650 err = register_netdev(netdev);
1652 dev_err(dev, "Failed to register netdevice\n");
1653 goto err_unregister_interrupts;
1656 nic->msg_enable = debug;
1658 nicvf_set_ethtool_ops(netdev);
1662 err_unregister_interrupts:
1663 nicvf_unregister_interrupts(nic);
1665 pci_set_drvdata(pdev, NULL);
1667 free_percpu(nic->drv_stats);
1668 free_netdev(netdev);
1669 err_release_regions:
1670 pci_release_regions(pdev);
1672 pci_disable_device(pdev);
1676 static void nicvf_remove(struct pci_dev *pdev)
1678 struct net_device *netdev = pci_get_drvdata(pdev);
1680 struct net_device *pnetdev;
1685 nic = netdev_priv(netdev);
1686 pnetdev = nic->pnicvf->netdev;
1688 /* Check if this Qset is assigned to different VF.
1689 * If yes, clean primary and all secondary Qsets.
1691 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1692 unregister_netdev(pnetdev);
1693 nicvf_unregister_interrupts(nic);
1694 pci_set_drvdata(pdev, NULL);
1696 free_percpu(nic->drv_stats);
1697 free_netdev(netdev);
1698 pci_release_regions(pdev);
1699 pci_disable_device(pdev);
1702 static void nicvf_shutdown(struct pci_dev *pdev)
1707 static struct pci_driver nicvf_driver = {
1709 .id_table = nicvf_id_table,
1710 .probe = nicvf_probe,
1711 .remove = nicvf_remove,
1712 .shutdown = nicvf_shutdown,
1715 static int __init nicvf_init_module(void)
1717 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
1719 return pci_register_driver(&nicvf_driver);
1722 static void __exit nicvf_cleanup_module(void)
1724 pci_unregister_driver(&nicvf_driver);
1727 module_init(nicvf_init_module);
1728 module_exit(nicvf_cleanup_module);