1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2016 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more details.
17 ***********************************************************************/
18 /*! \file octeon_main.h
19 * \brief Host Driver: This file is included by all host driver source files
20 * to include common definitions.
23 #ifndef _OCTEON_MAIN_H_
24 #define _OCTEON_MAIN_H_
26 #include <linux/sched/signal.h>
28 #if BITS_PER_LONG == 32
29 #define CVM_CAST64(v) ((long long)(v))
30 #elif BITS_PER_LONG == 64
31 #define CVM_CAST64(v) ((long long)(long)(v))
33 #error "Unknown system architecture"
36 #define DRV_NAME "LiquidIO"
38 struct octeon_device_priv {
39 /** Tasklet structures for this device. */
40 struct tasklet_struct droq_tasklet;
41 unsigned long napi_mask;
42 struct octeon_device *dev;
45 /** This structure is used by NIC driver to store information required
46 * to free the sk_buff when the packet has been fetched by Octeon.
47 * Bytes offset below assume worst-case of a 64-bit system.
49 struct octnet_buf_free_info {
50 /** Bytes 1-8. Pointer to network device private structure. */
53 /** Bytes 9-16. Pointer to sk_buff. */
56 /** Bytes 17-24. Pointer to gather list. */
57 struct octnic_gather *g;
59 /** Bytes 25-32. Physical address of skb->data or gather list. */
62 /** Bytes 33-47. Piggybacked soft command, if any */
63 struct octeon_soft_command *sc;
66 /* BQL-related functions */
67 int octeon_report_sent_bytes_to_bql(void *buf, int reqtype);
68 void octeon_update_tx_completion_counters(void *buf, int reqtype,
69 unsigned int *pkts_compl,
70 unsigned int *bytes_compl);
71 void octeon_report_tx_completion_to_bql(void *txq, unsigned int pkts_compl,
72 unsigned int bytes_compl);
73 void octeon_pf_changed_vf_macaddr(struct octeon_device *oct, u8 *mac);
75 void octeon_schedule_rxq_oom_work(struct octeon_device *oct,
76 struct octeon_droq *droq);
79 static inline void octeon_swap_8B_data(u64 *data, u32 blocks)
89 * \brief unmaps a PCI BAR
90 * @param oct Pointer to Octeon device
91 * @param baridx bar index
93 static inline void octeon_unmap_pci_barx(struct octeon_device *oct, int baridx)
95 dev_dbg(&oct->pci_dev->dev, "Freeing PCI mapped regions for Bar%d\n",
98 if (oct->mmio[baridx].done)
99 iounmap(oct->mmio[baridx].hw_addr);
101 if (oct->mmio[baridx].start)
102 pci_release_region(oct->pci_dev, baridx * 2);
106 * \brief maps a PCI BAR
107 * @param oct Pointer to Octeon device
108 * @param baridx bar index
109 * @param max_map_len maximum length of mapped memory
111 static inline int octeon_map_pci_barx(struct octeon_device *oct,
112 int baridx, int max_map_len)
116 if (pci_request_region(oct->pci_dev, baridx * 2, DRV_NAME)) {
117 dev_err(&oct->pci_dev->dev, "pci_request_region failed for bar %d\n",
122 oct->mmio[baridx].start = pci_resource_start(oct->pci_dev, baridx * 2);
123 oct->mmio[baridx].len = pci_resource_len(oct->pci_dev, baridx * 2);
125 mapped_len = oct->mmio[baridx].len;
127 goto err_release_region;
129 if (max_map_len && (mapped_len > max_map_len))
130 mapped_len = max_map_len;
132 oct->mmio[baridx].hw_addr =
133 ioremap(oct->mmio[baridx].start, mapped_len);
134 oct->mmio[baridx].mapped_len = mapped_len;
136 dev_dbg(&oct->pci_dev->dev, "BAR%d start: 0x%llx mapped %u of %u bytes\n",
137 baridx, oct->mmio[baridx].start, mapped_len,
138 oct->mmio[baridx].len);
140 if (!oct->mmio[baridx].hw_addr) {
141 dev_err(&oct->pci_dev->dev, "error ioremap for bar %d\n",
143 goto err_release_region;
145 oct->mmio[baridx].done = 1;
150 pci_release_region(oct->pci_dev, baridx * 2);
155 * sc: pointer to a soft request
156 * timeout: milli sec which an application wants to wait for the
157 response of the request.
158 * 0: the request will wait until its response gets back
159 * from the firmware within LIO_SC_MAX_TMO_MS milli sec.
160 * It the response does not return within
161 * LIO_SC_MAX_TMO_MS milli sec, lio_process_ordered_list()
162 * will move the request to zombie response list.
165 * 0: got the response from firmware for the sc request.
166 * errno -EINTR: user abort the command.
167 * errno -ETIME: user spefified timeout value has been expired.
168 * errno -EBUSY: the response of the request does not return in
169 * resonable time (LIO_SC_MAX_TMO_MS).
170 * the sc wll be move to zombie response list by
171 * lio_process_ordered_list()
173 * A request with non-zero return value, the sc->caller_is_done
175 * When getting a request with zero return value, the requestor
176 * should mark sc->caller_is_done with 1 after examing the
178 * lio_process_ordered_list() will free the soft command on behalf
179 * of the soft command requestor.
180 * This is to fix the possible race condition of both timeout process
181 * and lio_process_ordered_list()/callback function to free a
185 wait_for_sc_completion_timeout(struct octeon_device *oct_dev,
186 struct octeon_soft_command *sc,
187 unsigned long timeout)
193 timeout_jiff = msecs_to_jiffies(timeout);
195 timeout_jiff = MAX_SCHEDULE_TIMEOUT;
198 wait_for_completion_interruptible_timeout(&sc->complete,
200 if (timeout_jiff == 0) {
201 dev_err(&oct_dev->pci_dev->dev, "%s: sc is timeout\n",
203 WRITE_ONCE(sc->caller_is_done, true);
205 } else if (timeout_jiff == -ERESTARTSYS) {
206 dev_err(&oct_dev->pci_dev->dev, "%s: sc is interrupted\n",
208 WRITE_ONCE(sc->caller_is_done, true);
210 } else if (sc->sc_status == OCTEON_REQUEST_TIMEOUT) {
211 dev_err(&oct_dev->pci_dev->dev, "%s: sc has fatal timeout\n",
213 WRITE_ONCE(sc->caller_is_done, true);
221 #define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
225 #define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
229 #define ROUNDUP16(val) (((val) + 15) & 0xfffffff0)
233 #define ROUNDUP128(val) (((val) + 127) & 0xffffff80)
236 #endif /* _OCTEON_MAIN_H_ */