1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2016 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
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14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more details.
17 ***********************************************************************/
19 * \brief Host Driver: Implementation of Octeon input queues. "Input" is
20 * with respect to the Octeon device on the NIC. From this driver's
21 * point of view they are egress queues.
24 #ifndef __OCTEON_IQ_H__
25 #define __OCTEON_IQ_H__
27 #define IQ_STATUS_RUNNING 1
30 #define IQ_SEND_STOP 1
31 #define IQ_SEND_FAILED -1
33 /*------------------------- INSTRUCTION QUEUE --------------------------*/
37 #define REQTYPE_NONE 0
38 #define REQTYPE_NORESP_NET 1
39 #define REQTYPE_NORESP_NET_SG 2
40 #define REQTYPE_RESP_NET 3
41 #define REQTYPE_RESP_NET_SG 4
42 #define REQTYPE_SOFT_COMMAND 5
43 #define REQTYPE_LAST 5
45 struct octeon_request_list {
52 /** Input Queue statistics. Each input queue has four stats fields. */
54 u64 instr_posted; /**< Instructions posted to this queue. */
55 u64 instr_processed; /**< Instructions processed in this queue. */
56 u64 instr_dropped; /**< Instructions that could not be processed */
57 u64 bytes_sent; /**< Bytes sent through this queue. */
58 u64 sgentry_sent;/**< Gather entries sent through this queue. */
59 u64 tx_done;/**< Num of packets sent to network. */
60 u64 tx_iq_busy;/**< Numof times this iq was found to be full. */
61 u64 tx_dropped;/**< Numof pkts dropped dueto xmitpath errors. */
62 u64 tx_tot_bytes;/**< Total count of bytes sento to network. */
63 u64 tx_gso; /* count of tso */
64 u64 tx_vxlan; /* tunnel */
69 #define OCT_IQ_STATS_SIZE (sizeof(struct oct_iq_stats))
71 /** The instruction (input) queue.
72 * The input queue is used to post raw (instruction) mode data or packet
73 * data to Octeon device from the host. Each input queue (upto 4) for
74 * a Octeon device has one such structure to represent it.
76 struct octeon_instr_queue {
77 struct octeon_device *oct_dev;
79 /** A spinlock to protect access to the input ring. */
82 /** A spinlock to protect while posting on the ring. */
89 /** A spinlock to protect access to the input ring.*/
90 spinlock_t iq_flush_running_lock;
92 /** Flag that indicates if the queue uses 64 byte commands. */
96 union oct_txpciq txpciq;
100 /* Controls whether extra flushing of IQ is done on Tx */
105 /** Maximum no. of instructions in this queue. */
108 /** Index in input ring where the driver should write the next packet */
109 u32 host_write_index;
111 /** Index in input ring where Octeon is expected to read the next
114 u32 octeon_read_index;
116 /** This index aids in finding the window in the queue where Octeon
117 * has read the commands.
121 /** This field keeps track of the instructions pending in this queue. */
122 atomic_t instr_pending;
126 /** Pointer to the Virtual Base addr of the input ring. */
129 struct octeon_request_list *request_list;
131 /** Octeon doorbell register for the ring. */
132 void __iomem *doorbell_reg;
134 /** Octeon instruction count register for this ring. */
135 void __iomem *inst_cnt_reg;
137 /** Number of instructions pending to be posted to Octeon. */
140 /** The max. number of instructions that can be held pending by the
145 /** The last time that the doorbell was rung. */
148 /** The doorbell timeout. If the doorbell was not rung for this time and
149 * fill_cnt is non-zero, ring the doorbell again.
153 /** Statistics for this input queue. */
154 struct oct_iq_stats stats;
156 /** DMA mapped base address of the input descriptor ring. */
157 dma_addr_t base_addr_dma;
159 /** Application context */
162 /* network stack queue index */
165 /*os ifidx associated with this queue */
170 /*---------------------- INSTRUCTION FORMAT ----------------------------*/
172 /** 32-byte instruction format.
173 * Format of instruction for a 32-byte mode input queue.
175 struct octeon_instr_32B {
176 /** Pointer where the input data is available. */
179 /** Instruction Header. */
182 /** Pointer where the response for a RAW mode packet will be written
187 /** Input Request Header. Additional info about the input. */
192 #define OCT_32B_INSTR_SIZE (sizeof(struct octeon_instr_32B))
194 /** 64-byte instruction format.
195 * Format of instruction for a 64-byte mode input queue.
197 struct octeon_instr2_64B {
198 /** Pointer where the input data is available. */
201 /** Instruction Header. */
204 /** Input Request Header. */
207 /** opcode/subcode specific parameters */
210 /** Return Data Parameters */
213 /** Pointer where the response for a RAW mode packet will be written
221 struct octeon_instr3_64B {
222 /** Pointer where the input data is available. */
225 /** Instruction Header. */
228 /** Instruction Header. */
231 /** Input Request Header. */
234 /** opcode/subcode specific parameters */
237 /** Return Data Parameters */
240 /** Pointer where the response for a RAW mode packet will be written
247 union octeon_instr_64B {
248 struct octeon_instr2_64B cmd2;
249 struct octeon_instr3_64B cmd3;
252 #define OCT_64B_INSTR_SIZE (sizeof(union octeon_instr_64B))
254 /** The size of each buffer in soft command buffer pool
256 #define SOFT_COMMAND_BUFFER_SIZE 2048
258 struct octeon_soft_command {
259 /** Soft command buffer info. */
260 struct list_head node;
264 /** Command and return status */
265 union octeon_instr_64B cmd;
267 #define COMPLETION_WORD_INIT 0xffffffffffffffffULL
270 /** Data buffer info */
275 /** Return buffer info */
280 /** Context buffer info */
284 /** Time out and callback */
288 void (*callback)(struct octeon_device *, u32, void *);
292 /** Maximum number of buffers to allocate into soft command buffer pool
294 #define MAX_SOFT_COMMAND_BUFFERS 256
296 /** Head of a soft command buffer pool.
298 struct octeon_sc_buffer_pool {
299 /** List structure to add delete pending entries to */
300 struct list_head head;
302 /** A lock for this response list */
305 atomic_t alloc_buf_count;
308 #define INCR_INSTRQUEUE_PKT_COUNT(octeon_dev_ptr, iq_no, field, count) \
309 (((octeon_dev_ptr)->instr_queue[iq_no]->stats.field) += count)
311 int octeon_setup_sc_buffer_pool(struct octeon_device *oct);
312 int octeon_free_sc_buffer_pool(struct octeon_device *oct);
313 struct octeon_soft_command *
314 octeon_alloc_soft_command(struct octeon_device *oct,
315 u32 datasize, u32 rdatasize,
317 void octeon_free_soft_command(struct octeon_device *oct,
318 struct octeon_soft_command *sc);
321 * octeon_init_instr_queue()
322 * @param octeon_dev - pointer to the octeon device structure.
323 * @param txpciq - queue to be initialized (0 <= q_no <= 3).
325 * Called at driver init time for each input queue. iq_conf has the
326 * configuration parameters for the queue.
328 * @return Success: 0 Failure: 1
330 int octeon_init_instr_queue(struct octeon_device *octeon_dev,
331 union oct_txpciq txpciq,
335 * octeon_delete_instr_queue()
336 * @param octeon_dev - pointer to the octeon device structure.
337 * @param iq_no - queue to be deleted (0 <= q_no <= 3).
339 * Called at driver unload time for each input queue. Deletes all
340 * allocated resources for the input queue.
342 * @return Success: 0 Failure: 1
344 int octeon_delete_instr_queue(struct octeon_device *octeon_dev, u32 iq_no);
346 int lio_wait_for_instr_fetch(struct octeon_device *oct);
349 octeon_register_reqtype_free_fn(struct octeon_device *oct, int reqtype,
353 lio_process_iq_request_list(struct octeon_device *oct,
354 struct octeon_instr_queue *iq, u32 napi_budget);
356 int octeon_send_command(struct octeon_device *oct, u32 iq_no,
357 u32 force_db, void *cmd, void *buf,
358 u32 datasize, u32 reqtype);
360 void octeon_prepare_soft_command(struct octeon_device *oct,
361 struct octeon_soft_command *sc,
362 u8 opcode, u8 subcode,
363 u32 irh_ossp, u64 ossp0,
366 int octeon_send_soft_command(struct octeon_device *oct,
367 struct octeon_soft_command *sc);
369 int octeon_setup_iq(struct octeon_device *oct, int ifidx,
370 int q_index, union oct_txpciq iq_no, u32 num_descs,
373 octeon_flush_iq(struct octeon_device *oct, struct octeon_instr_queue *iq,
375 #endif /* __OCTEON_IQ_H__ */