drivers/net/ethernet/cavium/liquidio/octeon_console.c

   1 /**********************************************************************
   2  * Author: Cavium, Inc.
   3  *
   4  * Contact: support@cavium.com
   5  *          Please include "LiquidIO" in the subject.
   6  *
   7  * Copyright (c) 2003-2016 Cavium, Inc.
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more details.
  17  ***********************************************************************/
  18 /**
  19  * @file octeon_console.c
  20  */
  21 #include <linux/moduleparam.h>
  22 #include <linux/pci.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/crc32.h>
  25 #include "liquidio_common.h"
  26 #include "octeon_droq.h"
  27 #include "octeon_iq.h"
  28 #include "response_manager.h"
  29 #include "octeon_device.h"
  30 #include "liquidio_image.h"
  31 #include "octeon_mem_ops.h"
  32
  33 static void octeon_remote_lock(void);
  34 static void octeon_remote_unlock(void);
  35 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
  36                                              const char *name,
  37                                              u32 flags);
  38 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
  39                                char *buffer, u32 buf_size);
  40
  41 #define BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR    0x0006c008
  42 #define BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR     0x0006c004
  43 #define BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR   0x0006c000
  44 #define BOOTLOADER_PCI_READ_DESC_ADDR           0x0006c100
  45 #define BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN     248
  46
  47 #define OCTEON_PCI_IO_BUF_OWNER_OCTEON    0x00000001
  48 #define OCTEON_PCI_IO_BUF_OWNER_HOST      0x00000002
  49
  50 /** Can change without breaking ABI */
  51 #define CVMX_BOOTMEM_NUM_NAMED_BLOCKS 64
  52
  53 /** minimum alignment of bootmem alloced blocks */
  54 #define CVMX_BOOTMEM_ALIGNMENT_SIZE     (16ull)
  55
  56 /** CVMX bootmem descriptor major version */
  57 #define CVMX_BOOTMEM_DESC_MAJ_VER   3
  58 /* CVMX bootmem descriptor minor version */
  59 #define CVMX_BOOTMEM_DESC_MIN_VER   0
  60
  61 /* Current versions */
  62 #define OCTEON_PCI_CONSOLE_MAJOR_VERSION    1
  63 #define OCTEON_PCI_CONSOLE_MINOR_VERSION    0
  64 #define OCTEON_PCI_CONSOLE_BLOCK_NAME   "__pci_console"
  65 #define OCTEON_CONSOLE_POLL_INTERVAL_MS  100    /* 10 times per second */
  66
  67 /* First three members of cvmx_bootmem_desc are left in original
  68  * positions for backwards compatibility.
  69  * Assumes big endian target
  70  */
  71 struct cvmx_bootmem_desc {
  72         /** spinlock to control access to list */
  73         u32 lock;
  74
  75         /** flags for indicating various conditions */
  76         u32 flags;
  77
  78         u64 head_addr;
  79
  80         /** incremented changed when incompatible changes made */
  81         u32 major_version;
  82
  83         /** incremented changed when compatible changes made,
  84          *  reset to zero when major incremented
  85          */
  86         u32 minor_version;
  87
  88         u64 app_data_addr;
  89         u64 app_data_size;
  90
  91         /** number of elements in named blocks array */
  92         u32 nb_num_blocks;
  93
  94         /** length of name array in bootmem blocks */
  95         u32 named_block_name_len;
  96
  97         /** address of named memory block descriptors */
  98         u64 named_block_array_addr;
  99 };
 100
 101 /* Structure that defines a single console.
 102  *
 103  * Note: when read_index == write_index, the buffer is empty.
 104  * The actual usable size of each console is console_buf_size -1;
 105  */
 106 struct octeon_pci_console {
 107         u64 input_base_addr;
 108         u32 input_read_index;
 109         u32 input_write_index;
 110         u64 output_base_addr;
 111         u32 output_read_index;
 112         u32 output_write_index;
 113         u32 lock;
 114         u32 buf_size;
 115 };
 116
 117 /* This is the main container structure that contains all the information
 118  * about all PCI consoles.  The address of this structure is passed to various
 119  * routines that operation on PCI consoles.
 120  */
 121 struct octeon_pci_console_desc {
 122         u32 major_version;
 123         u32 minor_version;
 124         u32 lock;
 125         u32 flags;
 126         u32 num_consoles;
 127         u32 pad;
 128         /* must be 64 bit aligned here... */
 129         /* Array of addresses of octeon_pci_console structures */
 130         u64 console_addr_array[0];
 131         /* Implicit storage for console_addr_array */
 132 };
 133
 134 /**
 135  * This function is the implementation of the get macros defined
 136  * for individual structure members. The argument are generated
 137  * by the macros inorder to read only the needed memory.
 138  *
 139  * @param oct    Pointer to current octeon device
 140  * @param base   64bit physical address of the complete structure
 141  * @param offset Offset from the beginning of the structure to the member being
 142  *               accessed.
 143  * @param size   Size of the structure member.
 144  *
 145  * @return Value of the structure member promoted into a u64.
 146  */
 147 static inline u64 __cvmx_bootmem_desc_get(struct octeon_device *oct,
 148                                           u64 base,
 149                                           u32 offset,
 150                                           u32 size)
 151 {
 152         base = (1ull << 63) | (base + offset);
 153         switch (size) {
 154         case 4:
 155                 return octeon_read_device_mem32(oct, base);
 156         case 8:
 157                 return octeon_read_device_mem64(oct, base);
 158         default:
 159                 return 0;
 160         }
 161 }
 162
 163 /**
 164  * This function retrieves the string name of a named block. It is
 165  * more complicated than a simple memcpy() since the named block
 166  * descriptor may not be directly accessible.
 167  *
 168  * @param addr   Physical address of the named block descriptor
 169  * @param str    String to receive the named block string name
 170  * @param len    Length of the string buffer, which must match the length
 171  *               stored in the bootmem descriptor.
 172  */
 173 static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct,
 174                                         u64 addr,
 175                                         char *str,
 176                                         u32 len)
 177 {
 178         addr += offsetof(struct cvmx_bootmem_named_block_desc, name);
 179         octeon_pci_read_core_mem(oct, addr, (u8 *)str, len);
 180         str[len] = 0;
 181 }
 182
 183 /* See header file for descriptions of functions */
 184
 185 /**
 186  * Check the version information on the bootmem descriptor
 187  *
 188  * @param exact_match
 189  *               Exact major version to check against. A zero means
 190  *               check that the version supports named blocks.
 191  *
 192  * @return Zero if the version is correct. Negative if the version is
 193  *         incorrect. Failures also cause a message to be displayed.
 194  */
 195 static int __cvmx_bootmem_check_version(struct octeon_device *oct,
 196                                         u32 exact_match)
 197 {
 198         u32 major_version;
 199         u32 minor_version;
 200
 201         if (!oct->bootmem_desc_addr)
 202                 oct->bootmem_desc_addr =
 203                         octeon_read_device_mem64(oct,
 204                                                  BOOTLOADER_PCI_READ_DESC_ADDR);
 205         major_version = (u32)__cvmx_bootmem_desc_get(
 206                         oct, oct->bootmem_desc_addr,
 207                         offsetof(struct cvmx_bootmem_desc, major_version),
 208                         FIELD_SIZEOF(struct cvmx_bootmem_desc, major_version));
 209         minor_version = (u32)__cvmx_bootmem_desc_get(
 210                         oct, oct->bootmem_desc_addr,
 211                         offsetof(struct cvmx_bootmem_desc, minor_version),
 212                         FIELD_SIZEOF(struct cvmx_bootmem_desc, minor_version));
 213
 214         dev_dbg(&oct->pci_dev->dev, "%s: major_version=%d\n", __func__,
 215                 major_version);
 216         if ((major_version > 3) ||
 217             (exact_match && major_version != exact_match)) {
 218                 dev_err(&oct->pci_dev->dev, "bootmem ver mismatch %d.%d addr:0x%llx\n",
 219                         major_version, minor_version,
 220                         (long long)oct->bootmem_desc_addr);
 221                 return -1;
 222         } else {
 223                 return 0;
 224         }
 225 }
 226
 227 static const struct cvmx_bootmem_named_block_desc
 228 *__cvmx_bootmem_find_named_block_flags(struct octeon_device *oct,
 229                                         const char *name, u32 flags)
 230 {
 231         struct cvmx_bootmem_named_block_desc *desc =
 232                 &oct->bootmem_named_block_desc;
 233         u64 named_addr = cvmx_bootmem_phy_named_block_find(oct, name, flags);
 234
 235         if (named_addr) {
 236                 desc->base_addr = __cvmx_bootmem_desc_get(
 237                                 oct, named_addr,
 238                                 offsetof(struct cvmx_bootmem_named_block_desc,
 239                                          base_addr),
 240                                 FIELD_SIZEOF(
 241                                         struct cvmx_bootmem_named_block_desc,
 242                                         base_addr));
 243                 desc->size = __cvmx_bootmem_desc_get(oct, named_addr,
 244                                 offsetof(struct cvmx_bootmem_named_block_desc,
 245                                          size),
 246                                 FIELD_SIZEOF(
 247                                         struct cvmx_bootmem_named_block_desc,
 248                                         size));
 249
 250                 strncpy(desc->name, name, sizeof(desc->name));
 251                 desc->name[sizeof(desc->name) - 1] = 0;
 252                 return &oct->bootmem_named_block_desc;
 253         } else {
 254                 return NULL;
 255         }
 256 }
 257
 258 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
 259                                              const char *name,
 260                                              u32 flags)
 261 {
 262         u64 result = 0;
 263
 264         if (!__cvmx_bootmem_check_version(oct, 3)) {
 265                 u32 i;
 266
 267                 u64 named_block_array_addr = __cvmx_bootmem_desc_get(
 268                                         oct, oct->bootmem_desc_addr,
 269                                         offsetof(struct cvmx_bootmem_desc,
 270                                                  named_block_array_addr),
 271                                         FIELD_SIZEOF(struct cvmx_bootmem_desc,
 272                                                      named_block_array_addr));
 273                 u32 num_blocks = (u32)__cvmx_bootmem_desc_get(
 274                                         oct, oct->bootmem_desc_addr,
 275                                         offsetof(struct cvmx_bootmem_desc,
 276                                                  nb_num_blocks),
 277                                         FIELD_SIZEOF(struct cvmx_bootmem_desc,
 278                                                      nb_num_blocks));
 279
 280                 u32 name_length = (u32)__cvmx_bootmem_desc_get(
 281                                         oct, oct->bootmem_desc_addr,
 282                                         offsetof(struct cvmx_bootmem_desc,
 283                                                  named_block_name_len),
 284                                         FIELD_SIZEOF(struct cvmx_bootmem_desc,
 285                                                      named_block_name_len));
 286
 287                 u64 named_addr = named_block_array_addr;
 288
 289                 for (i = 0; i < num_blocks; i++) {
 290                         u64 named_size = __cvmx_bootmem_desc_get(
 291                                         oct, named_addr,
 292                                          offsetof(
 293                                         struct cvmx_bootmem_named_block_desc,
 294                                         size),
 295                                          FIELD_SIZEOF(
 296                                         struct cvmx_bootmem_named_block_desc,
 297                                         size));
 298
 299                         if (name && named_size) {
 300                                 char *name_tmp =
 301                                         kmalloc(name_length + 1, GFP_KERNEL);
 302                                 if (!name_tmp)
 303                                         break;
 304
 305                                 CVMX_BOOTMEM_NAMED_GET_NAME(oct, named_addr,
 306                                                             name_tmp,
 307                                                             name_length);
 308                                 if (!strncmp(name, name_tmp, name_length)) {
 309                                         result = named_addr;
 310                                         kfree(name_tmp);
 311                                         break;
 312                                 }
 313                                 kfree(name_tmp);
 314                         } else if (!name && !named_size) {
 315                                 result = named_addr;
 316                                 break;
 317                         }
 318
 319                         named_addr +=
 320                                 sizeof(struct cvmx_bootmem_named_block_desc);
 321                 }
 322         }
 323         return result;
 324 }
 325
 326 /**
 327  * Find a named block on the remote Octeon
 328  *
 329  * @param name      Name of block to find
 330  * @param base_addr Address the block is at (OUTPUT)
 331  * @param size      The size of the block (OUTPUT)
 332  *
 333  * @return Zero on success, One on failure.
 334  */
 335 static int octeon_named_block_find(struct octeon_device *oct, const char *name,
 336                                    u64 *base_addr, u64 *size)
 337 {
 338         const struct cvmx_bootmem_named_block_desc *named_block;
 339
 340         octeon_remote_lock();
 341         named_block = __cvmx_bootmem_find_named_block_flags(oct, name, 0);
 342         octeon_remote_unlock();
 343         if (named_block) {
 344                 *base_addr = named_block->base_addr;
 345                 *size = named_block->size;
 346                 return 0;
 347         }
 348         return 1;
 349 }
 350
 351 static void octeon_remote_lock(void)
 352 {
 353         /* fill this in if any sharing is needed */
 354 }
 355
 356 static void octeon_remote_unlock(void)
 357 {
 358         /* fill this in if any sharing is needed */
 359 }
 360
 361 int octeon_console_send_cmd(struct octeon_device *oct, char *cmd_str,
 362                             u32 wait_hundredths)
 363 {
 364         u32 len = (u32)strlen(cmd_str);
 365
 366         dev_dbg(&oct->pci_dev->dev, "sending \"%s\" to bootloader\n", cmd_str);
 367
 368         if (len > BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN - 1) {
 369                 dev_err(&oct->pci_dev->dev, "Command string too long, max length is: %d\n",
 370                         BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN - 1);
 371                 return -1;
 372         }
 373
 374         if (octeon_wait_for_bootloader(oct, wait_hundredths) != 0) {
 375                 dev_err(&oct->pci_dev->dev, "Bootloader not ready for command.\n");
 376                 return -1;
 377         }
 378
 379         /* Write command to bootloader */
 380         octeon_remote_lock();
 381         octeon_pci_write_core_mem(oct, BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR,
 382                                   (u8 *)cmd_str, len);
 383         octeon_write_device_mem32(oct, BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR,
 384                                   len);
 385         octeon_write_device_mem32(oct, BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR,
 386                                   OCTEON_PCI_IO_BUF_OWNER_OCTEON);
 387
 388         /* Bootloader should accept command very quickly
 389          * if it really was ready
 390          */
 391         if (octeon_wait_for_bootloader(oct, 200) != 0) {
 392                 octeon_remote_unlock();
 393                 dev_err(&oct->pci_dev->dev, "Bootloader did not accept command.\n");
 394                 return -1;
 395         }
 396         octeon_remote_unlock();
 397         return 0;
 398 }
 399
 400 int octeon_wait_for_bootloader(struct octeon_device *oct,
 401                                u32 wait_time_hundredths)
 402 {
 403         dev_dbg(&oct->pci_dev->dev, "waiting %d0 ms for bootloader\n",
 404                 wait_time_hundredths);
 405
 406         if (octeon_mem_access_ok(oct))
 407                 return -1;
 408
 409         while (wait_time_hundredths > 0 &&
 410                octeon_read_device_mem32(oct,
 411                                         BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR)
 412                != OCTEON_PCI_IO_BUF_OWNER_HOST) {
 413                 if (--wait_time_hundredths <= 0)
 414                         return -1;
 415                 schedule_timeout_uninterruptible(HZ / 100);
 416         }
 417         return 0;
 418 }
 419
 420 static void octeon_console_handle_result(struct octeon_device *oct,
 421                                          size_t console_num)
 422 {
 423         struct octeon_console *console;
 424
 425         console = &oct->console[console_num];
 426
 427         console->waiting = 0;
 428 }
 429
 430 static char console_buffer[OCTEON_CONSOLE_MAX_READ_BYTES];
 431
 432 static void output_console_line(struct octeon_device *oct,
 433                                 struct octeon_console *console,
 434                                 size_t console_num,
 435                                 char *console_buffer,
 436                                 s32 bytes_read)
 437 {
 438         char *line;
 439         s32 i;
 440         size_t len;
 441
 442         line = console_buffer;
 443         for (i = 0; i < bytes_read; i++) {
 444                 /* Output a line at a time, prefixed */
 445                 if (console_buffer[i] == '\n') {
 446                         console_buffer[i] = '\0';
 447                         /* We need to output 'line', prefaced by 'leftover'.
 448                          * However, it is possible we're being called to
 449                          * output 'leftover' by itself (in the case of nothing
 450                          * having been read from the console).
 451                          *
 452                          * To avoid duplication, check for this condition.
 453                          */
 454                         if (console->leftover[0] &&
 455                             (line != console->leftover)) {
 456                                 if (console->print)
 457                                         (*console->print)(oct, (u32)console_num,
 458                                                           console->leftover,
 459                                                           line);
 460                                 console->leftover[0] = '\0';
 461                         } else {
 462                                 if (console->print)
 463                                         (*console->print)(oct, (u32)console_num,
 464                                                           line, NULL);
 465                         }
 466                         line = &console_buffer[i + 1];
 467                 }
 468         }
 469
 470         /* Save off any leftovers */
 471         if (line != &console_buffer[bytes_read]) {
 472                 console_buffer[bytes_read] = '\0';
 473                 len = strlen(console->leftover);
 474                 strncpy(&console->leftover[len], line,
 475                         sizeof(console->leftover) - len);
 476         }
 477 }
 478
 479 static void check_console(struct work_struct *work)
 480 {
 481         s32 bytes_read, tries, total_read;
 482         size_t len;
 483         struct octeon_console *console;
 484         struct cavium_wk *wk = (struct cavium_wk *)work;
 485         struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
 486         u32 console_num = (u32)wk->ctxul;
 487         u32 delay;
 488
 489         console = &oct->console[console_num];
 490         tries = 0;
 491         total_read = 0;
 492
 493         do {
 494                 /* Take console output regardless of whether it will
 495                  * be logged
 496                  */
 497                 bytes_read =
 498                         octeon_console_read(oct, console_num, console_buffer,
 499                                             sizeof(console_buffer) - 1);
 500                 if (bytes_read > 0) {
 501                         total_read += bytes_read;
 502                         if (console->waiting)
 503                                 octeon_console_handle_result(oct, console_num);
 504                         if (console->print) {
 505                                 output_console_line(oct, console, console_num,
 506                                                     console_buffer, bytes_read);
 507                         }
 508                 } else if (bytes_read < 0) {
 509                         dev_err(&oct->pci_dev->dev, "Error reading console %u, ret=%d\n",
 510                                 console_num, bytes_read);
 511                 }
 512
 513                 tries++;
 514         } while ((bytes_read > 0) && (tries < 16));
 515
 516         /* If nothing is read after polling the console,
 517          * output any leftovers if any
 518          */
 519         if (console->print && (total_read == 0) &&
 520             (console->leftover[0])) {
 521                 /* append '\n' as terminator for 'output_console_line' */
 522                 len = strlen(console->leftover);
 523                 console->leftover[len] = '\n';
 524                 output_console_line(oct, console, console_num,
 525                                     console->leftover, (s32)(len + 1));
 526                 console->leftover[0] = '\0';
 527         }
 528
 529         delay = OCTEON_CONSOLE_POLL_INTERVAL_MS;
 530
 531         schedule_delayed_work(&wk->work, msecs_to_jiffies(delay));
 532 }
 533
 534 int octeon_init_consoles(struct octeon_device *oct)
 535 {
 536         int ret = 0;
 537         u64 addr, size;
 538
 539         ret = octeon_mem_access_ok(oct);
 540         if (ret) {
 541                 dev_err(&oct->pci_dev->dev, "Memory access not okay'\n");
 542                 return ret;
 543         }
 544
 545         ret = octeon_named_block_find(oct, OCTEON_PCI_CONSOLE_BLOCK_NAME, &addr,
 546                                       &size);
 547         if (ret) {
 548                 dev_err(&oct->pci_dev->dev, "Could not find console '%s'\n",
 549                         OCTEON_PCI_CONSOLE_BLOCK_NAME);
 550                 return ret;
 551         }
 552
 553         /* Dedicate one of Octeon's BAR1 index registers to create a static
 554          * mapping to a region of Octeon DRAM that contains the PCI console
 555          * named block.
 556          */
 557         oct->console_nb_info.bar1_index = BAR1_INDEX_STATIC_MAP;
 558         oct->fn_list.bar1_idx_setup(oct, addr, oct->console_nb_info.bar1_index,
 559                                     true);
 560         oct->console_nb_info.dram_region_base = addr
 561                 & ~(OCTEON_BAR1_ENTRY_SIZE - 1ULL);
 562
 563         /* num_consoles > 0, is an indication that the consoles
 564          * are accessible
 565          */
 566         oct->num_consoles = octeon_read_device_mem32(oct,
 567                 addr + offsetof(struct octeon_pci_console_desc,
 568                         num_consoles));
 569         oct->console_desc_addr = addr;
 570
 571         dev_dbg(&oct->pci_dev->dev, "Initialized consoles. %d available\n",
 572                 oct->num_consoles);
 573
 574         return ret;
 575 }
 576
 577 static void octeon_get_uboot_version(struct octeon_device *oct)
 578 {
 579         s32 bytes_read, tries, total_read;
 580         struct octeon_console *console;
 581         u32 console_num = 0;
 582         char *uboot_ver;
 583         char *buf;
 584         char *p;
 585
 586 #define OCTEON_UBOOT_VER_BUF_SIZE 512
 587         buf = kmalloc(OCTEON_UBOOT_VER_BUF_SIZE, GFP_KERNEL);
 588         if (!buf)
 589                 return;
 590
 591         if (octeon_console_send_cmd(oct, "setenv stdout pci\n", 50)) {
 592                 kfree(buf);
 593                 return;
 594         }
 595
 596         if (octeon_console_send_cmd(oct, "version\n", 1)) {
 597                 kfree(buf);
 598                 return;
 599         }
 600
 601         console = &oct->console[console_num];
 602         tries = 0;
 603         total_read = 0;
 604
 605         do {
 606                 /* Take console output regardless of whether it will
 607                  * be logged
 608                  */
 609                 bytes_read =
 610                         octeon_console_read(oct,
 611                                             console_num, buf + total_read,
 612                                             OCTEON_UBOOT_VER_BUF_SIZE - 1 -
 613                                             total_read);
 614                 if (bytes_read > 0) {
 615                         buf[bytes_read] = '\0';
 616
 617                         total_read += bytes_read;
 618                         if (console->waiting)
 619                                 octeon_console_handle_result(oct, console_num);
 620                 } else if (bytes_read < 0) {
 621                         dev_err(&oct->pci_dev->dev, "Error reading console %u, ret=%d\n",
 622                                 console_num, bytes_read);
 623                 }
 624
 625                 tries++;
 626         } while ((bytes_read > 0) && (tries < 16));
 627
 628         /* If nothing is read after polling the console,
 629          * output any leftovers if any
 630          */
 631         if ((total_read == 0) && (console->leftover[0])) {
 632                 dev_dbg(&oct->pci_dev->dev, "%u: %s\n",
 633                         console_num, console->leftover);
 634                 console->leftover[0] = '\0';
 635         }
 636
 637         buf[OCTEON_UBOOT_VER_BUF_SIZE - 1] = '\0';
 638
 639         uboot_ver = strstr(buf, "U-Boot");
 640         if (uboot_ver) {
 641                 p = strstr(uboot_ver, "mips");
 642                 if (p) {
 643                         p--;
 644                         *p = '\0';
 645                         dev_info(&oct->pci_dev->dev, "%s\n", uboot_ver);
 646                 }
 647         }
 648
 649         kfree(buf);
 650         octeon_console_send_cmd(oct, "setenv stdout serial\n", 50);
 651 }
 652
 653 int octeon_add_console(struct octeon_device *oct, u32 console_num,
 654                        char *dbg_enb)
 655 {
 656         int ret = 0;
 657         u32 delay;
 658         u64 coreaddr;
 659         struct delayed_work *work;
 660         struct octeon_console *console;
 661
 662         if (console_num >= oct->num_consoles) {
 663                 dev_err(&oct->pci_dev->dev,
 664                         "trying to read from console number %d when only 0 to %d exist\n",
 665                         console_num, oct->num_consoles);
 666         } else {
 667                 console = &oct->console[console_num];
 668
 669                 console->waiting = 0;
 670
 671                 coreaddr = oct->console_desc_addr + console_num * 8 +
 672                         offsetof(struct octeon_pci_console_desc,
 673                                  console_addr_array);
 674                 console->addr = octeon_read_device_mem64(oct, coreaddr);
 675                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 676                                                     buf_size);
 677                 console->buffer_size = octeon_read_device_mem32(oct, coreaddr);
 678                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 679                                                     input_base_addr);
 680                 console->input_base_addr =
 681                         octeon_read_device_mem64(oct, coreaddr);
 682                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 683                                                     output_base_addr);
 684                 console->output_base_addr =
 685                         octeon_read_device_mem64(oct, coreaddr);
 686                 console->leftover[0] = '\0';
 687
 688                 work = &oct->console_poll_work[console_num].work;
 689
 690                 octeon_get_uboot_version(oct);
 691
 692                 INIT_DELAYED_WORK(work, check_console);
 693                 oct->console_poll_work[console_num].ctxptr = (void *)oct;
 694                 oct->console_poll_work[console_num].ctxul = console_num;
 695                 delay = OCTEON_CONSOLE_POLL_INTERVAL_MS;
 696                 schedule_delayed_work(work, msecs_to_jiffies(delay));
 697
 698                 /* an empty string means use default debug console enablement */
 699                 if (dbg_enb && !dbg_enb[0])
 700                         dbg_enb = "setenv pci_console_active 1";
 701                 if (dbg_enb)
 702                         ret = octeon_console_send_cmd(oct, dbg_enb, 2000);
 703
 704                 console->active = 1;
 705         }
 706
 707         return ret;
 708 }
 709
 710 /**
 711  * Removes all consoles
 712  *
 713  * @param oct         octeon device
 714  */
 715 void octeon_remove_consoles(struct octeon_device *oct)
 716 {
 717         u32 i;
 718         struct octeon_console *console;
 719
 720         for (i = 0; i < oct->num_consoles; i++) {
 721                 console = &oct->console[i];
 722
 723                 if (!console->active)
 724                         continue;
 725
 726                 cancel_delayed_work_sync(&oct->console_poll_work[i].
 727                                                 work);
 728                 console->addr = 0;
 729                 console->buffer_size = 0;
 730                 console->input_base_addr = 0;
 731                 console->output_base_addr = 0;
 732         }
 733
 734         oct->num_consoles = 0;
 735 }
 736
 737 static inline int octeon_console_free_bytes(u32 buffer_size,
 738                                             u32 wr_idx,
 739                                             u32 rd_idx)
 740 {
 741         if (rd_idx >= buffer_size || wr_idx >= buffer_size)
 742                 return -1;
 743
 744         return ((buffer_size - 1) - (wr_idx - rd_idx)) % buffer_size;
 745 }
 746
 747 static inline int octeon_console_avail_bytes(u32 buffer_size,
 748                                              u32 wr_idx,
 749                                              u32 rd_idx)
 750 {
 751         if (rd_idx >= buffer_size || wr_idx >= buffer_size)
 752                 return -1;
 753
 754         return buffer_size - 1 -
 755                octeon_console_free_bytes(buffer_size, wr_idx, rd_idx);
 756 }
 757
 758 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
 759                                char *buffer, u32 buf_size)
 760 {
 761         int bytes_to_read;
 762         u32 rd_idx, wr_idx;
 763         struct octeon_console *console;
 764
 765         if (console_num >= oct->num_consoles) {
 766                 dev_err(&oct->pci_dev->dev, "Attempted to read from disabled console %d\n",
 767                         console_num);
 768                 return 0;
 769         }
 770
 771         console = &oct->console[console_num];
 772
 773         /* Check to see if any data is available.
 774          * Maybe optimize this with 64-bit read.
 775          */
 776         rd_idx = octeon_read_device_mem32(oct, console->addr +
 777                 offsetof(struct octeon_pci_console, output_read_index));
 778         wr_idx = octeon_read_device_mem32(oct, console->addr +
 779                 offsetof(struct octeon_pci_console, output_write_index));
 780
 781         bytes_to_read = octeon_console_avail_bytes(console->buffer_size,
 782                                                    wr_idx, rd_idx);
 783         if (bytes_to_read <= 0)
 784                 return bytes_to_read;
 785
 786         bytes_to_read = min_t(s32, bytes_to_read, buf_size);
 787
 788         /* Check to see if what we want to read is not contiguous, and limit
 789          * ourselves to the contiguous block
 790          */
 791         if (rd_idx + bytes_to_read >= console->buffer_size)
 792                 bytes_to_read = console->buffer_size - rd_idx;
 793
 794         octeon_pci_read_core_mem(oct, console->output_base_addr + rd_idx,
 795                                  (u8 *)buffer, bytes_to_read);
 796         octeon_write_device_mem32(oct, console->addr +
 797                                   offsetof(struct octeon_pci_console,
 798                                            output_read_index),
 799                                   (rd_idx + bytes_to_read) %
 800                                   console->buffer_size);
 801
 802         return bytes_to_read;
 803 }
 804
 805 #define FBUF_SIZE       (4 * 1024 * 1024)
 806
 807 int octeon_download_firmware(struct octeon_device *oct, const u8 *data,
 808                              size_t size)
 809 {
 810         int ret = 0;
 811         u32 crc32_result;
 812         u64 load_addr;
 813         u32 image_len;
 814         struct octeon_firmware_file_header *h;
 815         u32 i, rem;
 816
 817         if (size < sizeof(struct octeon_firmware_file_header)) {
 818                 dev_err(&oct->pci_dev->dev, "Firmware file too small (%d < %d).\n",
 819                         (u32)size,
 820                         (u32)sizeof(struct octeon_firmware_file_header));
 821                 return -EINVAL;
 822         }
 823
 824         h = (struct octeon_firmware_file_header *)data;
 825
 826         if (be32_to_cpu(h->magic) != LIO_NIC_MAGIC) {
 827                 dev_err(&oct->pci_dev->dev, "Unrecognized firmware file.\n");
 828                 return -EINVAL;
 829         }
 830
 831         crc32_result = crc32((unsigned int)~0, data,
 832                              sizeof(struct octeon_firmware_file_header) -
 833                              sizeof(u32)) ^ ~0U;
 834         if (crc32_result != be32_to_cpu(h->crc32)) {
 835                 dev_err(&oct->pci_dev->dev, "Firmware CRC mismatch (0x%08x != 0x%08x).\n",
 836                         crc32_result, be32_to_cpu(h->crc32));
 837                 return -EINVAL;
 838         }
 839
 840         if (strncmp(LIQUIDIO_PACKAGE, h->version, strlen(LIQUIDIO_PACKAGE))) {
 841                 dev_err(&oct->pci_dev->dev, "Unmatched firmware package type. Expected %s, got %s.\n",
 842                         LIQUIDIO_PACKAGE, h->version);
 843                 return -EINVAL;
 844         }
 845
 846         if (memcmp(LIQUIDIO_BASE_VERSION, h->version + strlen(LIQUIDIO_PACKAGE),
 847                    strlen(LIQUIDIO_BASE_VERSION))) {
 848                 dev_err(&oct->pci_dev->dev, "Unmatched firmware version. Expected %s.x, got %s.\n",
 849                         LIQUIDIO_BASE_VERSION,
 850                         h->version + strlen(LIQUIDIO_PACKAGE));
 851                 return -EINVAL;
 852         }
 853
 854         if (be32_to_cpu(h->num_images) > LIO_MAX_IMAGES) {
 855                 dev_err(&oct->pci_dev->dev, "Too many images in firmware file (%d).\n",
 856                         be32_to_cpu(h->num_images));
 857                 return -EINVAL;
 858         }
 859
 860         dev_info(&oct->pci_dev->dev, "Firmware version: %s\n", h->version);
 861         snprintf(oct->fw_info.liquidio_firmware_version, 32, "LIQUIDIO: %s",
 862                  h->version);
 863
 864         data += sizeof(struct octeon_firmware_file_header);
 865
 866         dev_info(&oct->pci_dev->dev, "%s: Loading %d images\n", __func__,
 867                  be32_to_cpu(h->num_images));
 868         /* load all images */
 869         for (i = 0; i < be32_to_cpu(h->num_images); i++) {
 870                 load_addr = be64_to_cpu(h->desc[i].addr);
 871                 image_len = be32_to_cpu(h->desc[i].len);
 872
 873                 dev_info(&oct->pci_dev->dev, "Loading firmware %d at %llx\n",
 874                          image_len, load_addr);
 875
 876                 /* Write in 4MB chunks*/
 877                 rem = image_len;
 878
 879                 while (rem) {
 880                         if (rem < FBUF_SIZE)
 881                                 size = rem;
 882                         else
 883                                 size = FBUF_SIZE;
 884
 885                         /* download the image */
 886                         octeon_pci_write_core_mem(oct, load_addr, data, (u32)size);
 887
 888                         data += size;
 889                         rem -= (u32)size;
 890                         load_addr += size;
 891                 }
 892         }
 893         dev_info(&oct->pci_dev->dev, "Writing boot command: %s\n",
 894                  h->bootcmd);
 895
 896         /* Invoke the bootcmd */
 897         ret = octeon_console_send_cmd(oct, h->bootcmd, 50);
 898
 899         return 0;
 900 }