drivers/net/ethernet/cavium/liquidio/octeon_console.c

   1 /**********************************************************************
   2 * Author: Cavium, Inc.
   3 *
   4 * Contact: support@cavium.com
   5 *          Please include "LiquidIO" in the subject.
   6 *
   7 * Copyright (c) 2003-2015 Cavium, Inc.
   8 *
   9 * This file is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License, Version 2, as
  11 * published by the Free Software Foundation.
  12 *
  13 * This file is distributed in the hope that it will be useful, but
  14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16 * NONINFRINGEMENT.  See the GNU General Public License for more
  17 * details.
  18 *
  19 * This file may also be available under a different license from Cavium.
  20 * Contact Cavium, Inc. for more information
  21 **********************************************************************/
  22
  23 /**
  24  * @file octeon_console.c
  25  */
  26 #include <linux/pci.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/crc32.h>
  29 #include "liquidio_common.h"
  30 #include "octeon_droq.h"
  31 #include "octeon_iq.h"
  32 #include "response_manager.h"
  33 #include "octeon_device.h"
  34 #include "liquidio_image.h"
  35 #include "octeon_mem_ops.h"
  36
  37 static void octeon_remote_lock(void);
  38 static void octeon_remote_unlock(void);
  39 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
  40                                              const char *name,
  41                                              u32 flags);
  42 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
  43                                char *buffer, u32 buf_size);
  44 static u32 console_bitmask;
  45 module_param(console_bitmask, int, 0644);
  46 MODULE_PARM_DESC(console_bitmask,
  47                  "Bitmask indicating which consoles have debug output redirected to syslog.");
  48
  49 #define MIN(a, b) min((a), (b))
  50 #define CAST_ULL(v) ((u64)(v))
  51
  52 #define BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR    0x0006c008
  53 #define BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR     0x0006c004
  54 #define BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR   0x0006c000
  55 #define BOOTLOADER_PCI_READ_DESC_ADDR           0x0006c100
  56 #define BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN     248
  57
  58 #define OCTEON_PCI_IO_BUF_OWNER_OCTEON    0x00000001
  59 #define OCTEON_PCI_IO_BUF_OWNER_HOST      0x00000002
  60
  61 /** Can change without breaking ABI */
  62 #define CVMX_BOOTMEM_NUM_NAMED_BLOCKS 64
  63
  64 /** minimum alignment of bootmem alloced blocks */
  65 #define CVMX_BOOTMEM_ALIGNMENT_SIZE     (16ull)
  66
  67 /** CVMX bootmem descriptor major version */
  68 #define CVMX_BOOTMEM_DESC_MAJ_VER   3
  69 /* CVMX bootmem descriptor minor version */
  70 #define CVMX_BOOTMEM_DESC_MIN_VER   0
  71
  72 /* Current versions */
  73 #define OCTEON_PCI_CONSOLE_MAJOR_VERSION    1
  74 #define OCTEON_PCI_CONSOLE_MINOR_VERSION    0
  75 #define OCTEON_PCI_CONSOLE_BLOCK_NAME   "__pci_console"
  76 #define OCTEON_CONSOLE_POLL_INTERVAL_MS  100    /* 10 times per second */
  77
  78 /* First three members of cvmx_bootmem_desc are left in original
  79 ** positions for backwards compatibility.
  80 ** Assumes big endian target
  81 */
  82 struct cvmx_bootmem_desc {
  83         /** spinlock to control access to list */
  84         u32 lock;
  85
  86         /** flags for indicating various conditions */
  87         u32 flags;
  88
  89         u64 head_addr;
  90
  91         /** incremented changed when incompatible changes made */
  92         u32 major_version;
  93
  94         /** incremented changed when compatible changes made,
  95          *  reset to zero when major incremented
  96          */
  97         u32 minor_version;
  98
  99         u64 app_data_addr;
 100         u64 app_data_size;
 101
 102         /** number of elements in named blocks array */
 103         u32 nb_num_blocks;
 104
 105         /** length of name array in bootmem blocks */
 106         u32 named_block_name_len;
 107
 108         /** address of named memory block descriptors */
 109         u64 named_block_array_addr;
 110 };
 111
 112 /* Structure that defines a single console.
 113  *
 114  * Note: when read_index == write_index, the buffer is empty.
 115  * The actual usable size of each console is console_buf_size -1;
 116  */
 117 struct octeon_pci_console {
 118         u64 input_base_addr;
 119         u32 input_read_index;
 120         u32 input_write_index;
 121         u64 output_base_addr;
 122         u32 output_read_index;
 123         u32 output_write_index;
 124         u32 lock;
 125         u32 buf_size;
 126 };
 127
 128 /* This is the main container structure that contains all the information
 129  * about all PCI consoles.  The address of this structure is passed to various
 130  * routines that operation on PCI consoles.
 131  */
 132 struct octeon_pci_console_desc {
 133         u32 major_version;
 134         u32 minor_version;
 135         u32 lock;
 136         u32 flags;
 137         u32 num_consoles;
 138         u32 pad;
 139         /* must be 64 bit aligned here... */
 140         /* Array of addresses of octeon_pci_console structures */
 141         u64 console_addr_array[0];
 142         /* Implicit storage for console_addr_array */
 143 };
 144
 145 /**
 146  * This macro returns the size of a member of a structure.
 147  * Logically it is the same as "sizeof(s::field)" in C++, but
 148  * C lacks the "::" operator.
 149  */
 150 #define SIZEOF_FIELD(s, field) sizeof(((s *)NULL)->field)
 151
 152 /**
 153  * This macro returns a member of the cvmx_bootmem_desc
 154  * structure. These members can't be directly addressed as
 155  * they might be in memory not directly reachable. In the case
 156  * where bootmem is compiled with LINUX_HOST, the structure
 157  * itself might be located on a remote Octeon. The argument
 158  * "field" is the member name of the cvmx_bootmem_desc to read.
 159  * Regardless of the type of the field, the return type is always
 160  * a u64.
 161  */
 162 #define CVMX_BOOTMEM_DESC_GET_FIELD(oct, field)                              \
 163         __cvmx_bootmem_desc_get(oct, oct->bootmem_desc_addr,                 \
 164                                 offsetof(struct cvmx_bootmem_desc, field),   \
 165                                 SIZEOF_FIELD(struct cvmx_bootmem_desc, field))
 166
 167 #define __cvmx_bootmem_lock(flags)      (flags = flags)
 168 #define __cvmx_bootmem_unlock(flags)    (flags = flags)
 169
 170 /**
 171  * This macro returns a member of the
 172  * cvmx_bootmem_named_block_desc structure. These members can't
 173  * be directly addressed as they might be in memory not directly
 174  * reachable. In the case where bootmem is compiled with
 175  * LINUX_HOST, the structure itself might be located on a remote
 176  * Octeon. The argument "field" is the member name of the
 177  * cvmx_bootmem_named_block_desc to read. Regardless of the type
 178  * of the field, the return type is always a u64. The "addr"
 179  * parameter is the physical address of the structure.
 180  */
 181 #define CVMX_BOOTMEM_NAMED_GET_FIELD(oct, addr, field)                   \
 182         __cvmx_bootmem_desc_get(oct, addr,                               \
 183                 offsetof(struct cvmx_bootmem_named_block_desc, field),   \
 184                 SIZEOF_FIELD(struct cvmx_bootmem_named_block_desc, field))
 185 /**
 186  * \brief determines if a given console has debug enabled.
 187  * @param console console to check
 188  * @returns  1 = enabled. 0 otherwise
 189  */
 190 static int octeon_console_debug_enabled(u32 console)
 191 {
 192         return (console_bitmask >> (console)) & 0x1;
 193 }
 194
 195 /**
 196  * This function is the implementation of the get macros defined
 197  * for individual structure members. The argument are generated
 198  * by the macros inorder to read only the needed memory.
 199  *
 200  * @param oct    Pointer to current octeon device
 201  * @param base   64bit physical address of the complete structure
 202  * @param offset Offset from the beginning of the structure to the member being
 203  *               accessed.
 204  * @param size   Size of the structure member.
 205  *
 206  * @return Value of the structure member promoted into a u64.
 207  */
 208 static inline u64 __cvmx_bootmem_desc_get(struct octeon_device *oct,
 209                                           u64 base,
 210                                           u32 offset,
 211                                           u32 size)
 212 {
 213         base = (1ull << 63) | (base + offset);
 214         switch (size) {
 215         case 4:
 216                 return octeon_read_device_mem32(oct, base);
 217         case 8:
 218                 return octeon_read_device_mem64(oct, base);
 219         default:
 220                 return 0;
 221         }
 222 }
 223
 224 /**
 225  * This function retrieves the string name of a named block. It is
 226  * more complicated than a simple memcpy() since the named block
 227  * descriptor may not be directly accessible.
 228  *
 229  * @param addr   Physical address of the named block descriptor
 230  * @param str    String to receive the named block string name
 231  * @param len    Length of the string buffer, which must match the length
 232  *               stored in the bootmem descriptor.
 233  */
 234 static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct,
 235                                         u64 addr,
 236                                         char *str,
 237                                         u32 len)
 238 {
 239         addr += offsetof(struct cvmx_bootmem_named_block_desc, name);
 240         octeon_pci_read_core_mem(oct, addr, (u8 *)str, len);
 241         str[len] = 0;
 242 }
 243
 244 /* See header file for descriptions of functions */
 245
 246 /**
 247  * Check the version information on the bootmem descriptor
 248  *
 249  * @param exact_match
 250  *               Exact major version to check against. A zero means
 251  *               check that the version supports named blocks.
 252  *
 253  * @return Zero if the version is correct. Negative if the version is
 254  *         incorrect. Failures also cause a message to be displayed.
 255  */
 256 static int __cvmx_bootmem_check_version(struct octeon_device *oct,
 257                                         u32 exact_match)
 258 {
 259         u32 major_version;
 260         u32 minor_version;
 261
 262         if (!oct->bootmem_desc_addr)
 263                 oct->bootmem_desc_addr =
 264                         octeon_read_device_mem64(oct,
 265                                                  BOOTLOADER_PCI_READ_DESC_ADDR);
 266         major_version =
 267                 (u32)CVMX_BOOTMEM_DESC_GET_FIELD(oct, major_version);
 268         minor_version =
 269                 (u32)CVMX_BOOTMEM_DESC_GET_FIELD(oct, minor_version);
 270         dev_dbg(&oct->pci_dev->dev, "%s: major_version=%d\n", __func__,
 271                 major_version);
 272         if ((major_version > 3) ||
 273             (exact_match && major_version != exact_match)) {
 274                 dev_err(&oct->pci_dev->dev, "bootmem ver mismatch %d.%d addr:0x%llx\n",
 275                         major_version, minor_version,
 276                         CAST_ULL(oct->bootmem_desc_addr));
 277                 return -1;
 278         } else {
 279                 return 0;
 280         }
 281 }
 282
 283 static const struct cvmx_bootmem_named_block_desc
 284 *__cvmx_bootmem_find_named_block_flags(struct octeon_device *oct,
 285                                         const char *name, u32 flags)
 286 {
 287         struct cvmx_bootmem_named_block_desc *desc =
 288                 &oct->bootmem_named_block_desc;
 289         u64 named_addr = cvmx_bootmem_phy_named_block_find(oct, name, flags);
 290
 291         if (named_addr) {
 292                 desc->base_addr = CVMX_BOOTMEM_NAMED_GET_FIELD(oct, named_addr,
 293                                                                base_addr);
 294                 desc->size =
 295                         CVMX_BOOTMEM_NAMED_GET_FIELD(oct, named_addr, size);
 296                 strncpy(desc->name, name, sizeof(desc->name));
 297                 desc->name[sizeof(desc->name) - 1] = 0;
 298                 return &oct->bootmem_named_block_desc;
 299         } else {
 300                 return NULL;
 301         }
 302 }
 303
 304 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
 305                                              const char *name,
 306                                              u32 flags)
 307 {
 308         u64 result = 0;
 309
 310         __cvmx_bootmem_lock(flags);
 311         if (!__cvmx_bootmem_check_version(oct, 3)) {
 312                 u32 i;
 313                 u64 named_block_array_addr =
 314                         CVMX_BOOTMEM_DESC_GET_FIELD(oct,
 315                                                     named_block_array_addr);
 316                 u32 num_blocks = (u32)
 317                         CVMX_BOOTMEM_DESC_GET_FIELD(oct, nb_num_blocks);
 318                 u32 name_length = (u32)
 319                         CVMX_BOOTMEM_DESC_GET_FIELD(oct, named_block_name_len);
 320                 u64 named_addr = named_block_array_addr;
 321
 322                 for (i = 0; i < num_blocks; i++) {
 323                         u64 named_size =
 324                                 CVMX_BOOTMEM_NAMED_GET_FIELD(oct, named_addr,
 325                                                              size);
 326                         if (name && named_size) {
 327                                 char *name_tmp =
 328                                         kmalloc(name_length + 1, GFP_KERNEL);
 329                                 if (!name_tmp)
 330                                         break;
 331
 332                                 CVMX_BOOTMEM_NAMED_GET_NAME(oct, named_addr,
 333                                                             name_tmp,
 334                                                             name_length);
 335                                 if (!strncmp(name, name_tmp, name_length)) {
 336                                         result = named_addr;
 337                                         kfree(name_tmp);
 338                                         break;
 339                                 }
 340                                 kfree(name_tmp);
 341                         } else if (!name && !named_size) {
 342                                 result = named_addr;
 343                                 break;
 344                         }
 345
 346                         named_addr +=
 347                                 sizeof(struct cvmx_bootmem_named_block_desc);
 348                 }
 349         }
 350         __cvmx_bootmem_unlock(flags);
 351         return result;
 352 }
 353
 354 /**
 355  * Find a named block on the remote Octeon
 356  *
 357  * @param name      Name of block to find
 358  * @param base_addr Address the block is at (OUTPUT)
 359  * @param size      The size of the block (OUTPUT)
 360  *
 361  * @return Zero on success, One on failure.
 362  */
 363 static int octeon_named_block_find(struct octeon_device *oct, const char *name,
 364                                    u64 *base_addr, u64 *size)
 365 {
 366         const struct cvmx_bootmem_named_block_desc *named_block;
 367
 368         octeon_remote_lock();
 369         named_block = __cvmx_bootmem_find_named_block_flags(oct, name, 0);
 370         octeon_remote_unlock();
 371         if (named_block) {
 372                 *base_addr = named_block->base_addr;
 373                 *size = named_block->size;
 374                 return 0;
 375         }
 376         return 1;
 377 }
 378
 379 static void octeon_remote_lock(void)
 380 {
 381         /* fill this in if any sharing is needed */
 382 }
 383
 384 static void octeon_remote_unlock(void)
 385 {
 386         /* fill this in if any sharing is needed */
 387 }
 388
 389 int octeon_console_send_cmd(struct octeon_device *oct, char *cmd_str,
 390                             u32 wait_hundredths)
 391 {
 392         u32 len = (u32)strlen(cmd_str);
 393
 394         dev_dbg(&oct->pci_dev->dev, "sending \"%s\" to bootloader\n", cmd_str);
 395
 396         if (len > BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN - 1) {
 397                 dev_err(&oct->pci_dev->dev, "Command string too long, max length is: %d\n",
 398                         BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN - 1);
 399                 return -1;
 400         }
 401
 402         if (octeon_wait_for_bootloader(oct, wait_hundredths) != 0) {
 403                 dev_err(&oct->pci_dev->dev, "Bootloader not ready for command.\n");
 404                 return -1;
 405         }
 406
 407         /* Write command to bootloader */
 408         octeon_remote_lock();
 409         octeon_pci_write_core_mem(oct, BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR,
 410                                   (u8 *)cmd_str, len);
 411         octeon_write_device_mem32(oct, BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR,
 412                                   len);
 413         octeon_write_device_mem32(oct, BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR,
 414                                   OCTEON_PCI_IO_BUF_OWNER_OCTEON);
 415
 416         /* Bootloader should accept command very quickly
 417          * if it really was ready
 418          */
 419         if (octeon_wait_for_bootloader(oct, 200) != 0) {
 420                 octeon_remote_unlock();
 421                 dev_err(&oct->pci_dev->dev, "Bootloader did not accept command.\n");
 422                 return -1;
 423         }
 424         octeon_remote_unlock();
 425         return 0;
 426 }
 427
 428 int octeon_wait_for_bootloader(struct octeon_device *oct,
 429                                u32 wait_time_hundredths)
 430 {
 431         dev_dbg(&oct->pci_dev->dev, "waiting %d0 ms for bootloader\n",
 432                 wait_time_hundredths);
 433
 434         if (octeon_mem_access_ok(oct))
 435                 return -1;
 436
 437         while (wait_time_hundredths > 0 &&
 438                octeon_read_device_mem32(oct,
 439                                         BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR)
 440                != OCTEON_PCI_IO_BUF_OWNER_HOST) {
 441                 if (--wait_time_hundredths <= 0)
 442                         return -1;
 443                 schedule_timeout_uninterruptible(HZ / 100);
 444         }
 445         return 0;
 446 }
 447
 448 static void octeon_console_handle_result(struct octeon_device *oct,
 449                                          size_t console_num)
 450 {
 451         struct octeon_console *console;
 452
 453         console = &oct->console[console_num];
 454
 455         console->waiting = 0;
 456 }
 457
 458 static char console_buffer[OCTEON_CONSOLE_MAX_READ_BYTES];
 459
 460 static void output_console_line(struct octeon_device *oct,
 461                                 struct octeon_console *console,
 462                                 size_t console_num,
 463                                 char *console_buffer,
 464                                 s32 bytes_read)
 465 {
 466         char *line;
 467         s32 i;
 468
 469         line = console_buffer;
 470         for (i = 0; i < bytes_read; i++) {
 471                 /* Output a line at a time, prefixed */
 472                 if (console_buffer[i] == '\n') {
 473                         console_buffer[i] = '\0';
 474                         if (console->leftover[0]) {
 475                                 dev_info(&oct->pci_dev->dev, "%lu: %s%s\n",
 476                                          console_num, console->leftover,
 477                                          line);
 478                                 console->leftover[0] = '\0';
 479                         } else {
 480                                 dev_info(&oct->pci_dev->dev, "%lu: %s\n",
 481                                          console_num, line);
 482                         }
 483                         line = &console_buffer[i + 1];
 484                 }
 485         }
 486
 487         /* Save off any leftovers */
 488         if (line != &console_buffer[bytes_read]) {
 489                 console_buffer[bytes_read] = '\0';
 490                 strcpy(console->leftover, line);
 491         }
 492 }
 493
 494 static void check_console(struct work_struct *work)
 495 {
 496         s32 bytes_read, tries, total_read;
 497         struct octeon_console *console;
 498         struct cavium_wk *wk = (struct cavium_wk *)work;
 499         struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
 500         u32 console_num = (u32)wk->ctxul;
 501         u32 delay;
 502
 503         console = &oct->console[console_num];
 504         tries = 0;
 505         total_read = 0;
 506
 507         do {
 508                 /* Take console output regardless of whether it will
 509                  * be logged
 510                  */
 511                 bytes_read =
 512                         octeon_console_read(oct, console_num, console_buffer,
 513                                             sizeof(console_buffer) - 1);
 514                 if (bytes_read > 0) {
 515                         total_read += bytes_read;
 516                         if (console->waiting)
 517                                 octeon_console_handle_result(oct, console_num);
 518                         if (octeon_console_debug_enabled(console_num)) {
 519                                 output_console_line(oct, console, console_num,
 520                                                     console_buffer, bytes_read);
 521                         }
 522                 } else if (bytes_read < 0) {
 523                         dev_err(&oct->pci_dev->dev, "Error reading console %u, ret=%d\n",
 524                                 console_num, bytes_read);
 525                 }
 526
 527                 tries++;
 528         } while ((bytes_read > 0) && (tries < 16));
 529
 530         /* If nothing is read after polling the console,
 531          * output any leftovers if any
 532          */
 533         if (octeon_console_debug_enabled(console_num) &&
 534             (total_read == 0) && (console->leftover[0])) {
 535                 dev_info(&oct->pci_dev->dev, "%u: %s\n",
 536                          console_num, console->leftover);
 537                 console->leftover[0] = '\0';
 538         }
 539
 540         delay = OCTEON_CONSOLE_POLL_INTERVAL_MS;
 541
 542         schedule_delayed_work(&wk->work, msecs_to_jiffies(delay));
 543 }
 544
 545 int octeon_init_consoles(struct octeon_device *oct)
 546 {
 547         int ret = 0;
 548         u64 addr, size;
 549
 550         ret = octeon_mem_access_ok(oct);
 551         if (ret) {
 552                 dev_err(&oct->pci_dev->dev, "Memory access not okay'\n");
 553                 return ret;
 554         }
 555
 556         ret = octeon_named_block_find(oct, OCTEON_PCI_CONSOLE_BLOCK_NAME, &addr,
 557                                       &size);
 558         if (ret) {
 559                 dev_err(&oct->pci_dev->dev, "Could not find console '%s'\n",
 560                         OCTEON_PCI_CONSOLE_BLOCK_NAME);
 561                 return ret;
 562         }
 563
 564         /* num_consoles > 0, is an indication that the consoles
 565          * are accessible
 566          */
 567         oct->num_consoles = octeon_read_device_mem32(oct,
 568                 addr + offsetof(struct octeon_pci_console_desc,
 569                         num_consoles));
 570         oct->console_desc_addr = addr;
 571
 572         dev_dbg(&oct->pci_dev->dev, "Initialized consoles. %d available\n",
 573                 oct->num_consoles);
 574
 575         return ret;
 576 }
 577
 578 int octeon_add_console(struct octeon_device *oct, u32 console_num)
 579 {
 580         int ret = 0;
 581         u32 delay;
 582         u64 coreaddr;
 583         struct delayed_work *work;
 584         struct octeon_console *console;
 585
 586         if (console_num >= oct->num_consoles) {
 587                 dev_err(&oct->pci_dev->dev,
 588                         "trying to read from console number %d when only 0 to %d exist\n",
 589                         console_num, oct->num_consoles);
 590         } else {
 591                 console = &oct->console[console_num];
 592
 593                 console->waiting = 0;
 594
 595                 coreaddr = oct->console_desc_addr + console_num * 8 +
 596                         offsetof(struct octeon_pci_console_desc,
 597                                  console_addr_array);
 598                 console->addr = octeon_read_device_mem64(oct, coreaddr);
 599                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 600                                                     buf_size);
 601                 console->buffer_size = octeon_read_device_mem32(oct, coreaddr);
 602                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 603                                                     input_base_addr);
 604                 console->input_base_addr =
 605                         octeon_read_device_mem64(oct, coreaddr);
 606                 coreaddr = console->addr + offsetof(struct octeon_pci_console,
 607                                                     output_base_addr);
 608                 console->output_base_addr =
 609                         octeon_read_device_mem64(oct, coreaddr);
 610                 console->leftover[0] = '\0';
 611
 612                 work = &oct->console_poll_work[console_num].work;
 613
 614                 INIT_DELAYED_WORK(work, check_console);
 615                 oct->console_poll_work[console_num].ctxptr = (void *)oct;
 616                 oct->console_poll_work[console_num].ctxul = console_num;
 617                 delay = OCTEON_CONSOLE_POLL_INTERVAL_MS;
 618                 schedule_delayed_work(work, msecs_to_jiffies(delay));
 619
 620                 if (octeon_console_debug_enabled(console_num)) {
 621                         ret = octeon_console_send_cmd(oct,
 622                                                       "setenv pci_console_active 1",
 623                                                       2000);
 624                 }
 625
 626                 console->active = 1;
 627         }
 628
 629         return ret;
 630 }
 631
 632 /**
 633  * Removes all consoles
 634  *
 635  * @param oct         octeon device
 636  */
 637 void octeon_remove_consoles(struct octeon_device *oct)
 638 {
 639         u32 i;
 640         struct octeon_console *console;
 641
 642         for (i = 0; i < oct->num_consoles; i++) {
 643                 console = &oct->console[i];
 644
 645                 if (!console->active)
 646                         continue;
 647
 648                 cancel_delayed_work_sync(&oct->console_poll_work[i].
 649                                                 work);
 650                 console->addr = 0;
 651                 console->buffer_size = 0;
 652                 console->input_base_addr = 0;
 653                 console->output_base_addr = 0;
 654         }
 655
 656         oct->num_consoles = 0;
 657 }
 658
 659 static inline int octeon_console_free_bytes(u32 buffer_size,
 660                                             u32 wr_idx,
 661                                             u32 rd_idx)
 662 {
 663         if (rd_idx >= buffer_size || wr_idx >= buffer_size)
 664                 return -1;
 665
 666         return ((buffer_size - 1) - (wr_idx - rd_idx)) % buffer_size;
 667 }
 668
 669 static inline int octeon_console_avail_bytes(u32 buffer_size,
 670                                              u32 wr_idx,
 671                                              u32 rd_idx)
 672 {
 673         if (rd_idx >= buffer_size || wr_idx >= buffer_size)
 674                 return -1;
 675
 676         return buffer_size - 1 -
 677                octeon_console_free_bytes(buffer_size, wr_idx, rd_idx);
 678 }
 679
 680 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
 681                                char *buffer, u32 buf_size)
 682 {
 683         int bytes_to_read;
 684         u32 rd_idx, wr_idx;
 685         struct octeon_console *console;
 686
 687         if (console_num >= oct->num_consoles) {
 688                 dev_err(&oct->pci_dev->dev, "Attempted to read from disabled console %d\n",
 689                         console_num);
 690                 return 0;
 691         }
 692
 693         console = &oct->console[console_num];
 694
 695         /* Check to see if any data is available.
 696          * Maybe optimize this with 64-bit read.
 697          */
 698         rd_idx = octeon_read_device_mem32(oct, console->addr +
 699                 offsetof(struct octeon_pci_console, output_read_index));
 700         wr_idx = octeon_read_device_mem32(oct, console->addr +
 701                 offsetof(struct octeon_pci_console, output_write_index));
 702
 703         bytes_to_read = octeon_console_avail_bytes(console->buffer_size,
 704                                                    wr_idx, rd_idx);
 705         if (bytes_to_read <= 0)
 706                 return bytes_to_read;
 707
 708         bytes_to_read = MIN(bytes_to_read, (s32)buf_size);
 709
 710         /* Check to see if what we want to read is not contiguous, and limit
 711          * ourselves to the contiguous block
 712          */
 713         if (rd_idx + bytes_to_read >= console->buffer_size)
 714                 bytes_to_read = console->buffer_size - rd_idx;
 715
 716         octeon_pci_read_core_mem(oct, console->output_base_addr + rd_idx,
 717                                  (u8 *)buffer, bytes_to_read);
 718         octeon_write_device_mem32(oct, console->addr +
 719                                   offsetof(struct octeon_pci_console,
 720                                            output_read_index),
 721                                   (rd_idx + bytes_to_read) %
 722                                   console->buffer_size);
 723
 724         return bytes_to_read;
 725 }
 726
 727 #define FBUF_SIZE       (4 * 1024 * 1024)
 728 u8 fbuf[FBUF_SIZE];
 729
 730 int octeon_download_firmware(struct octeon_device *oct, const u8 *data,
 731                              size_t size)
 732 {
 733         int ret = 0;
 734         u8 *p = fbuf;
 735         u32 crc32_result;
 736         u64 load_addr;
 737         u32 image_len;
 738         struct octeon_firmware_file_header *h;
 739         u32 i, rem;
 740
 741         if (size < sizeof(struct octeon_firmware_file_header)) {
 742                 dev_err(&oct->pci_dev->dev, "Firmware file too small (%d < %d).\n",
 743                         (u32)size,
 744                         (u32)sizeof(struct octeon_firmware_file_header));
 745                 return -EINVAL;
 746         }
 747
 748         h = (struct octeon_firmware_file_header *)data;
 749
 750         if (be32_to_cpu(h->magic) != LIO_NIC_MAGIC) {
 751                 dev_err(&oct->pci_dev->dev, "Unrecognized firmware file.\n");
 752                 return -EINVAL;
 753         }
 754
 755         crc32_result = crc32((unsigned int)~0, data,
 756                              sizeof(struct octeon_firmware_file_header) -
 757                              sizeof(u32)) ^ ~0U;
 758         if (crc32_result != be32_to_cpu(h->crc32)) {
 759                 dev_err(&oct->pci_dev->dev, "Firmware CRC mismatch (0x%08x != 0x%08x).\n",
 760                         crc32_result, be32_to_cpu(h->crc32));
 761                 return -EINVAL;
 762         }
 763
 764         if (strncmp(LIQUIDIO_PACKAGE, h->version, strlen(LIQUIDIO_PACKAGE))) {
 765                 dev_err(&oct->pci_dev->dev, "Unmatched firmware package type. Expected %s, got %s.\n",
 766                         LIQUIDIO_PACKAGE, h->version);
 767                 return -EINVAL;
 768         }
 769
 770         if (memcmp(LIQUIDIO_BASE_VERSION, h->version + strlen(LIQUIDIO_PACKAGE),
 771                    strlen(LIQUIDIO_BASE_VERSION))) {
 772                 dev_err(&oct->pci_dev->dev, "Unmatched firmware version. Expected %s.x, got %s.\n",
 773                         LIQUIDIO_BASE_VERSION,
 774                         h->version + strlen(LIQUIDIO_PACKAGE));
 775                 return -EINVAL;
 776         }
 777
 778         if (be32_to_cpu(h->num_images) > LIO_MAX_IMAGES) {
 779                 dev_err(&oct->pci_dev->dev, "Too many images in firmware file (%d).\n",
 780                         be32_to_cpu(h->num_images));
 781                 return -EINVAL;
 782         }
 783
 784         dev_info(&oct->pci_dev->dev, "Firmware version: %s\n", h->version);
 785         snprintf(oct->fw_info.liquidio_firmware_version, 32, "LIQUIDIO: %s",
 786                  h->version);
 787
 788         data += sizeof(struct octeon_firmware_file_header);
 789
 790         dev_info(&oct->pci_dev->dev, "%s: Loading %d images\n", __func__,
 791                  be32_to_cpu(h->num_images));
 792         /* load all images */
 793         for (i = 0; i < be32_to_cpu(h->num_images); i++) {
 794                 load_addr = be64_to_cpu(h->desc[i].addr);
 795                 image_len = be32_to_cpu(h->desc[i].len);
 796
 797                 dev_info(&oct->pci_dev->dev, "Loading firmware %d at %llx\n",
 798                          image_len, load_addr);
 799
 800                 /* Write in 4MB chunks*/
 801                 rem = image_len;
 802
 803                 while (rem) {
 804                         if (rem < FBUF_SIZE)
 805                                 size = rem;
 806                         else
 807                                 size = FBUF_SIZE;
 808
 809                         memcpy(p, data, size);
 810
 811                         /* download the image */
 812                         octeon_pci_write_core_mem(oct, load_addr, p, (u32)size);
 813
 814                         data += size;
 815                         rem -= (u32)size;
 816                         load_addr += size;
 817                 }
 818         }
 819         dev_info(&oct->pci_dev->dev, "Writing boot command: %s\n",
 820                  h->bootcmd);
 821
 822         /* Invoke the bootcmd */
 823         ret = octeon_console_send_cmd(oct, h->bootcmd, 50);
 824
 825         return 0;
 826 }