1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2016 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more details.
17 ***********************************************************************/
18 /*! \file liquidio_common.h
19 * \brief Common: Structures and macros used in PCI-NIC package by core and
23 #ifndef __LIQUIDIO_COMMON_H__
24 #define __LIQUIDIO_COMMON_H__
26 #include "octeon_config.h"
28 #define LIQUIDIO_BASE_MAJOR_VERSION 1
29 #define LIQUIDIO_BASE_MINOR_VERSION 7
30 #define LIQUIDIO_BASE_MICRO_VERSION 2
31 #define LIQUIDIO_BASE_VERSION __stringify(LIQUIDIO_BASE_MAJOR_VERSION) "." \
32 __stringify(LIQUIDIO_BASE_MINOR_VERSION)
42 /** Tag types used by Octeon cores in its work. */
43 enum octeon_tag_type {
50 /* pre-defined host->NIC tag values */
51 #define LIO_CONTROL (0x11111110)
52 #define LIO_DATA(i) (0x11111111 + (i))
54 /* Opcodes used by host driver/apps to perform operations on the core.
55 * These are used to identify the major subsystem that the operation
58 #define OPCODE_CORE 0 /* used for generic core operations */
59 #define OPCODE_NIC 1 /* used for NIC operations */
60 /* Subcodes are used by host driver/apps to identify the sub-operation
61 * for the core. They only need to by unique for a given subsystem.
63 #define OPCODE_SUBCODE(op, sub) ((((op) & 0x0f) << 8) | ((sub) & 0x7f))
65 /** OPCODE_CORE subcodes. For future use. */
67 /** OPCODE_NIC subcodes */
69 /* This subcode is sent by core PCI driver to indicate cores are ready. */
70 #define OPCODE_NIC_CORE_DRV_ACTIVE 0x01
71 #define OPCODE_NIC_NW_DATA 0x02 /* network packet data */
72 #define OPCODE_NIC_CMD 0x03
73 #define OPCODE_NIC_INFO 0x04
74 #define OPCODE_NIC_PORT_STATS 0x05
75 #define OPCODE_NIC_MDIO45 0x06
76 #define OPCODE_NIC_TIMESTAMP 0x07
77 #define OPCODE_NIC_INTRMOD_CFG 0x08
78 #define OPCODE_NIC_IF_CFG 0x09
79 #define OPCODE_NIC_VF_DRV_NOTICE 0x0A
80 #define OPCODE_NIC_INTRMOD_PARAMS 0x0B
81 #define OPCODE_NIC_QCOUNT_UPDATE 0x12
82 #define OPCODE_NIC_SET_TRUSTED_VF 0x13
83 #define OPCODE_NIC_SYNC_OCTEON_TIME 0x14
84 #define VF_DRV_LOADED 1
85 #define VF_DRV_REMOVED -1
86 #define VF_DRV_MACADDR_CHANGED 2
88 #define OPCODE_NIC_VF_REP_PKT 0x15
89 #define OPCODE_NIC_VF_REP_CMD 0x16
90 #define OPCODE_NIC_UBOOT_CTL 0x17
92 #define CORE_DRV_TEST_SCATTER_OP 0xFFF5
94 /* Application codes advertised by the core driver initialization packet. */
95 #define CVM_DRV_APP_START 0x0
96 #define CVM_DRV_NO_APP 0
97 #define CVM_DRV_APP_COUNT 0x2
98 #define CVM_DRV_BASE_APP (CVM_DRV_APP_START + 0x0)
99 #define CVM_DRV_NIC_APP (CVM_DRV_APP_START + 0x1)
100 #define CVM_DRV_INVALID_APP (CVM_DRV_APP_START + 0x2)
101 #define CVM_DRV_APP_END (CVM_DRV_INVALID_APP - 1)
103 #define BYTES_PER_DHLEN_UNIT 8
104 #define MAX_REG_CNT 2000000U
105 #define INTRNAMSIZ 32
106 #define IRQ_NAME_OFF(i) ((i) * INTRNAMSIZ)
107 #define MAX_IOQ_INTERRUPTS_PER_PF (64 * 2)
108 #define MAX_IOQ_INTERRUPTS_PER_VF (8 * 2)
110 #define SCR2_BIT_FW_LOADED 63
112 /* App specific capabilities from firmware to pf driver */
113 #define LIQUIDIO_TIME_SYNC_CAP 0x1
114 #define LIQUIDIO_SWITCHDEV_CAP 0x2
115 #define LIQUIDIO_SPOOFCHK_CAP 0x4
117 /* error status return from firmware */
118 #define OCTEON_REQUEST_NO_PERMISSION 0xc
120 static inline u32 incr_index(u32 index, u32 count, u32 max)
122 if ((index + count) >= max)
123 index = index + count - max;
130 #define OCT_BOARD_NAME 32
131 #define OCT_SERIAL_LEN 64
133 /* Structure used by core driver to send indication that the Octeon
134 * application is ready.
136 struct octeon_core_setup {
139 char boardname[OCT_BOARD_NAME];
141 char board_serial_number[OCT_SERIAL_LEN];
149 /*--------------------------- SCATTER GATHER ENTRY -----------------------*/
151 /* The Scatter-Gather List Entry. The scatter or gather component used with
152 * a Octeon input instruction has this format.
154 struct octeon_sg_entry {
155 /** The first 64 bit gives the size of data in each dptr.*/
161 /** The 4 dptr pointers for this entry. */
166 #define OCT_SG_ENTRY_SIZE (sizeof(struct octeon_sg_entry))
168 /* \brief Add size to gather list
169 * @param sg_entry scatter/gather entry
170 * @param size size to add
171 * @param pos position to add it.
173 static inline void add_sg_size(struct octeon_sg_entry *sg_entry,
177 #ifdef __BIG_ENDIAN_BITFIELD
178 sg_entry->u.size[pos] = size;
180 sg_entry->u.size[3 - pos] = size;
184 /*------------------------- End Scatter/Gather ---------------------------*/
186 #define OCTNET_FRM_LENGTH_SIZE 8
188 #define OCTNET_FRM_PTP_HEADER_SIZE 8
190 #define OCTNET_FRM_HEADER_SIZE 22 /* VLAN + Ethernet */
192 #define OCTNET_MIN_FRM_SIZE 64
194 #define OCTNET_MAX_FRM_SIZE (16000 + OCTNET_FRM_HEADER_SIZE)
196 #define OCTNET_DEFAULT_MTU (1500)
197 #define OCTNET_DEFAULT_FRM_SIZE (OCTNET_DEFAULT_MTU + OCTNET_FRM_HEADER_SIZE)
199 /** NIC Commands are sent using this Octeon Input Queue */
200 #define OCTNET_CMD_Q 0
202 /* NIC Command types */
203 #define OCTNET_CMD_CHANGE_MTU 0x1
204 #define OCTNET_CMD_CHANGE_MACADDR 0x2
205 #define OCTNET_CMD_CHANGE_DEVFLAGS 0x3
206 #define OCTNET_CMD_RX_CTL 0x4
208 #define OCTNET_CMD_SET_MULTI_LIST 0x5
209 #define OCTNET_CMD_CLEAR_STATS 0x6
211 /* command for setting the speed, duplex & autoneg */
212 #define OCTNET_CMD_SET_SETTINGS 0x7
213 #define OCTNET_CMD_SET_FLOW_CTL 0x8
215 #define OCTNET_CMD_MDIO_READ_WRITE 0x9
216 #define OCTNET_CMD_GPIO_ACCESS 0xA
217 #define OCTNET_CMD_LRO_ENABLE 0xB
218 #define OCTNET_CMD_LRO_DISABLE 0xC
219 #define OCTNET_CMD_SET_RSS 0xD
220 #define OCTNET_CMD_WRITE_SA 0xE
221 #define OCTNET_CMD_DELETE_SA 0xF
222 #define OCTNET_CMD_UPDATE_SA 0x12
224 #define OCTNET_CMD_TNL_RX_CSUM_CTL 0x10
225 #define OCTNET_CMD_TNL_TX_CSUM_CTL 0x11
226 #define OCTNET_CMD_IPSECV2_AH_ESP_CTL 0x13
227 #define OCTNET_CMD_VERBOSE_ENABLE 0x14
228 #define OCTNET_CMD_VERBOSE_DISABLE 0x15
230 #define OCTNET_CMD_VLAN_FILTER_CTL 0x16
231 #define OCTNET_CMD_ADD_VLAN_FILTER 0x17
232 #define OCTNET_CMD_DEL_VLAN_FILTER 0x18
233 #define OCTNET_CMD_VXLAN_PORT_CONFIG 0x19
235 #define OCTNET_CMD_ID_ACTIVE 0x1a
237 #define OCTNET_CMD_SET_UC_LIST 0x1b
238 #define OCTNET_CMD_SET_VF_LINKSTATE 0x1c
240 #define OCTNET_CMD_QUEUE_COUNT_CTL 0x1f
242 #define OCTNET_CMD_GROUP1 1
243 #define OCTNET_CMD_SET_VF_SPOOFCHK 0x1
244 #define OCTNET_GROUP1_LAST_CMD OCTNET_CMD_SET_VF_SPOOFCHK
246 #define OCTNET_CMD_VXLAN_PORT_ADD 0x0
247 #define OCTNET_CMD_VXLAN_PORT_DEL 0x1
248 #define OCTNET_CMD_RXCSUM_ENABLE 0x0
249 #define OCTNET_CMD_RXCSUM_DISABLE 0x1
250 #define OCTNET_CMD_TXCSUM_ENABLE 0x0
251 #define OCTNET_CMD_TXCSUM_DISABLE 0x1
252 #define OCTNET_CMD_VLAN_FILTER_ENABLE 0x1
253 #define OCTNET_CMD_VLAN_FILTER_DISABLE 0x0
255 #define OCTNET_CMD_FAIL 0x1
257 #define SEAPI_CMD_FEC_SET 0x0
258 #define SEAPI_CMD_FEC_SET_DISABLE 0x0
259 #define SEAPI_CMD_FEC_SET_RS 0x1
260 #define SEAPI_CMD_FEC_GET 0x1
262 #define SEAPI_CMD_SPEED_SET 0x2
263 #define SEAPI_CMD_SPEED_GET 0x3
265 #define OPCODE_NIC_VF_PORT_STATS 0x22
267 #define LIO_CMD_WAIT_TM 100
269 /* RX(packets coming from wire) Checksum verification flags */
271 #define CNNIC_L4SUM_VERIFIED 0x1
272 #define CNNIC_IPSUM_VERIFIED 0x2
273 #define CNNIC_TUN_CSUM_VERIFIED 0x4
274 #define CNNIC_CSUM_VERIFIED (CNNIC_IPSUM_VERIFIED | CNNIC_L4SUM_VERIFIED)
276 /*LROIPV4 and LROIPV6 Flags*/
277 #define OCTNIC_LROIPV4 0x1
278 #define OCTNIC_LROIPV6 0x2
280 /* Interface flags communicated between host driver and core app. */
281 enum octnet_ifflags {
282 OCTNET_IFFLAG_PROMISC = 0x01,
283 OCTNET_IFFLAG_ALLMULTI = 0x02,
284 OCTNET_IFFLAG_MULTICAST = 0x04,
285 OCTNET_IFFLAG_BROADCAST = 0x08,
286 OCTNET_IFFLAG_UNICAST = 0x10
310 #ifdef __BIG_ENDIAN_BITFIELD
313 u64 more:6; /* How many udd words follow the command */
340 #define OCTNET_CMD_SIZE (sizeof(union octnet_cmd))
342 /*pkiih3 + irh + ossp[0] + ossp[1] + rdp + rptr = 40 bytes */
343 #define LIO_SOFTCMDRESP_IH2 40
344 #define LIO_SOFTCMDRESP_IH3 (40 + 8)
346 #define LIO_PCICMD_O2 24
347 #define LIO_PCICMD_O3 (24 + 8)
349 /* Instruction Header(DPI) - for OCTEON-III models */
350 struct octeon_instr_ih3 {
351 #ifdef __BIG_ENDIAN_BITFIELD
356 /** Gather indicator 1=gather*/
359 /** Data length OR no. of entries in gather list */
362 /** Front Data size */
368 /** PKI port kind - PKIND */
378 /** PKI port kind - PKIND */
384 /** Front Data size */
387 /** Data length OR no. of entries in gather list */
390 /** Gather indicator 1=gather*/
399 /* Optional PKI Instruction Header(PKI IH) - for OCTEON-III models */
400 /** BIG ENDIAN format. */
401 struct octeon_instr_pki_ih3 {
402 #ifdef __BIG_ENDIAN_BITFIELD
407 /** Raw mode indicator 1 = RAW */
472 /** Raw mode indicator 1 = RAW */
481 /** Instruction Header */
482 struct octeon_instr_ih2 {
483 #ifdef __BIG_ENDIAN_BITFIELD
484 /** Raw mode indicator 1 = RAW */
487 /** Gather indicator 1=gather*/
490 /** Data length OR no. of entries in gather list */
493 /** Front Data size */
496 /** Packet Order / Work Unit selection (1 of 8)*/
499 /** Core group selection (1 of 16) */
502 /** Short Raw Packet Indicator 1=short raw pkt */
517 /** Short Raw Packet Indicator 1=short raw pkt */
520 /** Core group selection (1 of 16) */
523 /** Packet Order / Work Unit selection (1 of 8)*/
526 /** Front Data size */
529 /** Data length OR no. of entries in gather list */
532 /** Gather indicator 1=gather*/
535 /** Raw mode indicator 1 = RAW */
540 /** Input Request Header */
541 struct octeon_instr_irh {
542 #ifdef __BIG_ENDIAN_BITFIELD
549 u64 ossp:32; /* opcode/subcode specific parameters */
551 u64 ossp:32; /* opcode/subcode specific parameters */
561 /** Return Data Parameters */
562 struct octeon_instr_rdp {
563 #ifdef __BIG_ENDIAN_BITFIELD
574 /** Receive Header */
576 #ifdef __BIG_ENDIAN_BITFIELD
581 u64 len:3; /** additional 64-bit words */
583 u64 ossp:32; /** opcode/subcode specific parameters */
588 u64 len:3; /** additional 64-bit words */
592 u64 csum_verified:3; /** checksum verified. */
593 u64 has_hwtstamp:1; /** Has hardware timestamp. 1 = yes. */
595 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */
600 u64 len:3; /** additional 64-bit words */
603 u64 max_nic_ports:10;
611 u64 len:3; /** additional 64-bit words */
619 u64 ossp:32; /** opcode/subcode specific parameters */
621 u64 len:3; /** additional 64-bit words */
626 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */
628 u64 has_hwtstamp:1; /** 1 = has hwtstamp */
629 u64 csum_verified:3; /** checksum verified. */
633 u64 len:3; /** additional 64-bit words */
641 u64 max_nic_ports:10;
644 u64 len:3; /** additional 64-bit words */
652 u64 len:3; /** additional 64-bit words */
659 #define OCT_RH_SIZE (sizeof(union octeon_rh))
661 union octnic_packet_params {
664 #ifdef __BIG_ENDIAN_BITFIELD
666 u32 ip_csum:1; /* Perform IP header checksum(s) */
667 /* Perform Outer transport header checksum */
668 u32 transport_csum:1;
669 /* Find tunnel, and perform transport csum. */
671 u32 tsflag:1; /* Timestamp this packet */
672 u32 ipsec_ops:4; /* IPsec operation */
677 u32 transport_csum:1;
684 /** Status of a RGMII Link on Octeon as seen by core driver. */
685 union oct_link_status {
689 #ifdef __BIG_ENDIAN_BITFIELD
716 LIO_PHY_PORT_TP = 0x0,
717 LIO_PHY_PORT_FIBRE = 0x1,
718 LIO_PHY_PORT_UNKNOWN,
721 /** The txpciq info passed to host from the firmware */
727 #ifdef __BIG_ENDIAN_BITFIELD
749 /** The rxpciq info passed to host from the firmware */
755 #ifdef __BIG_ENDIAN_BITFIELD
765 /** Information for a OCTEON ethernet interface shared between core & host. */
766 struct oct_link_info {
767 union oct_link_status link;
770 #ifdef __BIG_ENDIAN_BITFIELD
772 u64 macaddr_is_admin_asgnd:1;
774 u64 macaddr_spoofchk:1;
782 u64 macaddr_spoofchk:1;
784 u64 macaddr_is_admin_asgnd:1;
788 union oct_txpciq txpciq[MAX_IOQS_PER_NICIF];
789 union oct_rxpciq rxpciq[MAX_IOQS_PER_NICIF];
792 #define OCT_LINK_INFO_SIZE (sizeof(struct oct_link_info))
794 struct liquidio_if_cfg_info {
795 u64 iqmask; /** mask for IQs enabled for the port */
796 u64 oqmask; /** mask for OQs enabled for the port */
797 struct oct_link_info linfo; /** initial link information */
798 char liquidio_firmware_version[32];
801 /** Stats for each NIC port in RX direction. */
802 struct nic_rx_stats {
803 /* link-level stats */
804 u64 total_rcvd; /* Received packets */
805 u64 bytes_rcvd; /* Octets of received packets */
806 u64 total_bcst; /* Number of non-dropped L2 broadcast packets */
807 u64 total_mcst; /* Number of non-dropped L2 multicast packets */
808 u64 runts; /* Packets shorter than allowed */
809 u64 ctl_rcvd; /* Received PAUSE packets */
810 u64 fifo_err; /* Packets dropped due to RX FIFO full */
811 u64 dmac_drop; /* Packets dropped by the DMAC filter */
812 u64 fcs_err; /* Sum of fragment, overrun, and FCS errors */
813 u64 jabber_err; /* Packets larger than allowed */
814 u64 l2_err; /* Sum of DMA, parity, PCAM access, no memory,
815 * buffer overflow, malformed L2 header or
816 * length, oversize errors
818 u64 frame_err; /* Sum of IPv4 and L4 checksum errors */
819 u64 red_drops; /* Packets dropped by RED due to buffer
826 u64 fw_total_fwd_bytes;
837 u64 fw_lro_pkts; /* Number of packets that are LROed */
838 u64 fw_lro_octs; /* Number of octets that are LROed */
839 u64 fw_total_lro; /* Number of LRO packets formed */
840 u64 fw_lro_aborts; /* Number of times LRO of packet aborted */
841 u64 fw_lro_aborts_port;
842 u64 fw_lro_aborts_seq;
843 u64 fw_lro_aborts_tsval;
844 u64 fw_lro_aborts_timer; /* Timer setting error */
845 /* intrmod: packet forward rate */
849 /** Stats for each NIC port in RX direction. */
850 struct nic_tx_stats {
851 /* link-level stats */
852 u64 total_pkts_sent; /* Total frames sent on the interface */
853 u64 total_bytes_sent; /* Total octets sent on the interface */
854 u64 mcast_pkts_sent; /* Packets sent to the multicast DMAC */
855 u64 bcast_pkts_sent; /* Packets sent to a broadcast DMAC */
856 u64 ctl_sent; /* Control/PAUSE packets sent */
857 u64 one_collision_sent; /* Packets sent that experienced a
858 * single collision before successful
861 u64 multi_collision_sent; /* Packets sent that experienced
862 * multiple collisions before successful
865 u64 max_collision_fail; /* Packets dropped due to excessive
868 u64 max_deferral_fail; /* Packets not sent due to max
871 u64 fifo_err; /* Packets sent that experienced a
872 * transmit underflow and were
875 u64 runts; /* Packets sent with an octet count
878 u64 total_collisions; /* Packets dropped due to excessive
885 u64 fw_total_fwd_bytes;
886 u64 fw_total_mcast_sent;
887 u64 fw_total_bcast_sent;
892 u64 fw_tso; /* number of tso requests */
893 u64 fw_tso_fwd; /* number of packets segmented in tso */
898 struct oct_link_stats {
899 struct nic_rx_stats fromwire;
900 struct nic_tx_stats fromhost;
904 static inline int opcode_slow_path(union octeon_rh *rh)
906 u16 subcode1, subcode2;
908 subcode1 = OPCODE_SUBCODE((rh)->r.opcode, (rh)->r.subcode);
909 subcode2 = OPCODE_SUBCODE(OPCODE_NIC, OPCODE_NIC_NW_DATA);
911 return (subcode2 != subcode1);
914 #define LIO68XX_LED_CTRL_ADDR 0x3501
915 #define LIO68XX_LED_CTRL_CFGON 0x1f
916 #define LIO68XX_LED_CTRL_CFGOFF 0x100
917 #define LIO68XX_LED_BEACON_ADDR 0x3508
918 #define LIO68XX_LED_BEACON_CFGON 0x47fd
919 #define LIO68XX_LED_BEACON_CFGOFF 0x11fc
920 #define VITESSE_PHY_GPIO_DRIVEON 0x1
921 #define VITESSE_PHY_GPIO_CFG 0x8
922 #define VITESSE_PHY_GPIO_DRIVEOFF 0x4
923 #define VITESSE_PHY_GPIO_HIGH 0x2
924 #define VITESSE_PHY_GPIO_LOW 0x3
925 #define LED_IDENTIFICATION_ON 0x1
926 #define LED_IDENTIFICATION_OFF 0x0
927 #define LIO23XX_COPPERHEAD_LED_GPIO 0x2
929 struct oct_mdio_cmd {
937 #define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))
939 struct oct_intrmod_cfg {
945 u64 rx_maxcnt_trigger;
946 u64 rx_mincnt_trigger;
947 u64 rx_maxtmr_trigger;
948 u64 rx_mintmr_trigger;
949 u64 tx_mincnt_trigger;
950 u64 tx_maxcnt_trigger;
956 #define BASE_QUEUE_NOT_REQUESTED 65535
958 union oct_nic_if_cfg {
961 #ifdef __BIG_ENDIAN_BITFIELD
977 struct lio_trusted_vf {
980 uint64_t reserved: 55;
984 s64 sec; /* seconds */
985 s64 nsec; /* nanoseconds */
988 struct lio_vf_rep_stats {
998 enum lio_vf_rep_req_type {
1000 LIO_VF_REP_REQ_STATE,
1002 LIO_VF_REP_REQ_STATS,
1003 LIO_VF_REP_REQ_DEVNAME
1007 LIO_VF_REP_STATE_DOWN,
1011 #define LIO_IF_NAME_SIZE 16
1012 struct lio_vf_rep_req {
1018 struct lio_vf_rep_name {
1019 char name[LIO_IF_NAME_SIZE];
1022 struct lio_vf_rep_mtu {
1027 struct lio_vf_rep_state {
1034 struct lio_vf_rep_resp {