2 * Linux network driver for QLogic BR-series Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
15 * Copyright (c) 2014-2015 QLogic Corporation
20 /* BNA Hardware and Firmware Interface */
22 /* Skipping statistics collection to avoid clutter.
23 * Command is no longer needed:
29 * HDS-off request is dynamic
30 * keep structures as multiple of 32-bit fields for alignment.
31 * All values must be written in big-endian.
33 #ifndef __BFI_ENET_H__
34 #define __BFI_ENET_H__
39 #define BFI_ENET_CFG_MAX 32 /* Max resources per PF */
41 #define BFI_ENET_TXQ_PRIO_MAX 8
42 #define BFI_ENET_RX_QSET_MAX 16
43 #define BFI_ENET_TXQ_WI_VECT_MAX 4
45 #define BFI_ENET_VLAN_ID_MAX 4096
46 #define BFI_ENET_VLAN_BLOCK_SIZE 512 /* in bits */
47 #define BFI_ENET_VLAN_BLOCKS_MAX \
48 (BFI_ENET_VLAN_ID_MAX / BFI_ENET_VLAN_BLOCK_SIZE)
49 #define BFI_ENET_VLAN_WORD_SIZE 32 /* in bits */
50 #define BFI_ENET_VLAN_WORDS_MAX \
51 (BFI_ENET_VLAN_BLOCK_SIZE / BFI_ENET_VLAN_WORD_SIZE)
53 #define BFI_ENET_RSS_RIT_MAX 64 /* entries */
54 #define BFI_ENET_RSS_KEY_LEN 10 /* 32-bit words */
58 u32 addr_hi; /* Most Significant 32-bits */
59 u32 addr_lo; /* Least Significant 32-Bits */
63 /* T X Q U E U E D E F I N E S */
64 /* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */
65 /* TxQ Entry Opcodes */
66 #define BFI_ENET_TXQ_WI_SEND (0x402) /* Single Frame Transmission */
67 #define BFI_ENET_TXQ_WI_SEND_LSO (0x403) /* Multi-Frame Transmission */
68 #define BFI_ENET_TXQ_WI_EXTENSION (0x104) /* Extension WI */
70 /* TxQ Entry Control Flags */
71 #define BFI_ENET_TXQ_WI_CF_FCOE_CRC BIT(8)
72 #define BFI_ENET_TXQ_WI_CF_IPID_MODE BIT(5)
73 #define BFI_ENET_TXQ_WI_CF_INS_PRIO BIT(4)
74 #define BFI_ENET_TXQ_WI_CF_INS_VLAN BIT(3)
75 #define BFI_ENET_TXQ_WI_CF_UDP_CKSUM BIT(2)
76 #define BFI_ENET_TXQ_WI_CF_TCP_CKSUM BIT(1)
77 #define BFI_ENET_TXQ_WI_CF_IP_CKSUM BIT(0)
79 struct bfi_enet_txq_wi_base {
81 u8 num_vectors; /* number of vectors present */
83 /* BFI_ENET_TXQ_WI_SEND or BFI_ENET_TXQ_WI_SEND_LSO */
84 u16 flags; /* OR of all the flags */
85 u16 l4_hdr_size_n_offset;
87 u16 lso_mss; /* Only 14 LSB are valid */
88 u32 frame_length; /* Only 24 LSB are valid */
91 struct bfi_enet_txq_wi_ext {
93 u16 opcode; /* BFI_ENET_TXQ_WI_EXTENSION */
97 struct bfi_enet_txq_wi_vector { /* Tx Buffer Descriptor */
99 u16 length; /* Only 14 LSB are valid */
100 union bfi_addr_be_u addr;
103 /* TxQ Entry Structure */
104 struct bfi_enet_txq_entry {
106 struct bfi_enet_txq_wi_base base;
107 struct bfi_enet_txq_wi_ext ext;
109 struct bfi_enet_txq_wi_vector vector[BFI_ENET_TXQ_WI_VECT_MAX];
112 #define wi_hdr wi.base
113 #define wi_ext_hdr wi.ext
115 #define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
116 (((_hdr_size) << 10) | ((_offset) & 0x3FF))
118 /* R X Q U E U E D E F I N E S */
119 struct bfi_enet_rxq_entry {
120 union bfi_addr_be_u rx_buffer;
123 /* R X C O M P L E T I O N Q U E U E D E F I N E S */
125 #define BFI_ENET_CQ_EF_MAC_ERROR BIT(0)
126 #define BFI_ENET_CQ_EF_FCS_ERROR BIT(1)
127 #define BFI_ENET_CQ_EF_TOO_LONG BIT(2)
128 #define BFI_ENET_CQ_EF_FC_CRC_OK BIT(3)
130 #define BFI_ENET_CQ_EF_RSVD1 BIT(4)
131 #define BFI_ENET_CQ_EF_L4_CKSUM_OK BIT(5)
132 #define BFI_ENET_CQ_EF_L3_CKSUM_OK BIT(6)
133 #define BFI_ENET_CQ_EF_HDS_HEADER BIT(7)
135 #define BFI_ENET_CQ_EF_UDP BIT(8)
136 #define BFI_ENET_CQ_EF_TCP BIT(9)
137 #define BFI_ENET_CQ_EF_IP_OPTIONS BIT(10)
138 #define BFI_ENET_CQ_EF_IPV6 BIT(11)
140 #define BFI_ENET_CQ_EF_IPV4 BIT(12)
141 #define BFI_ENET_CQ_EF_VLAN BIT(13)
142 #define BFI_ENET_CQ_EF_RSS BIT(14)
143 #define BFI_ENET_CQ_EF_RSVD2 BIT(15)
145 #define BFI_ENET_CQ_EF_MCAST_MATCH BIT(16)
146 #define BFI_ENET_CQ_EF_MCAST BIT(17)
147 #define BFI_ENET_CQ_EF_BCAST BIT(18)
148 #define BFI_ENET_CQ_EF_REMOTE BIT(19)
150 #define BFI_ENET_CQ_EF_LOCAL BIT(20)
152 /* CQ Entry Structure */
153 struct bfi_enet_cq_entry {
164 /* E N E T C O N T R O L P A T H C O M M A N D S */
166 union bfi_addr_u pg_tbl;
167 union bfi_addr_u first_entry;
168 u16 pages; /* # of pages */
172 struct bfi_enet_txq {
178 struct bfi_enet_rxq {
188 struct bfi_enet_ib_cfg {
192 u8 continuous_coalescing;
195 u32 coalescing_timeout;
196 u32 inter_pkt_timeout;
202 union bfi_addr_u index_addr;
210 /* ENET command messages */
211 enum bfi_enet_h2i_msgs {
213 BFI_ENET_H2I_RX_CFG_SET_REQ = 1,
214 BFI_ENET_H2I_RX_CFG_CLR_REQ = 2,
216 BFI_ENET_H2I_RIT_CFG_REQ = 3,
217 BFI_ENET_H2I_RSS_CFG_REQ = 4,
218 BFI_ENET_H2I_RSS_ENABLE_REQ = 5,
219 BFI_ENET_H2I_RX_PROMISCUOUS_REQ = 6,
220 BFI_ENET_H2I_RX_DEFAULT_REQ = 7,
222 BFI_ENET_H2I_MAC_UCAST_SET_REQ = 8,
223 BFI_ENET_H2I_MAC_UCAST_CLR_REQ = 9,
224 BFI_ENET_H2I_MAC_UCAST_ADD_REQ = 10,
225 BFI_ENET_H2I_MAC_UCAST_DEL_REQ = 11,
227 BFI_ENET_H2I_MAC_MCAST_ADD_REQ = 12,
228 BFI_ENET_H2I_MAC_MCAST_DEL_REQ = 13,
229 BFI_ENET_H2I_MAC_MCAST_FILTER_REQ = 14,
231 BFI_ENET_H2I_RX_VLAN_SET_REQ = 15,
232 BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ = 16,
235 BFI_ENET_H2I_TX_CFG_SET_REQ = 17,
236 BFI_ENET_H2I_TX_CFG_CLR_REQ = 18,
239 BFI_ENET_H2I_PORT_ADMIN_UP_REQ = 19,
240 BFI_ENET_H2I_SET_PAUSE_REQ = 20,
241 BFI_ENET_H2I_DIAG_LOOPBACK_REQ = 21,
243 /* Get Attributes Command */
244 BFI_ENET_H2I_GET_ATTR_REQ = 22,
246 /* Statistics Commands */
247 BFI_ENET_H2I_STATS_GET_REQ = 23,
248 BFI_ENET_H2I_STATS_CLR_REQ = 24,
250 BFI_ENET_H2I_WOL_MAGIC_REQ = 25,
251 BFI_ENET_H2I_WOL_FRAME_REQ = 26,
253 BFI_ENET_H2I_MAX = 27,
256 enum bfi_enet_i2h_msgs {
258 BFI_ENET_I2H_RX_CFG_SET_RSP =
259 BFA_I2HM(BFI_ENET_H2I_RX_CFG_SET_REQ),
260 BFI_ENET_I2H_RX_CFG_CLR_RSP =
261 BFA_I2HM(BFI_ENET_H2I_RX_CFG_CLR_REQ),
263 BFI_ENET_I2H_RIT_CFG_RSP =
264 BFA_I2HM(BFI_ENET_H2I_RIT_CFG_REQ),
265 BFI_ENET_I2H_RSS_CFG_RSP =
266 BFA_I2HM(BFI_ENET_H2I_RSS_CFG_REQ),
267 BFI_ENET_I2H_RSS_ENABLE_RSP =
268 BFA_I2HM(BFI_ENET_H2I_RSS_ENABLE_REQ),
269 BFI_ENET_I2H_RX_PROMISCUOUS_RSP =
270 BFA_I2HM(BFI_ENET_H2I_RX_PROMISCUOUS_REQ),
271 BFI_ENET_I2H_RX_DEFAULT_RSP =
272 BFA_I2HM(BFI_ENET_H2I_RX_DEFAULT_REQ),
274 BFI_ENET_I2H_MAC_UCAST_SET_RSP =
275 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_SET_REQ),
276 BFI_ENET_I2H_MAC_UCAST_CLR_RSP =
277 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_CLR_REQ),
278 BFI_ENET_I2H_MAC_UCAST_ADD_RSP =
279 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_ADD_REQ),
280 BFI_ENET_I2H_MAC_UCAST_DEL_RSP =
281 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_DEL_REQ),
283 BFI_ENET_I2H_MAC_MCAST_ADD_RSP =
284 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_ADD_REQ),
285 BFI_ENET_I2H_MAC_MCAST_DEL_RSP =
286 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_DEL_REQ),
287 BFI_ENET_I2H_MAC_MCAST_FILTER_RSP =
288 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_FILTER_REQ),
290 BFI_ENET_I2H_RX_VLAN_SET_RSP =
291 BFA_I2HM(BFI_ENET_H2I_RX_VLAN_SET_REQ),
293 BFI_ENET_I2H_RX_VLAN_STRIP_ENABLE_RSP =
294 BFA_I2HM(BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ),
297 BFI_ENET_I2H_TX_CFG_SET_RSP =
298 BFA_I2HM(BFI_ENET_H2I_TX_CFG_SET_REQ),
299 BFI_ENET_I2H_TX_CFG_CLR_RSP =
300 BFA_I2HM(BFI_ENET_H2I_TX_CFG_CLR_REQ),
303 BFI_ENET_I2H_PORT_ADMIN_RSP =
304 BFA_I2HM(BFI_ENET_H2I_PORT_ADMIN_UP_REQ),
306 BFI_ENET_I2H_SET_PAUSE_RSP =
307 BFA_I2HM(BFI_ENET_H2I_SET_PAUSE_REQ),
308 BFI_ENET_I2H_DIAG_LOOPBACK_RSP =
309 BFA_I2HM(BFI_ENET_H2I_DIAG_LOOPBACK_REQ),
311 /* Attributes Response */
312 BFI_ENET_I2H_GET_ATTR_RSP =
313 BFA_I2HM(BFI_ENET_H2I_GET_ATTR_REQ),
315 /* Statistics Responses */
316 BFI_ENET_I2H_STATS_GET_RSP =
317 BFA_I2HM(BFI_ENET_H2I_STATS_GET_REQ),
318 BFI_ENET_I2H_STATS_CLR_RSP =
319 BFA_I2HM(BFI_ENET_H2I_STATS_CLR_REQ),
321 BFI_ENET_I2H_WOL_MAGIC_RSP =
322 BFA_I2HM(BFI_ENET_H2I_WOL_MAGIC_REQ),
323 BFI_ENET_I2H_WOL_FRAME_RSP =
324 BFA_I2HM(BFI_ENET_H2I_WOL_FRAME_REQ),
327 BFI_ENET_I2H_LINK_DOWN_AEN = BFA_I2HM(BFI_ENET_H2I_MAX),
328 BFI_ENET_I2H_LINK_UP_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 1),
330 BFI_ENET_I2H_PORT_ENABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 2),
331 BFI_ENET_I2H_PORT_DISABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 3),
333 BFI_ENET_I2H_BW_UPDATE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 4),
336 /* The following error codes can be returned by the enet commands */
339 BFI_ENET_CMD_FAIL = 1,
340 BFI_ENET_CMD_DUP_ENTRY = 2, /* !< Duplicate entry in CAM */
341 BFI_ENET_CMD_CAM_FULL = 3, /* !< CAM is full */
342 BFI_ENET_CMD_NOT_OWNER = 4, /* !< Not permitted, b'cos not owner */
343 BFI_ENET_CMD_NOT_EXEC = 5, /* !< Was not sent to f/w at all */
344 BFI_ENET_CMD_WAITING = 6, /* !< Waiting for completion */
345 BFI_ENET_CMD_PORT_DISABLED = 7, /* !< port in disabled state */
350 * bfi_enet_req is used by:
351 * BFI_ENET_H2I_RX_CFG_CLR_REQ
352 * BFI_ENET_H2I_TX_CFG_CLR_REQ
354 struct bfi_enet_req {
355 struct bfi_msgq_mhdr mh;
358 /* Enable/Disable Request
360 * bfi_enet_enable_req is used by:
361 * BFI_ENET_H2I_RSS_ENABLE_REQ (enet_id must be zero)
362 * BFI_ENET_H2I_RX_PROMISCUOUS_REQ (enet_id must be zero)
363 * BFI_ENET_H2I_RX_DEFAULT_REQ (enet_id must be zero)
364 * BFI_ENET_H2I_RX_MAC_MCAST_FILTER_REQ
365 * BFI_ENET_H2I_PORT_ADMIN_UP_REQ (enet_id must be zero)
367 struct bfi_enet_enable_req {
368 struct bfi_msgq_mhdr mh;
369 u8 enable; /* 1 = enable; 0 = disable */
373 /* Generic Response */
374 struct bfi_enet_rsp {
375 struct bfi_msgq_mhdr mh;
376 u8 error; /*!< if error see cmd_offset */
378 u16 cmd_offset; /*!< offset to invalid parameter */
381 /* GLOBAL CONFIGURATION */
383 /* bfi_enet_attr_req is used by:
384 * BFI_ENET_H2I_GET_ATTR_REQ
386 struct bfi_enet_attr_req {
387 struct bfi_msgq_mhdr mh;
390 /* bfi_enet_attr_rsp is used by:
391 * BFI_ENET_I2H_GET_ATTR_RSP
393 struct bfi_enet_attr_rsp {
394 struct bfi_msgq_mhdr mh;
395 u8 error; /*!< if error see cmd_offset */
397 u16 cmd_offset; /*!< offset to invalid parameter */
405 * bfi_enet_tx_cfg is used by:
406 * BFI_ENET_H2I_TX_CFG_SET_REQ
408 enum bfi_enet_tx_vlan_mode {
409 BFI_ENET_TX_VLAN_NOP = 0,
410 BFI_ENET_TX_VLAN_INS = 1,
411 BFI_ENET_TX_VLAN_WI = 2,
414 struct bfi_enet_tx_cfg {
415 u8 vlan_mode; /*!< processing mode */
418 u8 admit_tagged_frame;
419 u8 apply_vlan_filter;
424 struct bfi_enet_tx_cfg_req {
425 struct bfi_msgq_mhdr mh;
426 u8 num_queues; /* # of Tx Queues */
430 struct bfi_enet_txq q;
431 struct bfi_enet_ib ib;
432 } __packed q_cfg[BFI_ENET_TXQ_PRIO_MAX];
434 struct bfi_enet_ib_cfg ib_cfg;
436 struct bfi_enet_tx_cfg tx_cfg;
439 struct bfi_enet_tx_cfg_rsp {
440 struct bfi_msgq_mhdr mh;
442 u8 hw_id; /* For debugging */
445 u32 q_dbell; /* PCI base address offset */
446 u32 i_dbell; /* PCI base address offset */
447 u8 hw_qid; /* For debugging */
449 } __packed q_handles[BFI_ENET_TXQ_PRIO_MAX];
454 * bfi_enet_rx_cfg is used by:
455 * BFI_ENET_H2I_RX_CFG_SET_REQ
457 enum bfi_enet_rxq_type {
458 BFI_ENET_RXQ_SINGLE = 1,
459 BFI_ENET_RXQ_LARGE_SMALL = 2,
460 BFI_ENET_RXQ_HDS = 3,
461 BFI_ENET_RXQ_HDS_OPT_BASED = 4,
464 enum bfi_enet_hds_type {
465 BFI_ENET_HDS_FORCED = 0x01,
466 BFI_ENET_HDS_IPV6_UDP = 0x02,
467 BFI_ENET_HDS_IPV6_TCP = 0x04,
468 BFI_ENET_HDS_IPV4_TCP = 0x08,
469 BFI_ENET_HDS_IPV4_UDP = 0x10,
472 struct bfi_enet_rx_cfg {
491 * Multicast frames are received on the ql of q-set index zero.
492 * On the completion queue. RxQ ID = even is for large/data buffer queues
493 * and RxQ ID = odd is for small/header buffer queues.
495 struct bfi_enet_rx_cfg_req {
496 struct bfi_msgq_mhdr mh;
497 u8 num_queue_sets; /* # of Rx Queue Sets */
501 struct bfi_enet_rxq ql; /* large/data/single buffers */
502 struct bfi_enet_rxq qs; /* small/header buffers */
503 struct bfi_enet_cq cq;
504 struct bfi_enet_ib ib;
505 } __packed q_cfg[BFI_ENET_RX_QSET_MAX];
507 struct bfi_enet_ib_cfg ib_cfg;
509 struct bfi_enet_rx_cfg rx_cfg;
512 struct bfi_enet_rx_cfg_rsp {
513 struct bfi_msgq_mhdr mh;
515 u8 hw_id; /* For debugging */
518 u32 ql_dbell; /* PCI base address offset */
519 u32 qs_dbell; /* PCI base address offset */
520 u32 i_dbell; /* PCI base address offset */
521 u8 hw_lqid; /* For debugging */
522 u8 hw_sqid; /* For debugging */
523 u8 hw_cqid; /* For debugging */
525 } __packed q_handles[BFI_ENET_RX_QSET_MAX];
530 * bfi_enet_rit_req is used by:
531 * BFI_ENET_H2I_RIT_CFG_REQ
533 struct bfi_enet_rit_req {
534 struct bfi_msgq_mhdr mh;
535 u16 size; /* number of table-entries used */
537 u8 table[BFI_ENET_RSS_RIT_MAX];
542 * bfi_enet_rss_cfg_req is used by:
543 * BFI_ENET_H2I_RSS_CFG_REQ
545 enum bfi_enet_rss_type {
546 BFI_ENET_RSS_IPV6 = 0x01,
547 BFI_ENET_RSS_IPV6_TCP = 0x02,
548 BFI_ENET_RSS_IPV4 = 0x04,
549 BFI_ENET_RSS_IPV4_TCP = 0x08
552 struct bfi_enet_rss_cfg {
556 u32 key[BFI_ENET_RSS_KEY_LEN];
559 struct bfi_enet_rss_cfg_req {
560 struct bfi_msgq_mhdr mh;
561 struct bfi_enet_rss_cfg cfg;
566 * bfi_enet_rx_vlan_req is used by:
567 * BFI_ENET_H2I_MAC_UCAST_SET_REQ
568 * BFI_ENET_H2I_MAC_UCAST_CLR_REQ
569 * BFI_ENET_H2I_MAC_UCAST_ADD_REQ
570 * BFI_ENET_H2I_MAC_UCAST_DEL_REQ
572 struct bfi_enet_ucast_req {
573 struct bfi_msgq_mhdr mh;
574 u8 mac_addr[ETH_ALEN];
578 /* MAC Unicast + VLAN */
579 struct bfi_enet_mac_n_vlan_req {
580 struct bfi_msgq_mhdr mh;
582 u8 mac_addr[ETH_ALEN];
587 * bfi_enet_mac_mfilter_add_req is used by:
588 * BFI_ENET_H2I_MAC_MCAST_ADD_REQ
590 struct bfi_enet_mcast_add_req {
591 struct bfi_msgq_mhdr mh;
592 u8 mac_addr[ETH_ALEN];
596 /* bfi_enet_mac_mfilter_add_rsp is used by:
597 * BFI_ENET_I2H_MAC_MCAST_ADD_RSP
599 struct bfi_enet_mcast_add_rsp {
600 struct bfi_msgq_mhdr mh;
608 /* bfi_enet_mac_mfilter_del_req is used by:
609 * BFI_ENET_H2I_MAC_MCAST_DEL_REQ
611 struct bfi_enet_mcast_del_req {
612 struct bfi_msgq_mhdr mh;
619 * bfi_enet_rx_vlan_req is used by:
620 * BFI_ENET_H2I_RX_VLAN_SET_REQ
622 struct bfi_enet_rx_vlan_req {
623 struct bfi_msgq_mhdr mh;
626 u32 bit_mask[BFI_ENET_VLAN_WORDS_MAX];
631 * bfi_enet_set_pause_req is used by:
632 * BFI_ENET_H2I_SET_PAUSE_REQ
634 struct bfi_enet_set_pause_req {
635 struct bfi_msgq_mhdr mh;
637 u8 tx_pause; /* 1 = enable; 0 = disable */
638 u8 rx_pause; /* 1 = enable; 0 = disable */
643 * bfi_enet_diag_lb_req is used by:
644 * BFI_ENET_H2I_DIAG_LOOPBACK
646 struct bfi_enet_diag_lb_req {
647 struct bfi_msgq_mhdr mh;
649 u8 mode; /* cable or Serdes */
650 u8 enable; /* 1 = enable; 0 = disable */
653 /* enum for Loopback opmodes */
655 BFI_ENET_DIAG_LB_OPMODE_EXT = 0,
656 BFI_ENET_DIAG_LB_OPMODE_CBL = 1,
661 * bfi_enet_stats_req is used by:
662 * BFI_ENET_H2I_STATS_GET_REQ
663 * BFI_ENET_I2H_STATS_CLR_REQ
665 struct bfi_enet_stats_req {
666 struct bfi_msgq_mhdr mh;
671 union bfi_addr_u host_buffer;
674 /* defines for "stats_mask" above. */
675 #define BFI_ENET_STATS_MAC BIT(0) /* !< MAC Statistics */
676 #define BFI_ENET_STATS_BPC BIT(1) /* !< Pause Stats from BPC */
677 #define BFI_ENET_STATS_RAD BIT(2) /* !< Rx Admission Statistics */
678 #define BFI_ENET_STATS_RX_FC BIT(3) /* !< Rx FC Stats from RxA */
679 #define BFI_ENET_STATS_TX_FC BIT(4) /* !< Tx FC Stats from TxA */
681 #define BFI_ENET_STATS_ALL 0x1f
683 /* TxF Frame Statistics */
684 struct bfi_enet_stats_txf {
698 u64 filter_vlan; /* frames filtered due to VLAN */
699 u64 filter_mac_sa; /* frames filtered due to SA check */
702 /* RxF Frame Statistics */
703 struct bfi_enet_stats_rxf {
718 /* FC Tx Frame Statistics */
719 struct bfi_enet_stats_fc_tx {
720 u64 txf_ucast_octets;
724 u64 txf_mcast_octets;
728 u64 txf_bcast_octets;
732 u64 txf_parity_errors;
734 u64 txf_fid_parity_errors;
737 /* FC Rx Frame Statistics */
738 struct bfi_enet_stats_fc_rx {
739 u64 rxf_ucast_octets;
743 u64 rxf_mcast_octets;
747 u64 rxf_bcast_octets;
752 /* RAD Frame Statistics */
753 struct bfi_enet_stats_rad {
773 /* BPC Tx Registers */
774 struct bfi_enet_stats_bpc {
777 u64 tx_zero_pause[8]; /*!< Pause cancellation */
778 /*!<Pause initiation rather than retention */
779 u64 tx_first_pause[8];
783 u64 rx_zero_pause[8]; /*!< Pause cancellation */
784 /*!<Pause initiation rather than retention */
785 u64 rx_first_pause[8];
788 /* MAC Rx Statistics */
789 struct bfi_enet_stats_mac {
790 u64 stats_clr_cnt; /* times this stats cleared */
791 u64 frame_64; /* both rx and tx counter */
792 u64 frame_65_127; /* both rx and tx counter */
793 u64 frame_128_255; /* both rx and tx counter */
794 u64 frame_256_511; /* both rx and tx counter */
795 u64 frame_512_1023; /* both rx and tx counter */
796 u64 frame_1024_1518; /* both rx and tx counter */
797 u64 frame_1519_1522; /* both rx and tx counter */
805 u64 rx_control_frames;
807 u64 rx_unknown_opcode;
808 u64 rx_alignment_error;
809 u64 rx_frame_length_error;
811 u64 rx_carrier_sense_error;
825 u64 tx_excessive_deferral;
826 u64 tx_single_collision;
827 u64 tx_muliple_collision;
828 u64 tx_late_collision;
829 u64 tx_excessive_collision;
830 u64 tx_total_collision;
831 u64 tx_pause_honored;
835 u64 tx_control_frame;
841 /* Complete statistics, DMAed from fw to host followed by
842 * BFI_ENET_I2H_STATS_GET_RSP
844 struct bfi_enet_stats {
845 struct bfi_enet_stats_mac mac_stats;
846 struct bfi_enet_stats_bpc bpc_stats;
847 struct bfi_enet_stats_rad rad_stats;
848 struct bfi_enet_stats_rad rlb_stats;
849 struct bfi_enet_stats_fc_rx fc_rx_stats;
850 struct bfi_enet_stats_fc_tx fc_tx_stats;
851 struct bfi_enet_stats_rxf rxf_stats[BFI_ENET_CFG_MAX];
852 struct bfi_enet_stats_txf txf_stats[BFI_ENET_CFG_MAX];
855 #endif /* __BFI_ENET_H__ */