1 /* bnx2x_sriov.c: QLogic Everest network driver.
3 * Copyright 2009-2013 Broadcom Corporation
4 * Copyright 2014 QLogic Corporation
7 * Unless you and QLogic execute a separate written software license
8 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2, available
10 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
12 * Notwithstanding the above, under no circumstances may you combine this
13 * software in any way with any other QLogic software provided under a
14 * license other than the GPL, without QLogic's express prior written
17 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
18 * Written by: Shmulik Ravid
19 * Ariel Elior <ariel.elior@qlogic.com>
23 #include "bnx2x_init.h"
24 #include "bnx2x_cmn.h"
26 #include <linux/crc32.h>
27 #include <linux/if_vlan.h>
29 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
30 struct bnx2x_virtf **vf,
31 struct pf_vf_bulletin_content **bulletin,
34 /* General service functions */
35 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
38 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
40 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
42 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
44 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
48 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
51 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
53 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
55 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
57 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
61 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
72 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
74 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
75 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
78 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
79 u8 igu_sb_id, u8 segment, u16 index, u8 op,
82 /* acking a VF sb through the PF - use the GRC */
84 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
85 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
86 u32 func_encode = vf->abs_vfid;
87 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
88 struct igu_regular cmd_data = {0};
90 cmd_data.sb_id_and_flags =
91 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
93 (update << IGU_REGULAR_BUPDATE_SHIFT) |
94 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
96 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
97 func_encode << IGU_CTRL_REG_FID_SHIFT |
98 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
100 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
101 cmd_data.sb_id_and_flags, igu_addr_data);
102 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
106 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
108 REG_WR(bp, igu_addr_ctl, ctl);
113 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
114 struct bnx2x_virtf *vf,
117 if (!bnx2x_leading_vfq(vf, sp_initialized)) {
119 BNX2X_ERR("Slowpath objects not yet initialized!\n");
121 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
127 /* VFOP operations states */
128 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
129 struct bnx2x_queue_init_params *init_params,
130 struct bnx2x_queue_setup_params *setup_params,
131 u16 q_idx, u16 sb_idx)
134 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
138 init_params->tx.sb_cq_index,
139 init_params->tx.hc_rate,
141 setup_params->txq_params.traffic_type);
144 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
145 struct bnx2x_queue_init_params *init_params,
146 struct bnx2x_queue_setup_params *setup_params,
147 u16 q_idx, u16 sb_idx)
149 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
151 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
152 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
156 init_params->rx.sb_cq_index,
157 init_params->rx.hc_rate,
158 setup_params->gen_params.mtu,
160 rxq_params->sge_buf_sz,
161 rxq_params->max_sges_pkt,
162 rxq_params->tpa_agg_sz,
164 rxq_params->drop_flags,
165 rxq_params->cache_line_log);
168 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
169 struct bnx2x_virtf *vf,
170 struct bnx2x_vf_queue *q,
171 struct bnx2x_vf_queue_construct_params *p,
172 unsigned long q_type)
174 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
175 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
179 /* Enable host coalescing in the transition to INIT state */
180 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
181 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
183 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
184 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
187 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
188 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
191 init_p->cxts[0] = q->cxt;
195 /* Setup-op general parameters */
196 setup_p->gen_params.spcl_id = vf->sp_cl_id;
197 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
198 setup_p->gen_params.fp_hsi = vf->fp_hsi;
201 * collect statistics, zero statistics, local-switching, security,
202 * OV for Flex10, RSS and MCAST for leading
204 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
205 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
207 /* for VFs, enable tx switching, bd coherency, and mac address
210 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
211 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
212 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
214 /* Setup-op rx parameters */
215 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
216 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
218 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
219 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
220 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
222 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
223 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
226 /* Setup-op tx parameters */
227 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
228 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
229 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
233 static int bnx2x_vf_queue_create(struct bnx2x *bp,
234 struct bnx2x_virtf *vf, int qid,
235 struct bnx2x_vf_queue_construct_params *qctor)
237 struct bnx2x_queue_state_params *q_params;
240 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
242 /* Prepare ramrod information */
243 q_params = &qctor->qstate;
244 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
245 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
247 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
248 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
249 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
253 /* Run Queue 'construction' ramrods */
254 q_params->cmd = BNX2X_Q_CMD_INIT;
255 rc = bnx2x_queue_state_change(bp, q_params);
259 memcpy(&q_params->params.setup, &qctor->prep_qsetup,
260 sizeof(struct bnx2x_queue_setup_params));
261 q_params->cmd = BNX2X_Q_CMD_SETUP;
262 rc = bnx2x_queue_state_change(bp, q_params);
266 /* enable interrupts */
267 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
268 USTORM_ID, 0, IGU_INT_ENABLE, 0);
273 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
276 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
277 BNX2X_Q_CMD_TERMINATE,
278 BNX2X_Q_CMD_CFC_DEL};
279 struct bnx2x_queue_state_params q_params;
282 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
284 /* Prepare ramrod information */
285 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
286 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
287 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
289 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
290 BNX2X_Q_LOGICAL_STATE_STOPPED) {
291 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
295 /* Run Queue 'destruction' ramrods */
296 for (i = 0; i < ARRAY_SIZE(cmds); i++) {
297 q_params.cmd = cmds[i];
298 rc = bnx2x_queue_state_change(bp, &q_params);
300 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
306 if (bnx2x_vfq(vf, qid, cxt)) {
307 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
308 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
315 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
317 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
319 /* the first igu entry belonging to VFs of this PF */
320 if (!BP_VFDB(bp)->first_vf_igu_entry)
321 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
323 /* the first igu entry belonging to this VF */
324 if (!vf_sb_count(vf))
325 vf->igu_base_id = igu_sb_id;
330 BP_VFDB(bp)->vf_sbs_pool++;
333 static inline void bnx2x_vf_vlan_credit(struct bnx2x *bp,
334 struct bnx2x_vlan_mac_obj *obj,
337 struct list_head *pos;
341 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
343 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
345 list_for_each(pos, &obj->head)
349 bnx2x_vlan_mac_h_read_unlock(bp, obj);
351 atomic_set(counter, cnt);
354 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
355 int qid, bool drv_only, int type)
357 struct bnx2x_vlan_mac_ramrod_params ramrod;
360 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
361 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
362 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
364 /* Prepare ramrod params */
365 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
366 if (type == BNX2X_VF_FILTER_VLAN_MAC) {
367 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
368 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
369 } else if (type == BNX2X_VF_FILTER_MAC) {
370 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
371 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
373 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
375 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
377 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
379 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
381 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
384 rc = ramrod.vlan_mac_obj->delete_all(bp,
386 &ramrod.user_req.vlan_mac_flags,
387 &ramrod.ramrod_flags);
389 BNX2X_ERR("Failed to delete all %s\n",
390 (type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MACs" :
391 (type == BNX2X_VF_FILTER_MAC) ? "MACs" : "VLANs");
398 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
399 struct bnx2x_virtf *vf, int qid,
400 struct bnx2x_vf_mac_vlan_filter *filter,
403 struct bnx2x_vlan_mac_ramrod_params ramrod;
406 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
407 vf->abs_vfid, filter->add ? "Adding" : "Deleting",
408 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? "VLAN-MAC" :
409 (filter->type == BNX2X_VF_FILTER_MAC) ? "MAC" : "VLAN");
411 /* Prepare ramrod params */
412 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
413 if (filter->type == BNX2X_VF_FILTER_VLAN_MAC) {
414 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_mac_obj);
415 ramrod.user_req.u.vlan.vlan = filter->vid;
416 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
417 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
418 } else if (filter->type == BNX2X_VF_FILTER_VLAN) {
419 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
420 ramrod.user_req.u.vlan.vlan = filter->vid;
422 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
423 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
424 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
426 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
429 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
431 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
433 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
435 /* Add/Remove the filter */
436 rc = bnx2x_config_vlan_mac(bp, &ramrod);
440 BNX2X_ERR("Failed to %s %s\n",
441 filter->add ? "add" : "delete",
442 (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ?
444 (filter->type == BNX2X_VF_FILTER_MAC) ?
449 filter->applied = true;
454 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
455 struct bnx2x_vf_mac_vlan_filters *filters,
456 int qid, bool drv_only)
460 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
462 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
465 /* Prepare ramrod params */
466 for (i = 0; i < filters->count; i++) {
467 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
468 &filters->filters[i], drv_only);
473 /* Rollback if needed */
474 if (i != filters->count) {
475 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
478 if (!filters->filters[i].applied)
480 filters->filters[i].add = !filters->filters[i].add;
481 bnx2x_vf_mac_vlan_config(bp, vf, qid,
482 &filters->filters[i],
487 /* It's our responsibility to free the filters */
493 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
494 struct bnx2x_vf_queue_construct_params *qctor)
498 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
500 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
504 /* Schedule the configuration of any pending vlan filters */
505 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
509 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
513 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
518 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
520 /* If needed, clean the filtering data base */
521 if ((qid == LEADING_IDX) &&
522 bnx2x_validate_vf_sp_objs(bp, vf, false)) {
523 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
524 BNX2X_VF_FILTER_VLAN_MAC);
527 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
528 BNX2X_VF_FILTER_VLAN);
531 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true,
532 BNX2X_VF_FILTER_MAC);
537 /* Terminate queue */
538 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
539 struct bnx2x_queue_state_params qstate;
541 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
542 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
543 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
544 qstate.cmd = BNX2X_Q_CMD_TERMINATE;
545 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
546 rc = bnx2x_queue_state_change(bp, &qstate);
553 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
557 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
558 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
560 struct bnx2x_mcast_list_elem *mc = NULL;
561 struct bnx2x_mcast_ramrod_params mcast;
564 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
566 /* Prepare Multicast command */
567 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
568 mcast.mcast_obj = &vf->mcast_obj;
570 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
572 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
574 mc = kzalloc(mc_num * sizeof(struct bnx2x_mcast_list_elem),
577 BNX2X_ERR("Cannot Configure multicasts due to lack of memory\n");
583 INIT_LIST_HEAD(&mcast.mcast_list);
584 for (i = 0; i < mc_num; i++) {
585 mc[i].mac = mcasts[i];
586 list_add_tail(&mc[i].link,
591 mcast.mcast_list_len = mc_num;
592 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_SET);
594 BNX2X_ERR("Failed to set multicasts\n");
596 /* clear existing mcasts */
597 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
599 BNX2X_ERR("Failed to remove multicasts\n");
607 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
608 struct bnx2x_rx_mode_ramrod_params *ramrod,
609 struct bnx2x_virtf *vf,
610 unsigned long accept_flags)
612 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
614 memset(ramrod, 0, sizeof(*ramrod));
615 ramrod->cid = vfq->cid;
616 ramrod->cl_id = vfq_cl_id(vf, vfq);
617 ramrod->rx_mode_obj = &bp->rx_mode_obj;
618 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
619 ramrod->rx_accept_flags = accept_flags;
620 ramrod->tx_accept_flags = accept_flags;
621 ramrod->pstate = &vf->filter_state;
622 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
624 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
625 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
626 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
628 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
629 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
632 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
633 int qid, unsigned long accept_flags)
635 struct bnx2x_rx_mode_ramrod_params ramrod;
637 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
639 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
640 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
641 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
642 return bnx2x_config_rx_mode(bp, &ramrod);
645 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
649 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
651 /* Remove all classification configuration for leading queue */
652 if (qid == LEADING_IDX) {
653 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
657 /* Remove filtering if feasible */
658 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
659 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
661 BNX2X_VF_FILTER_VLAN_MAC);
664 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
666 BNX2X_VF_FILTER_VLAN);
669 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
671 BNX2X_VF_FILTER_MAC);
674 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
681 rc = bnx2x_vf_queue_destroy(bp, vf, qid);
686 BNX2X_ERR("vf[%d:%d] error: rc %d\n",
687 vf->abs_vfid, qid, rc);
691 /* VF enable primitives
692 * when pretend is required the caller is responsible
693 * for calling pretend prior to calling these routines
696 /* internal vf enable - until vf is enabled internally all transactions
697 * are blocked. This routine should always be called last with pretend.
699 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
701 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
704 /* clears vf error in all semi blocks */
705 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
707 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
708 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
709 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
710 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
713 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
715 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
718 switch (was_err_group) {
720 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
723 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
726 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
729 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
732 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
735 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
740 /* Set VF masks and configuration - pretend */
741 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
743 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
744 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
745 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
746 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
747 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
748 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
750 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
751 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
752 val &= ~IGU_VF_CONF_PARENT_MASK;
753 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
754 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
757 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
760 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
762 /* iterate over all queues, clear sb consumer */
763 for (i = 0; i < vf_sb_count(vf); i++) {
764 u8 igu_sb_id = vf_igu_sb(vf, i);
766 /* zero prod memory */
767 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
769 /* clear sb state machine */
770 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
773 /* disable + update */
774 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
779 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
781 /* set the VF-PF association in the FW */
782 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
783 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
786 bnx2x_vf_semi_clear_err(bp, abs_vfid);
787 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
789 /* internal vf-enable - pretend */
790 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
791 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
792 bnx2x_vf_enable_internal(bp, true);
793 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
796 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
798 /* Reset vf in IGU interrupts are still disabled */
799 bnx2x_vf_igu_reset(bp, vf);
801 /* pretend to enable the vf with the PBF */
802 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
803 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
804 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
807 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
810 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
815 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
817 return bnx2x_is_pcie_pending(dev);
821 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
823 /* Verify no pending pci transactions */
824 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
825 BNX2X_ERR("PCIE Transactions still pending\n");
830 /* must be called after the number of PF queues and the number of VFs are
834 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
836 struct vf_pf_resc_request *resc = &vf->alloc_resc;
838 /* will be set only during VF-ACQUIRE */
842 resc->num_mac_filters = VF_MAC_CREDIT_CNT;
843 resc->num_vlan_filters = VF_VLAN_CREDIT_CNT;
845 /* no real limitation */
846 resc->num_mc_filters = 0;
848 /* num_sbs already set */
849 resc->num_sbs = vf->sb_count;
853 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
855 /* reset the state variables */
856 bnx2x_iov_static_resc(bp, vf);
860 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
862 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
864 /* DQ usage counter */
865 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
866 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
867 "DQ VF usage counter timed out",
869 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
871 /* FW cleanup command - poll for the results */
872 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
874 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
876 /* verify TX hw is flushed */
877 bnx2x_tx_hw_flushed(bp, poll_cnt);
880 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
884 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
886 /* the cleanup operations are valid if and only if the VF
887 * was first acquired.
889 for (i = 0; i < vf_rxq_count(vf); i++) {
890 rc = bnx2x_vf_queue_flr(bp, vf, i);
895 /* remove multicasts */
896 bnx2x_vf_mcast(bp, vf, NULL, 0, true);
898 /* dispatch final cleanup and wait for HW queues to flush */
899 bnx2x_vf_flr_clnup_hw(bp, vf);
901 /* release VF resources */
902 bnx2x_vf_free_resc(bp, vf);
904 vf->malicious = false;
906 /* re-open the mailbox */
907 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
910 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
911 vf->abs_vfid, i, rc);
914 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
916 struct bnx2x_virtf *vf;
919 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
920 /* VF should be RESET & in FLR cleanup states */
921 if (bnx2x_vf(bp, i, state) != VF_RESET ||
922 !bnx2x_vf(bp, i, flr_clnup_stage))
925 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
926 i, BNX2X_NR_VIRTFN(bp));
930 /* lock the vf pf channel */
931 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
933 /* invoke the VF FLR SM */
934 bnx2x_vf_flr(bp, vf);
936 /* mark the VF to be ACKED and continue */
937 vf->flr_clnup_stage = false;
938 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
941 /* Acknowledge the handled VFs.
942 * we are acknowledge all the vfs which an flr was requested for, even
943 * if amongst them there are such that we never opened, since the mcp
944 * will interrupt us immediately again if we only ack some of the bits,
945 * resulting in an endless loop. This can happen for example in KVM
946 * where an 'all ones' flr request is sometimes given by hyper visor
948 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
949 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
950 for (i = 0; i < FLRD_VFS_DWORDS; i++)
951 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
952 bp->vfdb->flrd_vfs[i]);
954 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
956 /* clear the acked bits - better yet if the MCP implemented
957 * write to clear semantics
959 for (i = 0; i < FLRD_VFS_DWORDS; i++)
960 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
963 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
968 for (i = 0; i < FLRD_VFS_DWORDS; i++)
969 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
972 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
973 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
976 struct bnx2x_virtf *vf = BP_VF(bp, i);
979 if (vf->abs_vfid < 32)
980 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
982 reset = bp->vfdb->flrd_vfs[1] &
983 (1 << (vf->abs_vfid - 32));
986 /* set as reset and ready for cleanup */
987 vf->state = VF_RESET;
988 vf->flr_clnup_stage = true;
991 "Initiating Final cleanup for VF %d\n",
996 /* do the FLR cleanup for all marked VFs*/
997 bnx2x_vf_flr_clnup(bp);
1000 /* IOV global initialization routines */
1001 void bnx2x_iov_init_dq(struct bnx2x *bp)
1006 /* Set the DQ such that the CID reflect the abs_vfid */
1007 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1008 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1010 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1013 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1015 /* The VF window size is the log2 of the max number of CIDs per VF */
1016 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1018 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1019 * the Pf doorbell size although the 2 are independent.
1021 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1023 /* No security checks for now -
1024 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1025 * CID range 0 - 0x1ffff
1027 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1028 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1029 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1030 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1032 /* set the VF doorbell threshold. This threshold represents the amount
1033 * of doorbells allowed in the main DORQ fifo for a specific VF.
1035 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1038 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1040 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1041 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1044 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1046 struct pci_dev *dev = bp->pdev;
1047 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1049 return dev->bus->number + ((dev->devfn + iov->offset +
1050 iov->stride * vfid) >> 8);
1053 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1055 struct pci_dev *dev = bp->pdev;
1056 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1058 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1061 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1064 struct pci_dev *dev = bp->pdev;
1065 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1067 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1068 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1069 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1072 vf->bars[n].bar = start + size * vf->abs_vfid;
1073 vf->bars[n].size = size;
1077 static int bnx2x_ari_enabled(struct pci_dev *dev)
1079 return dev->bus->self && dev->bus->self->ari_enabled;
1083 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1087 u8 fid, current_pf = 0;
1089 /* IGU in normal mode - read CAM */
1090 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1091 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1092 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1094 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1095 if (fid & IGU_FID_ENCODE_IS_PF)
1096 current_pf = fid & IGU_FID_PF_NUM_MASK;
1097 else if (current_pf == BP_FUNC(bp))
1098 bnx2x_vf_set_igu_info(bp, sb_id,
1099 (fid & IGU_FID_VF_NUM_MASK));
1100 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1101 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1102 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1103 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1104 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1106 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1107 return BP_VFDB(bp)->vf_sbs_pool;
1110 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1113 kfree(bp->vfdb->vfqs);
1114 kfree(bp->vfdb->vfs);
1120 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1123 struct pci_dev *dev = bp->pdev;
1125 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1127 BNX2X_ERR("failed to find SRIOV capability in device\n");
1132 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1133 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1134 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1135 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1136 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1137 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1138 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1139 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1140 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1145 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1149 /* read the SRIOV capability structure
1150 * The fields can be read via configuration read or
1151 * directly from the device (starting at offset PCICFG_OFFSET)
1153 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1156 /* get the number of SRIOV bars */
1159 /* read the first_vfid */
1160 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1161 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1162 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1165 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1167 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1168 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1173 /* must be called after PF bars are mapped */
1174 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1178 struct bnx2x_sriov *iov;
1179 struct pci_dev *dev = bp->pdev;
1187 /* verify sriov capability is present in configuration space */
1188 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1191 /* verify chip revision */
1192 if (CHIP_IS_E1x(bp))
1195 /* check if SRIOV support is turned off */
1199 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1200 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1201 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1202 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1206 /* SRIOV can be enabled only with MSIX */
1207 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1208 int_mode_param == BNX2X_INT_MODE_INTX) {
1209 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1214 /* verify ari is enabled */
1215 if (!bnx2x_ari_enabled(bp->pdev)) {
1216 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1220 /* verify igu is in normal mode */
1221 if (CHIP_INT_MODE_IS_BC(bp)) {
1222 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1226 /* allocate the vfs database */
1227 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1229 BNX2X_ERR("failed to allocate vf database\n");
1234 /* get the sriov info - Linux already collected all the pertinent
1235 * information, however the sriov structure is for the private use
1236 * of the pci module. Also we want this information regardless
1237 * of the hyper-visor.
1239 iov = &(bp->vfdb->sriov);
1240 err = bnx2x_sriov_info(bp, iov);
1244 /* SR-IOV capability was enabled but there are no VFs*/
1245 if (iov->total == 0) {
1250 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1252 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1253 num_vfs_param, iov->nr_virtfn);
1255 /* allocate the vf array */
1256 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1257 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1258 if (!bp->vfdb->vfs) {
1259 BNX2X_ERR("failed to allocate vf array\n");
1264 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1265 for_each_vf(bp, i) {
1266 bnx2x_vf(bp, i, index) = i;
1267 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1268 bnx2x_vf(bp, i, state) = VF_FREE;
1269 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1270 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1273 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1274 if (!bnx2x_get_vf_igu_cam_info(bp)) {
1275 BNX2X_ERR("No entries in IGU CAM for vfs\n");
1280 /* allocate the queue arrays for all VFs */
1281 bp->vfdb->vfqs = kzalloc(
1282 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
1285 if (!bp->vfdb->vfqs) {
1286 BNX2X_ERR("failed to allocate vf queue array\n");
1291 /* Prepare the VFs event synchronization mechanism */
1292 mutex_init(&bp->vfdb->event_mutex);
1294 mutex_init(&bp->vfdb->bulletin_mutex);
1296 if (SHMEM2_HAS(bp, sriov_switch_mode))
1297 SHMEM2_WR(bp, sriov_switch_mode, SRIOV_SWITCH_MODE_VEB);
1301 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1302 __bnx2x_iov_free_vfdb(bp);
1306 void bnx2x_iov_remove_one(struct bnx2x *bp)
1310 /* if SRIOV is not enabled there's nothing to do */
1314 bnx2x_disable_sriov(bp);
1316 /* disable access to all VFs */
1317 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1318 bnx2x_pretend_func(bp,
1320 bp->vfdb->sriov.first_vf_in_pf +
1322 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1323 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1324 bnx2x_vf_enable_internal(bp, 0);
1325 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1328 /* free vf database */
1329 __bnx2x_iov_free_vfdb(bp);
1332 void bnx2x_iov_free_mem(struct bnx2x *bp)
1339 /* free vfs hw contexts */
1340 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1341 struct hw_dma *cxt = &bp->vfdb->context[i];
1342 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1345 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1346 BP_VFDB(bp)->sp_dma.mapping,
1347 BP_VFDB(bp)->sp_dma.size);
1349 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1350 BP_VF_MBX_DMA(bp)->mapping,
1351 BP_VF_MBX_DMA(bp)->size);
1353 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1354 BP_VF_BULLETIN_DMA(bp)->mapping,
1355 BP_VF_BULLETIN_DMA(bp)->size);
1358 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1366 /* allocate vfs hw contexts */
1367 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1368 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1370 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1371 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1372 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1375 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1382 tot_size -= cxt->size;
1385 /* allocate vfs ramrods dma memory - client_init and set_mac */
1386 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1387 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1389 if (!BP_VFDB(bp)->sp_dma.addr)
1391 BP_VFDB(bp)->sp_dma.size = tot_size;
1393 /* allocate mailboxes */
1394 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1395 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1397 if (!BP_VF_MBX_DMA(bp)->addr)
1400 BP_VF_MBX_DMA(bp)->size = tot_size;
1402 /* allocate local bulletin boards */
1403 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1404 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1406 if (!BP_VF_BULLETIN_DMA(bp)->addr)
1409 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1417 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1418 struct bnx2x_vf_queue *q)
1420 u8 cl_id = vfq_cl_id(vf, q);
1421 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1422 unsigned long q_type = 0;
1424 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1425 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1427 /* Queue State object */
1428 bnx2x_init_queue_obj(bp, &q->sp_obj,
1429 cl_id, &q->cid, 1, func_id,
1430 bnx2x_vf_sp(bp, vf, q_data),
1431 bnx2x_vf_sp_map(bp, vf, q_data),
1434 /* sp indication is set only when vlan/mac/etc. are initialized */
1435 q->sp_initialized = false;
1438 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1439 vf->abs_vfid, q->sp_obj.func_id, q->cid);
1442 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1444 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1447 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1450 return 10000; /* assume lowest supported speed is 10G */
1453 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1455 struct bnx2x_link_report_data *state = &bp->last_reported_link;
1456 struct pf_vf_bulletin_content *bulletin;
1457 struct bnx2x_virtf *vf;
1461 /* sanity and init */
1462 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1466 mutex_lock(&bp->vfdb->bulletin_mutex);
1468 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1469 bulletin->valid_bitmap |= 1 << LINK_VALID;
1471 bulletin->link_speed = state->line_speed;
1472 bulletin->link_flags = 0;
1473 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1474 &state->link_report_flags))
1475 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1476 if (test_bit(BNX2X_LINK_REPORT_FD,
1477 &state->link_report_flags))
1478 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1479 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1480 &state->link_report_flags))
1481 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1482 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1483 &state->link_report_flags))
1484 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1485 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1486 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1487 bulletin->valid_bitmap |= 1 << LINK_VALID;
1488 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1489 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1490 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1491 bulletin->valid_bitmap |= 1 << LINK_VALID;
1492 bulletin->link_speed = bnx2x_max_speed_cap(bp);
1493 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1499 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1500 "vf %d mode %u speed %d flags %x\n", idx,
1501 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1503 /* Post update on VF's bulletin board */
1504 rc = bnx2x_post_vf_bulletin(bp, idx);
1506 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1512 mutex_unlock(&bp->vfdb->bulletin_mutex);
1516 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1518 struct bnx2x *bp = netdev_priv(dev);
1519 struct bnx2x_virtf *vf = BP_VF(bp, idx);
1524 if (vf->link_cfg == link_state)
1525 return 0; /* nothing todo */
1527 vf->link_cfg = link_state;
1529 return bnx2x_iov_link_update_vf(bp, idx);
1532 void bnx2x_iov_link_update(struct bnx2x *bp)
1539 for_each_vf(bp, vfid)
1540 bnx2x_iov_link_update_vf(bp, vfid);
1543 /* called by bnx2x_nic_load */
1544 int bnx2x_iov_nic_init(struct bnx2x *bp)
1548 if (!IS_SRIOV(bp)) {
1549 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1553 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1555 /* let FLR complete ... */
1558 /* initialize vf database */
1559 for_each_vf(bp, vfid) {
1560 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1562 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1565 union cdu_context *base_cxt = (union cdu_context *)
1566 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1567 (base_vf_cid & (ILT_PAGE_CIDS-1));
1570 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1571 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1572 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1574 /* init statically provisioned resources */
1575 bnx2x_iov_static_resc(bp, vf);
1577 /* queues are initialized during VF-ACQUIRE */
1578 vf->filter_state = 0;
1579 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1581 bnx2x_init_credit_pool(&vf->vf_vlans_pool, 0,
1582 vf_vlan_rules_cnt(vf));
1583 bnx2x_init_credit_pool(&vf->vf_macs_pool, 0,
1584 vf_mac_rules_cnt(vf));
1586 /* init mcast object - This object will be re-initialized
1587 * during VF-ACQUIRE with the proper cl_id and cid.
1588 * It needs to be initialized here so that it can be safely
1589 * handled by a subsequent FLR flow.
1591 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1593 bnx2x_vf_sp(bp, vf, mcast_rdata),
1594 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1595 BNX2X_FILTER_MCAST_PENDING,
1597 BNX2X_OBJ_TYPE_RX_TX);
1599 /* set the mailbox message addresses */
1600 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1601 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1602 MBX_MSG_ALIGNED_SIZE);
1604 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1605 vfid * MBX_MSG_ALIGNED_SIZE;
1607 /* Enable vf mailbox */
1608 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1612 for_each_vf(bp, vfid) {
1613 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1615 /* fill in the BDF and bars */
1616 vf->bus = bnx2x_vf_bus(bp, vfid);
1617 vf->devfn = bnx2x_vf_devfn(bp, vfid);
1618 bnx2x_vf_set_bars(bp, vf);
1621 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1622 vf->abs_vfid, vf->bus, vf->devfn,
1623 (unsigned)vf->bars[0].bar, vf->bars[0].size,
1624 (unsigned)vf->bars[1].bar, vf->bars[1].size,
1625 (unsigned)vf->bars[2].bar, vf->bars[2].size);
1631 /* called by bnx2x_chip_cleanup */
1632 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1639 /* release all the VFs */
1641 bnx2x_vf_release(bp, BP_VF(bp, i));
1646 /* called by bnx2x_init_hw_func, returns the next ilt line */
1647 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1650 struct bnx2x_ilt *ilt = BP_ILT(bp);
1655 /* set vfs ilt lines */
1656 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1657 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1659 ilt->lines[line+i].page = hw_cxt->addr;
1660 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1661 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1666 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1668 return ((cid >= BNX2X_FIRST_VF_CID) &&
1669 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1673 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1674 struct bnx2x_vf_queue *vfq,
1675 union event_ring_elem *elem)
1677 unsigned long ramrod_flags = 0;
1679 u32 echo = le32_to_cpu(elem->message.data.eth_event.echo);
1681 /* Always push next commands out, don't wait here */
1682 set_bit(RAMROD_CONT, &ramrod_flags);
1684 switch (echo >> BNX2X_SWCID_SHIFT) {
1685 case BNX2X_FILTER_MAC_PENDING:
1686 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1689 case BNX2X_FILTER_VLAN_PENDING:
1690 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1694 BNX2X_ERR("Unsupported classification command: 0x%x\n", echo);
1698 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1700 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1704 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1705 struct bnx2x_virtf *vf)
1707 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1710 rparam.mcast_obj = &vf->mcast_obj;
1711 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1713 /* If there are pending mcast commands - send them */
1714 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1715 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1717 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1723 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1724 struct bnx2x_virtf *vf)
1726 smp_mb__before_atomic();
1727 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1728 smp_mb__after_atomic();
1731 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1732 struct bnx2x_virtf *vf)
1734 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1737 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1739 struct bnx2x_virtf *vf;
1740 int qidx = 0, abs_vfid;
1747 /* first get the cid - the only events we handle here are cfc-delete
1748 * and set-mac completion
1750 opcode = elem->message.opcode;
1753 case EVENT_RING_OPCODE_CFC_DEL:
1754 cid = SW_CID(elem->message.data.cfc_del_event.cid);
1755 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1757 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1758 case EVENT_RING_OPCODE_MULTICAST_RULES:
1759 case EVENT_RING_OPCODE_FILTERS_RULES:
1760 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1761 cid = SW_CID(elem->message.data.eth_event.echo);
1762 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1764 case EVENT_RING_OPCODE_VF_FLR:
1765 abs_vfid = elem->message.data.vf_flr_event.vf_id;
1766 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1769 case EVENT_RING_OPCODE_MALICIOUS_VF:
1770 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1771 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1773 elem->message.data.malicious_vf_event.err_id);
1779 /* check if the cid is the VF range */
1780 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1781 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1785 /* extract vf and rxq index from vf_cid - relies on the following:
1786 * 1. vfid on cid reflects the true abs_vfid
1787 * 2. The max number of VFs (per path) is 64
1789 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1790 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1792 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1795 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1801 case EVENT_RING_OPCODE_CFC_DEL:
1802 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1803 vf->abs_vfid, qidx);
1804 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1807 BNX2X_Q_CMD_CFC_DEL);
1809 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1810 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1811 vf->abs_vfid, qidx);
1812 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1814 case EVENT_RING_OPCODE_MULTICAST_RULES:
1815 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1816 vf->abs_vfid, qidx);
1817 bnx2x_vf_handle_mcast_eqe(bp, vf);
1819 case EVENT_RING_OPCODE_FILTERS_RULES:
1820 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1821 vf->abs_vfid, qidx);
1822 bnx2x_vf_handle_filters_eqe(bp, vf);
1824 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1825 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1826 vf->abs_vfid, qidx);
1827 bnx2x_vf_handle_rss_update_eqe(bp, vf);
1828 case EVENT_RING_OPCODE_VF_FLR:
1829 /* Do nothing for now */
1831 case EVENT_RING_OPCODE_MALICIOUS_VF:
1832 vf->malicious = true;
1839 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1841 /* extract the vf from vf_cid - relies on the following:
1842 * 1. vfid on cid reflects the true abs_vfid
1843 * 2. The max number of VFs (per path) is 64
1845 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1846 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1849 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1850 struct bnx2x_queue_sp_obj **q_obj)
1852 struct bnx2x_virtf *vf;
1857 vf = bnx2x_vf_by_cid(bp, vf_cid);
1860 /* extract queue index from vf_cid - relies on the following:
1861 * 1. vfid on cid reflects the true abs_vfid
1862 * 2. The max number of VFs (per path) is 64
1864 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1865 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1867 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1871 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1874 int first_queue_query_index, num_queues_req;
1875 dma_addr_t cur_data_offset;
1876 struct stats_query_entry *cur_query_entry;
1878 bool is_fcoe = false;
1886 /* fcoe adds one global request and one queue request */
1887 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1888 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1891 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1892 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1893 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1894 first_queue_query_index + num_queues_req);
1896 cur_data_offset = bp->fw_stats_data_mapping +
1897 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1898 num_queues_req * sizeof(struct per_queue_stats);
1900 cur_query_entry = &bp->fw_stats_req->
1901 query[first_queue_query_index + num_queues_req];
1903 for_each_vf(bp, i) {
1905 struct bnx2x_virtf *vf = BP_VF(bp, i);
1907 if (vf->state != VF_ENABLED) {
1908 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1909 "vf %d not enabled so no stats for it\n",
1914 if (vf->malicious) {
1915 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1916 "vf %d malicious so no stats for it\n",
1921 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1922 "add addresses for vf %d\n", vf->abs_vfid);
1923 for_each_vfq(vf, j) {
1924 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1926 dma_addr_t q_stats_addr =
1927 vf->fw_stat_map + j * vf->stats_stride;
1929 /* collect stats fro active queues only */
1930 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1931 BNX2X_Q_LOGICAL_STATE_STOPPED)
1934 /* create stats query entry for this queue */
1935 cur_query_entry->kind = STATS_TYPE_QUEUE;
1936 cur_query_entry->index = vfq_stat_id(vf, rxq);
1937 cur_query_entry->funcID =
1938 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1939 cur_query_entry->address.hi =
1940 cpu_to_le32(U64_HI(q_stats_addr));
1941 cur_query_entry->address.lo =
1942 cpu_to_le32(U64_LO(q_stats_addr));
1943 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1944 "added address %x %x for vf %d queue %d client %d\n",
1945 cur_query_entry->address.hi,
1946 cur_query_entry->address.lo,
1947 cur_query_entry->funcID,
1948 j, cur_query_entry->index);
1950 cur_data_offset += sizeof(struct per_queue_stats);
1953 /* all stats are coalesced to the leading queue */
1954 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1958 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1961 /* VF API helpers */
1962 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1965 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1966 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1968 REG_WR(bp, reg, val);
1971 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
1976 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
1977 vfq_qzone_id(vf, vfq_get(vf, i)), false);
1980 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
1984 /* clear the VF configuration - pretend */
1985 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1986 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1987 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
1988 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
1989 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1990 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1993 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
1995 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
1996 BNX2X_VF_MAX_QUEUES);
2000 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2001 struct vf_pf_resc_request *req_resc)
2003 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2004 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2006 return ((req_resc->num_rxqs <= rxq_cnt) &&
2007 (req_resc->num_txqs <= txq_cnt) &&
2008 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2009 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2010 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2014 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2015 struct vf_pf_resc_request *resc)
2017 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2020 union cdu_context *base_cxt = (union cdu_context *)
2021 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2022 (base_vf_cid & (ILT_PAGE_CIDS-1));
2025 /* if state is 'acquired' the VF was not released or FLR'd, in
2026 * this case the returned resources match the acquired already
2027 * acquired resources. Verify that the requested numbers do
2028 * not exceed the already acquired numbers.
2030 if (vf->state == VF_ACQUIRED) {
2031 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2034 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2035 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2042 /* Otherwise vf state must be 'free' or 'reset' */
2043 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2044 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2045 vf->abs_vfid, vf->state);
2049 /* static allocation:
2050 * the global maximum number are fixed per VF. Fail the request if
2051 * requested number exceed these globals
2053 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2055 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2056 /* set the max resource in the vf */
2060 /* Set resources counters - 0 request means max available */
2061 vf_sb_count(vf) = resc->num_sbs;
2062 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2063 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2066 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2067 vf_sb_count(vf), vf_rxq_count(vf),
2068 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2069 vf_vlan_rules_cnt(vf));
2071 /* Initialize the queues */
2073 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2077 for_each_vfq(vf, i) {
2078 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2081 BNX2X_ERR("q number %d was not allocated\n", i);
2086 q->cxt = &((base_cxt + i)->eth);
2087 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2089 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2090 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2092 /* init SP objects */
2093 bnx2x_vfq_init(bp, vf, q);
2095 vf->state = VF_ACQUIRED;
2099 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2101 struct bnx2x_func_init_params func_init = {0};
2104 /* the sb resources are initialized at this point, do the
2105 * FW/HW initializations
2107 for_each_vf_sb(vf, i)
2108 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2109 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2112 if (vf->state != VF_ACQUIRED) {
2113 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2114 vf->abs_vfid, vf->state);
2118 /* let FLR complete ... */
2121 /* FLR cleanup epilogue */
2122 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2125 /* reset IGU VF statistics: MSIX */
2126 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2128 /* function setup */
2129 func_init.pf_id = BP_FUNC(bp);
2130 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2131 bnx2x_func_init(bp, &func_init);
2134 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2135 bnx2x_vf_enable_traffic(bp, vf);
2137 /* queue protection table */
2139 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2140 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2142 vf->state = VF_ENABLED;
2144 /* update vf bulletin board */
2145 bnx2x_post_vf_bulletin(bp, vf->index);
2150 struct set_vf_state_cookie {
2151 struct bnx2x_virtf *vf;
2155 static void bnx2x_set_vf_state(void *cookie)
2157 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2159 p->vf->state = p->state;
2162 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2166 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2168 /* Close all queues */
2169 for (i = 0; i < vf_rxq_count(vf); i++) {
2170 rc = bnx2x_vf_queue_teardown(bp, vf, i);
2175 /* disable the interrupts */
2176 DP(BNX2X_MSG_IOV, "disabling igu\n");
2177 bnx2x_vf_igu_disable(bp, vf);
2179 /* disable the VF */
2180 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2181 bnx2x_vf_clr_qtbl(bp, vf);
2183 /* need to make sure there are no outstanding stats ramrods which may
2184 * cause the device to access the VF's stats buffer which it will free
2185 * as soon as we return from the close flow.
2188 struct set_vf_state_cookie cookie;
2191 cookie.state = VF_ACQUIRED;
2192 rc = bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2197 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2201 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2205 /* VF release can be called either: 1. The VF was acquired but
2206 * not enabled 2. the vf was enabled or in the process of being
2209 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2213 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2214 vf->state == VF_FREE ? "Free" :
2215 vf->state == VF_ACQUIRED ? "Acquired" :
2216 vf->state == VF_ENABLED ? "Enabled" :
2217 vf->state == VF_RESET ? "Reset" :
2220 switch (vf->state) {
2222 rc = bnx2x_vf_close(bp, vf);
2225 /* Fallthrough to release resources */
2227 DP(BNX2X_MSG_IOV, "about to free resources\n");
2228 bnx2x_vf_free_resc(bp, vf);
2238 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2242 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2243 struct bnx2x_config_rss_params *rss)
2245 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2246 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2247 return bnx2x_config_rss(bp, rss);
2250 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2251 struct vfpf_tpa_tlv *tlv,
2252 struct bnx2x_queue_update_tpa_params *params)
2254 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2255 struct bnx2x_queue_state_params qstate;
2258 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2260 /* Set ramrod params */
2261 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2262 memcpy(&qstate.params.update_tpa, params,
2263 sizeof(struct bnx2x_queue_update_tpa_params));
2264 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2265 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2267 for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2268 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2269 qstate.params.update_tpa.sge_map = sge_addr[qid];
2270 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2271 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2272 U64_LO(sge_addr[qid]));
2273 rc = bnx2x_queue_state_change(bp, &qstate);
2275 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2276 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2285 /* VF release ~ VF close + VF release-resources
2286 * Release is the ultimate SW shutdown and is called whenever an
2287 * irrecoverable error is encountered.
2289 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2293 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2294 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2296 rc = bnx2x_vf_free(bp, vf);
2299 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2301 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2305 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2306 enum channel_tlvs tlv)
2308 /* we don't lock the channel for unsupported tlvs */
2309 if (!bnx2x_tlv_supported(tlv)) {
2310 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2314 /* lock the channel */
2315 mutex_lock(&vf->op_mutex);
2317 /* record the locking op */
2318 vf->op_current = tlv;
2321 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2325 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2326 enum channel_tlvs expected_tlv)
2328 enum channel_tlvs current_tlv;
2331 BNX2X_ERR("VF was %p\n", vf);
2335 current_tlv = vf->op_current;
2337 /* we don't unlock the channel for unsupported tlvs */
2338 if (!bnx2x_tlv_supported(expected_tlv))
2341 WARN(expected_tlv != vf->op_current,
2342 "lock mismatch: expected %d found %d", expected_tlv,
2345 /* record the locking op */
2346 vf->op_current = CHANNEL_TLV_NONE;
2348 /* lock the channel */
2349 mutex_unlock(&vf->op_mutex);
2351 /* log the unlock */
2352 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2353 vf->abs_vfid, current_tlv);
2356 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2358 struct bnx2x_queue_state_params q_params;
2362 /* Verify changes are needed and record current Tx switching state */
2363 prev_flags = bp->flags;
2365 bp->flags |= TX_SWITCHING;
2367 bp->flags &= ~TX_SWITCHING;
2368 if (prev_flags == bp->flags)
2371 /* Verify state enables the sending of queue ramrods */
2372 if ((bp->state != BNX2X_STATE_OPEN) ||
2373 (bnx2x_get_q_logical_state(bp,
2374 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2375 BNX2X_Q_LOGICAL_STATE_ACTIVE))
2378 /* send q. update ramrod to configure Tx switching */
2379 memset(&q_params, 0, sizeof(q_params));
2380 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2381 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2382 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2383 &q_params.params.update.update_flags);
2385 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2386 &q_params.params.update.update_flags);
2388 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2389 &q_params.params.update.update_flags);
2391 /* send the ramrod on all the queues of the PF */
2392 for_each_eth_queue(bp, i) {
2393 struct bnx2x_fastpath *fp = &bp->fp[i];
2396 /* Set the appropriate Queue object */
2397 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2399 for (tx_idx = FIRST_TX_COS_INDEX;
2400 tx_idx < fp->max_cos; tx_idx++) {
2401 q_params.params.update.cid_index = tx_idx;
2403 /* Update the Queue state */
2404 rc = bnx2x_queue_state_change(bp, &q_params);
2406 BNX2X_ERR("Failed to configure Tx switching\n");
2412 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2416 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2418 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2420 if (!IS_SRIOV(bp)) {
2421 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2425 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2426 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2428 /* HW channel is only operational when PF is up */
2429 if (bp->state != BNX2X_STATE_OPEN) {
2430 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2434 /* we are always bound by the total_vfs in the configuration space */
2435 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2436 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2437 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2438 num_vfs_param = BNX2X_NR_VIRTFN(bp);
2441 bp->requested_nr_virtfn = num_vfs_param;
2442 if (num_vfs_param == 0) {
2443 bnx2x_set_pf_tx_switching(bp, false);
2444 bnx2x_disable_sriov(bp);
2447 return bnx2x_enable_sriov(bp);
2451 #define IGU_ENTRY_SIZE 4
2453 int bnx2x_enable_sriov(struct bnx2x *bp)
2455 int rc = 0, req_vfs = bp->requested_nr_virtfn;
2456 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2457 u32 igu_entry, address;
2463 first_vf = bp->vfdb->sriov.first_vf_in_pf;
2465 /* statically distribute vf sb pool between VFs */
2466 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2467 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2469 /* zero previous values learned from igu cam */
2470 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2471 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2474 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2476 bp->vfdb->vf_sbs_pool = 0;
2478 /* prepare IGU cam */
2479 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2480 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2481 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2482 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2483 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2484 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2485 IGU_REG_MAPPING_MEMORY_VALID;
2486 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2488 REG_WR(bp, address, igu_entry);
2490 address += IGU_ENTRY_SIZE;
2494 /* Reinitialize vf database according to igu cam */
2495 bnx2x_get_vf_igu_cam_info(bp);
2497 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2498 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2501 for_each_vf(bp, vf_idx) {
2502 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2504 /* set local queue arrays */
2505 vf->vfqs = &bp->vfdb->vfqs[qcount];
2506 qcount += vf_sb_count(vf);
2507 bnx2x_iov_static_resc(bp, vf);
2510 /* prepare msix vectors in VF configuration space - the value in the
2511 * PCI configuration space should be the index of the last entry,
2512 * namely one less than the actual size of the table
2514 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2515 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2516 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2518 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2519 vf_idx, num_vf_queues - 1);
2521 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2523 /* enable sriov. This will probe all the VFs, and consequentially cause
2524 * the "acquire" messages to appear on the VF PF channel.
2526 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2527 bnx2x_disable_sriov(bp);
2529 rc = bnx2x_set_pf_tx_switching(bp, true);
2533 rc = pci_enable_sriov(bp->pdev, req_vfs);
2535 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2538 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2542 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2545 struct pf_vf_bulletin_content *bulletin;
2547 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2548 for_each_vf(bp, vfidx) {
2549 bulletin = BP_VF_BULLETIN(bp, vfidx);
2550 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2551 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0,
2552 htons(ETH_P_8021Q));
2556 void bnx2x_disable_sriov(struct bnx2x *bp)
2558 if (pci_vfs_assigned(bp->pdev)) {
2560 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2564 pci_disable_sriov(bp->pdev);
2567 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2568 struct bnx2x_virtf **vf,
2569 struct pf_vf_bulletin_content **bulletin,
2572 if (bp->state != BNX2X_STATE_OPEN) {
2573 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2577 if (!IS_SRIOV(bp)) {
2578 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2582 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2583 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2584 vfidx, BNX2X_NR_VIRTFN(bp));
2589 *vf = BP_VF(bp, vfidx);
2590 *bulletin = BP_VF_BULLETIN(bp, vfidx);
2593 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2597 if (test_queue && !(*vf)->vfqs) {
2598 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2604 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2612 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2613 struct ifla_vf_info *ivi)
2615 struct bnx2x *bp = netdev_priv(dev);
2616 struct bnx2x_virtf *vf = NULL;
2617 struct pf_vf_bulletin_content *bulletin = NULL;
2618 struct bnx2x_vlan_mac_obj *mac_obj;
2619 struct bnx2x_vlan_mac_obj *vlan_obj;
2622 /* sanity and init */
2623 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2627 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2628 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2629 if (!mac_obj || !vlan_obj) {
2630 BNX2X_ERR("VF partially initialized\n");
2636 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2637 ivi->min_tx_rate = 0;
2638 ivi->spoofchk = 1; /*always enabled */
2639 if (vf->state == VF_ENABLED) {
2640 /* mac and vlan are in vlan_mac objects */
2641 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2642 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2644 vlan_obj->get_n_elements(bp, vlan_obj, 1,
2645 (u8 *)&ivi->vlan, 0,
2649 mutex_lock(&bp->vfdb->bulletin_mutex);
2651 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2652 /* mac configured by ndo so its in bulletin board */
2653 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2655 /* function has not been loaded yet. Show mac as 0s */
2656 eth_zero_addr(ivi->mac);
2659 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2660 /* vlan configured by ndo so its in bulletin board */
2661 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2663 /* function has not been loaded yet. Show vlans as 0s */
2664 memset(&ivi->vlan, 0, VLAN_HLEN);
2666 mutex_unlock(&bp->vfdb->bulletin_mutex);
2672 /* New mac for VF. Consider these cases:
2673 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2674 * supply at acquire.
2675 * 2. VF has already been acquired but has not yet initialized - store in local
2676 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
2677 * will configure this mac when it is ready.
2678 * 3. VF has already initialized but has not yet setup a queue - post the new
2679 * mac on VF's bulletin board right now. VF will configure this mac when it
2681 * 4. VF has already set a queue - delete any macs already configured for this
2682 * queue and manually config the new mac.
2683 * In any event, once this function has been called refuse any attempts by the
2684 * VF to configure any mac for itself except for this mac. In case of a race
2685 * where the VF fails to see the new post on its bulletin board before sending a
2686 * mac configuration request, the PF will simply fail the request and VF can try
2687 * again after consulting its bulletin board.
2689 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2691 struct bnx2x *bp = netdev_priv(dev);
2692 int rc, q_logical_state;
2693 struct bnx2x_virtf *vf = NULL;
2694 struct pf_vf_bulletin_content *bulletin = NULL;
2696 if (!is_valid_ether_addr(mac)) {
2697 BNX2X_ERR("mac address invalid\n");
2701 /* sanity and init */
2702 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2706 mutex_lock(&bp->vfdb->bulletin_mutex);
2708 /* update PF's copy of the VF's bulletin. Will no longer accept mac
2709 * configuration requests from vf unless match this mac
2711 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2712 memcpy(bulletin->mac, mac, ETH_ALEN);
2714 /* Post update on VF's bulletin board */
2715 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2717 /* release lock before checking return code */
2718 mutex_unlock(&bp->vfdb->bulletin_mutex);
2721 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2726 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2727 if (vf->state == VF_ENABLED &&
2728 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2729 /* configure the mac in device on this vf's queue */
2730 unsigned long ramrod_flags = 0;
2731 struct bnx2x_vlan_mac_obj *mac_obj;
2733 /* User should be able to see failure reason in system logs */
2734 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2737 /* must lock vfpf channel to protect against vf flows */
2738 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2740 /* remove existing eth macs */
2741 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2742 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2744 BNX2X_ERR("failed to delete eth macs\n");
2749 /* remove existing uc list macs */
2750 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2752 BNX2X_ERR("failed to delete uc_list macs\n");
2757 /* configure the new mac to device */
2758 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2759 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2760 BNX2X_ETH_MAC, &ramrod_flags);
2763 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2769 static void bnx2x_set_vf_vlan_acceptance(struct bnx2x *bp,
2770 struct bnx2x_virtf *vf, bool accept)
2772 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2773 unsigned long accept_flags;
2775 /* need to remove/add the VF's accept_any_vlan bit */
2776 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2778 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2780 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2782 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2784 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2785 bnx2x_config_rx_mode(bp, &rx_ramrod);
2788 static int bnx2x_set_vf_vlan_filter(struct bnx2x *bp, struct bnx2x_virtf *vf,
2791 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2792 unsigned long ramrod_flags = 0;
2795 /* configure the new vlan to device */
2796 memset(&ramrod_param, 0, sizeof(ramrod_param));
2797 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2798 ramrod_param.vlan_mac_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2799 ramrod_param.ramrod_flags = ramrod_flags;
2800 ramrod_param.user_req.u.vlan.vlan = vlan;
2801 ramrod_param.user_req.cmd = add ? BNX2X_VLAN_MAC_ADD
2802 : BNX2X_VLAN_MAC_DEL;
2803 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2805 BNX2X_ERR("failed to configure vlan\n");
2812 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos,
2815 struct pf_vf_bulletin_content *bulletin = NULL;
2816 struct bnx2x *bp = netdev_priv(dev);
2817 struct bnx2x_vlan_mac_obj *vlan_obj;
2818 unsigned long vlan_mac_flags = 0;
2819 unsigned long ramrod_flags = 0;
2820 struct bnx2x_virtf *vf = NULL;
2824 BNX2X_ERR("illegal vlan value %d\n", vlan);
2828 if (vlan_proto != htons(ETH_P_8021Q))
2829 return -EPROTONOSUPPORT;
2831 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2834 /* sanity and init */
2835 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2839 /* update PF's copy of the VF's bulletin. No point in posting the vlan
2840 * to the VF since it doesn't have anything to do with it. But it useful
2841 * to store it here in case the VF is not up yet and we can only
2842 * configure the vlan later when it does. Treat vlan id 0 as remove the
2845 mutex_lock(&bp->vfdb->bulletin_mutex);
2848 bulletin->valid_bitmap |= 1 << VLAN_VALID;
2850 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2851 bulletin->vlan = vlan;
2853 /* Post update on VF's bulletin board */
2854 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2856 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2857 mutex_unlock(&bp->vfdb->bulletin_mutex);
2859 /* is vf initialized and queue set up? */
2860 if (vf->state != VF_ENABLED ||
2861 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2862 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2865 /* User should be able to see error in system logs */
2866 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2869 /* must lock vfpf channel to protect against vf flows */
2870 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2872 /* remove existing vlans */
2873 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2874 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2875 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2878 BNX2X_ERR("failed to delete vlans\n");
2883 /* clear accept_any_vlan when HV forces vlan, otherwise
2884 * according to VF capabilities
2886 if (vlan || !(vf->cfg_flags & VF_CFG_VLAN_FILTER))
2887 bnx2x_set_vf_vlan_acceptance(bp, vf, !vlan);
2889 rc = bnx2x_set_vf_vlan_filter(bp, vf, vlan, true);
2893 /* send queue update ramrods to configure default vlan and
2894 * silent vlan removal
2896 for_each_vfq(vf, i) {
2897 struct bnx2x_queue_state_params q_params = {NULL};
2898 struct bnx2x_queue_update_params *update_params;
2900 q_params.q_obj = &bnx2x_vfq(vf, i, sp_obj);
2902 /* validate the Q is UP */
2903 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) !=
2904 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2907 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2908 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2909 update_params = &q_params.params.update;
2910 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2911 &update_params->update_flags);
2912 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2913 &update_params->update_flags);
2915 /* if vlan is 0 then we want to leave the VF traffic
2916 * untagged, and leave the incoming traffic untouched
2917 * (i.e. do not remove any vlan tags).
2919 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2920 &update_params->update_flags);
2921 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2922 &update_params->update_flags);
2924 /* configure default vlan to vf queue and set silent
2925 * vlan removal (the vf remains unaware of this vlan).
2927 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2928 &update_params->update_flags);
2929 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2930 &update_params->update_flags);
2931 update_params->def_vlan = vlan;
2932 update_params->silent_removal_value =
2933 vlan & VLAN_VID_MASK;
2934 update_params->silent_removal_mask = VLAN_VID_MASK;
2937 /* Update the Queue state */
2938 rc = bnx2x_queue_state_change(bp, &q_params);
2940 BNX2X_ERR("Failed to configure default VLAN queue %d\n",
2946 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2950 "updated VF[%d] vlan configuration (vlan = %d)\n",
2956 /* crc is the first field in the bulletin board. Compute the crc over the
2957 * entire bulletin board excluding the crc field itself. Use the length field
2958 * as the Bulletin Board was posted by a PF with possibly a different version
2959 * from the vf which will sample it. Therefore, the length is computed by the
2960 * PF and then used blindly by the VF.
2962 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
2964 return crc32(BULLETIN_CRC_SEED,
2965 ((u8 *)bulletin) + sizeof(bulletin->crc),
2966 bulletin->length - sizeof(bulletin->crc));
2969 /* Check for new posts on the bulletin board */
2970 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
2972 struct pf_vf_bulletin_content *bulletin;
2975 /* sampling structure in mid post may result with corrupted data
2976 * validate crc to ensure coherency.
2978 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
2981 /* sample the bulletin board */
2982 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
2983 sizeof(union pf_vf_bulletin));
2985 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
2987 if (bp->shadow_bulletin.content.crc == crc)
2990 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
2991 bp->shadow_bulletin.content.crc, crc);
2994 if (attempts >= BULLETIN_ATTEMPTS) {
2995 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
2997 return PFVF_BULLETIN_CRC_ERR;
2999 bulletin = &bp->shadow_bulletin.content;
3001 /* bulletin board hasn't changed since last sample */
3002 if (bp->old_bulletin.version == bulletin->version)
3003 return PFVF_BULLETIN_UNCHANGED;
3005 /* the mac address in bulletin board is valid and is new */
3006 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3007 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3008 /* update new mac to net device */
3009 memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3012 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3013 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3014 bulletin->link_speed, bulletin->link_flags);
3016 bp->vf_link_vars.line_speed = bulletin->link_speed;
3017 bp->vf_link_vars.link_report_flags = 0;
3019 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3020 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3021 &bp->vf_link_vars.link_report_flags);
3023 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3024 __set_bit(BNX2X_LINK_REPORT_FD,
3025 &bp->vf_link_vars.link_report_flags);
3026 /* Rx Flow Control is ON */
3027 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3028 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3029 &bp->vf_link_vars.link_report_flags);
3030 /* Tx Flow Control is ON */
3031 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3032 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3033 &bp->vf_link_vars.link_report_flags);
3034 __bnx2x_link_report(bp);
3037 /* copy new bulletin board to bp */
3038 memcpy(&bp->old_bulletin, bulletin,
3039 sizeof(struct pf_vf_bulletin_content));
3041 return PFVF_BULLETIN_UPDATED;
3044 void bnx2x_timer_sriov(struct bnx2x *bp)
3046 bnx2x_sample_bulletin(bp);
3048 /* if channel is down we need to self destruct */
3049 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3050 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3054 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3056 /* vf doorbells are embedded within the regview */
3057 return bp->regview + PXP_VF_ADDR_DB_START;
3060 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3062 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3063 sizeof(struct bnx2x_vf_mbx_msg));
3064 BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping,
3065 sizeof(union pf_vf_bulletin));
3068 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3070 mutex_init(&bp->vf2pf_mutex);
3072 /* allocate vf2pf mailbox for vf to pf channel */
3073 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3074 sizeof(struct bnx2x_vf_mbx_msg));
3075 if (!bp->vf2pf_mbox)
3078 /* allocate pf 2 vf bulletin board */
3079 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3080 sizeof(union pf_vf_bulletin));
3081 if (!bp->pf2vf_bulletin)
3084 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3089 bnx2x_vf_pci_dealloc(bp);
3093 void bnx2x_iov_channel_down(struct bnx2x *bp)
3096 struct pf_vf_bulletin_content *bulletin;
3101 for_each_vf(bp, vf_idx) {
3102 /* locate this VFs bulletin board and update the channel down
3105 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3106 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3108 /* update vf bulletin board */
3109 bnx2x_post_vf_bulletin(bp, vf_idx);
3113 void bnx2x_iov_task(struct work_struct *work)
3115 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3117 if (!netif_running(bp->dev))
3120 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3121 &bp->iov_task_state))
3122 bnx2x_vf_handle_flr_event(bp);
3124 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3125 &bp->iov_task_state))
3129 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3131 smp_mb__before_atomic();
3132 set_bit(flag, &bp->iov_task_state);
3133 smp_mb__after_atomic();
3134 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3135 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);