drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/dsa.h>
  26 #include <net/ip.h>
  27 #include <net/ipv6.h>
  28
  29 #include "bcmsysport.h"
  30
  31 /* I/O accessors register helpers */
  32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  34 {                                                                       \
  35         u32 reg = readl_relaxed(priv->base + offset + off);             \
  36         return reg;                                                     \
  37 }                                                                       \
  38 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  39                                   u32 val, u32 off)                     \
  40 {                                                                       \
  41         writel_relaxed(val, priv->base + offset + off);                 \
  42 }                                                                       \
  43
  44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  54
  55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
  56  * same layout, except it has been moved by 4 bytes up, *sigh*
  57  */
  58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
  59 {
  60         if (priv->is_lite && off >= RDMA_STATUS)
  61                 off += 4;
  62         return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
  63 }
  64
  65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
  66 {
  67         if (priv->is_lite && off >= RDMA_STATUS)
  68                 off += 4;
  69         writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
  70 }
  71
  72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
  73 {
  74         if (!priv->is_lite) {
  75                 return BIT(bit);
  76         } else {
  77                 if (bit >= ACB_ALGO)
  78                         return BIT(bit + 1);
  79                 else
  80                         return BIT(bit);
  81         }
  82 }
  83
  84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  85  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  86   */
  87 #define BCM_SYSPORT_INTR_L2(which)      \
  88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  89                                                 u32 mask)               \
  90 {                                                                       \
  91         priv->irq##which##_mask &= ~(mask);                             \
  92         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  93 }                                                                       \
  94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  95                                                 u32 mask)               \
  96 {                                                                       \
  97         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  98         priv->irq##which##_mask |= (mask);                              \
  99 }                                                                       \
 100
 101 BCM_SYSPORT_INTR_L2(0)
 102 BCM_SYSPORT_INTR_L2(1)
 103
 104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
 105  * nanoseconds), so keep the check for 64-bits explicit here to save
 106  * one register write per-packet on 32-bits platforms.
 107  */
 108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
 109                                      void __iomem *d,
 110                                      dma_addr_t addr)
 111 {
 112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
 113         writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
 114                      d + DESC_ADDR_HI_STATUS_LEN);
 115 #endif
 116         writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
 117 }
 118
 119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
 120                                              struct dma_desc *desc,
 121                                              unsigned int port)
 122 {
 123         /* Ports are latched, so write upper address first */
 124         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
 125         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
 126 }
 127
 128 /* Ethtool operations */
 129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 130                                    netdev_features_t wanted)
 131 {
 132         struct bcm_sysport_priv *priv = netdev_priv(dev);
 133         u32 reg;
 134
 135         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 136         reg = rxchk_readl(priv, RXCHK_CONTROL);
 137         /* Clear L2 header checks, which would prevent BPDUs
 138          * from being received.
 139          */
 140         reg &= ~RXCHK_L2_HDR_DIS;
 141         if (priv->rx_chk_en)
 142                 reg |= RXCHK_EN;
 143         else
 144                 reg &= ~RXCHK_EN;
 145
 146         /* If UniMAC forwards CRC, we need to skip over it to get
 147          * a valid CHK bit to be set in the per-packet status word
 148          */
 149         if (priv->rx_chk_en && priv->crc_fwd)
 150                 reg |= RXCHK_SKIP_FCS;
 151         else
 152                 reg &= ~RXCHK_SKIP_FCS;
 153
 154         /* If Broadcom tags are enabled (e.g: using a switch), make
 155          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 156          * tag after the Ethernet MAC Source Address.
 157          */
 158         if (netdev_uses_dsa(dev))
 159                 reg |= RXCHK_BRCM_TAG_EN;
 160         else
 161                 reg &= ~RXCHK_BRCM_TAG_EN;
 162
 163         rxchk_writel(priv, reg, RXCHK_CONTROL);
 164
 165         return 0;
 166 }
 167
 168 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 169                                    netdev_features_t wanted)
 170 {
 171         struct bcm_sysport_priv *priv = netdev_priv(dev);
 172         u32 reg;
 173
 174         /* Hardware transmit checksum requires us to enable the Transmit status
 175          * block prepended to the packet contents
 176          */
 177         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 178         reg = tdma_readl(priv, TDMA_CONTROL);
 179         if (priv->tsb_en)
 180                 reg |= tdma_control_bit(priv, TSB_EN);
 181         else
 182                 reg &= ~tdma_control_bit(priv, TSB_EN);
 183         tdma_writel(priv, reg, TDMA_CONTROL);
 184
 185         return 0;
 186 }
 187
 188 static int bcm_sysport_set_features(struct net_device *dev,
 189                                     netdev_features_t features)
 190 {
 191         netdev_features_t changed = features ^ dev->features;
 192         netdev_features_t wanted = dev->wanted_features;
 193         int ret = 0;
 194
 195         if (changed & NETIF_F_RXCSUM)
 196                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 197         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 198                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 199
 200         return ret;
 201 }
 202
 203 /* Hardware counters must be kept in sync because the order/offset
 204  * is important here (order in structure declaration = order in hardware)
 205  */
 206 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 207         /* general stats */
 208         STAT_NETDEV64(rx_packets),
 209         STAT_NETDEV64(tx_packets),
 210         STAT_NETDEV64(rx_bytes),
 211         STAT_NETDEV64(tx_bytes),
 212         STAT_NETDEV(rx_errors),
 213         STAT_NETDEV(tx_errors),
 214         STAT_NETDEV(rx_dropped),
 215         STAT_NETDEV(tx_dropped),
 216         STAT_NETDEV(multicast),
 217         /* UniMAC RSV counters */
 218         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 219         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 220         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 221         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 222         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 223         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 224         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 225         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 226         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 227         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 228         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 229         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 230         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 231         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 232         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 233         STAT_MIB_RX("rx_control", mib.rx.cf),
 234         STAT_MIB_RX("rx_pause", mib.rx.pf),
 235         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 236         STAT_MIB_RX("rx_align", mib.rx.aln),
 237         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 238         STAT_MIB_RX("rx_code", mib.rx.cde),
 239         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 240         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 241         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 242         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 243         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 244         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 245         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 246         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 247         /* UniMAC TSV counters */
 248         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 249         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 250         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 251         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 252         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 253         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 254         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 255         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 256         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 257         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 258         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 259         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 260         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 261         STAT_MIB_TX("tx_pause", mib.tx.pf),
 262         STAT_MIB_TX("tx_control", mib.tx.cf),
 263         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 264         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 265         STAT_MIB_TX("tx_defer", mib.tx.drf),
 266         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 267         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 268         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 269         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 270         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 271         STAT_MIB_TX("tx_frags", mib.tx.frg),
 272         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 273         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 274         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 275         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 276         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 277         /* UniMAC RUNT counters */
 278         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 279         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 280         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 281         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 282         /* RXCHK misc statistics */
 283         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 284         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 285                    RXCHK_OTHER_DISC_CNTR),
 286         /* RBUF misc statistics */
 287         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 288         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 289         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 290         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 291         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 292         /* Per TX-queue statistics are dynamically appended */
 293 };
 294
 295 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 296
 297 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 298                                     struct ethtool_drvinfo *info)
 299 {
 300         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 301         strlcpy(info->version, "0.1", sizeof(info->version));
 302         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 303 }
 304
 305 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 306 {
 307         struct bcm_sysport_priv *priv = netdev_priv(dev);
 308
 309         return priv->msg_enable;
 310 }
 311
 312 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 313 {
 314         struct bcm_sysport_priv *priv = netdev_priv(dev);
 315
 316         priv->msg_enable = enable;
 317 }
 318
 319 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
 320 {
 321         switch (type) {
 322         case BCM_SYSPORT_STAT_NETDEV:
 323         case BCM_SYSPORT_STAT_NETDEV64:
 324         case BCM_SYSPORT_STAT_RXCHK:
 325         case BCM_SYSPORT_STAT_RBUF:
 326         case BCM_SYSPORT_STAT_SOFT:
 327                 return true;
 328         default:
 329                 return false;
 330         }
 331 }
 332
 333 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 334 {
 335         struct bcm_sysport_priv *priv = netdev_priv(dev);
 336         const struct bcm_sysport_stats *s;
 337         unsigned int i, j;
 338
 339         switch (string_set) {
 340         case ETH_SS_STATS:
 341                 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 342                         s = &bcm_sysport_gstrings_stats[i];
 343                         if (priv->is_lite &&
 344                             !bcm_sysport_lite_stat_valid(s->type))
 345                                 continue;
 346                         j++;
 347                 }
 348                 /* Include per-queue statistics */
 349                 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
 350         default:
 351                 return -EOPNOTSUPP;
 352         }
 353 }
 354
 355 static void bcm_sysport_get_strings(struct net_device *dev,
 356                                     u32 stringset, u8 *data)
 357 {
 358         struct bcm_sysport_priv *priv = netdev_priv(dev);
 359         const struct bcm_sysport_stats *s;
 360         char buf[128];
 361         int i, j;
 362
 363         switch (stringset) {
 364         case ETH_SS_STATS:
 365                 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 366                         s = &bcm_sysport_gstrings_stats[i];
 367                         if (priv->is_lite &&
 368                             !bcm_sysport_lite_stat_valid(s->type))
 369                                 continue;
 370
 371                         memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
 372                                ETH_GSTRING_LEN);
 373                         j++;
 374                 }
 375
 376                 for (i = 0; i < dev->num_tx_queues; i++) {
 377                         snprintf(buf, sizeof(buf), "txq%d_packets", i);
 378                         memcpy(data + j * ETH_GSTRING_LEN, buf,
 379                                ETH_GSTRING_LEN);
 380                         j++;
 381
 382                         snprintf(buf, sizeof(buf), "txq%d_bytes", i);
 383                         memcpy(data + j * ETH_GSTRING_LEN, buf,
 384                                ETH_GSTRING_LEN);
 385                         j++;
 386                 }
 387                 break;
 388         default:
 389                 break;
 390         }
 391 }
 392
 393 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 394 {
 395         int i, j = 0;
 396
 397         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 398                 const struct bcm_sysport_stats *s;
 399                 u8 offset = 0;
 400                 u32 val = 0;
 401                 char *p;
 402
 403                 s = &bcm_sysport_gstrings_stats[i];
 404                 switch (s->type) {
 405                 case BCM_SYSPORT_STAT_NETDEV:
 406                 case BCM_SYSPORT_STAT_NETDEV64:
 407                 case BCM_SYSPORT_STAT_SOFT:
 408                         continue;
 409                 case BCM_SYSPORT_STAT_MIB_RX:
 410                 case BCM_SYSPORT_STAT_MIB_TX:
 411                 case BCM_SYSPORT_STAT_RUNT:
 412                         if (priv->is_lite)
 413                                 continue;
 414
 415                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 416                                 offset = UMAC_MIB_STAT_OFFSET;
 417                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 418                         break;
 419                 case BCM_SYSPORT_STAT_RXCHK:
 420                         val = rxchk_readl(priv, s->reg_offset);
 421                         if (val == ~0)
 422                                 rxchk_writel(priv, 0, s->reg_offset);
 423                         break;
 424                 case BCM_SYSPORT_STAT_RBUF:
 425                         val = rbuf_readl(priv, s->reg_offset);
 426                         if (val == ~0)
 427                                 rbuf_writel(priv, 0, s->reg_offset);
 428                         break;
 429                 }
 430
 431                 j += s->stat_sizeof;
 432                 p = (char *)priv + s->stat_offset;
 433                 *(u32 *)p = val;
 434         }
 435
 436         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 437 }
 438
 439 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
 440                                         u64 *tx_bytes, u64 *tx_packets)
 441 {
 442         struct bcm_sysport_tx_ring *ring;
 443         u64 bytes = 0, packets = 0;
 444         unsigned int start;
 445         unsigned int q;
 446
 447         for (q = 0; q < priv->netdev->num_tx_queues; q++) {
 448                 ring = &priv->tx_rings[q];
 449                 do {
 450                         start = u64_stats_fetch_begin_irq(&priv->syncp);
 451                         bytes = ring->bytes;
 452                         packets = ring->packets;
 453                 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
 454
 455                 *tx_bytes += bytes;
 456                 *tx_packets += packets;
 457         }
 458 }
 459
 460 static void bcm_sysport_get_stats(struct net_device *dev,
 461                                   struct ethtool_stats *stats, u64 *data)
 462 {
 463         struct bcm_sysport_priv *priv = netdev_priv(dev);
 464         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
 465         struct u64_stats_sync *syncp = &priv->syncp;
 466         struct bcm_sysport_tx_ring *ring;
 467         u64 tx_bytes = 0, tx_packets = 0;
 468         unsigned int start;
 469         int i, j;
 470
 471         if (netif_running(dev)) {
 472                 bcm_sysport_update_mib_counters(priv);
 473                 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
 474                 stats64->tx_bytes = tx_bytes;
 475                 stats64->tx_packets = tx_packets;
 476         }
 477
 478         for (i =  0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 479                 const struct bcm_sysport_stats *s;
 480                 char *p;
 481
 482                 s = &bcm_sysport_gstrings_stats[i];
 483                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 484                         p = (char *)&dev->stats;
 485                 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
 486                         p = (char *)stats64;
 487                 else
 488                         p = (char *)priv;
 489
 490                 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
 491                         continue;
 492                 p += s->stat_offset;
 493
 494                 if (s->stat_sizeof == sizeof(u64) &&
 495                     s->type == BCM_SYSPORT_STAT_NETDEV64) {
 496                         do {
 497                                 start = u64_stats_fetch_begin_irq(syncp);
 498                                 data[i] = *(u64 *)p;
 499                         } while (u64_stats_fetch_retry_irq(syncp, start));
 500                 } else
 501                         data[i] = *(u32 *)p;
 502                 j++;
 503         }
 504
 505         /* For SYSTEMPORT Lite since we have holes in our statistics, j would
 506          * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
 507          * needs to point to how many total statistics we have minus the
 508          * number of per TX queue statistics
 509          */
 510         j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
 511             dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
 512
 513         for (i = 0; i < dev->num_tx_queues; i++) {
 514                 ring = &priv->tx_rings[i];
 515                 data[j] = ring->packets;
 516                 j++;
 517                 data[j] = ring->bytes;
 518                 j++;
 519         }
 520 }
 521
 522 static void bcm_sysport_get_wol(struct net_device *dev,
 523                                 struct ethtool_wolinfo *wol)
 524 {
 525         struct bcm_sysport_priv *priv = netdev_priv(dev);
 526
 527         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 528         wol->wolopts = priv->wolopts;
 529
 530         if (!(priv->wolopts & WAKE_MAGICSECURE))
 531                 return;
 532
 533         memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
 534 }
 535
 536 static int bcm_sysport_set_wol(struct net_device *dev,
 537                                struct ethtool_wolinfo *wol)
 538 {
 539         struct bcm_sysport_priv *priv = netdev_priv(dev);
 540         struct device *kdev = &priv->pdev->dev;
 541         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 542
 543         if (!device_can_wakeup(kdev))
 544                 return -ENOTSUPP;
 545
 546         if (wol->wolopts & ~supported)
 547                 return -EINVAL;
 548
 549         if (wol->wolopts & WAKE_MAGICSECURE)
 550                 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
 551
 552         /* Flag the device and relevant IRQ as wakeup capable */
 553         if (wol->wolopts) {
 554                 device_set_wakeup_enable(kdev, 1);
 555                 if (priv->wol_irq_disabled)
 556                         enable_irq_wake(priv->wol_irq);
 557                 priv->wol_irq_disabled = 0;
 558         } else {
 559                 device_set_wakeup_enable(kdev, 0);
 560                 /* Avoid unbalanced disable_irq_wake calls */
 561                 if (!priv->wol_irq_disabled)
 562                         disable_irq_wake(priv->wol_irq);
 563                 priv->wol_irq_disabled = 1;
 564         }
 565
 566         priv->wolopts = wol->wolopts;
 567
 568         return 0;
 569 }
 570
 571 static int bcm_sysport_get_coalesce(struct net_device *dev,
 572                                     struct ethtool_coalesce *ec)
 573 {
 574         struct bcm_sysport_priv *priv = netdev_priv(dev);
 575         u32 reg;
 576
 577         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 578
 579         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 580         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 581
 582         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 583
 584         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 585         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 586
 587         return 0;
 588 }
 589
 590 static int bcm_sysport_set_coalesce(struct net_device *dev,
 591                                     struct ethtool_coalesce *ec)
 592 {
 593         struct bcm_sysport_priv *priv = netdev_priv(dev);
 594         unsigned int i;
 595         u32 reg;
 596
 597         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 598          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 599          * to fit in the RING_TIMEOUT_MASK (16 bits).
 600          */
 601         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 602             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 603             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 604             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 605                 return -EINVAL;
 606
 607         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 608             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
 609                 return -EINVAL;
 610
 611         for (i = 0; i < dev->num_tx_queues; i++) {
 612                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
 613                 reg &= ~(RING_INTR_THRESH_MASK |
 614                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 615                 reg |= ec->tx_max_coalesced_frames;
 616                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 617                          RING_TIMEOUT_SHIFT;
 618                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
 619         }
 620
 621         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 622         reg &= ~(RDMA_INTR_THRESH_MASK |
 623                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 624         reg |= ec->rx_max_coalesced_frames;
 625         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
 626                             RDMA_TIMEOUT_SHIFT;
 627         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 628
 629         return 0;
 630 }
 631
 632 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 633 {
 634         dev_consume_skb_any(cb->skb);
 635         cb->skb = NULL;
 636         dma_unmap_addr_set(cb, dma_addr, 0);
 637 }
 638
 639 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 640                                              struct bcm_sysport_cb *cb)
 641 {
 642         struct device *kdev = &priv->pdev->dev;
 643         struct net_device *ndev = priv->netdev;
 644         struct sk_buff *skb, *rx_skb;
 645         dma_addr_t mapping;
 646
 647         /* Allocate a new SKB for a new packet */
 648         skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
 649                                  GFP_ATOMIC | __GFP_NOWARN);
 650         if (!skb) {
 651                 priv->mib.alloc_rx_buff_failed++;
 652                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 653                 return NULL;
 654         }
 655
 656         mapping = dma_map_single(kdev, skb->data,
 657                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 658         if (dma_mapping_error(kdev, mapping)) {
 659                 priv->mib.rx_dma_failed++;
 660                 dev_kfree_skb_any(skb);
 661                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 662                 return NULL;
 663         }
 664
 665         /* Grab the current SKB on the ring */
 666         rx_skb = cb->skb;
 667         if (likely(rx_skb))
 668                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 669                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 670
 671         /* Put the new SKB on the ring */
 672         cb->skb = skb;
 673         dma_unmap_addr_set(cb, dma_addr, mapping);
 674         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 675
 676         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 677
 678         /* Return the current SKB to the caller */
 679         return rx_skb;
 680 }
 681
 682 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 683 {
 684         struct bcm_sysport_cb *cb;
 685         struct sk_buff *skb;
 686         unsigned int i;
 687
 688         for (i = 0; i < priv->num_rx_bds; i++) {
 689                 cb = &priv->rx_cbs[i];
 690                 skb = bcm_sysport_rx_refill(priv, cb);
 691                 if (skb)
 692                         dev_kfree_skb(skb);
 693                 if (!cb->skb)
 694                         return -ENOMEM;
 695         }
 696
 697         return 0;
 698 }
 699
 700 /* Poll the hardware for up to budget packets to process */
 701 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 702                                         unsigned int budget)
 703 {
 704         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
 705         struct net_device *ndev = priv->netdev;
 706         unsigned int processed = 0, to_process;
 707         struct bcm_sysport_cb *cb;
 708         struct sk_buff *skb;
 709         unsigned int p_index;
 710         u16 len, status;
 711         struct bcm_rsb *rsb;
 712
 713         /* Clear status before servicing to reduce spurious interrupts */
 714         intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
 715
 716         /* Determine how much we should process since last call, SYSTEMPORT Lite
 717          * groups the producer and consumer indexes into the same 32-bit
 718          * which we access using RDMA_CONS_INDEX
 719          */
 720         if (!priv->is_lite)
 721                 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 722         else
 723                 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
 724         p_index &= RDMA_PROD_INDEX_MASK;
 725
 726         to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
 727
 728         netif_dbg(priv, rx_status, ndev,
 729                   "p_index=%d rx_c_index=%d to_process=%d\n",
 730                   p_index, priv->rx_c_index, to_process);
 731
 732         while ((processed < to_process) && (processed < budget)) {
 733                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 734                 skb = bcm_sysport_rx_refill(priv, cb);
 735
 736
 737                 /* We do not have a backing SKB, so we do not a corresponding
 738                  * DMA mapping for this incoming packet since
 739                  * bcm_sysport_rx_refill always either has both skb and mapping
 740                  * or none.
 741                  */
 742                 if (unlikely(!skb)) {
 743                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 744                         ndev->stats.rx_dropped++;
 745                         ndev->stats.rx_errors++;
 746                         goto next;
 747                 }
 748
 749                 /* Extract the Receive Status Block prepended */
 750                 rsb = (struct bcm_rsb *)skb->data;
 751                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 752                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 753                           DESC_STATUS_MASK;
 754
 755                 netif_dbg(priv, rx_status, ndev,
 756                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 757                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 758                           len, status);
 759
 760                 if (unlikely(len > RX_BUF_LENGTH)) {
 761                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 762                         ndev->stats.rx_length_errors++;
 763                         ndev->stats.rx_errors++;
 764                         dev_kfree_skb_any(skb);
 765                         goto next;
 766                 }
 767
 768                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 769                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 770                         ndev->stats.rx_dropped++;
 771                         ndev->stats.rx_errors++;
 772                         dev_kfree_skb_any(skb);
 773                         goto next;
 774                 }
 775
 776                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 777                         netif_err(priv, rx_err, ndev, "error packet\n");
 778                         if (status & RX_STATUS_OVFLOW)
 779                                 ndev->stats.rx_over_errors++;
 780                         ndev->stats.rx_dropped++;
 781                         ndev->stats.rx_errors++;
 782                         dev_kfree_skb_any(skb);
 783                         goto next;
 784                 }
 785
 786                 skb_put(skb, len);
 787
 788                 /* Hardware validated our checksum */
 789                 if (likely(status & DESC_L4_CSUM))
 790                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 791
 792                 /* Hardware pre-pends packets with 2bytes before Ethernet
 793                  * header plus we have the Receive Status Block, strip off all
 794                  * of this from the SKB.
 795                  */
 796                 skb_pull(skb, sizeof(*rsb) + 2);
 797                 len -= (sizeof(*rsb) + 2);
 798
 799                 /* UniMAC may forward CRC */
 800                 if (priv->crc_fwd) {
 801                         skb_trim(skb, len - ETH_FCS_LEN);
 802                         len -= ETH_FCS_LEN;
 803                 }
 804
 805                 skb->protocol = eth_type_trans(skb, ndev);
 806                 ndev->stats.rx_packets++;
 807                 ndev->stats.rx_bytes += len;
 808                 u64_stats_update_begin(&priv->syncp);
 809                 stats64->rx_packets++;
 810                 stats64->rx_bytes += len;
 811                 u64_stats_update_end(&priv->syncp);
 812
 813                 napi_gro_receive(&priv->napi, skb);
 814 next:
 815                 processed++;
 816                 priv->rx_read_ptr++;
 817
 818                 if (priv->rx_read_ptr == priv->num_rx_bds)
 819                         priv->rx_read_ptr = 0;
 820         }
 821
 822         return processed;
 823 }
 824
 825 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
 826                                        struct bcm_sysport_cb *cb,
 827                                        unsigned int *bytes_compl,
 828                                        unsigned int *pkts_compl)
 829 {
 830         struct bcm_sysport_priv *priv = ring->priv;
 831         struct device *kdev = &priv->pdev->dev;
 832
 833         if (cb->skb) {
 834                 *bytes_compl += cb->skb->len;
 835                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 836                                  dma_unmap_len(cb, dma_len),
 837                                  DMA_TO_DEVICE);
 838                 (*pkts_compl)++;
 839                 bcm_sysport_free_cb(cb);
 840         /* SKB fragment */
 841         } else if (dma_unmap_addr(cb, dma_addr)) {
 842                 *bytes_compl += dma_unmap_len(cb, dma_len);
 843                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 844                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 845                 dma_unmap_addr_set(cb, dma_addr, 0);
 846         }
 847 }
 848
 849 /* Reclaim queued SKBs for transmission completion, lockless version */
 850 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 851                                              struct bcm_sysport_tx_ring *ring)
 852 {
 853         unsigned int pkts_compl = 0, bytes_compl = 0;
 854         struct net_device *ndev = priv->netdev;
 855         unsigned int txbds_processed = 0;
 856         struct bcm_sysport_cb *cb;
 857         unsigned int txbds_ready;
 858         unsigned int c_index;
 859         u32 hw_ind;
 860
 861         /* Clear status before servicing to reduce spurious interrupts */
 862         if (!ring->priv->is_lite)
 863                 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
 864         else
 865                 intrl2_0_writel(ring->priv, BIT(ring->index +
 866                                 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
 867
 868         /* Compute how many descriptors have been processed since last call */
 869         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 870         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 871         txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
 872
 873         netif_dbg(priv, tx_done, ndev,
 874                   "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
 875                   ring->index, ring->c_index, c_index, txbds_ready);
 876
 877         while (txbds_processed < txbds_ready) {
 878                 cb = &ring->cbs[ring->clean_index];
 879                 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
 880
 881                 ring->desc_count++;
 882                 txbds_processed++;
 883
 884                 if (likely(ring->clean_index < ring->size - 1))
 885                         ring->clean_index++;
 886                 else
 887                         ring->clean_index = 0;
 888         }
 889
 890         u64_stats_update_begin(&priv->syncp);
 891         ring->packets += pkts_compl;
 892         ring->bytes += bytes_compl;
 893         u64_stats_update_end(&priv->syncp);
 894
 895         ring->c_index = c_index;
 896
 897         netif_dbg(priv, tx_done, ndev,
 898                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 899                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 900
 901         return pkts_compl;
 902 }
 903
 904 /* Locked version of the per-ring TX reclaim routine */
 905 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 906                                            struct bcm_sysport_tx_ring *ring)
 907 {
 908         struct netdev_queue *txq;
 909         unsigned int released;
 910         unsigned long flags;
 911
 912         txq = netdev_get_tx_queue(priv->netdev, ring->index);
 913
 914         spin_lock_irqsave(&ring->lock, flags);
 915         released = __bcm_sysport_tx_reclaim(priv, ring);
 916         if (released)
 917                 netif_tx_wake_queue(txq);
 918
 919         spin_unlock_irqrestore(&ring->lock, flags);
 920
 921         return released;
 922 }
 923
 924 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
 925 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
 926                                  struct bcm_sysport_tx_ring *ring)
 927 {
 928         unsigned long flags;
 929
 930         spin_lock_irqsave(&ring->lock, flags);
 931         __bcm_sysport_tx_reclaim(priv, ring);
 932         spin_unlock_irqrestore(&ring->lock, flags);
 933 }
 934
 935 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 936 {
 937         struct bcm_sysport_tx_ring *ring =
 938                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 939         unsigned int work_done = 0;
 940
 941         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 942
 943         if (work_done == 0) {
 944                 napi_complete(napi);
 945                 /* re-enable TX interrupt */
 946                 if (!ring->priv->is_lite)
 947                         intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 948                 else
 949                         intrl2_0_mask_clear(ring->priv, BIT(ring->index +
 950                                             INTRL2_0_TDMA_MBDONE_SHIFT));
 951
 952                 return 0;
 953         }
 954
 955         return budget;
 956 }
 957
 958 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 959 {
 960         unsigned int q;
 961
 962         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 963                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 964 }
 965
 966 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 967 {
 968         struct bcm_sysport_priv *priv =
 969                 container_of(napi, struct bcm_sysport_priv, napi);
 970         unsigned int work_done = 0;
 971
 972         work_done = bcm_sysport_desc_rx(priv, budget);
 973
 974         priv->rx_c_index += work_done;
 975         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 976
 977         /* SYSTEMPORT Lite groups the producer/consumer index, producer is
 978          * maintained by HW, but writes to it will be ignore while RDMA
 979          * is active
 980          */
 981         if (!priv->is_lite)
 982                 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 983         else
 984                 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
 985
 986         if (work_done < budget) {
 987                 napi_complete_done(napi, work_done);
 988                 /* re-enable RX interrupts */
 989                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 990         }
 991
 992         return work_done;
 993 }
 994
 995 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 996 {
 997         u32 reg;
 998
 999         /* Clear the MagicPacket detection logic */
1000         reg = umac_readl(priv, UMAC_MPD_CTRL);
1001         reg &= ~MPD_EN;
1002         umac_writel(priv, reg, UMAC_MPD_CTRL);
1003
1004         reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
1005         if (reg & INTRL2_0_MPD)
1006                 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
1007
1008         if (reg & INTRL2_0_BRCM_MATCH_TAG) {
1009                 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
1010                                   RXCHK_BRCM_TAG_MATCH_MASK;
1011                 netdev_info(priv->netdev,
1012                             "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
1013         }
1014
1015         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1016 }
1017
1018 /* RX and misc interrupt routine */
1019 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1020 {
1021         struct net_device *dev = dev_id;
1022         struct bcm_sysport_priv *priv = netdev_priv(dev);
1023         struct bcm_sysport_tx_ring *txr;
1024         unsigned int ring, ring_bit;
1025
1026         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1027                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1028         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1029
1030         if (unlikely(priv->irq0_stat == 0)) {
1031                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1032                 return IRQ_NONE;
1033         }
1034
1035         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1036                 if (likely(napi_schedule_prep(&priv->napi))) {
1037                         /* disable RX interrupts */
1038                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1039                         __napi_schedule_irqoff(&priv->napi);
1040                 }
1041         }
1042
1043         /* TX ring is full, perform a full reclaim since we do not know
1044          * which one would trigger this interrupt
1045          */
1046         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1047                 bcm_sysport_tx_reclaim_all(priv);
1048
1049         if (!priv->is_lite)
1050                 goto out;
1051
1052         for (ring = 0; ring < dev->num_tx_queues; ring++) {
1053                 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1054                 if (!(priv->irq0_stat & ring_bit))
1055                         continue;
1056
1057                 txr = &priv->tx_rings[ring];
1058
1059                 if (likely(napi_schedule_prep(&txr->napi))) {
1060                         intrl2_0_mask_set(priv, ring_bit);
1061                         __napi_schedule(&txr->napi);
1062                 }
1063         }
1064 out:
1065         return IRQ_HANDLED;
1066 }
1067
1068 /* TX interrupt service routine */
1069 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1070 {
1071         struct net_device *dev = dev_id;
1072         struct bcm_sysport_priv *priv = netdev_priv(dev);
1073         struct bcm_sysport_tx_ring *txr;
1074         unsigned int ring;
1075
1076         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1077                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1078         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1079
1080         if (unlikely(priv->irq1_stat == 0)) {
1081                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1082                 return IRQ_NONE;
1083         }
1084
1085         for (ring = 0; ring < dev->num_tx_queues; ring++) {
1086                 if (!(priv->irq1_stat & BIT(ring)))
1087                         continue;
1088
1089                 txr = &priv->tx_rings[ring];
1090
1091                 if (likely(napi_schedule_prep(&txr->napi))) {
1092                         intrl2_1_mask_set(priv, BIT(ring));
1093                         __napi_schedule_irqoff(&txr->napi);
1094                 }
1095         }
1096
1097         return IRQ_HANDLED;
1098 }
1099
1100 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1101 {
1102         struct bcm_sysport_priv *priv = dev_id;
1103
1104         pm_wakeup_event(&priv->pdev->dev, 0);
1105
1106         return IRQ_HANDLED;
1107 }
1108
1109 #ifdef CONFIG_NET_POLL_CONTROLLER
1110 static void bcm_sysport_poll_controller(struct net_device *dev)
1111 {
1112         struct bcm_sysport_priv *priv = netdev_priv(dev);
1113
1114         disable_irq(priv->irq0);
1115         bcm_sysport_rx_isr(priv->irq0, priv);
1116         enable_irq(priv->irq0);
1117
1118         if (!priv->is_lite) {
1119                 disable_irq(priv->irq1);
1120                 bcm_sysport_tx_isr(priv->irq1, priv);
1121                 enable_irq(priv->irq1);
1122         }
1123 }
1124 #endif
1125
1126 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1127                                               struct net_device *dev)
1128 {
1129         struct sk_buff *nskb;
1130         struct bcm_tsb *tsb;
1131         u32 csum_info;
1132         u8 ip_proto;
1133         u16 csum_start;
1134         u16 ip_ver;
1135
1136         /* Re-allocate SKB if needed */
1137         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1138                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1139                 dev_kfree_skb(skb);
1140                 if (!nskb) {
1141                         dev->stats.tx_errors++;
1142                         dev->stats.tx_dropped++;
1143                         return NULL;
1144                 }
1145                 skb = nskb;
1146         }
1147
1148         tsb = skb_push(skb, sizeof(*tsb));
1149         /* Zero-out TSB by default */
1150         memset(tsb, 0, sizeof(*tsb));
1151
1152         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1153                 ip_ver = htons(skb->protocol);
1154                 switch (ip_ver) {
1155                 case ETH_P_IP:
1156                         ip_proto = ip_hdr(skb)->protocol;
1157                         break;
1158                 case ETH_P_IPV6:
1159                         ip_proto = ipv6_hdr(skb)->nexthdr;
1160                         break;
1161                 default:
1162                         return skb;
1163                 }
1164
1165                 /* Get the checksum offset and the L4 (transport) offset */
1166                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1167                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1168                 csum_info |= (csum_start << L4_PTR_SHIFT);
1169
1170                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1171                         csum_info |= L4_LENGTH_VALID;
1172                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1173                                 csum_info |= L4_UDP;
1174                 } else {
1175                         csum_info = 0;
1176                 }
1177
1178                 tsb->l4_ptr_dest_map = csum_info;
1179         }
1180
1181         return skb;
1182 }
1183
1184 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1185                                     struct net_device *dev)
1186 {
1187         struct bcm_sysport_priv *priv = netdev_priv(dev);
1188         struct device *kdev = &priv->pdev->dev;
1189         struct bcm_sysport_tx_ring *ring;
1190         struct bcm_sysport_cb *cb;
1191         struct netdev_queue *txq;
1192         struct dma_desc *desc;
1193         unsigned int skb_len;
1194         unsigned long flags;
1195         dma_addr_t mapping;
1196         u32 len_status;
1197         u16 queue;
1198         int ret;
1199
1200         queue = skb_get_queue_mapping(skb);
1201         txq = netdev_get_tx_queue(dev, queue);
1202         ring = &priv->tx_rings[queue];
1203
1204         /* lock against tx reclaim in BH context and TX ring full interrupt */
1205         spin_lock_irqsave(&ring->lock, flags);
1206         if (unlikely(ring->desc_count == 0)) {
1207                 netif_tx_stop_queue(txq);
1208                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1209                 ret = NETDEV_TX_BUSY;
1210                 goto out;
1211         }
1212
1213         /* The Ethernet switch we are interfaced with needs packets to be at
1214          * least 64 bytes (including FCS) otherwise they will be discarded when
1215          * they enter the switch port logic. When Broadcom tags are enabled, we
1216          * need to make sure that packets are at least 68 bytes
1217          * (including FCS and tag) because the length verification is done after
1218          * the Broadcom tag is stripped off the ingress packet.
1219          */
1220         if (skb_put_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1221                 ret = NETDEV_TX_OK;
1222                 goto out;
1223         }
1224
1225         /* Insert TSB and checksum infos */
1226         if (priv->tsb_en) {
1227                 skb = bcm_sysport_insert_tsb(skb, dev);
1228                 if (!skb) {
1229                         ret = NETDEV_TX_OK;
1230                         goto out;
1231                 }
1232         }
1233
1234         skb_len = skb->len;
1235
1236         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1237         if (dma_mapping_error(kdev, mapping)) {
1238                 priv->mib.tx_dma_failed++;
1239                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1240                           skb->data, skb_len);
1241                 ret = NETDEV_TX_OK;
1242                 goto out;
1243         }
1244
1245         /* Remember the SKB for future freeing */
1246         cb = &ring->cbs[ring->curr_desc];
1247         cb->skb = skb;
1248         dma_unmap_addr_set(cb, dma_addr, mapping);
1249         dma_unmap_len_set(cb, dma_len, skb_len);
1250
1251         /* Fetch a descriptor entry from our pool */
1252         desc = ring->desc_cpu;
1253
1254         desc->addr_lo = lower_32_bits(mapping);
1255         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1256         len_status |= (skb_len << DESC_LEN_SHIFT);
1257         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1258                        DESC_STATUS_SHIFT;
1259         if (skb->ip_summed == CHECKSUM_PARTIAL)
1260                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1261
1262         ring->curr_desc++;
1263         if (ring->curr_desc == ring->size)
1264                 ring->curr_desc = 0;
1265         ring->desc_count--;
1266
1267         /* Ensure write completion of the descriptor status/length
1268          * in DRAM before the System Port WRITE_PORT register latches
1269          * the value
1270          */
1271         wmb();
1272         desc->addr_status_len = len_status;
1273         wmb();
1274
1275         /* Write this descriptor address to the RING write port */
1276         tdma_port_write_desc_addr(priv, desc, ring->index);
1277
1278         /* Check ring space and update SW control flow */
1279         if (ring->desc_count == 0)
1280                 netif_tx_stop_queue(txq);
1281
1282         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1283                   ring->index, ring->desc_count, ring->curr_desc);
1284
1285         ret = NETDEV_TX_OK;
1286 out:
1287         spin_unlock_irqrestore(&ring->lock, flags);
1288         return ret;
1289 }
1290
1291 static void bcm_sysport_tx_timeout(struct net_device *dev)
1292 {
1293         netdev_warn(dev, "transmit timeout!\n");
1294
1295         netif_trans_update(dev);
1296         dev->stats.tx_errors++;
1297
1298         netif_tx_wake_all_queues(dev);
1299 }
1300
1301 /* phylib adjust link callback */
1302 static void bcm_sysport_adj_link(struct net_device *dev)
1303 {
1304         struct bcm_sysport_priv *priv = netdev_priv(dev);
1305         struct phy_device *phydev = dev->phydev;
1306         unsigned int changed = 0;
1307         u32 cmd_bits = 0, reg;
1308
1309         if (priv->old_link != phydev->link) {
1310                 changed = 1;
1311                 priv->old_link = phydev->link;
1312         }
1313
1314         if (priv->old_duplex != phydev->duplex) {
1315                 changed = 1;
1316                 priv->old_duplex = phydev->duplex;
1317         }
1318
1319         if (priv->is_lite)
1320                 goto out;
1321
1322         switch (phydev->speed) {
1323         case SPEED_2500:
1324                 cmd_bits = CMD_SPEED_2500;
1325                 break;
1326         case SPEED_1000:
1327                 cmd_bits = CMD_SPEED_1000;
1328                 break;
1329         case SPEED_100:
1330                 cmd_bits = CMD_SPEED_100;
1331                 break;
1332         case SPEED_10:
1333                 cmd_bits = CMD_SPEED_10;
1334                 break;
1335         default:
1336                 break;
1337         }
1338         cmd_bits <<= CMD_SPEED_SHIFT;
1339
1340         if (phydev->duplex == DUPLEX_HALF)
1341                 cmd_bits |= CMD_HD_EN;
1342
1343         if (priv->old_pause != phydev->pause) {
1344                 changed = 1;
1345                 priv->old_pause = phydev->pause;
1346         }
1347
1348         if (!phydev->pause)
1349                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1350
1351         if (!changed)
1352                 return;
1353
1354         if (phydev->link) {
1355                 reg = umac_readl(priv, UMAC_CMD);
1356                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1357                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1358                         CMD_TX_PAUSE_IGNORE);
1359                 reg |= cmd_bits;
1360                 umac_writel(priv, reg, UMAC_CMD);
1361         }
1362 out:
1363         if (changed)
1364                 phy_print_status(phydev);
1365 }
1366
1367 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1368                                     unsigned int index)
1369 {
1370         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1371         struct device *kdev = &priv->pdev->dev;
1372         size_t size;
1373         void *p;
1374         u32 reg;
1375
1376         /* Simple descriptors partitioning for now */
1377         size = 256;
1378
1379         /* We just need one DMA descriptor which is DMA-able, since writing to
1380          * the port will allocate a new descriptor in its internal linked-list
1381          */
1382         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1383                                 GFP_KERNEL);
1384         if (!p) {
1385                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1386                 return -ENOMEM;
1387         }
1388
1389         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1390         if (!ring->cbs) {
1391                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1392                                   ring->desc_cpu, ring->desc_dma);
1393                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1394                 return -ENOMEM;
1395         }
1396
1397         /* Initialize SW view of the ring */
1398         spin_lock_init(&ring->lock);
1399         ring->priv = priv;
1400         netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1401         ring->index = index;
1402         ring->size = size;
1403         ring->clean_index = 0;
1404         ring->alloc_size = ring->size;
1405         ring->desc_cpu = p;
1406         ring->desc_count = ring->size;
1407         ring->curr_desc = 0;
1408
1409         /* Initialize HW ring */
1410         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1411         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1412         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1413         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1414         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1415         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1416
1417         /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1418          * with the original definition of ACB_ALGO
1419          */
1420         reg = tdma_readl(priv, TDMA_CONTROL);
1421         if (priv->is_lite)
1422                 reg &= ~BIT(TSB_SWAP1);
1423         /* Set a correct TSB format based on host endian */
1424         if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1425                 reg |= tdma_control_bit(priv, TSB_SWAP0);
1426         else
1427                 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1428         tdma_writel(priv, reg, TDMA_CONTROL);
1429
1430         /* Program the number of descriptors as MAX_THRESHOLD and half of
1431          * its size for the hysteresis trigger
1432          */
1433         tdma_writel(priv, ring->size |
1434                         1 << RING_HYST_THRESH_SHIFT,
1435                         TDMA_DESC_RING_MAX_HYST(index));
1436
1437         /* Enable the ring queue in the arbiter */
1438         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1439         reg |= (1 << index);
1440         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1441
1442         napi_enable(&ring->napi);
1443
1444         netif_dbg(priv, hw, priv->netdev,
1445                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1446                   ring->size, ring->desc_cpu);
1447
1448         return 0;
1449 }
1450
1451 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1452                                      unsigned int index)
1453 {
1454         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1455         struct device *kdev = &priv->pdev->dev;
1456         u32 reg;
1457
1458         /* Caller should stop the TDMA engine */
1459         reg = tdma_readl(priv, TDMA_STATUS);
1460         if (!(reg & TDMA_DISABLED))
1461                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1462
1463         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1464          * fail, so by checking this pointer we know whether the TX ring was
1465          * fully initialized or not.
1466          */
1467         if (!ring->cbs)
1468                 return;
1469
1470         napi_disable(&ring->napi);
1471         netif_napi_del(&ring->napi);
1472
1473         bcm_sysport_tx_clean(priv, ring);
1474
1475         kfree(ring->cbs);
1476         ring->cbs = NULL;
1477
1478         if (ring->desc_dma) {
1479                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1480                                   ring->desc_cpu, ring->desc_dma);
1481                 ring->desc_dma = 0;
1482         }
1483         ring->size = 0;
1484         ring->alloc_size = 0;
1485
1486         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1487 }
1488
1489 /* RDMA helper */
1490 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1491                                   unsigned int enable)
1492 {
1493         unsigned int timeout = 1000;
1494         u32 reg;
1495
1496         reg = rdma_readl(priv, RDMA_CONTROL);
1497         if (enable)
1498                 reg |= RDMA_EN;
1499         else
1500                 reg &= ~RDMA_EN;
1501         rdma_writel(priv, reg, RDMA_CONTROL);
1502
1503         /* Poll for RMDA disabling completion */
1504         do {
1505                 reg = rdma_readl(priv, RDMA_STATUS);
1506                 if (!!(reg & RDMA_DISABLED) == !enable)
1507                         return 0;
1508                 usleep_range(1000, 2000);
1509         } while (timeout-- > 0);
1510
1511         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1512
1513         return -ETIMEDOUT;
1514 }
1515
1516 /* TDMA helper */
1517 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1518                                   unsigned int enable)
1519 {
1520         unsigned int timeout = 1000;
1521         u32 reg;
1522
1523         reg = tdma_readl(priv, TDMA_CONTROL);
1524         if (enable)
1525                 reg |= tdma_control_bit(priv, TDMA_EN);
1526         else
1527                 reg &= ~tdma_control_bit(priv, TDMA_EN);
1528         tdma_writel(priv, reg, TDMA_CONTROL);
1529
1530         /* Poll for TMDA disabling completion */
1531         do {
1532                 reg = tdma_readl(priv, TDMA_STATUS);
1533                 if (!!(reg & TDMA_DISABLED) == !enable)
1534                         return 0;
1535
1536                 usleep_range(1000, 2000);
1537         } while (timeout-- > 0);
1538
1539         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1540
1541         return -ETIMEDOUT;
1542 }
1543
1544 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1545 {
1546         struct bcm_sysport_cb *cb;
1547         u32 reg;
1548         int ret;
1549         int i;
1550
1551         /* Initialize SW view of the RX ring */
1552         priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1553         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1554         priv->rx_c_index = 0;
1555         priv->rx_read_ptr = 0;
1556         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1557                                 GFP_KERNEL);
1558         if (!priv->rx_cbs) {
1559                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1560                 return -ENOMEM;
1561         }
1562
1563         for (i = 0; i < priv->num_rx_bds; i++) {
1564                 cb = priv->rx_cbs + i;
1565                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1566         }
1567
1568         ret = bcm_sysport_alloc_rx_bufs(priv);
1569         if (ret) {
1570                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1571                 return ret;
1572         }
1573
1574         /* Initialize HW, ensure RDMA is disabled */
1575         reg = rdma_readl(priv, RDMA_STATUS);
1576         if (!(reg & RDMA_DISABLED))
1577                 rdma_enable_set(priv, 0);
1578
1579         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1580         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1581         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1582         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1583         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1584                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1585         /* Operate the queue in ring mode */
1586         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1587         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1588         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1589         rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1590
1591         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1592
1593         netif_dbg(priv, hw, priv->netdev,
1594                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1595                   priv->num_rx_bds, priv->rx_bds);
1596
1597         return 0;
1598 }
1599
1600 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1601 {
1602         struct bcm_sysport_cb *cb;
1603         unsigned int i;
1604         u32 reg;
1605
1606         /* Caller should ensure RDMA is disabled */
1607         reg = rdma_readl(priv, RDMA_STATUS);
1608         if (!(reg & RDMA_DISABLED))
1609                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1610
1611         for (i = 0; i < priv->num_rx_bds; i++) {
1612                 cb = &priv->rx_cbs[i];
1613                 if (dma_unmap_addr(cb, dma_addr))
1614                         dma_unmap_single(&priv->pdev->dev,
1615                                          dma_unmap_addr(cb, dma_addr),
1616                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1617                 bcm_sysport_free_cb(cb);
1618         }
1619
1620         kfree(priv->rx_cbs);
1621         priv->rx_cbs = NULL;
1622
1623         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1624 }
1625
1626 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1627 {
1628         struct bcm_sysport_priv *priv = netdev_priv(dev);
1629         u32 reg;
1630
1631         if (priv->is_lite)
1632                 return;
1633
1634         reg = umac_readl(priv, UMAC_CMD);
1635         if (dev->flags & IFF_PROMISC)
1636                 reg |= CMD_PROMISC;
1637         else
1638                 reg &= ~CMD_PROMISC;
1639         umac_writel(priv, reg, UMAC_CMD);
1640
1641         /* No support for ALLMULTI */
1642         if (dev->flags & IFF_ALLMULTI)
1643                 return;
1644 }
1645
1646 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1647                                    u32 mask, unsigned int enable)
1648 {
1649         u32 reg;
1650
1651         if (!priv->is_lite) {
1652                 reg = umac_readl(priv, UMAC_CMD);
1653                 if (enable)
1654                         reg |= mask;
1655                 else
1656                         reg &= ~mask;
1657                 umac_writel(priv, reg, UMAC_CMD);
1658         } else {
1659                 reg = gib_readl(priv, GIB_CONTROL);
1660                 if (enable)
1661                         reg |= mask;
1662                 else
1663                         reg &= ~mask;
1664                 gib_writel(priv, reg, GIB_CONTROL);
1665         }
1666
1667         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1668          * to be processed (1 msec).
1669          */
1670         if (enable == 0)
1671                 usleep_range(1000, 2000);
1672 }
1673
1674 static inline void umac_reset(struct bcm_sysport_priv *priv)
1675 {
1676         u32 reg;
1677
1678         if (priv->is_lite)
1679                 return;
1680
1681         reg = umac_readl(priv, UMAC_CMD);
1682         reg |= CMD_SW_RESET;
1683         umac_writel(priv, reg, UMAC_CMD);
1684         udelay(10);
1685         reg = umac_readl(priv, UMAC_CMD);
1686         reg &= ~CMD_SW_RESET;
1687         umac_writel(priv, reg, UMAC_CMD);
1688 }
1689
1690 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1691                              unsigned char *addr)
1692 {
1693         u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1694                     addr[3];
1695         u32 mac1 = (addr[4] << 8) | addr[5];
1696
1697         if (!priv->is_lite) {
1698                 umac_writel(priv, mac0, UMAC_MAC0);
1699                 umac_writel(priv, mac1, UMAC_MAC1);
1700         } else {
1701                 gib_writel(priv, mac0, GIB_MAC0);
1702                 gib_writel(priv, mac1, GIB_MAC1);
1703         }
1704 }
1705
1706 static void topctrl_flush(struct bcm_sysport_priv *priv)
1707 {
1708         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1709         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1710         mdelay(1);
1711         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1712         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1713 }
1714
1715 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1716 {
1717         struct bcm_sysport_priv *priv = netdev_priv(dev);
1718         struct sockaddr *addr = p;
1719
1720         if (!is_valid_ether_addr(addr->sa_data))
1721                 return -EINVAL;
1722
1723         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1724
1725         /* interface is disabled, changes to MAC will be reflected on next
1726          * open call
1727          */
1728         if (!netif_running(dev))
1729                 return 0;
1730
1731         umac_set_hw_addr(priv, dev->dev_addr);
1732
1733         return 0;
1734 }
1735
1736 static void bcm_sysport_get_stats64(struct net_device *dev,
1737                                     struct rtnl_link_stats64 *stats)
1738 {
1739         struct bcm_sysport_priv *priv = netdev_priv(dev);
1740         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1741         unsigned int start;
1742
1743         netdev_stats_to_stats64(stats, &dev->stats);
1744
1745         bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1746                                     &stats->tx_packets);
1747
1748         do {
1749                 start = u64_stats_fetch_begin_irq(&priv->syncp);
1750                 stats->rx_packets = stats64->rx_packets;
1751                 stats->rx_bytes = stats64->rx_bytes;
1752         } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1753 }
1754
1755 static void bcm_sysport_netif_start(struct net_device *dev)
1756 {
1757         struct bcm_sysport_priv *priv = netdev_priv(dev);
1758
1759         /* Enable NAPI */
1760         napi_enable(&priv->napi);
1761
1762         /* Enable RX interrupt and TX ring full interrupt */
1763         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1764
1765         phy_start(dev->phydev);
1766
1767         /* Enable TX interrupts for the TXQs */
1768         if (!priv->is_lite)
1769                 intrl2_1_mask_clear(priv, 0xffffffff);
1770         else
1771                 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1772 }
1773
1774 static void rbuf_init(struct bcm_sysport_priv *priv)
1775 {
1776         u32 reg;
1777
1778         reg = rbuf_readl(priv, RBUF_CONTROL);
1779         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1780         /* Set a correct RSB format on SYSTEMPORT Lite */
1781         if (priv->is_lite)
1782                 reg &= ~RBUF_RSB_SWAP1;
1783
1784         /* Set a correct RSB format based on host endian */
1785         if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1786                 reg |= RBUF_RSB_SWAP0;
1787         else
1788                 reg &= ~RBUF_RSB_SWAP0;
1789         rbuf_writel(priv, reg, RBUF_CONTROL);
1790 }
1791
1792 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1793 {
1794         intrl2_0_mask_set(priv, 0xffffffff);
1795         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1796         if (!priv->is_lite) {
1797                 intrl2_1_mask_set(priv, 0xffffffff);
1798                 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1799         }
1800 }
1801
1802 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1803 {
1804         u32 reg;
1805
1806         reg = gib_readl(priv, GIB_CONTROL);
1807         /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1808         if (netdev_uses_dsa(priv->netdev)) {
1809                 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1810                 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1811         }
1812         reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1813         reg |= 12 << GIB_IPG_LEN_SHIFT;
1814         gib_writel(priv, reg, GIB_CONTROL);
1815 }
1816
1817 static int bcm_sysport_open(struct net_device *dev)
1818 {
1819         struct bcm_sysport_priv *priv = netdev_priv(dev);
1820         struct phy_device *phydev;
1821         unsigned int i;
1822         int ret;
1823
1824         /* Reset UniMAC */
1825         umac_reset(priv);
1826
1827         /* Flush TX and RX FIFOs at TOPCTRL level */
1828         topctrl_flush(priv);
1829
1830         /* Disable the UniMAC RX/TX */
1831         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1832
1833         /* Enable RBUF 2bytes alignment and Receive Status Block */
1834         rbuf_init(priv);
1835
1836         /* Set maximum frame length */
1837         if (!priv->is_lite)
1838                 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1839         else
1840                 gib_set_pad_extension(priv);
1841
1842         /* Set MAC address */
1843         umac_set_hw_addr(priv, dev->dev_addr);
1844
1845         /* Read CRC forward */
1846         if (!priv->is_lite)
1847                 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1848         else
1849                 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
1850                                   GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
1851
1852         phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1853                                 0, priv->phy_interface);
1854         if (!phydev) {
1855                 netdev_err(dev, "could not attach to PHY\n");
1856                 return -ENODEV;
1857         }
1858
1859         /* Reset house keeping link status */
1860         priv->old_duplex = -1;
1861         priv->old_link = -1;
1862         priv->old_pause = -1;
1863
1864         /* mask all interrupts and request them */
1865         bcm_sysport_mask_all_intrs(priv);
1866
1867         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1868         if (ret) {
1869                 netdev_err(dev, "failed to request RX interrupt\n");
1870                 goto out_phy_disconnect;
1871         }
1872
1873         if (!priv->is_lite) {
1874                 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1875                                   dev->name, dev);
1876                 if (ret) {
1877                         netdev_err(dev, "failed to request TX interrupt\n");
1878                         goto out_free_irq0;
1879                 }
1880         }
1881
1882         /* Initialize both hardware and software ring */
1883         for (i = 0; i < dev->num_tx_queues; i++) {
1884                 ret = bcm_sysport_init_tx_ring(priv, i);
1885                 if (ret) {
1886                         netdev_err(dev, "failed to initialize TX ring %d\n",
1887                                    i);
1888                         goto out_free_tx_ring;
1889                 }
1890         }
1891
1892         /* Initialize linked-list */
1893         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1894
1895         /* Initialize RX ring */
1896         ret = bcm_sysport_init_rx_ring(priv);
1897         if (ret) {
1898                 netdev_err(dev, "failed to initialize RX ring\n");
1899                 goto out_free_rx_ring;
1900         }
1901
1902         /* Turn on RDMA */
1903         ret = rdma_enable_set(priv, 1);
1904         if (ret)
1905                 goto out_free_rx_ring;
1906
1907         /* Turn on TDMA */
1908         ret = tdma_enable_set(priv, 1);
1909         if (ret)
1910                 goto out_clear_rx_int;
1911
1912         /* Turn on UniMAC TX/RX */
1913         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1914
1915         bcm_sysport_netif_start(dev);
1916
1917         netif_tx_start_all_queues(dev);
1918
1919         return 0;
1920
1921 out_clear_rx_int:
1922         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1923 out_free_rx_ring:
1924         bcm_sysport_fini_rx_ring(priv);
1925 out_free_tx_ring:
1926         for (i = 0; i < dev->num_tx_queues; i++)
1927                 bcm_sysport_fini_tx_ring(priv, i);
1928         if (!priv->is_lite)
1929                 free_irq(priv->irq1, dev);
1930 out_free_irq0:
1931         free_irq(priv->irq0, dev);
1932 out_phy_disconnect:
1933         phy_disconnect(phydev);
1934         return ret;
1935 }
1936
1937 static void bcm_sysport_netif_stop(struct net_device *dev)
1938 {
1939         struct bcm_sysport_priv *priv = netdev_priv(dev);
1940
1941         /* stop all software from updating hardware */
1942         netif_tx_disable(dev);
1943         napi_disable(&priv->napi);
1944         phy_stop(dev->phydev);
1945
1946         /* mask all interrupts */
1947         bcm_sysport_mask_all_intrs(priv);
1948 }
1949
1950 static int bcm_sysport_stop(struct net_device *dev)
1951 {
1952         struct bcm_sysport_priv *priv = netdev_priv(dev);
1953         unsigned int i;
1954         int ret;
1955
1956         bcm_sysport_netif_stop(dev);
1957
1958         /* Disable UniMAC RX */
1959         umac_enable_set(priv, CMD_RX_EN, 0);
1960
1961         ret = tdma_enable_set(priv, 0);
1962         if (ret) {
1963                 netdev_err(dev, "timeout disabling RDMA\n");
1964                 return ret;
1965         }
1966
1967         /* Wait for a maximum packet size to be drained */
1968         usleep_range(2000, 3000);
1969
1970         ret = rdma_enable_set(priv, 0);
1971         if (ret) {
1972                 netdev_err(dev, "timeout disabling TDMA\n");
1973                 return ret;
1974         }
1975
1976         /* Disable UniMAC TX */
1977         umac_enable_set(priv, CMD_TX_EN, 0);
1978
1979         /* Free RX/TX rings SW structures */
1980         for (i = 0; i < dev->num_tx_queues; i++)
1981                 bcm_sysport_fini_tx_ring(priv, i);
1982         bcm_sysport_fini_rx_ring(priv);
1983
1984         free_irq(priv->irq0, dev);
1985         if (!priv->is_lite)
1986                 free_irq(priv->irq1, dev);
1987
1988         /* Disconnect from PHY */
1989         phy_disconnect(dev->phydev);
1990
1991         return 0;
1992 }
1993
1994 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
1995         .get_drvinfo            = bcm_sysport_get_drvinfo,
1996         .get_msglevel           = bcm_sysport_get_msglvl,
1997         .set_msglevel           = bcm_sysport_set_msglvl,
1998         .get_link               = ethtool_op_get_link,
1999         .get_strings            = bcm_sysport_get_strings,
2000         .get_ethtool_stats      = bcm_sysport_get_stats,
2001         .get_sset_count         = bcm_sysport_get_sset_count,
2002         .get_wol                = bcm_sysport_get_wol,
2003         .set_wol                = bcm_sysport_set_wol,
2004         .get_coalesce           = bcm_sysport_get_coalesce,
2005         .set_coalesce           = bcm_sysport_set_coalesce,
2006         .get_link_ksettings     = phy_ethtool_get_link_ksettings,
2007         .set_link_ksettings     = phy_ethtool_set_link_ksettings,
2008 };
2009
2010 static const struct net_device_ops bcm_sysport_netdev_ops = {
2011         .ndo_start_xmit         = bcm_sysport_xmit,
2012         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
2013         .ndo_open               = bcm_sysport_open,
2014         .ndo_stop               = bcm_sysport_stop,
2015         .ndo_set_features       = bcm_sysport_set_features,
2016         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
2017         .ndo_set_mac_address    = bcm_sysport_change_mac,
2018 #ifdef CONFIG_NET_POLL_CONTROLLER
2019         .ndo_poll_controller    = bcm_sysport_poll_controller,
2020 #endif
2021         .ndo_get_stats64        = bcm_sysport_get_stats64,
2022 };
2023
2024 #define REV_FMT "v%2x.%02x"
2025
2026 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2027         [SYSTEMPORT] = {
2028                 .is_lite = false,
2029                 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2030         },
2031         [SYSTEMPORT_LITE] = {
2032                 .is_lite = true,
2033                 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2034         },
2035 };
2036
2037 static const struct of_device_id bcm_sysport_of_match[] = {
2038         { .compatible = "brcm,systemportlite-v1.00",
2039           .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2040         { .compatible = "brcm,systemport-v1.00",
2041           .data = &bcm_sysport_params[SYSTEMPORT] },
2042         { .compatible = "brcm,systemport",
2043           .data = &bcm_sysport_params[SYSTEMPORT] },
2044         { /* sentinel */ }
2045 };
2046 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2047
2048 static int bcm_sysport_probe(struct platform_device *pdev)
2049 {
2050         const struct bcm_sysport_hw_params *params;
2051         const struct of_device_id *of_id = NULL;
2052         struct bcm_sysport_priv *priv;
2053         struct device_node *dn;
2054         struct net_device *dev;
2055         const void *macaddr;
2056         struct resource *r;
2057         u32 txq, rxq;
2058         int ret;
2059
2060         dn = pdev->dev.of_node;
2061         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2062         of_id = of_match_node(bcm_sysport_of_match, dn);
2063         if (!of_id || !of_id->data)
2064                 return -EINVAL;
2065
2066         /* Fairly quickly we need to know the type of adapter we have */
2067         params = of_id->data;
2068
2069         /* Read the Transmit/Receive Queue properties */
2070         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2071                 txq = TDMA_NUM_RINGS;
2072         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2073                 rxq = 1;
2074
2075         /* Sanity check the number of transmit queues */
2076         if (!txq || txq > TDMA_NUM_RINGS)
2077                 return -EINVAL;
2078
2079         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2080         if (!dev)
2081                 return -ENOMEM;
2082
2083         /* Initialize private members */
2084         priv = netdev_priv(dev);
2085
2086         /* Allocate number of TX rings */
2087         priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2088                                       sizeof(struct bcm_sysport_tx_ring),
2089                                       GFP_KERNEL);
2090         if (!priv->tx_rings) {
2091                 ret = -ENOMEM;
2092                 goto err_free_netdev;
2093         }
2094
2095         priv->is_lite = params->is_lite;
2096         priv->num_rx_desc_words = params->num_rx_desc_words;
2097
2098         priv->irq0 = platform_get_irq(pdev, 0);
2099         if (!priv->is_lite) {
2100                 priv->irq1 = platform_get_irq(pdev, 1);
2101                 priv->wol_irq = platform_get_irq(pdev, 2);
2102         } else {
2103                 priv->wol_irq = platform_get_irq(pdev, 1);
2104         }
2105         if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2106                 dev_err(&pdev->dev, "invalid interrupts\n");
2107                 ret = -EINVAL;
2108                 goto err_free_netdev;
2109         }
2110
2111         priv->base = devm_ioremap_resource(&pdev->dev, r);
2112         if (IS_ERR(priv->base)) {
2113                 ret = PTR_ERR(priv->base);
2114                 goto err_free_netdev;
2115         }
2116
2117         priv->netdev = dev;
2118         priv->pdev = pdev;
2119
2120         priv->phy_interface = of_get_phy_mode(dn);
2121         /* Default to GMII interface mode */
2122         if ((int)priv->phy_interface < 0)
2123                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2124
2125         /* In the case of a fixed PHY, the DT node associated
2126          * to the PHY is the Ethernet MAC DT node.
2127          */
2128         if (of_phy_is_fixed_link(dn)) {
2129                 ret = of_phy_register_fixed_link(dn);
2130                 if (ret) {
2131                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
2132                         goto err_free_netdev;
2133                 }
2134
2135                 priv->phy_dn = dn;
2136         }
2137
2138         /* Initialize netdevice members */
2139         macaddr = of_get_mac_address(dn);
2140         if (!macaddr || !is_valid_ether_addr(macaddr)) {
2141                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2142                 eth_hw_addr_random(dev);
2143         } else {
2144                 ether_addr_copy(dev->dev_addr, macaddr);
2145         }
2146
2147         SET_NETDEV_DEV(dev, &pdev->dev);
2148         dev_set_drvdata(&pdev->dev, dev);
2149         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2150         dev->netdev_ops = &bcm_sysport_netdev_ops;
2151         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2152
2153         /* HW supported features, none enabled by default */
2154         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2155                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2156         dev->max_mtu = UMAC_MAX_MTU_SIZE;
2157
2158         /* Request the WOL interrupt and advertise suspend if available */
2159         priv->wol_irq_disabled = 1;
2160         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2161                                bcm_sysport_wol_isr, 0, dev->name, priv);
2162         if (!ret)
2163                 device_set_wakeup_capable(&pdev->dev, 1);
2164
2165         /* Set the needed headroom once and for all */
2166         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2167         dev->needed_headroom += sizeof(struct bcm_tsb);
2168
2169         /* libphy will adjust the link state accordingly */
2170         netif_carrier_off(dev);
2171
2172         u64_stats_init(&priv->syncp);
2173
2174         ret = register_netdev(dev);
2175         if (ret) {
2176                 dev_err(&pdev->dev, "failed to register net_device\n");
2177                 goto err_deregister_fixed_link;
2178         }
2179
2180         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2181         dev_info(&pdev->dev,
2182                  "Broadcom SYSTEMPORT%s" REV_FMT
2183                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2184                  priv->is_lite ? " Lite" : "",
2185                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2186                  priv->base, priv->irq0, priv->irq1, txq, rxq);
2187
2188         return 0;
2189
2190 err_deregister_fixed_link:
2191         if (of_phy_is_fixed_link(dn))
2192                 of_phy_deregister_fixed_link(dn);
2193 err_free_netdev:
2194         free_netdev(dev);
2195         return ret;
2196 }
2197
2198 static int bcm_sysport_remove(struct platform_device *pdev)
2199 {
2200         struct net_device *dev = dev_get_drvdata(&pdev->dev);
2201         struct device_node *dn = pdev->dev.of_node;
2202
2203         /* Not much to do, ndo_close has been called
2204          * and we use managed allocations
2205          */
2206         unregister_netdev(dev);
2207         if (of_phy_is_fixed_link(dn))
2208                 of_phy_deregister_fixed_link(dn);
2209         free_netdev(dev);
2210         dev_set_drvdata(&pdev->dev, NULL);
2211
2212         return 0;
2213 }
2214
2215 #ifdef CONFIG_PM_SLEEP
2216 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2217 {
2218         struct net_device *ndev = priv->netdev;
2219         unsigned int timeout = 1000;
2220         u32 reg;
2221
2222         reg = umac_readl(priv, UMAC_MPD_CTRL);
2223         reg |= MPD_EN;
2224         reg &= ~PSW_EN;
2225         if (priv->wolopts & WAKE_MAGICSECURE) {
2226                 /* Program the SecureOn password */
2227                 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
2228                             UMAC_PSW_MS);
2229                 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
2230                             UMAC_PSW_LS);
2231                 reg |= PSW_EN;
2232         }
2233         umac_writel(priv, reg, UMAC_MPD_CTRL);
2234
2235         /* Make sure RBUF entered WoL mode as result */
2236         do {
2237                 reg = rbuf_readl(priv, RBUF_STATUS);
2238                 if (reg & RBUF_WOL_MODE)
2239                         break;
2240
2241                 udelay(10);
2242         } while (timeout-- > 0);
2243
2244         /* Do not leave the UniMAC RBUF matching only MPD packets */
2245         if (!timeout) {
2246                 reg = umac_readl(priv, UMAC_MPD_CTRL);
2247                 reg &= ~MPD_EN;
2248                 umac_writel(priv, reg, UMAC_MPD_CTRL);
2249                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2250                 return -ETIMEDOUT;
2251         }
2252
2253         /* UniMAC receive needs to be turned on */
2254         umac_enable_set(priv, CMD_RX_EN, 1);
2255
2256         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2257
2258         return 0;
2259 }
2260
2261 static int bcm_sysport_suspend(struct device *d)
2262 {
2263         struct net_device *dev = dev_get_drvdata(d);
2264         struct bcm_sysport_priv *priv = netdev_priv(dev);
2265         unsigned int i;
2266         int ret = 0;
2267         u32 reg;
2268
2269         if (!netif_running(dev))
2270                 return 0;
2271
2272         netif_device_detach(dev);
2273
2274         bcm_sysport_netif_stop(dev);
2275
2276         phy_suspend(dev->phydev);
2277
2278         /* Disable UniMAC RX */
2279         umac_enable_set(priv, CMD_RX_EN, 0);
2280
2281         ret = rdma_enable_set(priv, 0);
2282         if (ret) {
2283                 netdev_err(dev, "RDMA timeout!\n");
2284                 return ret;
2285         }
2286
2287         /* Disable RXCHK if enabled */
2288         if (priv->rx_chk_en) {
2289                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2290                 reg &= ~RXCHK_EN;
2291                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2292         }
2293
2294         /* Flush RX pipe */
2295         if (!priv->wolopts)
2296                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2297
2298         ret = tdma_enable_set(priv, 0);
2299         if (ret) {
2300                 netdev_err(dev, "TDMA timeout!\n");
2301                 return ret;
2302         }
2303
2304         /* Wait for a packet boundary */
2305         usleep_range(2000, 3000);
2306
2307         umac_enable_set(priv, CMD_TX_EN, 0);
2308
2309         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2310
2311         /* Free RX/TX rings SW structures */
2312         for (i = 0; i < dev->num_tx_queues; i++)
2313                 bcm_sysport_fini_tx_ring(priv, i);
2314         bcm_sysport_fini_rx_ring(priv);
2315
2316         /* Get prepared for Wake-on-LAN */
2317         if (device_may_wakeup(d) && priv->wolopts)
2318                 ret = bcm_sysport_suspend_to_wol(priv);
2319
2320         return ret;
2321 }
2322
2323 static int bcm_sysport_resume(struct device *d)
2324 {
2325         struct net_device *dev = dev_get_drvdata(d);
2326         struct bcm_sysport_priv *priv = netdev_priv(dev);
2327         unsigned int i;
2328         u32 reg;
2329         int ret;
2330
2331         if (!netif_running(dev))
2332                 return 0;
2333
2334         umac_reset(priv);
2335
2336         /* Disable the UniMAC RX/TX */
2337         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
2338
2339         /* We may have been suspended and never received a WOL event that
2340          * would turn off MPD detection, take care of that now
2341          */
2342         bcm_sysport_resume_from_wol(priv);
2343
2344         /* Initialize both hardware and software ring */
2345         for (i = 0; i < dev->num_tx_queues; i++) {
2346                 ret = bcm_sysport_init_tx_ring(priv, i);
2347                 if (ret) {
2348                         netdev_err(dev, "failed to initialize TX ring %d\n",
2349                                    i);
2350                         goto out_free_tx_rings;
2351                 }
2352         }
2353
2354         /* Initialize linked-list */
2355         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2356
2357         /* Initialize RX ring */
2358         ret = bcm_sysport_init_rx_ring(priv);
2359         if (ret) {
2360                 netdev_err(dev, "failed to initialize RX ring\n");
2361                 goto out_free_rx_ring;
2362         }
2363
2364         /* RX pipe enable */
2365         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2366
2367         ret = rdma_enable_set(priv, 1);
2368         if (ret) {
2369                 netdev_err(dev, "failed to enable RDMA\n");
2370                 goto out_free_rx_ring;
2371         }
2372
2373         /* Enable rxhck */
2374         if (priv->rx_chk_en) {
2375                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2376                 reg |= RXCHK_EN;
2377                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2378         }
2379
2380         rbuf_init(priv);
2381
2382         /* Set maximum frame length */
2383         if (!priv->is_lite)
2384                 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2385         else
2386                 gib_set_pad_extension(priv);
2387
2388         /* Set MAC address */
2389         umac_set_hw_addr(priv, dev->dev_addr);
2390
2391         umac_enable_set(priv, CMD_RX_EN, 1);
2392
2393         /* TX pipe enable */
2394         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2395
2396         umac_enable_set(priv, CMD_TX_EN, 1);
2397
2398         ret = tdma_enable_set(priv, 1);
2399         if (ret) {
2400                 netdev_err(dev, "TDMA timeout!\n");
2401                 goto out_free_rx_ring;
2402         }
2403
2404         phy_resume(dev->phydev);
2405
2406         bcm_sysport_netif_start(dev);
2407
2408         netif_device_attach(dev);
2409
2410         return 0;
2411
2412 out_free_rx_ring:
2413         bcm_sysport_fini_rx_ring(priv);
2414 out_free_tx_rings:
2415         for (i = 0; i < dev->num_tx_queues; i++)
2416                 bcm_sysport_fini_tx_ring(priv, i);
2417         return ret;
2418 }
2419 #endif
2420
2421 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2422                 bcm_sysport_suspend, bcm_sysport_resume);
2423
2424 static struct platform_driver bcm_sysport_driver = {
2425         .probe  = bcm_sysport_probe,
2426         .remove = bcm_sysport_remove,
2427         .driver =  {
2428                 .name = "brcm-systemport",
2429                 .of_match_table = bcm_sysport_of_match,
2430                 .pm = &bcm_sysport_pm_ops,
2431         },
2432 };
2433 module_platform_driver(bcm_sysport_driver);
2434
2435 MODULE_AUTHOR("Broadcom Corporation");
2436 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2437 MODULE_ALIAS("platform:brcm-systemport");
2438 MODULE_LICENSE("GPL");