2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 #define DRV_VERSION "1.0.0.7-NAPI"
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
30 * atl1e_pci_tbl - PCI Device ID Table
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
38 static const struct pci_device_id atl1e_pci_tbl[] = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
133 static void atl1e_phy_config(unsigned long data)
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
152 clear_bit(__AT_RESETTING, &adapter->flags);
155 static void atl1e_reset_task(struct work_struct *work)
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
160 atl1e_reinit_locked(adapter);
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
168 u16 speed, duplex, phy_data;
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
200 adapter->link_duplex == FULL_DUPLEX ?
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
217 static void atl1e_link_chg_task(struct work_struct *work)
219 struct atl1e_adapter *adapter;
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
230 struct net_device *netdev = adapter->netdev;
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
248 schedule_work(&adapter->link_chg_task);
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
253 del_timer_sync(&adapter->phy_config_timer);
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
266 static void atl1e_tx_timeout(struct net_device *netdev)
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
283 static void atl1e_set_multi(struct net_device *netdev)
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
316 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data)
319 if (features & NETIF_F_RXALL) {
320 /* enable RX of ALL frames */
321 *mac_ctrl_data |= MAC_CTRL_DBG;
323 /* disable RX of ALL frames */
324 *mac_ctrl_data &= ~MAC_CTRL_DBG;
328 static void atl1e_rx_mode(struct net_device *netdev,
329 netdev_features_t features)
331 struct atl1e_adapter *adapter = netdev_priv(netdev);
332 u32 mac_ctrl_data = 0;
334 netdev_dbg(adapter->netdev, "%s\n", __func__);
336 atl1e_irq_disable(adapter);
337 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
338 __atl1e_rx_mode(features, &mac_ctrl_data);
339 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
340 atl1e_irq_enable(adapter);
344 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
346 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
347 /* enable VLAN tag insert/strip */
348 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
350 /* disable VLAN tag insert/strip */
351 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
355 static void atl1e_vlan_mode(struct net_device *netdev,
356 netdev_features_t features)
358 struct atl1e_adapter *adapter = netdev_priv(netdev);
359 u32 mac_ctrl_data = 0;
361 netdev_dbg(adapter->netdev, "%s\n", __func__);
363 atl1e_irq_disable(adapter);
364 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
365 __atl1e_vlan_mode(features, &mac_ctrl_data);
366 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
367 atl1e_irq_enable(adapter);
370 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
372 netdev_dbg(adapter->netdev, "%s\n", __func__);
373 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
377 * atl1e_set_mac - Change the Ethernet Address of the NIC
378 * @netdev: network interface device structure
379 * @p: pointer to an address structure
381 * Returns 0 on success, negative on failure
383 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
385 struct atl1e_adapter *adapter = netdev_priv(netdev);
386 struct sockaddr *addr = p;
388 if (!is_valid_ether_addr(addr->sa_data))
389 return -EADDRNOTAVAIL;
391 if (netif_running(netdev))
394 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
395 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
397 atl1e_hw_set_mac_addr(&adapter->hw);
402 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
403 netdev_features_t features)
406 * Since there is no support for separate rx/tx vlan accel
407 * enable/disable make sure tx flag is always in same state as rx.
409 if (features & NETIF_F_HW_VLAN_CTAG_RX)
410 features |= NETIF_F_HW_VLAN_CTAG_TX;
412 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
417 static int atl1e_set_features(struct net_device *netdev,
418 netdev_features_t features)
420 netdev_features_t changed = netdev->features ^ features;
422 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
423 atl1e_vlan_mode(netdev, features);
425 if (changed & NETIF_F_RXALL)
426 atl1e_rx_mode(netdev, features);
433 * atl1e_change_mtu - Change the Maximum Transfer Unit
434 * @netdev: network interface device structure
435 * @new_mtu: new value for maximum frame size
437 * Returns 0 on success, negative on failure
439 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
441 struct atl1e_adapter *adapter = netdev_priv(netdev);
442 int old_mtu = netdev->mtu;
443 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
445 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
446 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
447 netdev_warn(adapter->netdev, "invalid MTU setting\n");
451 if (old_mtu != new_mtu && netif_running(netdev)) {
452 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
454 netdev->mtu = new_mtu;
455 adapter->hw.max_frame_size = new_mtu;
456 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
459 clear_bit(__AT_RESETTING, &adapter->flags);
465 * caller should hold mdio_lock
467 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
469 struct atl1e_adapter *adapter = netdev_priv(netdev);
472 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
476 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
477 int reg_num, int val)
479 struct atl1e_adapter *adapter = netdev_priv(netdev);
481 if (atl1e_write_phy_reg(&adapter->hw,
482 reg_num & MDIO_REG_ADDR_MASK, val))
483 netdev_err(netdev, "write phy register failed\n");
486 static int atl1e_mii_ioctl(struct net_device *netdev,
487 struct ifreq *ifr, int cmd)
489 struct atl1e_adapter *adapter = netdev_priv(netdev);
490 struct mii_ioctl_data *data = if_mii(ifr);
494 if (!netif_running(netdev))
497 spin_lock_irqsave(&adapter->mdio_lock, flags);
504 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
512 if (data->reg_num & ~(0x1F)) {
517 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
518 data->reg_num, data->val_in);
519 if (atl1e_write_phy_reg(&adapter->hw,
520 data->reg_num, data->val_in)) {
527 retval = -EOPNOTSUPP;
531 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
536 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
542 return atl1e_mii_ioctl(netdev, ifr, cmd);
548 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
552 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
553 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
554 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
555 pci_write_config_word(pdev, PCI_COMMAND, cmd);
558 * some motherboards BIOS(PXE/EFI) driver may set PME
559 * while they transfer control to OS (Windows/Linux)
560 * so we should clear this bit before NIC work normally
562 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
567 * atl1e_alloc_queues - Allocate memory for all rings
568 * @adapter: board private structure to initialize
571 static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
577 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
578 * @adapter: board private structure to initialize
580 * atl1e_sw_init initializes the Adapter private data structure.
581 * Fields are initialized based on PCI device information and
582 * OS network device settings (MTU size).
584 static int atl1e_sw_init(struct atl1e_adapter *adapter)
586 struct atl1e_hw *hw = &adapter->hw;
587 struct pci_dev *pdev = adapter->pdev;
588 u32 phy_status_data = 0;
591 adapter->link_speed = SPEED_0; /* hardware init */
592 adapter->link_duplex = FULL_DUPLEX;
593 adapter->num_rx_queues = 1;
595 /* PCI config space info */
596 hw->vendor_id = pdev->vendor;
597 hw->device_id = pdev->device;
598 hw->subsystem_vendor_id = pdev->subsystem_vendor;
599 hw->subsystem_id = pdev->subsystem_device;
600 hw->revision_id = pdev->revision;
602 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
604 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
606 if (hw->revision_id >= 0xF0) {
607 hw->nic_type = athr_l2e_revB;
609 if (phy_status_data & PHY_STATUS_100M)
610 hw->nic_type = athr_l1e;
612 hw->nic_type = athr_l2e_revA;
615 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
617 if (phy_status_data & PHY_STATUS_EMI_CA)
622 hw->phy_configured = false;
623 hw->preamble_len = 7;
624 hw->max_frame_size = adapter->netdev->mtu;
625 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
626 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
628 hw->rrs_type = atl1e_rrs_disable;
629 hw->indirect_tab = 0;
634 hw->ict = 50000; /* 100ms */
635 hw->smb_timer = 200000; /* 200ms */
638 hw->tpd_thresh = adapter->tx_ring.count / 2;
639 hw->rx_count_down = 4; /* 2us resolution */
640 hw->tx_count_down = hw->imt * 4 / 3;
641 hw->dmar_block = atl1e_dma_req_1024;
642 hw->dmaw_block = atl1e_dma_req_1024;
643 hw->dmar_dly_cnt = 15;
644 hw->dmaw_dly_cnt = 4;
646 if (atl1e_alloc_queues(adapter)) {
647 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
651 atomic_set(&adapter->irq_sem, 1);
652 spin_lock_init(&adapter->mdio_lock);
654 set_bit(__AT_DOWN, &adapter->flags);
660 * atl1e_clean_tx_ring - Free Tx-skb
661 * @adapter: board private structure
663 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
665 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
666 struct atl1e_tx_buffer *tx_buffer = NULL;
667 struct pci_dev *pdev = adapter->pdev;
668 u16 index, ring_count;
670 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
673 ring_count = tx_ring->count;
674 /* first unmmap dma */
675 for (index = 0; index < ring_count; index++) {
676 tx_buffer = &tx_ring->tx_buffer[index];
677 if (tx_buffer->dma) {
678 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
679 pci_unmap_single(pdev, tx_buffer->dma,
680 tx_buffer->length, PCI_DMA_TODEVICE);
681 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
682 pci_unmap_page(pdev, tx_buffer->dma,
683 tx_buffer->length, PCI_DMA_TODEVICE);
687 /* second free skb */
688 for (index = 0; index < ring_count; index++) {
689 tx_buffer = &tx_ring->tx_buffer[index];
690 if (tx_buffer->skb) {
691 dev_kfree_skb_any(tx_buffer->skb);
692 tx_buffer->skb = NULL;
695 /* Zero out Tx-buffers */
696 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
698 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
703 * atl1e_clean_rx_ring - Free rx-reservation skbs
704 * @adapter: board private structure
706 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
708 struct atl1e_rx_ring *rx_ring =
710 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
714 if (adapter->ring_vir_addr == NULL)
716 /* Zero out the descriptor ring */
717 for (i = 0; i < adapter->num_rx_queues; i++) {
718 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
719 if (rx_page_desc[i].rx_page[j].addr != NULL) {
720 memset(rx_page_desc[i].rx_page[j].addr, 0,
721 rx_ring->real_page_size);
727 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
729 *ring_size = ((u32)(adapter->tx_ring.count *
730 sizeof(struct atl1e_tpd_desc) + 7
731 /* tx ring, qword align */
732 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
733 adapter->num_rx_queues + 31
734 /* rx ring, 32 bytes align */
735 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
737 /* tx, rx cmd, dword align */
740 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
742 struct atl1e_rx_ring *rx_ring = NULL;
744 rx_ring = &adapter->rx_ring;
746 rx_ring->real_page_size = adapter->rx_ring.page_size
747 + adapter->hw.max_frame_size
748 + ETH_HLEN + VLAN_HLEN
750 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
751 atl1e_cal_ring_size(adapter, &adapter->ring_size);
753 adapter->ring_vir_addr = NULL;
754 adapter->rx_ring.desc = NULL;
755 rwlock_init(&adapter->tx_ring.tx_lock);
759 * Read / Write Ptr Initialize:
761 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
763 struct atl1e_tx_ring *tx_ring = NULL;
764 struct atl1e_rx_ring *rx_ring = NULL;
765 struct atl1e_rx_page_desc *rx_page_desc = NULL;
768 tx_ring = &adapter->tx_ring;
769 rx_ring = &adapter->rx_ring;
770 rx_page_desc = rx_ring->rx_page_desc;
772 tx_ring->next_to_use = 0;
773 atomic_set(&tx_ring->next_to_clean, 0);
775 for (i = 0; i < adapter->num_rx_queues; i++) {
776 rx_page_desc[i].rx_using = 0;
777 rx_page_desc[i].rx_nxseq = 0;
778 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
779 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
780 rx_page_desc[i].rx_page[j].read_offset = 0;
786 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
787 * @adapter: board private structure
789 * Free all transmit software resources
791 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
793 struct pci_dev *pdev = adapter->pdev;
795 atl1e_clean_tx_ring(adapter);
796 atl1e_clean_rx_ring(adapter);
798 if (adapter->ring_vir_addr) {
799 pci_free_consistent(pdev, adapter->ring_size,
800 adapter->ring_vir_addr, adapter->ring_dma);
801 adapter->ring_vir_addr = NULL;
804 if (adapter->tx_ring.tx_buffer) {
805 kfree(adapter->tx_ring.tx_buffer);
806 adapter->tx_ring.tx_buffer = NULL;
811 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
812 * @adapter: board private structure
814 * Return 0 on success, negative on failure
816 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
818 struct pci_dev *pdev = adapter->pdev;
819 struct atl1e_tx_ring *tx_ring;
820 struct atl1e_rx_ring *rx_ring;
821 struct atl1e_rx_page_desc *rx_page_desc;
826 if (adapter->ring_vir_addr != NULL)
827 return 0; /* alloced already */
829 tx_ring = &adapter->tx_ring;
830 rx_ring = &adapter->rx_ring;
832 /* real ring DMA buffer */
834 size = adapter->ring_size;
835 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size,
837 if (adapter->ring_vir_addr == NULL) {
838 netdev_err(adapter->netdev,
839 "pci_alloc_consistent failed, size = D%d\n", size);
843 rx_page_desc = rx_ring->rx_page_desc;
846 tx_ring->dma = roundup(adapter->ring_dma, 8);
847 offset = tx_ring->dma - adapter->ring_dma;
848 tx_ring->desc = adapter->ring_vir_addr + offset;
849 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
850 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
851 if (tx_ring->tx_buffer == NULL) {
857 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
858 offset = roundup(offset, 32);
860 for (i = 0; i < adapter->num_rx_queues; i++) {
861 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
862 rx_page_desc[i].rx_page[j].dma =
863 adapter->ring_dma + offset;
864 rx_page_desc[i].rx_page[j].addr =
865 adapter->ring_vir_addr + offset;
866 offset += rx_ring->real_page_size;
870 /* Init CMB dma address */
871 tx_ring->cmb_dma = adapter->ring_dma + offset;
872 tx_ring->cmb = adapter->ring_vir_addr + offset;
873 offset += sizeof(u32);
875 for (i = 0; i < adapter->num_rx_queues; i++) {
876 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
877 rx_page_desc[i].rx_page[j].write_offset_dma =
878 adapter->ring_dma + offset;
879 rx_page_desc[i].rx_page[j].write_offset_addr =
880 adapter->ring_vir_addr + offset;
881 offset += sizeof(u32);
885 if (unlikely(offset > adapter->ring_size)) {
886 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
887 offset, adapter->ring_size);
894 if (adapter->ring_vir_addr != NULL) {
895 pci_free_consistent(pdev, adapter->ring_size,
896 adapter->ring_vir_addr, adapter->ring_dma);
897 adapter->ring_vir_addr = NULL;
902 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
905 struct atl1e_hw *hw = &adapter->hw;
906 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
907 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
908 struct atl1e_rx_page_desc *rx_page_desc = NULL;
911 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
912 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
913 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
914 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
915 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
916 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
917 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
919 rx_page_desc = rx_ring->rx_page_desc;
920 /* RXF Page Physical address / Page Length */
921 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
922 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
923 (u32)((adapter->ring_dma &
924 AT_DMA_HI_ADDR_MASK) >> 32));
925 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
929 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
931 rx_page_desc[i].rx_page[j].write_offset_dma;
933 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
934 page_phy_addr & AT_DMA_LO_ADDR_MASK);
935 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
936 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
937 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
941 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
942 /* Load all of base address above */
943 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
946 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
948 struct atl1e_hw *hw = &adapter->hw;
949 u32 dev_ctrl_data = 0;
950 u32 max_pay_load = 0;
951 u32 jumbo_thresh = 0;
952 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
954 /* configure TXQ param */
955 if (hw->nic_type != athr_l2e_revB) {
956 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
957 if (hw->max_frame_size <= 1500) {
958 jumbo_thresh = hw->max_frame_size + extra_size;
959 } else if (hw->max_frame_size < 6*1024) {
961 (hw->max_frame_size + extra_size) * 2 / 3;
963 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
965 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
968 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
970 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
971 DEVICE_CTRL_MAX_PAYLOAD_MASK;
973 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
975 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
976 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
977 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
979 if (hw->nic_type != athr_l2e_revB)
980 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
981 atl1e_pay_load_size[hw->dmar_block]);
983 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
984 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
985 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
986 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
989 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
991 struct atl1e_hw *hw = &adapter->hw;
995 u32 rxf_thresh_data = 0;
996 u32 rxq_ctrl_data = 0;
998 if (hw->nic_type != athr_l2e_revB) {
999 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
1000 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
1001 RXQ_JMBOSZ_TH_SHIFT |
1002 (1 & RXQ_JMBO_LKAH_MASK) <<
1003 RXQ_JMBO_LKAH_SHIFT));
1005 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
1006 rxf_high = rxf_len * 4 / 5;
1007 rxf_low = rxf_len / 5;
1008 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
1009 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1010 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
1011 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1013 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
1017 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1018 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1020 if (hw->rrs_type & atl1e_rrs_ipv4)
1021 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1023 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1024 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1026 if (hw->rrs_type & atl1e_rrs_ipv6)
1027 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1029 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1030 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1032 if (hw->rrs_type != atl1e_rrs_disable)
1034 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1036 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1037 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1039 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1042 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1044 struct atl1e_hw *hw = &adapter->hw;
1045 u32 dma_ctrl_data = 0;
1047 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1048 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1049 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1050 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1051 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1052 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1053 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1054 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1055 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1056 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1058 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1061 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1064 struct atl1e_hw *hw = &adapter->hw;
1065 struct net_device *netdev = adapter->netdev;
1067 /* Config MAC CTRL Register */
1068 value = MAC_CTRL_TX_EN |
1071 if (FULL_DUPLEX == adapter->link_duplex)
1072 value |= MAC_CTRL_DUPLX;
1074 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1075 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1076 MAC_CTRL_SPEED_SHIFT);
1077 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1079 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1080 value |= (((u32)adapter->hw.preamble_len &
1081 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1083 __atl1e_vlan_mode(netdev->features, &value);
1085 value |= MAC_CTRL_BC_EN;
1086 if (netdev->flags & IFF_PROMISC)
1087 value |= MAC_CTRL_PROMIS_EN;
1088 if (netdev->flags & IFF_ALLMULTI)
1089 value |= MAC_CTRL_MC_ALL_EN;
1090 if (netdev->features & NETIF_F_RXALL)
1091 value |= MAC_CTRL_DBG;
1092 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1096 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1097 * @adapter: board private structure
1099 * Configure the Tx /Rx unit of the MAC after a reset.
1101 static int atl1e_configure(struct atl1e_adapter *adapter)
1103 struct atl1e_hw *hw = &adapter->hw;
1105 u32 intr_status_data = 0;
1107 /* clear interrupt status */
1108 AT_WRITE_REG(hw, REG_ISR, ~0);
1110 /* 1. set MAC Address */
1111 atl1e_hw_set_mac_addr(hw);
1113 /* 2. Init the Multicast HASH table done by set_muti */
1115 /* 3. Clear any WOL status */
1116 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1118 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1119 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1120 * High 32bits memory */
1121 atl1e_configure_des_ring(adapter);
1123 /* 5. set Interrupt Moderator Timer */
1124 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1125 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1126 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1127 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1129 /* 6. rx/tx threshold to trig interrupt */
1130 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1131 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1132 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1133 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1135 /* 7. set Interrupt Clear Timer */
1136 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1139 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1140 VLAN_HLEN + ETH_FCS_LEN);
1142 /* 9. config TXQ early tx threshold */
1143 atl1e_configure_tx(adapter);
1145 /* 10. config RXQ */
1146 atl1e_configure_rx(adapter);
1148 /* 11. config DMA Engine */
1149 atl1e_configure_dma(adapter);
1151 /* 12. smb timer to trig interrupt */
1152 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1154 intr_status_data = AT_READ_REG(hw, REG_ISR);
1155 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1156 netdev_err(adapter->netdev,
1157 "atl1e_configure failed, PCIE phy link down\n");
1161 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1166 * atl1e_get_stats - Get System Network Statistics
1167 * @netdev: network interface device structure
1169 * Returns the address of the device statistics structure.
1170 * The statistics are actually updated from the timer callback.
1172 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1174 struct atl1e_adapter *adapter = netdev_priv(netdev);
1175 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1176 struct net_device_stats *net_stats = &netdev->stats;
1178 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1179 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1180 net_stats->multicast = hw_stats->rx_mcast;
1181 net_stats->collisions = hw_stats->tx_1_col +
1182 hw_stats->tx_2_col +
1183 hw_stats->tx_late_col +
1184 hw_stats->tx_abort_col;
1186 net_stats->rx_errors = hw_stats->rx_frag +
1187 hw_stats->rx_fcs_err +
1188 hw_stats->rx_len_err +
1189 hw_stats->rx_sz_ov +
1190 hw_stats->rx_rrd_ov +
1191 hw_stats->rx_align_err +
1192 hw_stats->rx_rxf_ov;
1194 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1195 net_stats->rx_length_errors = hw_stats->rx_len_err;
1196 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1197 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1198 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1200 net_stats->tx_errors = hw_stats->tx_late_col +
1201 hw_stats->tx_abort_col +
1202 hw_stats->tx_underrun +
1205 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1206 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1207 net_stats->tx_window_errors = hw_stats->tx_late_col;
1209 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1210 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1215 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1217 u16 hw_reg_addr = 0;
1218 unsigned long *stats_item = NULL;
1220 /* update rx status */
1221 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1222 stats_item = &adapter->hw_stats.rx_ok;
1223 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1224 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1228 /* update tx status */
1229 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1230 stats_item = &adapter->hw_stats.tx_ok;
1231 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1232 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1238 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1242 spin_lock(&adapter->mdio_lock);
1243 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1244 spin_unlock(&adapter->mdio_lock);
1247 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1249 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1250 struct atl1e_tx_buffer *tx_buffer = NULL;
1251 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1252 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1254 while (next_to_clean != hw_next_to_clean) {
1255 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1256 if (tx_buffer->dma) {
1257 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1258 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1259 tx_buffer->length, PCI_DMA_TODEVICE);
1260 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1261 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1262 tx_buffer->length, PCI_DMA_TODEVICE);
1266 if (tx_buffer->skb) {
1267 dev_kfree_skb_irq(tx_buffer->skb);
1268 tx_buffer->skb = NULL;
1271 if (++next_to_clean == tx_ring->count)
1275 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1277 if (netif_queue_stopped(adapter->netdev) &&
1278 netif_carrier_ok(adapter->netdev)) {
1279 netif_wake_queue(adapter->netdev);
1286 * atl1e_intr - Interrupt Handler
1287 * @irq: interrupt number
1288 * @data: pointer to a network interface device structure
1290 static irqreturn_t atl1e_intr(int irq, void *data)
1292 struct net_device *netdev = data;
1293 struct atl1e_adapter *adapter = netdev_priv(netdev);
1294 struct atl1e_hw *hw = &adapter->hw;
1295 int max_ints = AT_MAX_INT_WORK;
1296 int handled = IRQ_NONE;
1300 status = AT_READ_REG(hw, REG_ISR);
1301 if ((status & IMR_NORMAL_MASK) == 0 ||
1302 (status & ISR_DIS_INT) != 0) {
1303 if (max_ints != AT_MAX_INT_WORK)
1304 handled = IRQ_HANDLED;
1308 if (status & ISR_GPHY)
1309 atl1e_clear_phy_int(adapter);
1311 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1313 handled = IRQ_HANDLED;
1314 /* check if PCIE PHY Link down */
1315 if (status & ISR_PHY_LINKDOWN) {
1316 netdev_err(adapter->netdev,
1317 "pcie phy linkdown %x\n", status);
1318 if (netif_running(adapter->netdev)) {
1320 atl1e_irq_reset(adapter);
1321 schedule_work(&adapter->reset_task);
1326 /* check if DMA read/write error */
1327 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1328 netdev_err(adapter->netdev,
1329 "PCIE DMA RW error (status = 0x%x)\n",
1331 atl1e_irq_reset(adapter);
1332 schedule_work(&adapter->reset_task);
1336 if (status & ISR_SMB)
1337 atl1e_update_hw_stats(adapter);
1340 if (status & (ISR_GPHY | ISR_MANUAL)) {
1341 netdev->stats.tx_carrier_errors++;
1342 atl1e_link_chg_event(adapter);
1346 /* transmit event */
1347 if (status & ISR_TX_EVENT)
1348 atl1e_clean_tx_irq(adapter);
1350 if (status & ISR_RX_EVENT) {
1352 * disable rx interrupts, without
1353 * the synchronize_irq bit
1355 AT_WRITE_REG(hw, REG_IMR,
1356 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1358 if (likely(napi_schedule_prep(
1360 __napi_schedule(&adapter->napi);
1362 } while (--max_ints > 0);
1363 /* re-enable Interrupt*/
1364 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1369 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1370 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1372 u8 *packet = (u8 *)(prrs + 1);
1374 u16 head_len = ETH_HLEN;
1378 skb_checksum_none_assert(skb);
1379 pkt_flags = prrs->pkt_flag;
1380 err_flags = prrs->err_flag;
1381 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1382 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1383 if (pkt_flags & RRS_IS_IPV4) {
1384 if (pkt_flags & RRS_IS_802_3)
1386 iph = (struct iphdr *) (packet + head_len);
1387 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1390 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1391 skb->ip_summed = CHECKSUM_UNNECESSARY;
1400 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1403 struct atl1e_rx_page_desc *rx_page_desc =
1404 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1405 u8 rx_using = rx_page_desc[que].rx_using;
1407 return &(rx_page_desc[que].rx_page[rx_using]);
1410 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1411 int *work_done, int work_to_do)
1413 struct net_device *netdev = adapter->netdev;
1414 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1415 struct atl1e_rx_page_desc *rx_page_desc =
1416 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1417 struct sk_buff *skb = NULL;
1418 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1419 u32 packet_size, write_offset;
1420 struct atl1e_recv_ret_status *prrs;
1422 write_offset = *(rx_page->write_offset_addr);
1423 if (likely(rx_page->read_offset < write_offset)) {
1425 if (*work_done >= work_to_do)
1428 /* get new packet's rrs */
1429 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1430 rx_page->read_offset);
1431 /* check sequence number */
1432 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1434 "rx sequence number error (rx=%d) (expect=%d)\n",
1436 rx_page_desc[que].rx_nxseq);
1437 rx_page_desc[que].rx_nxseq++;
1438 /* just for debug use */
1439 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1440 (((u32)prrs->seq_num) << 16) |
1441 rx_page_desc[que].rx_nxseq);
1444 rx_page_desc[que].rx_nxseq++;
1447 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) &&
1448 !(netdev->features & NETIF_F_RXALL)) {
1449 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1450 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1452 /* hardware error, discard this packet*/
1454 "rx packet desc error %x\n",
1455 *((u32 *)prrs + 1));
1460 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1462 if (likely(!(netdev->features & NETIF_F_RXFCS)))
1463 packet_size -= 4; /* CRC */
1465 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1469 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1470 skb_put(skb, packet_size);
1471 skb->protocol = eth_type_trans(skb, netdev);
1472 atl1e_rx_checksum(adapter, skb, prrs);
1474 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1475 u16 vlan_tag = (prrs->vtag >> 4) |
1476 ((prrs->vtag & 7) << 13) |
1477 ((prrs->vtag & 8) << 9);
1479 "RXD VLAN TAG<RRD>=0x%04x\n",
1481 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
1483 netif_receive_skb(skb);
1486 /* skip current packet whether it's ok or not. */
1487 rx_page->read_offset +=
1488 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1489 RRS_PKT_SIZE_MASK) +
1490 sizeof(struct atl1e_recv_ret_status) + 31) &
1493 if (rx_page->read_offset >= rx_ring->page_size) {
1494 /* mark this page clean */
1498 rx_page->read_offset =
1499 *(rx_page->write_offset_addr) = 0;
1500 rx_using = rx_page_desc[que].rx_using;
1502 atl1e_rx_page_vld_regs[que][rx_using];
1503 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1504 rx_page_desc[que].rx_using ^= 1;
1505 rx_page = atl1e_get_rx_page(adapter, que);
1507 write_offset = *(rx_page->write_offset_addr);
1508 } while (rx_page->read_offset < write_offset);
1514 if (!test_bit(__AT_DOWN, &adapter->flags))
1515 schedule_work(&adapter->reset_task);
1519 * atl1e_clean - NAPI Rx polling callback
1521 static int atl1e_clean(struct napi_struct *napi, int budget)
1523 struct atl1e_adapter *adapter =
1524 container_of(napi, struct atl1e_adapter, napi);
1528 /* Keep link state information with original netdev */
1529 if (!netif_carrier_ok(adapter->netdev))
1532 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1534 /* If no Tx and not enough Rx work done, exit the polling mode */
1535 if (work_done < budget) {
1537 napi_complete(napi);
1538 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1539 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1541 if (test_bit(__AT_DOWN, &adapter->flags)) {
1542 atomic_dec(&adapter->irq_sem);
1543 netdev_err(adapter->netdev,
1544 "atl1e_clean is called when AT_DOWN\n");
1546 /* reenable RX intr */
1547 /*atl1e_irq_enable(adapter); */
1553 #ifdef CONFIG_NET_POLL_CONTROLLER
1556 * Polling 'interrupt' - used by things like netconsole to send skbs
1557 * without having to re-enable interrupts. It's not called while
1558 * the interrupt routine is executing.
1560 static void atl1e_netpoll(struct net_device *netdev)
1562 struct atl1e_adapter *adapter = netdev_priv(netdev);
1564 disable_irq(adapter->pdev->irq);
1565 atl1e_intr(adapter->pdev->irq, netdev);
1566 enable_irq(adapter->pdev->irq);
1570 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1572 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1573 u16 next_to_use = 0;
1574 u16 next_to_clean = 0;
1576 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1577 next_to_use = tx_ring->next_to_use;
1579 return (u16)(next_to_clean > next_to_use) ?
1580 (next_to_clean - next_to_use - 1) :
1581 (tx_ring->count + next_to_clean - next_to_use - 1);
1585 * get next usable tpd
1586 * Note: should call atl1e_tdp_avail to make sure
1587 * there is enough tpd to use
1589 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1591 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1592 u16 next_to_use = 0;
1594 next_to_use = tx_ring->next_to_use;
1595 if (++tx_ring->next_to_use == tx_ring->count)
1596 tx_ring->next_to_use = 0;
1598 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1599 return &tx_ring->desc[next_to_use];
1602 static struct atl1e_tx_buffer *
1603 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1605 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1607 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1610 /* Calculate the transmit packet descript needed*/
1611 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1616 u16 proto_hdr_len = 0;
1618 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1619 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1620 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1623 if (skb_is_gso(skb)) {
1624 if (skb->protocol == htons(ETH_P_IP) ||
1625 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1626 proto_hdr_len = skb_transport_offset(skb) +
1628 if (proto_hdr_len < skb_headlen(skb)) {
1629 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1630 MAX_TX_BUF_LEN - 1) >>
1639 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1640 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1642 unsigned short offload_type;
1646 if (skb_is_gso(skb)) {
1649 err = skb_cow_head(skb, 0);
1653 offload_type = skb_shinfo(skb)->gso_type;
1655 if (offload_type & SKB_GSO_TCPV4) {
1656 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1657 + ntohs(ip_hdr(skb)->tot_len));
1659 if (real_len < skb->len)
1660 pskb_trim(skb, real_len);
1662 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1663 if (unlikely(skb->len == hdr_len)) {
1664 /* only xsum need */
1665 netdev_warn(adapter->netdev,
1666 "IPV4 tso with zero data??\n");
1669 ip_hdr(skb)->check = 0;
1670 ip_hdr(skb)->tot_len = 0;
1671 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1675 tpd->word3 |= (ip_hdr(skb)->ihl &
1676 TDP_V4_IPHL_MASK) <<
1678 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1679 TPD_TCPHDRLEN_MASK) <<
1680 TPD_TCPHDRLEN_SHIFT;
1681 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1682 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1683 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1690 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1693 cso = skb_checksum_start_offset(skb);
1694 if (unlikely(cso & 0x1)) {
1695 netdev_err(adapter->netdev,
1696 "payload offset should not ant event number\n");
1699 css = cso + skb->csum_offset;
1700 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1701 TPD_PLOADOFFSET_SHIFT;
1702 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1703 TPD_CCSUMOFFSET_SHIFT;
1704 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1711 static int atl1e_tx_map(struct atl1e_adapter *adapter,
1712 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1714 struct atl1e_tpd_desc *use_tpd = NULL;
1715 struct atl1e_tx_buffer *tx_buffer = NULL;
1716 u16 buf_len = skb_headlen(skb);
1723 int ring_start = adapter->tx_ring.next_to_use;
1726 nr_frags = skb_shinfo(skb)->nr_frags;
1727 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1730 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1733 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1734 tx_buffer->length = map_len;
1735 tx_buffer->dma = pci_map_single(adapter->pdev,
1736 skb->data, hdr_len, PCI_DMA_TODEVICE);
1737 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma))
1740 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1741 mapped_len += map_len;
1742 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1743 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1744 ((cpu_to_le32(tx_buffer->length) &
1745 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1748 while (mapped_len < buf_len) {
1749 /* mapped_len == 0, means we should use the first tpd,
1750 which is given by caller */
1751 if (mapped_len == 0) {
1754 use_tpd = atl1e_get_tpd(adapter);
1755 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1757 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1758 tx_buffer->skb = NULL;
1760 tx_buffer->length = map_len =
1761 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1762 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1764 pci_map_single(adapter->pdev, skb->data + mapped_len,
1765 map_len, PCI_DMA_TODEVICE);
1767 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1768 /* We need to unwind the mappings we've done */
1769 ring_end = adapter->tx_ring.next_to_use;
1770 adapter->tx_ring.next_to_use = ring_start;
1771 while (adapter->tx_ring.next_to_use != ring_end) {
1772 tpd = atl1e_get_tpd(adapter);
1773 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1774 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1775 tx_buffer->length, PCI_DMA_TODEVICE);
1777 /* Reset the tx rings next pointer */
1778 adapter->tx_ring.next_to_use = ring_start;
1782 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1783 mapped_len += map_len;
1784 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1785 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1786 ((cpu_to_le32(tx_buffer->length) &
1787 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1790 for (f = 0; f < nr_frags; f++) {
1791 const struct skb_frag_struct *frag;
1795 frag = &skb_shinfo(skb)->frags[f];
1796 buf_len = skb_frag_size(frag);
1798 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1799 for (i = 0; i < seg_num; i++) {
1800 use_tpd = atl1e_get_tpd(adapter);
1801 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1803 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1804 BUG_ON(tx_buffer->skb);
1806 tx_buffer->skb = NULL;
1808 (buf_len > MAX_TX_BUF_LEN) ?
1809 MAX_TX_BUF_LEN : buf_len;
1810 buf_len -= tx_buffer->length;
1812 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1814 (i * MAX_TX_BUF_LEN),
1818 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
1819 /* We need to unwind the mappings we've done */
1820 ring_end = adapter->tx_ring.next_to_use;
1821 adapter->tx_ring.next_to_use = ring_start;
1822 while (adapter->tx_ring.next_to_use != ring_end) {
1823 tpd = atl1e_get_tpd(adapter);
1824 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1825 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1826 tx_buffer->length, DMA_TO_DEVICE);
1829 /* Reset the ring next to use pointer */
1830 adapter->tx_ring.next_to_use = ring_start;
1834 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1835 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1836 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1837 ((cpu_to_le32(tx_buffer->length) &
1838 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1842 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1843 /* note this one is a tcp header */
1844 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1847 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1848 /* The last buffer info contain the skb address,
1849 so it will be free after unmap */
1850 tx_buffer->skb = skb;
1854 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1855 struct atl1e_tpd_desc *tpd)
1857 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1858 /* Force memory writes to complete before letting h/w
1859 * know there are new descriptors to fetch. (Only
1860 * applicable for weak-ordered memory model archs,
1861 * such as IA-64). */
1863 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1866 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1867 struct net_device *netdev)
1869 struct atl1e_adapter *adapter = netdev_priv(netdev);
1871 struct atl1e_tpd_desc *tpd;
1873 if (test_bit(__AT_DOWN, &adapter->flags)) {
1874 dev_kfree_skb_any(skb);
1875 return NETDEV_TX_OK;
1878 if (unlikely(skb->len <= 0)) {
1879 dev_kfree_skb_any(skb);
1880 return NETDEV_TX_OK;
1882 tpd_req = atl1e_cal_tdp_req(skb);
1884 if (atl1e_tpd_avail(adapter) < tpd_req) {
1885 /* no enough descriptor, just stop queue */
1886 netif_stop_queue(netdev);
1887 return NETDEV_TX_BUSY;
1890 tpd = atl1e_get_tpd(adapter);
1892 if (skb_vlan_tag_present(skb)) {
1893 u16 vlan_tag = skb_vlan_tag_get(skb);
1896 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1897 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1898 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1902 if (skb->protocol == htons(ETH_P_8021Q))
1903 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1905 if (skb_network_offset(skb) != ETH_HLEN)
1906 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1908 /* do TSO and check sum */
1909 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1910 dev_kfree_skb_any(skb);
1911 return NETDEV_TX_OK;
1914 if (atl1e_tx_map(adapter, skb, tpd)) {
1915 dev_kfree_skb_any(skb);
1919 atl1e_tx_queue(adapter, tpd_req, tpd);
1921 return NETDEV_TX_OK;
1924 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1926 struct net_device *netdev = adapter->netdev;
1928 free_irq(adapter->pdev->irq, netdev);
1931 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1933 struct pci_dev *pdev = adapter->pdev;
1934 struct net_device *netdev = adapter->netdev;
1937 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name,
1940 netdev_dbg(adapter->netdev,
1941 "Unable to allocate interrupt Error: %d\n", err);
1944 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1948 int atl1e_up(struct atl1e_adapter *adapter)
1950 struct net_device *netdev = adapter->netdev;
1954 /* hardware has been reset, we need to reload some things */
1955 err = atl1e_init_hw(&adapter->hw);
1960 atl1e_init_ring_ptrs(adapter);
1961 atl1e_set_multi(netdev);
1962 atl1e_restore_vlan(adapter);
1964 if (atl1e_configure(adapter)) {
1969 clear_bit(__AT_DOWN, &adapter->flags);
1970 napi_enable(&adapter->napi);
1971 atl1e_irq_enable(adapter);
1972 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1973 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1974 val | MASTER_CTRL_MANUAL_INT);
1980 void atl1e_down(struct atl1e_adapter *adapter)
1982 struct net_device *netdev = adapter->netdev;
1984 /* signal that we're down so the interrupt handler does not
1985 * reschedule our watchdog timer */
1986 set_bit(__AT_DOWN, &adapter->flags);
1988 netif_stop_queue(netdev);
1990 /* reset MAC to disable all RX/TX */
1991 atl1e_reset_hw(&adapter->hw);
1994 napi_disable(&adapter->napi);
1995 atl1e_del_timer(adapter);
1996 atl1e_irq_disable(adapter);
1998 netif_carrier_off(netdev);
1999 adapter->link_speed = SPEED_0;
2000 adapter->link_duplex = -1;
2001 atl1e_clean_tx_ring(adapter);
2002 atl1e_clean_rx_ring(adapter);
2006 * atl1e_open - Called when a network interface is made active
2007 * @netdev: network interface device structure
2009 * Returns 0 on success, negative value on failure
2011 * The open entry point is called when a network interface is made
2012 * active by the system (IFF_UP). At this point all resources needed
2013 * for transmit and receive operations are allocated, the interrupt
2014 * handler is registered with the OS, the watchdog timer is started,
2015 * and the stack is notified that the interface is ready.
2017 static int atl1e_open(struct net_device *netdev)
2019 struct atl1e_adapter *adapter = netdev_priv(netdev);
2022 /* disallow open during test */
2023 if (test_bit(__AT_TESTING, &adapter->flags))
2026 /* allocate rx/tx dma buffer & descriptors */
2027 atl1e_init_ring_resources(adapter);
2028 err = atl1e_setup_ring_resources(adapter);
2032 err = atl1e_request_irq(adapter);
2036 err = atl1e_up(adapter);
2043 atl1e_free_irq(adapter);
2045 atl1e_free_ring_resources(adapter);
2046 atl1e_reset_hw(&adapter->hw);
2052 * atl1e_close - Disables a network interface
2053 * @netdev: network interface device structure
2055 * Returns 0, this is not allowed to fail
2057 * The close entry point is called when an interface is de-activated
2058 * by the OS. The hardware is still under the drivers control, but
2059 * needs to be disabled. A global MAC reset is issued to stop the
2060 * hardware, and all transmit and receive resources are freed.
2062 static int atl1e_close(struct net_device *netdev)
2064 struct atl1e_adapter *adapter = netdev_priv(netdev);
2066 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2067 atl1e_down(adapter);
2068 atl1e_free_irq(adapter);
2069 atl1e_free_ring_resources(adapter);
2074 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2076 struct net_device *netdev = pci_get_drvdata(pdev);
2077 struct atl1e_adapter *adapter = netdev_priv(netdev);
2078 struct atl1e_hw *hw = &adapter->hw;
2080 u32 mac_ctrl_data = 0;
2081 u32 wol_ctrl_data = 0;
2082 u16 mii_advertise_data = 0;
2083 u16 mii_bmsr_data = 0;
2084 u16 mii_intr_status_data = 0;
2085 u32 wufc = adapter->wol;
2091 if (netif_running(netdev)) {
2092 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2093 atl1e_down(adapter);
2095 netif_device_detach(netdev);
2098 retval = pci_save_state(pdev);
2104 /* get link status */
2105 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2106 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2108 mii_advertise_data = ADVERTISE_10HALF;
2110 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2111 (atl1e_write_phy_reg(hw,
2112 MII_ADVERTISE, mii_advertise_data) != 0) ||
2113 (atl1e_phy_commit(hw)) != 0) {
2114 netdev_dbg(adapter->netdev, "set phy register failed\n");
2118 hw->phy_configured = false; /* re-init PHY when resume */
2120 /* turn on magic packet wol */
2121 if (wufc & AT_WUFC_MAG)
2122 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2124 if (wufc & AT_WUFC_LNKC) {
2125 /* if orignal link status is link, just wait for retrive link */
2126 if (mii_bmsr_data & BMSR_LSTATUS) {
2127 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2129 atl1e_read_phy_reg(hw, MII_BMSR,
2131 if (mii_bmsr_data & BMSR_LSTATUS)
2135 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2136 netdev_dbg(adapter->netdev,
2137 "Link may change when suspend\n");
2139 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2140 /* only link up can wake up */
2141 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2142 netdev_dbg(adapter->netdev,
2143 "read write phy register failed\n");
2147 /* clear phy interrupt */
2148 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2149 /* Config MAC Ctrl register */
2150 mac_ctrl_data = MAC_CTRL_RX_EN;
2151 /* set to 10/100M halt duplex */
2152 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2153 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2154 MAC_CTRL_PRMLEN_MASK) <<
2155 MAC_CTRL_PRMLEN_SHIFT);
2157 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2159 /* magic packet maybe Broadcast&multicast&Unicast frame */
2160 if (wufc & AT_WUFC_MAG)
2161 mac_ctrl_data |= MAC_CTRL_BC_EN;
2163 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2166 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2167 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2169 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2170 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2171 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2172 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2178 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2181 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2182 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2183 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2186 hw->phy_configured = false; /* re-init PHY when resume */
2188 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2192 if (netif_running(netdev))
2193 atl1e_free_irq(adapter);
2195 pci_disable_device(pdev);
2197 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2203 static int atl1e_resume(struct pci_dev *pdev)
2205 struct net_device *netdev = pci_get_drvdata(pdev);
2206 struct atl1e_adapter *adapter = netdev_priv(netdev);
2209 pci_set_power_state(pdev, PCI_D0);
2210 pci_restore_state(pdev);
2212 err = pci_enable_device(pdev);
2214 netdev_err(adapter->netdev,
2215 "Cannot enable PCI device from suspend\n");
2219 pci_set_master(pdev);
2221 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2223 pci_enable_wake(pdev, PCI_D3hot, 0);
2224 pci_enable_wake(pdev, PCI_D3cold, 0);
2226 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2228 if (netif_running(netdev)) {
2229 err = atl1e_request_irq(adapter);
2234 atl1e_reset_hw(&adapter->hw);
2236 if (netif_running(netdev))
2239 netif_device_attach(netdev);
2245 static void atl1e_shutdown(struct pci_dev *pdev)
2247 atl1e_suspend(pdev, PMSG_SUSPEND);
2250 static const struct net_device_ops atl1e_netdev_ops = {
2251 .ndo_open = atl1e_open,
2252 .ndo_stop = atl1e_close,
2253 .ndo_start_xmit = atl1e_xmit_frame,
2254 .ndo_get_stats = atl1e_get_stats,
2255 .ndo_set_rx_mode = atl1e_set_multi,
2256 .ndo_validate_addr = eth_validate_addr,
2257 .ndo_set_mac_address = atl1e_set_mac_addr,
2258 .ndo_fix_features = atl1e_fix_features,
2259 .ndo_set_features = atl1e_set_features,
2260 .ndo_change_mtu = atl1e_change_mtu,
2261 .ndo_do_ioctl = atl1e_ioctl,
2262 .ndo_tx_timeout = atl1e_tx_timeout,
2263 #ifdef CONFIG_NET_POLL_CONTROLLER
2264 .ndo_poll_controller = atl1e_netpoll,
2269 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2271 SET_NETDEV_DEV(netdev, &pdev->dev);
2272 pci_set_drvdata(pdev, netdev);
2274 netdev->netdev_ops = &atl1e_netdev_ops;
2276 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2277 atl1e_set_ethtool_ops(netdev);
2279 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2280 NETIF_F_HW_VLAN_CTAG_RX;
2281 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX;
2282 /* not enabled by default */
2283 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
2288 * atl1e_probe - Device Initialization Routine
2289 * @pdev: PCI device information struct
2290 * @ent: entry in atl1e_pci_tbl
2292 * Returns 0 on success, negative on failure
2294 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2295 * The OS initialization, configuring of the adapter private structure,
2296 * and a hardware reset occur.
2298 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2300 struct net_device *netdev;
2301 struct atl1e_adapter *adapter = NULL;
2302 static int cards_found;
2306 err = pci_enable_device(pdev);
2308 dev_err(&pdev->dev, "cannot enable PCI device\n");
2313 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2314 * shared register for the high 32 bits, so only a single, aligned,
2315 * 4 GB physical address range can be used at a time.
2317 * Supporting 64-bit DMA on this hardware is more trouble than it's
2318 * worth. It is far easier to limit to 32-bit DMA than update
2319 * various kernel subsystems to support the mechanics required by a
2320 * fixed-high-32-bit system.
2322 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2323 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2324 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2328 err = pci_request_regions(pdev, atl1e_driver_name);
2330 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2334 pci_set_master(pdev);
2336 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2337 if (netdev == NULL) {
2339 goto err_alloc_etherdev;
2342 err = atl1e_init_netdev(netdev, pdev);
2344 netdev_err(netdev, "init netdevice failed\n");
2345 goto err_init_netdev;
2347 adapter = netdev_priv(netdev);
2348 adapter->bd_number = cards_found;
2349 adapter->netdev = netdev;
2350 adapter->pdev = pdev;
2351 adapter->hw.adapter = adapter;
2352 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2353 if (!adapter->hw.hw_addr) {
2355 netdev_err(netdev, "cannot map device registers\n");
2360 adapter->mii.dev = netdev;
2361 adapter->mii.mdio_read = atl1e_mdio_read;
2362 adapter->mii.mdio_write = atl1e_mdio_write;
2363 adapter->mii.phy_id_mask = 0x1f;
2364 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2366 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2368 setup_timer(&adapter->phy_config_timer, atl1e_phy_config,
2369 (unsigned long)adapter);
2371 /* get user settings */
2372 atl1e_check_options(adapter);
2374 * Mark all PCI regions associated with PCI device
2375 * pdev as being reserved by owner atl1e_driver_name
2376 * Enables bus-mastering on the device and calls
2377 * pcibios_set_master to do the needed arch specific settings
2379 atl1e_setup_pcicmd(pdev);
2380 /* setup the private structure */
2381 err = atl1e_sw_init(adapter);
2383 netdev_err(netdev, "net device private data init failed\n");
2387 /* Init GPHY as early as possible due to power saving issue */
2388 atl1e_phy_init(&adapter->hw);
2389 /* reset the controller to
2390 * put the device in a known good starting state */
2391 err = atl1e_reset_hw(&adapter->hw);
2397 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2399 netdev_err(netdev, "get mac address failed\n");
2403 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2404 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2406 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2407 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2408 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE);
2409 err = register_netdev(netdev);
2411 netdev_err(netdev, "register netdevice failed\n");
2415 /* assume we have no link for now */
2416 netif_stop_queue(netdev);
2417 netif_carrier_off(netdev);
2427 pci_iounmap(pdev, adapter->hw.hw_addr);
2430 free_netdev(netdev);
2432 pci_release_regions(pdev);
2435 pci_disable_device(pdev);
2440 * atl1e_remove - Device Removal Routine
2441 * @pdev: PCI device information struct
2443 * atl1e_remove is called by the PCI subsystem to alert the driver
2444 * that it should release a PCI device. The could be caused by a
2445 * Hot-Plug event, or because the driver is going to be removed from
2448 static void atl1e_remove(struct pci_dev *pdev)
2450 struct net_device *netdev = pci_get_drvdata(pdev);
2451 struct atl1e_adapter *adapter = netdev_priv(netdev);
2454 * flush_scheduled work may reschedule our watchdog task, so
2455 * explicitly disable watchdog tasks from being rescheduled
2457 set_bit(__AT_DOWN, &adapter->flags);
2459 atl1e_del_timer(adapter);
2460 atl1e_cancel_work(adapter);
2462 unregister_netdev(netdev);
2463 atl1e_free_ring_resources(adapter);
2464 atl1e_force_ps(&adapter->hw);
2465 pci_iounmap(pdev, adapter->hw.hw_addr);
2466 pci_release_regions(pdev);
2467 free_netdev(netdev);
2468 pci_disable_device(pdev);
2472 * atl1e_io_error_detected - called when PCI error is detected
2473 * @pdev: Pointer to PCI device
2474 * @state: The current pci connection state
2476 * This function is called after a PCI bus error affecting
2477 * this device has been detected.
2479 static pci_ers_result_t
2480 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2482 struct net_device *netdev = pci_get_drvdata(pdev);
2483 struct atl1e_adapter *adapter = netdev_priv(netdev);
2485 netif_device_detach(netdev);
2487 if (state == pci_channel_io_perm_failure)
2488 return PCI_ERS_RESULT_DISCONNECT;
2490 if (netif_running(netdev))
2491 atl1e_down(adapter);
2493 pci_disable_device(pdev);
2495 /* Request a slot slot reset. */
2496 return PCI_ERS_RESULT_NEED_RESET;
2500 * atl1e_io_slot_reset - called after the pci bus has been reset.
2501 * @pdev: Pointer to PCI device
2503 * Restart the card from scratch, as if from a cold-boot. Implementation
2504 * resembles the first-half of the e1000_resume routine.
2506 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2508 struct net_device *netdev = pci_get_drvdata(pdev);
2509 struct atl1e_adapter *adapter = netdev_priv(netdev);
2511 if (pci_enable_device(pdev)) {
2512 netdev_err(adapter->netdev,
2513 "Cannot re-enable PCI device after reset\n");
2514 return PCI_ERS_RESULT_DISCONNECT;
2516 pci_set_master(pdev);
2518 pci_enable_wake(pdev, PCI_D3hot, 0);
2519 pci_enable_wake(pdev, PCI_D3cold, 0);
2521 atl1e_reset_hw(&adapter->hw);
2523 return PCI_ERS_RESULT_RECOVERED;
2527 * atl1e_io_resume - called when traffic can start flowing again.
2528 * @pdev: Pointer to PCI device
2530 * This callback is called when the error recovery driver tells us that
2531 * its OK to resume normal operation. Implementation resembles the
2532 * second-half of the atl1e_resume routine.
2534 static void atl1e_io_resume(struct pci_dev *pdev)
2536 struct net_device *netdev = pci_get_drvdata(pdev);
2537 struct atl1e_adapter *adapter = netdev_priv(netdev);
2539 if (netif_running(netdev)) {
2540 if (atl1e_up(adapter)) {
2541 netdev_err(adapter->netdev,
2542 "can't bring device back up after reset\n");
2547 netif_device_attach(netdev);
2550 static const struct pci_error_handlers atl1e_err_handler = {
2551 .error_detected = atl1e_io_error_detected,
2552 .slot_reset = atl1e_io_slot_reset,
2553 .resume = atl1e_io_resume,
2556 static struct pci_driver atl1e_driver = {
2557 .name = atl1e_driver_name,
2558 .id_table = atl1e_pci_tbl,
2559 .probe = atl1e_probe,
2560 .remove = atl1e_remove,
2561 /* Power Management Hooks */
2563 .suspend = atl1e_suspend,
2564 .resume = atl1e_resume,
2566 .shutdown = atl1e_shutdown,
2567 .err_handler = &atl1e_err_handler
2570 module_pci_driver(atl1e_driver);