1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * emac-rockchip.c - Rockchip EMAC specific glue layer
5 * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
8 #include <linux/etherdevice.h>
9 #include <linux/mfd/syscon.h>
10 #include <linux/module.h>
11 #include <linux/of_net.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/regulator/consumer.h>
18 #define DRV_NAME "rockchip_emac"
20 struct emac_rockchip_soc_data {
21 unsigned int grf_offset;
22 unsigned int grf_mode_offset;
23 unsigned int grf_speed_offset;
27 struct rockchip_priv_data {
28 struct arc_emac_priv emac;
30 const struct emac_rockchip_soc_data *soc_data;
31 struct regulator *regulator;
36 static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
38 struct rockchip_priv_data *emac = priv;
39 u32 speed_offset = emac->soc_data->grf_speed_offset;
45 data = (1 << (speed_offset + 16)) | (0 << speed_offset);
48 data = (1 << (speed_offset + 16)) | (1 << speed_offset);
51 pr_err("speed %u not supported\n", speed);
55 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
57 pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
60 static const struct emac_rockchip_soc_data emac_rk3036_emac_data = {
61 .grf_offset = 0x140, .grf_mode_offset = 8,
62 .grf_speed_offset = 9, .need_div_macclk = 1,
65 static const struct emac_rockchip_soc_data emac_rk3066_emac_data = {
66 .grf_offset = 0x154, .grf_mode_offset = 0,
67 .grf_speed_offset = 1, .need_div_macclk = 0,
70 static const struct emac_rockchip_soc_data emac_rk3188_emac_data = {
71 .grf_offset = 0x0a4, .grf_mode_offset = 0,
72 .grf_speed_offset = 1, .need_div_macclk = 0,
75 static const struct of_device_id emac_rockchip_dt_ids[] = {
77 .compatible = "rockchip,rk3036-emac",
78 .data = &emac_rk3036_emac_data,
81 .compatible = "rockchip,rk3066-emac",
82 .data = &emac_rk3066_emac_data,
85 .compatible = "rockchip,rk3188-emac",
86 .data = &emac_rk3188_emac_data,
91 MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
93 static int emac_rockchip_probe(struct platform_device *pdev)
95 struct device *dev = &pdev->dev;
96 struct net_device *ndev;
97 struct rockchip_priv_data *priv;
98 const struct of_device_id *match;
99 phy_interface_t interface;
103 if (!pdev->dev.of_node)
106 ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
109 platform_set_drvdata(pdev, ndev);
110 SET_NETDEV_DEV(ndev, dev);
112 priv = netdev_priv(ndev);
113 priv->emac.drv_name = DRV_NAME;
114 priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
116 err = of_get_phy_mode(dev->of_node, &interface);
120 /* RK3036/RK3066/RK3188 SoCs only support RMII */
121 if (interface != PHY_INTERFACE_MODE_RMII) {
122 dev_err(dev, "unsupported phy interface mode %d\n", interface);
127 priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
129 if (IS_ERR(priv->grf)) {
130 dev_err(dev, "failed to retrieve global register file (%ld)\n",
132 err = PTR_ERR(priv->grf);
136 match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
137 priv->soc_data = match->data;
139 priv->emac.clk = devm_clk_get(dev, "hclk");
140 if (IS_ERR(priv->emac.clk)) {
141 dev_err(dev, "failed to retrieve host clock (%ld)\n",
142 PTR_ERR(priv->emac.clk));
143 err = PTR_ERR(priv->emac.clk);
147 priv->refclk = devm_clk_get(dev, "macref");
148 if (IS_ERR(priv->refclk)) {
149 dev_err(dev, "failed to retrieve reference clock (%ld)\n",
150 PTR_ERR(priv->refclk));
151 err = PTR_ERR(priv->refclk);
155 err = clk_prepare_enable(priv->refclk);
157 dev_err(dev, "failed to enable reference clock (%d)\n", err);
161 /* Optional regulator for PHY */
162 priv->regulator = devm_regulator_get_optional(dev, "phy");
163 if (IS_ERR(priv->regulator)) {
164 if (PTR_ERR(priv->regulator) == -EPROBE_DEFER) {
166 goto out_clk_disable;
168 dev_err(dev, "no regulator found\n");
169 priv->regulator = NULL;
172 if (priv->regulator) {
173 err = regulator_enable(priv->regulator);
175 dev_err(dev, "failed to enable phy-supply (%d)\n", err);
176 goto out_clk_disable;
181 data = (1 << (priv->soc_data->grf_speed_offset + 16)) |
182 (1 << priv->soc_data->grf_speed_offset);
184 data |= (1 << (priv->soc_data->grf_mode_offset + 16)) |
185 (0 << priv->soc_data->grf_mode_offset);
187 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
189 dev_err(dev, "unable to apply initial settings to grf (%d)\n",
191 goto out_regulator_disable;
194 /* RMII interface needs always a rate of 50MHz */
195 err = clk_set_rate(priv->refclk, 50000000);
198 "failed to change reference clock rate (%d)\n", err);
199 goto out_regulator_disable;
202 if (priv->soc_data->need_div_macclk) {
203 priv->macclk = devm_clk_get(dev, "macclk");
204 if (IS_ERR(priv->macclk)) {
205 dev_err(dev, "failed to retrieve mac clock (%ld)\n",
206 PTR_ERR(priv->macclk));
207 err = PTR_ERR(priv->macclk);
208 goto out_regulator_disable;
211 err = clk_prepare_enable(priv->macclk);
213 dev_err(dev, "failed to enable mac clock (%d)\n", err);
214 goto out_regulator_disable;
217 /* RMII TX/RX needs always a rate of 25MHz */
218 err = clk_set_rate(priv->macclk, 25000000);
221 "failed to change mac clock rate (%d)\n", err);
222 goto out_clk_disable_macclk;
226 err = arc_emac_probe(ndev, interface);
228 dev_err(dev, "failed to probe arc emac (%d)\n", err);
229 goto out_clk_disable_macclk;
234 out_clk_disable_macclk:
235 if (priv->soc_data->need_div_macclk)
236 clk_disable_unprepare(priv->macclk);
237 out_regulator_disable:
239 regulator_disable(priv->regulator);
241 clk_disable_unprepare(priv->refclk);
247 static int emac_rockchip_remove(struct platform_device *pdev)
249 struct net_device *ndev = platform_get_drvdata(pdev);
250 struct rockchip_priv_data *priv = netdev_priv(ndev);
253 err = arc_emac_remove(ndev);
255 clk_disable_unprepare(priv->refclk);
258 regulator_disable(priv->regulator);
260 if (priv->soc_data->need_div_macclk)
261 clk_disable_unprepare(priv->macclk);
267 static struct platform_driver emac_rockchip_driver = {
268 .probe = emac_rockchip_probe,
269 .remove = emac_rockchip_remove,
272 .of_match_table = emac_rockchip_dt_ids,
276 module_platform_driver(emac_rockchip_driver);
278 MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
279 MODULE_DESCRIPTION("Rockchip EMAC platform driver");
280 MODULE_LICENSE("GPL");