2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
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10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
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15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/delay.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/gfp.h>
39 #include <linux/sched.h>
40 #include <linux/sizes.h>
41 #include <linux/spinlock.h>
42 #include <linux/types.h>
43 #include <linux/wait.h>
44 #include <linux/netdevice.h>
46 #include "ena_common_defs.h"
47 #include "ena_admin_defs.h"
48 #include "ena_eth_io_defs.h"
49 #include "ena_regs_defs.h"
52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
54 #define ENA_MAX_NUM_IO_QUEUES 128U
55 /* We need to queues for each IO (on for Tx and one for Rx) */
56 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
58 #define ENA_MAX_HANDLERS 256
60 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
63 #define ENA_REG_READ_TIMEOUT 200000
65 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
66 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
67 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
69 /*****************************************************************************/
70 /*****************************************************************************/
71 /* ENA adaptive interrupt moderation settings */
73 #define ENA_INTR_LOWEST_USECS (0)
74 #define ENA_INTR_LOWEST_PKTS (3)
75 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
77 #define ENA_INTR_LOW_USECS (32)
78 #define ENA_INTR_LOW_PKTS (12)
79 #define ENA_INTR_LOW_BYTES (16 * 1024)
81 #define ENA_INTR_MID_USECS (80)
82 #define ENA_INTR_MID_PKTS (48)
83 #define ENA_INTR_MID_BYTES (64 * 1024)
85 #define ENA_INTR_HIGH_USECS (128)
86 #define ENA_INTR_HIGH_PKTS (96)
87 #define ENA_INTR_HIGH_BYTES (128 * 1024)
89 #define ENA_INTR_HIGHEST_USECS (192)
90 #define ENA_INTR_HIGHEST_PKTS (128)
91 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
93 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
94 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
95 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
96 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
97 #define ENA_INTR_MODER_LEVEL_STRIDE 2
98 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
100 enum ena_intr_moder_level {
101 ENA_INTR_MODER_LOWEST = 0,
105 ENA_INTR_MODER_HIGHEST,
106 ENA_INTR_MAX_NUM_OF_LEVELS,
109 struct ena_intr_moder_entry {
110 unsigned int intr_moder_interval;
111 unsigned int pkts_per_interval;
112 unsigned int bytes_per_interval;
115 enum queue_direction {
116 ENA_COM_IO_QUEUE_DIRECTION_TX,
117 ENA_COM_IO_QUEUE_DIRECTION_RX
121 dma_addr_t paddr; /**< Buffer physical address */
122 u16 len; /**< Buffer length in bytes */
125 struct ena_com_rx_buf_info {
130 struct ena_com_io_desc_addr {
131 u8 __iomem *pbuf_dev_addr; /* LLQ address */
133 dma_addr_t phys_addr;
136 struct ena_com_tx_meta {
140 u16 l4_hdr_len; /* In words */
143 struct ena_com_io_cq {
144 struct ena_com_io_desc_addr cdesc_addr;
146 /* Interrupt unmask register */
147 u32 __iomem *unmask_reg;
149 /* The completion queue head doorbell register */
150 u32 __iomem *cq_head_db_reg;
152 /* numa configuration register (for TPH) */
153 u32 __iomem *numa_node_cfg_reg;
155 /* The value to write to the above register to unmask
156 * the interrupt of this queue
160 enum queue_direction direction;
162 /* holds the number of cdesc of the current packet */
163 u16 cur_rx_pkt_cdesc_count;
164 /* save the firt cdesc idx of the current packet */
165 u16 cur_rx_pkt_cdesc_start_idx;
171 /* Device queue index */
174 u16 last_head_update;
176 u8 cdesc_entry_size_in_bytes;
178 } ____cacheline_aligned;
180 struct ena_com_io_sq {
181 struct ena_com_io_desc_addr desc_addr;
183 u32 __iomem *db_addr;
184 u8 __iomem *header_addr;
186 enum queue_direction direction;
187 enum ena_admin_placement_policy_type mem_queue_type;
190 struct ena_com_tx_meta cached_tx_meta;
198 u32 tx_max_header_size;
202 } ____cacheline_aligned;
204 struct ena_com_admin_cq {
205 struct ena_admin_acq_entry *entries;
212 struct ena_com_admin_sq {
213 struct ena_admin_aq_entry *entries;
216 u32 __iomem *db_addr;
224 struct ena_com_stats_admin {
232 struct ena_com_admin_queue {
234 spinlock_t q_lock; /* spinlock for the admin queue */
235 struct ena_comp_ctx *comp_ctx;
237 struct ena_com_admin_cq cq;
238 struct ena_com_admin_sq sq;
240 /* Indicate if the admin queue should poll for completion */
245 /* Indicate that the ena was initialized and can
246 * process new admin commands
250 /* Count the number of outstanding admin commands */
251 atomic_t outstanding_cmds;
253 struct ena_com_stats_admin stats;
256 struct ena_aenq_handlers;
258 struct ena_com_aenq {
261 struct ena_admin_aenq_entry *entries;
264 struct ena_aenq_handlers *aenq_handlers;
267 struct ena_com_mmio_read {
268 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
269 dma_addr_t read_resp_dma_addr;
271 bool readless_supported;
272 /* spin lock to ensure a single outstanding read */
278 u16 *host_rss_ind_tbl;
279 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
280 dma_addr_t rss_ind_tbl_dma_addr;
284 enum ena_admin_hash_functions hash_func;
285 struct ena_admin_feature_rss_flow_hash_control *hash_key;
286 dma_addr_t hash_key_dma_addr;
290 struct ena_admin_feature_rss_hash_control *hash_ctrl;
291 dma_addr_t hash_ctrl_dma_addr;
295 struct ena_host_attribute {
297 u8 *debug_area_virt_addr;
298 dma_addr_t debug_area_dma_addr;
301 /* Host information */
302 struct ena_admin_host_info *host_info;
303 dma_addr_t host_info_dma_addr;
306 /* Each ena_dev is a PCI function. */
308 struct ena_com_admin_queue admin_queue;
309 struct ena_com_aenq aenq;
310 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
311 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
313 void __iomem *mem_bar;
316 enum ena_admin_placement_policy_type tx_mem_queue_type;
317 u32 tx_max_header_size;
318 u16 stats_func; /* Selected function for extended statistic dump */
319 u16 stats_queue; /* Selected queue for extended statistic dump */
321 struct ena_com_mmio_read mmio_read;
324 u32 supported_features;
327 struct ena_host_attribute host_attr;
328 bool adaptive_coalescing;
329 u16 intr_delay_resolution;
330 u32 intr_moder_tx_interval;
331 struct ena_intr_moder_entry *intr_moder_tbl;
334 struct ena_com_dev_get_features_ctx {
335 struct ena_admin_queue_feature_desc max_queues;
336 struct ena_admin_device_attr_feature_desc dev_attr;
337 struct ena_admin_feature_aenq_desc aenq;
338 struct ena_admin_feature_offload_desc offload;
341 struct ena_com_create_io_ctx {
342 enum ena_admin_placement_policy_type mem_queue_type;
343 enum queue_direction direction;
350 typedef void (*ena_aenq_handler)(void *data,
351 struct ena_admin_aenq_entry *aenq_e);
353 /* Holds aenq handlers. Indexed by AENQ event group */
354 struct ena_aenq_handlers {
355 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
356 ena_aenq_handler unimplemented_handler;
359 /*****************************************************************************/
360 /*****************************************************************************/
362 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
363 * @ena_dev: ENA communication layer struct
365 * Initialize the register read mechanism.
367 * @note: This method must be the first stage in the initialization sequence.
369 * @return - 0 on success, negative value on failure.
371 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
373 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
374 * @ena_dev: ENA communication layer struct
375 * @readless_supported: readless mode (enable/disable)
377 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
378 bool readless_supported);
380 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
381 * value physical address.
382 * @ena_dev: ENA communication layer struct
384 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
386 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
387 * @ena_dev: ENA communication layer struct
389 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
391 /* ena_com_admin_init - Init the admin and the async queues
392 * @ena_dev: ENA communication layer struct
393 * @aenq_handlers: Those handlers to be called upon event.
394 * @init_spinlock: Indicate if this method should init the admin spinlock or
395 * the spinlock was init before (for example, in a case of FLR).
397 * Initialize the admin submission and completion queues.
398 * Initialize the asynchronous events notification queues.
400 * @return - 0 on success, negative value on failure.
402 int ena_com_admin_init(struct ena_com_dev *ena_dev,
403 struct ena_aenq_handlers *aenq_handlers,
406 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
407 * @ena_dev: ENA communication layer struct
409 * @note: Before calling this method, the caller must validate that the device
410 * won't send any additional admin completions/aenq.
411 * To achieve that, a FLR is recommended.
413 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
415 /* ena_com_dev_reset - Perform device FLR to the device.
416 * @ena_dev: ENA communication layer struct
418 * @return - 0 on success, negative value on failure.
420 int ena_com_dev_reset(struct ena_com_dev *ena_dev);
422 /* ena_com_create_io_queue - Create io queue.
423 * @ena_dev: ENA communication layer struct
424 * @ctx - create context structure
426 * Create the submission and the completion queues.
428 * @return - 0 on success, negative value on failure.
430 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
431 struct ena_com_create_io_ctx *ctx);
433 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
434 * @ena_dev: ENA communication layer struct
435 * @qid - the caller virtual queue id.
437 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
439 /* ena_com_get_io_handlers - Return the io queue handlers
440 * @ena_dev: ENA communication layer struct
441 * @qid - the caller virtual queue id.
442 * @io_sq - IO submission queue handler
443 * @io_cq - IO completion queue handler.
445 * @return - 0 on success, negative value on failure.
447 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
448 struct ena_com_io_sq **io_sq,
449 struct ena_com_io_cq **io_cq);
451 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
452 * @ena_dev: ENA communication layer struct
454 * After this method, aenq event can be received via AENQ.
456 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
458 /* ena_com_set_admin_running_state - Set the state of the admin queue
459 * @ena_dev: ENA communication layer struct
461 * Change the state of the admin queue (enable/disable)
463 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
465 /* ena_com_get_admin_running_state - Get the admin queue state
466 * @ena_dev: ENA communication layer struct
468 * Retrieve the state of the admin queue (enable/disable)
470 * @return - current polling mode (enable/disable)
472 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
474 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
475 * @ena_dev: ENA communication layer struct
476 * @polling: ENAble/Disable polling mode
478 * Set the admin completion mode.
480 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
482 /* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
483 * @ena_dev: ENA communication layer struct
485 * Get the admin completion mode.
486 * If polling mode is on, ena_com_execute_admin_command will perform a
487 * polling on the admin completion queue for the commands completion,
488 * otherwise it will wait on wait event.
492 bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
494 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
495 * @ena_dev: ENA communication layer struct
497 * This method go over the admin completion queue and wake up all the pending
498 * threads that wait on the commands wait event.
500 * @note: Should be called after MSI-X interrupt.
502 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
504 /* ena_com_aenq_intr_handler - AENQ interrupt handler
505 * @ena_dev: ENA communication layer struct
507 * This method go over the async event notification queue and call the proper
510 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
512 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
513 * @ena_dev: ENA communication layer struct
515 * This method aborts all the outstanding admin commands.
516 * The caller should then call ena_com_wait_for_abort_completion to make sure
517 * all the commands were completed.
519 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
521 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
522 * @ena_dev: ENA communication layer struct
524 * This method wait until all the outstanding admin commands will be completed.
526 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
528 /* ena_com_validate_version - Validate the device parameters
529 * @ena_dev: ENA communication layer struct
531 * This method validate the device parameters are the same as the saved
532 * parameters in ena_dev.
533 * This method is useful after device reset, to validate the device mac address
534 * and the device offloads are the same as before the reset.
536 * @return - 0 on success negative value otherwise.
538 int ena_com_validate_version(struct ena_com_dev *ena_dev);
540 /* ena_com_get_link_params - Retrieve physical link parameters.
541 * @ena_dev: ENA communication layer struct
542 * @resp: Link parameters
544 * Retrieve the physical link parameters,
545 * like speed, auto-negotiation and full duplex support.
547 * @return - 0 on Success negative value otherwise.
549 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
550 struct ena_admin_get_feat_resp *resp);
552 /* ena_com_get_dma_width - Retrieve physical dma address width the device
554 * @ena_dev: ENA communication layer struct
556 * Retrieve the maximum physical address bits the device can handle.
558 * @return: > 0 on Success and negative value otherwise.
560 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
562 /* ena_com_set_aenq_config - Set aenq groups configurations
563 * @ena_dev: ENA communication layer struct
564 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
566 * Configure which aenq event group the driver would like to receive.
568 * @return: 0 on Success and negative value otherwise.
570 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
572 /* ena_com_get_dev_attr_feat - Get device features
573 * @ena_dev: ENA communication layer struct
574 * @get_feat_ctx: returned context that contain the get features.
576 * @return: 0 on Success and negative value otherwise.
578 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
579 struct ena_com_dev_get_features_ctx *get_feat_ctx);
581 /* ena_com_get_dev_basic_stats - Get device basic statistics
582 * @ena_dev: ENA communication layer struct
583 * @stats: stats return value
585 * @return: 0 on Success and negative value otherwise.
587 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
588 struct ena_admin_basic_stats *stats);
590 /* ena_com_set_dev_mtu - Configure the device mtu.
591 * @ena_dev: ENA communication layer struct
594 * @return: 0 on Success and negative value otherwise.
596 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
598 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
599 * @ena_dev: ENA communication layer struct
600 * @offlad: offload return value
602 * @return: 0 on Success and negative value otherwise.
604 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
605 struct ena_admin_feature_offload_desc *offload);
607 /* ena_com_rss_init - Init RSS
608 * @ena_dev: ENA communication layer struct
609 * @log_size: indirection log size
611 * Allocate RSS/RFS resources.
612 * The caller then can configure rss using ena_com_set_hash_function,
613 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
615 * @return: 0 on Success and negative value otherwise.
617 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
619 /* ena_com_rss_destroy - Destroy rss
620 * @ena_dev: ENA communication layer struct
622 * Free all the RSS/RFS resources.
624 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
626 /* ena_com_get_current_hash_function - Get RSS hash function
627 * @ena_dev: ENA communication layer struct
629 * Return the current hash function.
630 * @return: 0 or one of the ena_admin_hash_functions values.
632 int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev);
634 /* ena_com_fill_hash_function - Fill RSS hash function
635 * @ena_dev: ENA communication layer struct
636 * @func: The hash function (Toeplitz or crc)
637 * @key: Hash key (for toeplitz hash)
638 * @key_len: key length (max length 10 DW)
639 * @init_val: initial value for the hash function
641 * Fill the ena_dev resources with the desire hash function, hash key, key_len
642 * and key initial value (if needed by the hash function).
643 * To flush the key into the device the caller should call
644 * ena_com_set_hash_function.
646 * @return: 0 on Success and negative value otherwise.
648 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
649 enum ena_admin_hash_functions func,
650 const u8 *key, u16 key_len, u32 init_val);
652 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
654 * @ena_dev: ENA communication layer struct
656 * Flush the hash function and it dependencies (key, key length and
657 * initial value) if needed.
659 * @note: Prior to this method the caller should call ena_com_fill_hash_function
661 * @return: 0 on Success and negative value otherwise.
663 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
665 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
667 * @ena_dev: ENA communication layer struct
668 * @func: hash function
671 * Retrieve the hash function and the hash key from the device.
673 * @note: If the caller called ena_com_fill_hash_function but didn't flash
674 * it to the device, the new configuration will be lost.
676 * @return: 0 on Success and negative value otherwise.
678 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
679 enum ena_admin_hash_functions *func,
682 /* ena_com_fill_hash_ctrl - Fill RSS hash control
683 * @ena_dev: ENA communication layer struct.
684 * @proto: The protocol to configure.
685 * @hash_fields: bit mask of ena_admin_flow_hash_fields
687 * Fill the ena_dev resources with the desire hash control (the ethernet
688 * fields that take part of the hash) for a specific protocol.
689 * To flush the hash control to the device, the caller should call
690 * ena_com_set_hash_ctrl.
692 * @return: 0 on Success and negative value otherwise.
694 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
695 enum ena_admin_flow_hash_proto proto,
698 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
699 * @ena_dev: ENA communication layer struct
701 * Flush the hash control (the ethernet fields that take part of the hash)
703 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
705 * @return: 0 on Success and negative value otherwise.
707 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
709 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
710 * @ena_dev: ENA communication layer struct
711 * @proto: The protocol to retrieve.
712 * @fields: bit mask of ena_admin_flow_hash_fields.
714 * Retrieve the hash control from the device.
716 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
717 * it to the device, the new configuration will be lost.
719 * @return: 0 on Success and negative value otherwise.
721 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
722 enum ena_admin_flow_hash_proto proto,
725 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
727 * @ena_dev: ENA communication layer struct
729 * Fill the ena_dev resources with the default hash control configuration.
730 * To flush the hash control to the device, the caller should call
731 * ena_com_set_hash_ctrl.
733 * @return: 0 on Success and negative value otherwise.
735 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
737 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
739 * @ena_dev: ENA communication layer struct.
740 * @entry_idx - indirection table entry.
741 * @entry_value - redirection value
743 * Fill a single entry of the RSS indirection table in the ena_dev resources.
744 * To flush the indirection table to the device, the called should call
745 * ena_com_indirect_table_set.
747 * @return: 0 on Success and negative value otherwise.
749 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
750 u16 entry_idx, u16 entry_value);
752 /* ena_com_indirect_table_set - Flush the indirection table to the device.
753 * @ena_dev: ENA communication layer struct
755 * Flush the indirection hash control to the device.
756 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
758 * @return: 0 on Success and negative value otherwise.
760 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
762 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
763 * @ena_dev: ENA communication layer struct
764 * @ind_tbl: indirection table
766 * Retrieve the RSS indirection table from the device.
768 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
769 * it to the device, the new configuration will be lost.
771 * @return: 0 on Success and negative value otherwise.
773 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
775 /* ena_com_allocate_host_info - Allocate host info resources.
776 * @ena_dev: ENA communication layer struct
778 * @return: 0 on Success and negative value otherwise.
780 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
782 /* ena_com_allocate_debug_area - Allocate debug area.
783 * @ena_dev: ENA communication layer struct
784 * @debug_area_size - debug area size.
786 * @return: 0 on Success and negative value otherwise.
788 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
789 u32 debug_area_size);
791 /* ena_com_delete_debug_area - Free the debug area resources.
792 * @ena_dev: ENA communication layer struct
794 * Free the allocate debug area.
796 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
798 /* ena_com_delete_host_info - Free the host info resources.
799 * @ena_dev: ENA communication layer struct
801 * Free the allocate host info.
803 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
805 /* ena_com_set_host_attributes - Update the device with the host
806 * attributes (debug area and host info) base address.
807 * @ena_dev: ENA communication layer struct
809 * @return: 0 on Success and negative value otherwise.
811 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
813 /* ena_com_create_io_cq - Create io completion queue.
814 * @ena_dev: ENA communication layer struct
815 * @io_cq - io completion queue handler
817 * Create IO completion queue.
819 * @return - 0 on success, negative value on failure.
821 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
822 struct ena_com_io_cq *io_cq);
824 /* ena_com_destroy_io_cq - Destroy io completion queue.
825 * @ena_dev: ENA communication layer struct
826 * @io_cq - io completion queue handler
828 * Destroy IO completion queue.
830 * @return - 0 on success, negative value on failure.
832 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
833 struct ena_com_io_cq *io_cq);
835 /* ena_com_execute_admin_command - Execute admin command
836 * @admin_queue: admin queue.
837 * @cmd: the admin command to execute.
838 * @cmd_size: the command size.
839 * @cmd_completion: command completion return value.
840 * @cmd_comp_size: command completion size.
842 * Submit an admin command and then wait until the device will return a
844 * The completion will be copyed into cmd_comp.
846 * @return - 0 on success, negative value on failure.
848 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
849 struct ena_admin_aq_entry *cmd,
851 struct ena_admin_acq_entry *cmd_comp,
852 size_t cmd_comp_size);
854 /* ena_com_init_interrupt_moderation - Init interrupt moderation
855 * @ena_dev: ENA communication layer struct
857 * @return - 0 on success, negative value on failure.
859 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
861 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
862 * @ena_dev: ENA communication layer struct
864 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
866 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
867 * capability is supported by the device.
869 * @return - supported or not.
871 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
873 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
874 * moderation table back to the default parameters.
875 * @ena_dev: ENA communication layer struct
877 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
879 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
880 * non-adaptive interval in Tx direction.
881 * @ena_dev: ENA communication layer struct
882 * @tx_coalesce_usecs: Interval in usec.
884 * @return - 0 on success, negative value on failure.
886 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
887 u32 tx_coalesce_usecs);
889 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
890 * non-adaptive interval in Rx direction.
891 * @ena_dev: ENA communication layer struct
892 * @rx_coalesce_usecs: Interval in usec.
894 * @return - 0 on success, negative value on failure.
896 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
897 u32 rx_coalesce_usecs);
899 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
900 * non-adaptive interval in Tx direction.
901 * @ena_dev: ENA communication layer struct
903 * @return - interval in usec
905 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
907 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
908 * non-adaptive interval in Rx direction.
909 * @ena_dev: ENA communication layer struct
911 * @return - interval in usec
913 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
915 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
917 * @ena_dev: ENA communication layer struct
918 * @level: Interrupt moderation table level
919 * @entry: Entry value
921 * Update a single entry in the interrupt moderation table.
923 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
924 enum ena_intr_moder_level level,
925 struct ena_intr_moder_entry *entry);
927 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
928 * @ena_dev: ENA communication layer struct
929 * @level: Interrupt moderation table level
930 * @entry: Entry to fill.
932 * Initialize the entry according to the adaptive interrupt moderation table.
934 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
935 enum ena_intr_moder_level level,
936 struct ena_intr_moder_entry *entry);
938 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
940 return ena_dev->adaptive_coalescing;
943 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
945 ena_dev->adaptive_coalescing = true;
948 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
950 ena_dev->adaptive_coalescing = false;
953 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
954 * @ena_dev: ENA communication layer struct
955 * @pkts: Number of packets since the last update
956 * @bytes: Number of bytes received since the last update.
957 * @smoothed_interval: Returned interval
958 * @moder_tbl_idx: Current table level as input update new level as return
961 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
964 unsigned int *smoothed_interval,
965 unsigned int *moder_tbl_idx)
967 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
968 struct ena_intr_moder_entry *curr_moder_entry;
969 struct ena_intr_moder_entry *pred_moder_entry;
970 struct ena_intr_moder_entry *new_moder_entry;
971 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
972 unsigned int interval;
974 /* We apply adaptive moderation on Rx path only.
975 * Tx uses static interrupt moderation.
978 /* Tx interrupt, or spurious interrupt,
979 * in both cases we just use same delay values
983 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
984 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
985 pr_err("Wrong moderation index %u\n", curr_moder_idx);
989 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
990 new_moder_idx = curr_moder_idx;
992 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
993 if ((pkts > curr_moder_entry->pkts_per_interval) ||
994 (bytes > curr_moder_entry->bytes_per_interval))
996 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
998 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1000 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1001 (bytes <= pred_moder_entry->bytes_per_interval))
1003 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1004 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1005 (bytes > curr_moder_entry->bytes_per_interval)) {
1006 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1008 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1011 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1013 interval = new_moder_entry->intr_moder_interval;
1014 *smoothed_interval = (
1015 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1016 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1019 *moder_tbl_idx = new_moder_idx;
1022 /* ena_com_update_intr_reg - Prepare interrupt register
1023 * @intr_reg: interrupt register to update.
1024 * @rx_delay_interval: Rx interval in usecs
1025 * @tx_delay_interval: Tx interval in usecs
1026 * @unmask: unask enable/disable
1028 * Prepare interrupt update register with the supplied parameters.
1030 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1031 u32 rx_delay_interval,
1032 u32 tx_delay_interval,
1035 intr_reg->intr_control = 0;
1036 intr_reg->intr_control |= rx_delay_interval &
1037 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1039 intr_reg->intr_control |=
1040 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1041 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1044 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1047 #endif /* !(ENA_COM) */