1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
4 * and other Tigon based cards.
6 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
8 * Thanks to Alteon and 3Com for providing hardware and documentation
9 * enabling me to write this driver.
11 * A mailing list for discussing the use of this driver has been
12 * setup, please subscribe to the lists if you have any questions
13 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
14 * see how to subscribe.
17 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
18 * dump support. The trace dump support has not been
19 * integrated yet however.
20 * Troy Benjegerdes: Big Endian (PPC) patches.
21 * Nate Stahl: Better out of memory handling and stats support.
22 * Aman Singla: Nasty race between interrupt handler and tx code dealing
23 * with 'testing the tx_ret_csm and setting tx_full'
24 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
25 * infrastructure and Sparc support
26 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
27 * driver under Linux/Sparc64
28 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
29 * ETHTOOL_GDRVINFO support
30 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
31 * handler and close() cleanup.
32 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
33 * memory mapped IO is enabled to
34 * make the driver work on RS/6000.
35 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
36 * where the driver would disable
37 * bus master mode if it had to disable
38 * write and invalidate.
39 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
41 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
42 * rx producer index when
43 * flushing the Jumbo ring.
44 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
46 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
49 #include <linux/module.h>
50 #include <linux/moduleparam.h>
51 #include <linux/types.h>
52 #include <linux/errno.h>
53 #include <linux/ioport.h>
54 #include <linux/pci.h>
55 #include <linux/dma-mapping.h>
56 #include <linux/kernel.h>
57 #include <linux/netdevice.h>
58 #include <linux/etherdevice.h>
59 #include <linux/skbuff.h>
60 #include <linux/delay.h>
62 #include <linux/highmem.h>
63 #include <linux/sockios.h>
64 #include <linux/firmware.h>
65 #include <linux/slab.h>
66 #include <linux/prefetch.h>
67 #include <linux/if_vlan.h>
70 #include <linux/ethtool.h>
78 #include <asm/byteorder.h>
79 #include <linux/uaccess.h>
82 #define DRV_NAME "acenic"
86 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
87 #define ACE_IS_TIGON_I(ap) 0
88 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
90 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
91 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
94 #ifndef PCI_VENDOR_ID_ALTEON
95 #define PCI_VENDOR_ID_ALTEON 0x12ae
97 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
98 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
99 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
101 #ifndef PCI_DEVICE_ID_3COM_3C985
102 #define PCI_DEVICE_ID_3COM_3C985 0x0001
104 #ifndef PCI_VENDOR_ID_NETGEAR
105 #define PCI_VENDOR_ID_NETGEAR 0x1385
106 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
108 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
109 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
114 * Farallon used the DEC vendor ID by mistake and they seem not
117 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
118 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
120 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
121 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
123 #ifndef PCI_VENDOR_ID_SGI
124 #define PCI_VENDOR_ID_SGI 0x10a9
126 #ifndef PCI_DEVICE_ID_SGI_ACENIC
127 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
130 static const struct pci_device_id acenic_pci_tbl[] = {
131 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
132 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
133 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
134 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
135 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
136 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
137 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
138 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 * Farallon used the DEC vendor ID on their cards incorrectly,
143 * then later Alteon's ID.
145 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
146 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
147 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
148 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
150 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
153 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
155 #define ace_sync_irq(irq) synchronize_irq(irq)
157 #ifndef offset_in_page
158 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
161 #define ACE_MAX_MOD_PARMS 8
162 #define BOARD_IDX_STATIC 0
163 #define BOARD_IDX_OVERFLOW -1
168 * These must be defined before the firmware is included.
170 #define MAX_TEXT_LEN 96*1024
171 #define MAX_RODATA_LEN 8*1024
172 #define MAX_DATA_LEN 2*1024
174 #ifndef tigon2FwReleaseLocal
175 #define tigon2FwReleaseLocal 0
179 * This driver currently supports Tigon I and Tigon II based cards
180 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
181 * GA620. The driver should also work on the SGI, DEC and Farallon
182 * versions of the card, however I have not been able to test that
185 * This card is really neat, it supports receive hardware checksumming
186 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
187 * firmware. Also the programming interface is quite neat, except for
188 * the parts dealing with the i2c eeprom on the card ;-)
190 * Using jumbo frames:
192 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
193 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
194 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
195 * interface number and <MTU> being the MTU value.
199 * When compiled as a loadable module, the driver allows for a number
200 * of module parameters to be specified. The driver supports the
201 * following module parameters:
203 * trace=<val> - Firmware trace level. This requires special traced
204 * firmware to replace the firmware supplied with
205 * the driver - for debugging purposes only.
207 * link=<val> - Link state. Normally you want to use the default link
208 * parameters set by the driver. This can be used to
209 * override these in case your switch doesn't negotiate
210 * the link properly. Valid values are:
211 * 0x0001 - Force half duplex link.
212 * 0x0002 - Do not negotiate line speed with the other end.
213 * 0x0010 - 10Mbit/sec link.
214 * 0x0020 - 100Mbit/sec link.
215 * 0x0040 - 1000Mbit/sec link.
216 * 0x0100 - Do not negotiate flow control.
217 * 0x0200 - Enable RX flow control Y
218 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
219 * Default value is 0x0270, ie. enable link+flow
220 * control negotiation. Negotiating the highest
221 * possible link speed with RX flow control enabled.
223 * When disabling link speed negotiation, only one link
224 * speed is allowed to be specified!
226 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
227 * to wait for more packets to arive before
228 * interrupting the host, from the time the first
231 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
232 * to wait for more packets to arive in the transmit ring,
233 * before interrupting the host, after transmitting the
234 * first packet in the ring.
236 * max_tx_desc=<val> - maximum number of transmit descriptors
237 * (packets) transmitted before interrupting the host.
239 * max_rx_desc=<val> - maximum number of receive descriptors
240 * (packets) received before interrupting the host.
242 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
243 * increments of the NIC's on board memory to be used for
244 * transmit and receive buffers. For the 1MB NIC app. 800KB
245 * is available, on the 1/2MB NIC app. 300KB is available.
246 * 68KB will always be available as a minimum for both
247 * directions. The default value is a 50/50 split.
248 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
249 * operations, default (1) is to always disable this as
250 * that is what Alteon does on NT. I have not been able
251 * to measure any real performance differences with
252 * this on my systems. Set <val>=0 if you want to
253 * enable these operations.
255 * If you use more than one NIC, specify the parameters for the
256 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
257 * run tracing on NIC #2 but not on NIC #1 and #3.
261 * - Proper multicast support.
262 * - NIC dump support.
263 * - More tuning parameters.
265 * The mini ring is not used under Linux and I am not sure it makes sense
266 * to actually use it.
268 * New interrupt handler strategy:
270 * The old interrupt handler worked using the traditional method of
271 * replacing an skbuff with a new one when a packet arrives. However
272 * the rx rings do not need to contain a static number of buffer
273 * descriptors, thus it makes sense to move the memory allocation out
274 * of the main interrupt handler and do it in a bottom half handler
275 * and only allocate new buffers when the number of buffers in the
276 * ring is below a certain threshold. In order to avoid starving the
277 * NIC under heavy load it is however necessary to force allocation
278 * when hitting a minimum threshold. The strategy for alloction is as
281 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
282 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
283 * the buffers in the interrupt handler
284 * RX_RING_THRES - maximum number of buffers in the rx ring
285 * RX_MINI_THRES - maximum number of buffers in the mini ring
286 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
288 * One advantagous side effect of this allocation approach is that the
289 * entire rx processing can be done without holding any spin lock
290 * since the rx rings and registers are totally independent of the tx
291 * ring and its registers. This of course includes the kmalloc's of
292 * new skb's. Thus start_xmit can run in parallel with rx processing
293 * and the memory allocation on SMP systems.
295 * Note that running the skb reallocation in a bottom half opens up
296 * another can of races which needs to be handled properly. In
297 * particular it can happen that the interrupt handler tries to run
298 * the reallocation while the bottom half is either running on another
299 * CPU or was interrupted on the same CPU. To get around this the
300 * driver uses bitops to prevent the reallocation routines from being
303 * TX handling can also be done without holding any spin lock, wheee
304 * this is fun! since tx_ret_csm is only written to by the interrupt
305 * handler. The case to be aware of is when shutting down the device
306 * and cleaning up where it is necessary to make sure that
307 * start_xmit() is not running while this is happening. Well DaveM
308 * informs me that this case is already protected against ... bye bye
309 * Mr. Spin Lock, it was nice to know you.
311 * TX interrupts are now partly disabled so the NIC will only generate
312 * TX interrupts for the number of coal ticks, not for the number of
313 * TX packets in the queue. This should reduce the number of TX only,
314 * ie. when no RX processing is done, interrupts seen.
318 * Threshold values for RX buffer allocation - the low water marks for
319 * when to start refilling the rings are set to 75% of the ring
320 * sizes. It seems to make sense to refill the rings entirely from the
321 * intrrupt handler once it gets below the panic threshold, that way
322 * we don't risk that the refilling is moved to another CPU when the
323 * one running the interrupt handler just got the slab code hot in its
326 #define RX_RING_SIZE 72
327 #define RX_MINI_SIZE 64
328 #define RX_JUMBO_SIZE 48
330 #define RX_PANIC_STD_THRES 16
331 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
332 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
333 #define RX_PANIC_MINI_THRES 12
334 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
335 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
336 #define RX_PANIC_JUMBO_THRES 6
337 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
338 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
342 * Size of the mini ring entries, basically these just should be big
343 * enough to take TCP ACKs
345 #define ACE_MINI_SIZE 100
347 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
348 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
349 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
352 * There seems to be a magic difference in the effect between 995 and 996
353 * but little difference between 900 and 995 ... no idea why.
355 * There is now a default set of tuning parameters which is set, depending
356 * on whether or not the user enables Jumbo frames. It's assumed that if
357 * Jumbo frames are enabled, the user wants optimal tuning for that case.
359 #define DEF_TX_COAL 400 /* 996 */
360 #define DEF_TX_MAX_DESC 60 /* was 40 */
361 #define DEF_RX_COAL 120 /* 1000 */
362 #define DEF_RX_MAX_DESC 25
363 #define DEF_TX_RATIO 21 /* 24 */
365 #define DEF_JUMBO_TX_COAL 20
366 #define DEF_JUMBO_TX_MAX_DESC 60
367 #define DEF_JUMBO_RX_COAL 30
368 #define DEF_JUMBO_RX_MAX_DESC 6
369 #define DEF_JUMBO_TX_RATIO 21
371 #if tigon2FwReleaseLocal < 20001118
373 * Standard firmware and early modifications duplicate
374 * IRQ load without this flag (coal timer is never reset).
375 * Note that with this flag tx_coal should be less than
376 * time to xmit full tx ring.
377 * 400usec is not so bad for tx ring size of 128.
379 #define TX_COAL_INTS_ONLY 1 /* worth it */
382 * With modified firmware, this is not necessary, but still useful.
384 #define TX_COAL_INTS_ONLY 1
388 #define DEF_STAT (2 * TICKS_PER_SEC)
391 static int link_state[ACE_MAX_MOD_PARMS];
392 static int trace[ACE_MAX_MOD_PARMS];
393 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
394 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
395 static int max_tx_desc[ACE_MAX_MOD_PARMS];
396 static int max_rx_desc[ACE_MAX_MOD_PARMS];
397 static int tx_ratio[ACE_MAX_MOD_PARMS];
398 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
400 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
401 MODULE_LICENSE("GPL");
402 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
403 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
408 module_param_array_named(link, link_state, int, NULL, 0);
409 module_param_array(trace, int, NULL, 0);
410 module_param_array(tx_coal_tick, int, NULL, 0);
411 module_param_array(max_tx_desc, int, NULL, 0);
412 module_param_array(rx_coal_tick, int, NULL, 0);
413 module_param_array(max_rx_desc, int, NULL, 0);
414 module_param_array(tx_ratio, int, NULL, 0);
415 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
416 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
417 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
418 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
419 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
420 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
421 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
424 static const char version[] =
425 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
426 " http://home.cern.ch/~jes/gige/acenic.html\n";
428 static int ace_get_link_ksettings(struct net_device *,
429 struct ethtool_link_ksettings *);
430 static int ace_set_link_ksettings(struct net_device *,
431 const struct ethtool_link_ksettings *);
432 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
434 static const struct ethtool_ops ace_ethtool_ops = {
435 .get_drvinfo = ace_get_drvinfo,
436 .get_link_ksettings = ace_get_link_ksettings,
437 .set_link_ksettings = ace_set_link_ksettings,
440 static void ace_watchdog(struct net_device *dev, unsigned int txqueue);
442 static const struct net_device_ops ace_netdev_ops = {
443 .ndo_open = ace_open,
444 .ndo_stop = ace_close,
445 .ndo_tx_timeout = ace_watchdog,
446 .ndo_get_stats = ace_get_stats,
447 .ndo_start_xmit = ace_start_xmit,
448 .ndo_set_rx_mode = ace_set_multicast_list,
449 .ndo_validate_addr = eth_validate_addr,
450 .ndo_set_mac_address = ace_set_mac_addr,
451 .ndo_change_mtu = ace_change_mtu,
454 static int acenic_probe_one(struct pci_dev *pdev,
455 const struct pci_device_id *id)
457 struct net_device *dev;
458 struct ace_private *ap;
459 static int boards_found;
461 dev = alloc_etherdev(sizeof(struct ace_private));
465 SET_NETDEV_DEV(dev, &pdev->dev);
467 ap = netdev_priv(dev);
470 ap->name = pci_name(pdev);
472 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
473 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
475 dev->watchdog_timeo = 5*HZ;
477 dev->max_mtu = ACE_JUMBO_MTU;
479 dev->netdev_ops = &ace_netdev_ops;
480 dev->ethtool_ops = &ace_ethtool_ops;
482 /* we only display this string ONCE */
486 if (pci_enable_device(pdev))
487 goto fail_free_netdev;
490 * Enable master mode before we start playing with the
491 * pci_command word since pci_set_master() will modify
494 pci_set_master(pdev);
496 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
498 /* OpenFirmware on Mac's does not set this - DOH.. */
499 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
500 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
501 "access - was not enabled by BIOS/Firmware\n",
503 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
504 pci_write_config_word(ap->pdev, PCI_COMMAND,
509 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
510 if (ap->pci_latency <= 0x40) {
511 ap->pci_latency = 0x40;
512 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
516 * Remap the regs into kernel space - this is abuse of
517 * dev->base_addr since it was means for I/O port
518 * addresses but who gives a damn.
520 dev->base_addr = pci_resource_start(pdev, 0);
521 ap->regs = ioremap(dev->base_addr, 0x4000);
523 printk(KERN_ERR "%s: Unable to map I/O register, "
524 "AceNIC %i will be disabled.\n",
525 ap->name, boards_found);
526 goto fail_free_netdev;
529 switch(pdev->vendor) {
530 case PCI_VENDOR_ID_ALTEON:
531 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
532 printk(KERN_INFO "%s: Farallon PN9100-T ",
535 printk(KERN_INFO "%s: Alteon AceNIC ",
539 case PCI_VENDOR_ID_3COM:
540 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
542 case PCI_VENDOR_ID_NETGEAR:
543 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
545 case PCI_VENDOR_ID_DEC:
546 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
547 printk(KERN_INFO "%s: Farallon PN9000-SX ",
552 case PCI_VENDOR_ID_SGI:
553 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
556 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
560 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
561 printk("irq %d\n", pdev->irq);
563 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
565 printk(KERN_ERR "%s: Driver compiled without Tigon I"
566 " support - NIC disabled\n", dev->name);
571 if (ace_allocate_descriptors(dev))
572 goto fail_free_netdev;
575 if (boards_found >= ACE_MAX_MOD_PARMS)
576 ap->board_idx = BOARD_IDX_OVERFLOW;
578 ap->board_idx = boards_found;
580 ap->board_idx = BOARD_IDX_STATIC;
584 goto fail_free_netdev;
586 if (register_netdev(dev)) {
587 printk(KERN_ERR "acenic: device registration failed\n");
590 ap->name = dev->name;
592 dev->features |= NETIF_F_HIGHDMA;
594 pci_set_drvdata(pdev, dev);
600 ace_init_cleanup(dev);
606 static void acenic_remove_one(struct pci_dev *pdev)
608 struct net_device *dev = pci_get_drvdata(pdev);
609 struct ace_private *ap = netdev_priv(dev);
610 struct ace_regs __iomem *regs = ap->regs;
613 unregister_netdev(dev);
615 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
616 if (ap->version >= 2)
617 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
620 * This clears any pending interrupts
622 writel(1, ®s->Mb0Lo);
623 readl(®s->CpuCtrl); /* flush */
626 * Make sure no other CPUs are processing interrupts
627 * on the card before the buffers are being released.
628 * Otherwise one might experience some `interesting'
631 * Then release the RX buffers - jumbo buffers were
632 * already released in ace_close().
634 ace_sync_irq(dev->irq);
636 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
637 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
640 struct ring_info *ringp;
643 ringp = &ap->skb->rx_std_skbuff[i];
644 mapping = dma_unmap_addr(ringp, mapping);
645 dma_unmap_page(&ap->pdev->dev, mapping,
646 ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
648 ap->rx_std_ring[i].size = 0;
649 ap->skb->rx_std_skbuff[i].skb = NULL;
654 if (ap->version >= 2) {
655 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
656 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
659 struct ring_info *ringp;
662 ringp = &ap->skb->rx_mini_skbuff[i];
663 mapping = dma_unmap_addr(ringp,mapping);
664 dma_unmap_page(&ap->pdev->dev, mapping,
668 ap->rx_mini_ring[i].size = 0;
669 ap->skb->rx_mini_skbuff[i].skb = NULL;
675 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
676 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
678 struct ring_info *ringp;
681 ringp = &ap->skb->rx_jumbo_skbuff[i];
682 mapping = dma_unmap_addr(ringp, mapping);
683 dma_unmap_page(&ap->pdev->dev, mapping,
684 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
686 ap->rx_jumbo_ring[i].size = 0;
687 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
692 ace_init_cleanup(dev);
696 static struct pci_driver acenic_pci_driver = {
698 .id_table = acenic_pci_tbl,
699 .probe = acenic_probe_one,
700 .remove = acenic_remove_one,
703 static void ace_free_descriptors(struct net_device *dev)
705 struct ace_private *ap = netdev_priv(dev);
708 if (ap->rx_std_ring != NULL) {
709 size = (sizeof(struct rx_desc) *
710 (RX_STD_RING_ENTRIES +
711 RX_JUMBO_RING_ENTRIES +
712 RX_MINI_RING_ENTRIES +
713 RX_RETURN_RING_ENTRIES));
714 dma_free_coherent(&ap->pdev->dev, size, ap->rx_std_ring,
715 ap->rx_ring_base_dma);
716 ap->rx_std_ring = NULL;
717 ap->rx_jumbo_ring = NULL;
718 ap->rx_mini_ring = NULL;
719 ap->rx_return_ring = NULL;
721 if (ap->evt_ring != NULL) {
722 size = (sizeof(struct event) * EVT_RING_ENTRIES);
723 dma_free_coherent(&ap->pdev->dev, size, ap->evt_ring,
727 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
728 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
729 dma_free_coherent(&ap->pdev->dev, size, ap->tx_ring,
734 if (ap->evt_prd != NULL) {
735 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
736 (void *)ap->evt_prd, ap->evt_prd_dma);
739 if (ap->rx_ret_prd != NULL) {
740 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
741 (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma);
742 ap->rx_ret_prd = NULL;
744 if (ap->tx_csm != NULL) {
745 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
746 (void *)ap->tx_csm, ap->tx_csm_dma);
752 static int ace_allocate_descriptors(struct net_device *dev)
754 struct ace_private *ap = netdev_priv(dev);
757 size = (sizeof(struct rx_desc) *
758 (RX_STD_RING_ENTRIES +
759 RX_JUMBO_RING_ENTRIES +
760 RX_MINI_RING_ENTRIES +
761 RX_RETURN_RING_ENTRIES));
763 ap->rx_std_ring = dma_alloc_coherent(&ap->pdev->dev, size,
764 &ap->rx_ring_base_dma, GFP_KERNEL);
765 if (ap->rx_std_ring == NULL)
768 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
769 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
770 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
772 size = (sizeof(struct event) * EVT_RING_ENTRIES);
774 ap->evt_ring = dma_alloc_coherent(&ap->pdev->dev, size,
775 &ap->evt_ring_dma, GFP_KERNEL);
777 if (ap->evt_ring == NULL)
781 * Only allocate a host TX ring for the Tigon II, the Tigon I
782 * has to use PCI registers for this ;-(
784 if (!ACE_IS_TIGON_I(ap)) {
785 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
787 ap->tx_ring = dma_alloc_coherent(&ap->pdev->dev, size,
788 &ap->tx_ring_dma, GFP_KERNEL);
790 if (ap->tx_ring == NULL)
794 ap->evt_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
795 &ap->evt_prd_dma, GFP_KERNEL);
796 if (ap->evt_prd == NULL)
799 ap->rx_ret_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
800 &ap->rx_ret_prd_dma, GFP_KERNEL);
801 if (ap->rx_ret_prd == NULL)
804 ap->tx_csm = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
805 &ap->tx_csm_dma, GFP_KERNEL);
806 if (ap->tx_csm == NULL)
813 ace_init_cleanup(dev);
819 * Generic cleanup handling data allocated during init. Used when the
820 * module is unloaded or if an error occurs during initialization
822 static void ace_init_cleanup(struct net_device *dev)
824 struct ace_private *ap;
826 ap = netdev_priv(dev);
828 ace_free_descriptors(dev);
831 dma_free_coherent(&ap->pdev->dev, sizeof(struct ace_info),
832 ap->info, ap->info_dma);
834 kfree(ap->trace_buf);
837 free_irq(dev->irq, dev);
844 * Commands are considered to be slow.
846 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
850 idx = readl(®s->CmdPrd);
852 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
853 idx = (idx + 1) % CMD_RING_ENTRIES;
855 writel(idx, ®s->CmdPrd);
859 static int ace_init(struct net_device *dev)
861 struct ace_private *ap;
862 struct ace_regs __iomem *regs;
863 struct ace_info *info = NULL;
864 struct pci_dev *pdev;
867 u32 tig_ver, mac1, mac2, tmp, pci_state;
868 int board_idx, ecode = 0;
870 unsigned char cache_size;
873 ap = netdev_priv(dev);
876 board_idx = ap->board_idx;
879 * aman@sgi.com - its useful to do a NIC reset here to
880 * address the `Firmware not running' problem subsequent
881 * to any crashes involving the NIC
883 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
884 readl(®s->HostCtrl); /* PCI write posting */
888 * Don't access any other registers before this point!
892 * This will most likely need BYTE_SWAP once we switch
893 * to using __raw_writel()
895 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
898 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
901 readl(®s->HostCtrl); /* PCI write posting */
904 * Stop the NIC CPU and clear pending interrupts
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
907 readl(®s->CpuCtrl); /* PCI write posting */
908 writel(0, ®s->Mb0Lo);
910 tig_ver = readl(®s->HostCtrl) >> 28;
913 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
916 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
917 tig_ver, ap->firmware_major, ap->firmware_minor,
919 writel(0, ®s->LocalCtrl);
921 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
925 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
926 tig_ver, ap->firmware_major, ap->firmware_minor,
928 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
929 readl(®s->CpuBCtrl); /* PCI write posting */
931 * The SRAM bank size does _not_ indicate the amount
932 * of memory on the card, it controls the _bank_ size!
933 * Ie. a 1MB AceNIC will have two banks of 512KB.
935 writel(SRAM_BANK_512K, ®s->LocalCtrl);
936 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
938 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
941 printk(KERN_WARNING " Unsupported Tigon version detected "
948 * ModeStat _must_ be set after the SRAM settings as this change
949 * seems to corrupt the ModeStat and possible other registers.
950 * The SRAM settings survive resets and setting it to the same
951 * value a second time works as well. This is what caused the
952 * `Firmware not running' problem on the Tigon II.
955 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
956 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
958 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
959 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
961 readl(®s->ModeStat); /* PCI write posting */
964 for(i = 0; i < 4; i++) {
968 t = read_eeprom_byte(dev, 0x8c+i);
976 for(i = 4; i < 8; i++) {
980 t = read_eeprom_byte(dev, 0x8c+i);
988 writel(mac1, ®s->MacAddrHi);
989 writel(mac2, ®s->MacAddrLo);
991 addr[0] = (mac1 >> 8) & 0xff;
992 addr[1] = mac1 & 0xff;
993 addr[2] = (mac2 >> 24) & 0xff;
994 addr[3] = (mac2 >> 16) & 0xff;
995 addr[4] = (mac2 >> 8) & 0xff;
996 addr[5] = mac2 & 0xff;
997 eth_hw_addr_set(dev, addr);
999 printk("MAC: %pM\n", dev->dev_addr);
1002 * Looks like this is necessary to deal with on all architectures,
1003 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1004 * Ie. having two NICs in the machine, one will have the cache
1005 * line set at boot time, the other will not.
1008 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1010 if (cache_size != SMP_CACHE_BYTES) {
1011 printk(KERN_INFO " PCI cache line size set incorrectly "
1012 "(%i bytes) by BIOS/FW, ", cache_size);
1013 if (cache_size > SMP_CACHE_BYTES)
1014 printk("expecting %i\n", SMP_CACHE_BYTES);
1016 printk("correcting to %i\n", SMP_CACHE_BYTES);
1017 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1018 SMP_CACHE_BYTES >> 2);
1022 pci_state = readl(®s->PciState);
1023 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1024 "latency: %i clks\n",
1025 (pci_state & PCI_32BIT) ? 32 : 64,
1026 (pci_state & PCI_66MHZ) ? 66 : 33,
1030 * Set the max DMA transfer size. Seems that for most systems
1031 * the performance is better when no MAX parameter is
1032 * set. However for systems enabling PCI write and invalidate,
1033 * DMA writes must be set to the L1 cache line size to get
1034 * optimal performance.
1036 * The default is now to turn the PCI write and invalidate off
1037 * - that is what Alteon does for NT.
1039 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1040 if (ap->version >= 2) {
1041 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1043 * Tuning parameters only supported for 8 cards
1045 if (board_idx == BOARD_IDX_OVERFLOW ||
1046 dis_pci_mem_inval[board_idx]) {
1047 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1048 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1049 pci_write_config_word(pdev, PCI_COMMAND,
1051 printk(KERN_INFO " Disabling PCI memory "
1052 "write and invalidate\n");
1054 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1055 printk(KERN_INFO " PCI memory write & invalidate "
1056 "enabled by BIOS, enabling counter measures\n");
1058 switch(SMP_CACHE_BYTES) {
1060 tmp |= DMA_WRITE_MAX_16;
1063 tmp |= DMA_WRITE_MAX_32;
1066 tmp |= DMA_WRITE_MAX_64;
1069 tmp |= DMA_WRITE_MAX_128;
1072 printk(KERN_INFO " Cache line size %i not "
1073 "supported, PCI write and invalidate "
1074 "disabled\n", SMP_CACHE_BYTES);
1075 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1076 pci_write_config_word(pdev, PCI_COMMAND,
1084 * On this platform, we know what the best dma settings
1085 * are. We use 64-byte maximum bursts, because if we
1086 * burst larger than the cache line size (or even cross
1087 * a 64byte boundary in a single burst) the UltraSparc
1088 * PCI controller will disconnect at 64-byte multiples.
1090 * Read-multiple will be properly enabled above, and when
1091 * set will give the PCI controller proper hints about
1094 tmp &= ~DMA_READ_WRITE_MASK;
1095 tmp |= DMA_READ_MAX_64;
1096 tmp |= DMA_WRITE_MAX_64;
1099 tmp &= ~DMA_READ_WRITE_MASK;
1100 tmp |= DMA_READ_MAX_128;
1102 * All the docs say MUST NOT. Well, I did.
1103 * Nothing terrible happens, if we load wrong size.
1104 * Bit w&i still works better!
1106 tmp |= DMA_WRITE_MAX_128;
1108 writel(tmp, ®s->PciState);
1112 * The Host PCI bus controller driver has to set FBB.
1113 * If all devices on that PCI bus support FBB, then the controller
1114 * can enable FBB support in the Host PCI Bus controller (or on
1115 * the PCI-PCI bridge if that applies).
1119 * I have received reports from people having problems when this
1122 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1123 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1124 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1125 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1130 * Configure DMA attributes.
1132 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1138 * Initialize the generic info block and the command+event rings
1139 * and the control blocks for the transmit and receive rings
1140 * as they need to be setup once and for all.
1142 if (!(info = dma_alloc_coherent(&ap->pdev->dev, sizeof(struct ace_info),
1143 &ap->info_dma, GFP_KERNEL))) {
1150 * Get the memory for the skb rings.
1152 if (!(ap->skb = kzalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1157 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1160 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1161 DRV_NAME, pdev->irq);
1164 dev->irq = pdev->irq;
1167 spin_lock_init(&ap->debug_lock);
1168 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1169 ap->last_std_rx = 0;
1170 ap->last_mini_rx = 0;
1173 ecode = ace_load_firmware(dev);
1179 tmp_ptr = ap->info_dma;
1180 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1181 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1183 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1185 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1186 info->evt_ctrl.flags = 0;
1190 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1191 writel(0, ®s->EvtCsm);
1193 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1194 info->cmd_ctrl.flags = 0;
1195 info->cmd_ctrl.max_len = 0;
1197 for (i = 0; i < CMD_RING_ENTRIES; i++)
1198 writel(0, ®s->CmdRng[i]);
1200 writel(0, ®s->CmdPrd);
1201 writel(0, ®s->CmdCsm);
1203 tmp_ptr = ap->info_dma;
1204 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1205 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1207 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1208 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1209 info->rx_std_ctrl.flags =
1210 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1212 memset(ap->rx_std_ring, 0,
1213 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1215 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1216 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1218 ap->rx_std_skbprd = 0;
1219 atomic_set(&ap->cur_rx_bufs, 0);
1221 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1222 (ap->rx_ring_base_dma +
1223 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1224 info->rx_jumbo_ctrl.max_len = 0;
1225 info->rx_jumbo_ctrl.flags =
1226 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1228 memset(ap->rx_jumbo_ring, 0,
1229 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1231 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1232 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1234 ap->rx_jumbo_skbprd = 0;
1235 atomic_set(&ap->cur_jumbo_bufs, 0);
1237 memset(ap->rx_mini_ring, 0,
1238 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1240 if (ap->version >= 2) {
1241 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1242 (ap->rx_ring_base_dma +
1243 (sizeof(struct rx_desc) *
1244 (RX_STD_RING_ENTRIES +
1245 RX_JUMBO_RING_ENTRIES))));
1246 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1247 info->rx_mini_ctrl.flags =
1248 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST;
1250 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1251 ap->rx_mini_ring[i].flags =
1252 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1254 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1255 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1256 info->rx_mini_ctrl.max_len = 0;
1259 ap->rx_mini_skbprd = 0;
1260 atomic_set(&ap->cur_mini_bufs, 0);
1262 set_aceaddr(&info->rx_return_ctrl.rngptr,
1263 (ap->rx_ring_base_dma +
1264 (sizeof(struct rx_desc) *
1265 (RX_STD_RING_ENTRIES +
1266 RX_JUMBO_RING_ENTRIES +
1267 RX_MINI_RING_ENTRIES))));
1268 info->rx_return_ctrl.flags = 0;
1269 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1271 memset(ap->rx_return_ring, 0,
1272 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1274 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1275 *(ap->rx_ret_prd) = 0;
1277 writel(TX_RING_BASE, ®s->WinBase);
1279 if (ACE_IS_TIGON_I(ap)) {
1280 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1281 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1282 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1283 writel(0, (__force void __iomem *)ap->tx_ring + i * 4);
1285 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1287 memset(ap->tx_ring, 0,
1288 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1290 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1293 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1294 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1297 * The Tigon I does not like having the TX ring in host memory ;-(
1299 if (!ACE_IS_TIGON_I(ap))
1300 tmp |= RCB_FLG_TX_HOST_RING;
1301 #if TX_COAL_INTS_ONLY
1302 tmp |= RCB_FLG_COAL_INT_ONLY;
1304 info->tx_ctrl.flags = tmp;
1306 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1309 * Potential item for tuning parameter
1312 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1313 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1315 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1316 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1319 writel(0, ®s->MaskInt);
1320 writel(1, ®s->IfIdx);
1323 * McKinley boxes do not like us fiddling with AssistState
1326 writel(1, ®s->AssistState);
1329 writel(DEF_STAT, ®s->TuneStatTicks);
1330 writel(DEF_TRACE, ®s->TuneTrace);
1332 ace_set_rxtx_parms(dev, 0);
1334 if (board_idx == BOARD_IDX_OVERFLOW) {
1335 printk(KERN_WARNING "%s: more than %i NICs detected, "
1336 "ignoring module parameters!\n",
1337 ap->name, ACE_MAX_MOD_PARMS);
1338 } else if (board_idx >= 0) {
1339 if (tx_coal_tick[board_idx])
1340 writel(tx_coal_tick[board_idx],
1341 ®s->TuneTxCoalTicks);
1342 if (max_tx_desc[board_idx])
1343 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1345 if (rx_coal_tick[board_idx])
1346 writel(rx_coal_tick[board_idx],
1347 ®s->TuneRxCoalTicks);
1348 if (max_rx_desc[board_idx])
1349 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1351 if (trace[board_idx])
1352 writel(trace[board_idx], ®s->TuneTrace);
1354 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1355 writel(tx_ratio[board_idx], ®s->TxBufRat);
1359 * Default link parameters
1361 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1362 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1363 if(ap->version >= 2)
1364 tmp |= LNK_TX_FLOW_CTL_Y;
1367 * Override link default parameters
1369 if ((board_idx >= 0) && link_state[board_idx]) {
1370 int option = link_state[board_idx];
1374 if (option & 0x01) {
1375 printk(KERN_INFO "%s: Setting half duplex link\n",
1377 tmp &= ~LNK_FULL_DUPLEX;
1380 tmp &= ~LNK_NEGOTIATE;
1387 if ((option & 0x70) == 0) {
1388 printk(KERN_WARNING "%s: No media speed specified, "
1389 "forcing auto negotiation\n", ap->name);
1390 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1391 LNK_100MB | LNK_10MB;
1393 if ((option & 0x100) == 0)
1394 tmp |= LNK_NEG_FCTL;
1396 printk(KERN_INFO "%s: Disabling flow control "
1397 "negotiation\n", ap->name);
1399 tmp |= LNK_RX_FLOW_CTL_Y;
1400 if ((option & 0x400) && (ap->version >= 2)) {
1401 printk(KERN_INFO "%s: Enabling TX flow control\n",
1403 tmp |= LNK_TX_FLOW_CTL_Y;
1408 writel(tmp, ®s->TuneLink);
1409 if (ap->version >= 2)
1410 writel(tmp, ®s->TuneFastLink);
1412 writel(ap->firmware_start, ®s->Pc);
1414 writel(0, ®s->Mb0Lo);
1417 * Set tx_csm before we start receiving interrupts, otherwise
1418 * the interrupt handler might think it is supposed to process
1419 * tx ints before we are up and running, which may cause a null
1420 * pointer access in the int handler.
1423 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1426 ace_set_txprd(regs, ap, 0);
1427 writel(0, ®s->RxRetCsm);
1430 * Enable DMA engine now.
1431 * If we do this sooner, Mckinley box pukes.
1432 * I assume it's because Tigon II DMA engine wants to check
1433 * *something* even before the CPU is started.
1435 writel(1, ®s->AssistState); /* enable DMA */
1440 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1441 readl(®s->CpuCtrl);
1444 * Wait for the firmware to spin up - max 3 seconds.
1446 myjif = jiffies + 3 * HZ;
1447 while (time_before(jiffies, myjif) && !ap->fw_running)
1450 if (!ap->fw_running) {
1451 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1454 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1455 readl(®s->CpuCtrl);
1457 /* aman@sgi.com - account for badly behaving firmware/NIC:
1458 * - have observed that the NIC may continue to generate
1459 * interrupts for some reason; attempt to stop it - halt
1460 * second CPU for Tigon II cards, and also clear Mb0
1461 * - if we're a module, we'll fail to load if this was
1462 * the only GbE card in the system => if the kernel does
1463 * see an interrupt from the NIC, code to handle it is
1464 * gone and OOps! - so free_irq also
1466 if (ap->version >= 2)
1467 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1469 writel(0, ®s->Mb0Lo);
1470 readl(®s->Mb0Lo);
1477 * We load the ring here as there seem to be no way to tell the
1478 * firmware to wipe the ring without re-initializing it.
1480 if (!test_and_set_bit(0, &ap->std_refill_busy))
1481 ace_load_std_rx_ring(dev, RX_RING_SIZE);
1483 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1485 if (ap->version >= 2) {
1486 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1487 ace_load_mini_rx_ring(dev, RX_MINI_SIZE);
1489 printk(KERN_ERR "%s: Someone is busy refilling "
1490 "the RX mini ring\n", ap->name);
1495 ace_init_cleanup(dev);
1500 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1502 struct ace_private *ap = netdev_priv(dev);
1503 struct ace_regs __iomem *regs = ap->regs;
1504 int board_idx = ap->board_idx;
1506 if (board_idx >= 0) {
1508 if (!tx_coal_tick[board_idx])
1509 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1510 if (!max_tx_desc[board_idx])
1511 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1512 if (!rx_coal_tick[board_idx])
1513 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1514 if (!max_rx_desc[board_idx])
1515 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1516 if (!tx_ratio[board_idx])
1517 writel(DEF_TX_RATIO, ®s->TxBufRat);
1519 if (!tx_coal_tick[board_idx])
1520 writel(DEF_JUMBO_TX_COAL,
1521 ®s->TuneTxCoalTicks);
1522 if (!max_tx_desc[board_idx])
1523 writel(DEF_JUMBO_TX_MAX_DESC,
1524 ®s->TuneMaxTxDesc);
1525 if (!rx_coal_tick[board_idx])
1526 writel(DEF_JUMBO_RX_COAL,
1527 ®s->TuneRxCoalTicks);
1528 if (!max_rx_desc[board_idx])
1529 writel(DEF_JUMBO_RX_MAX_DESC,
1530 ®s->TuneMaxRxDesc);
1531 if (!tx_ratio[board_idx])
1532 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1538 static void ace_watchdog(struct net_device *data, unsigned int txqueue)
1540 struct net_device *dev = data;
1541 struct ace_private *ap = netdev_priv(dev);
1542 struct ace_regs __iomem *regs = ap->regs;
1545 * We haven't received a stats update event for more than 2.5
1546 * seconds and there is data in the transmit queue, thus we
1547 * assume the card is stuck.
1549 if (*ap->tx_csm != ap->tx_ret_csm) {
1550 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1551 dev->name, (unsigned int)readl(®s->HostCtrl));
1552 /* This can happen due to ieee flow control. */
1554 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1557 netif_wake_queue(dev);
1563 static void ace_tasklet(struct tasklet_struct *t)
1565 struct ace_private *ap = from_tasklet(ap, t, ace_tasklet);
1566 struct net_device *dev = ap->ndev;
1569 cur_size = atomic_read(&ap->cur_rx_bufs);
1570 if ((cur_size < RX_LOW_STD_THRES) &&
1571 !test_and_set_bit(0, &ap->std_refill_busy)) {
1573 printk("refilling buffers (current %i)\n", cur_size);
1575 ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size);
1578 if (ap->version >= 2) {
1579 cur_size = atomic_read(&ap->cur_mini_bufs);
1580 if ((cur_size < RX_LOW_MINI_THRES) &&
1581 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1583 printk("refilling mini buffers (current %i)\n",
1586 ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size);
1590 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1591 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1592 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1594 printk("refilling jumbo buffers (current %i)\n", cur_size);
1596 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);
1598 ap->tasklet_pending = 0;
1603 * Copy the contents of the NIC's trace buffer to kernel memory.
1605 static void ace_dump_trace(struct ace_private *ap)
1609 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1616 * Load the standard rx ring.
1618 * Loading rings is safe without holding the spin lock since this is
1619 * done only before the device is enabled, thus no interrupts are
1620 * generated and by the interrupt handler/tasklet handler.
1622 static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)
1624 struct ace_private *ap = netdev_priv(dev);
1625 struct ace_regs __iomem *regs = ap->regs;
1629 prefetchw(&ap->cur_rx_bufs);
1631 idx = ap->rx_std_skbprd;
1633 for (i = 0; i < nr_bufs; i++) {
1634 struct sk_buff *skb;
1638 skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE);
1642 mapping = dma_map_page(&ap->pdev->dev,
1643 virt_to_page(skb->data),
1644 offset_in_page(skb->data),
1645 ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
1646 ap->skb->rx_std_skbuff[idx].skb = skb;
1647 dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1650 rd = &ap->rx_std_ring[idx];
1651 set_aceaddr(&rd->addr, mapping);
1652 rd->size = ACE_STD_BUFSIZE;
1654 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1660 atomic_add(i, &ap->cur_rx_bufs);
1661 ap->rx_std_skbprd = idx;
1663 if (ACE_IS_TIGON_I(ap)) {
1665 cmd.evt = C_SET_RX_PRD_IDX;
1667 cmd.idx = ap->rx_std_skbprd;
1668 ace_issue_cmd(regs, &cmd);
1670 writel(idx, ®s->RxStdPrd);
1675 clear_bit(0, &ap->std_refill_busy);
1679 printk(KERN_INFO "Out of memory when allocating "
1680 "standard receive buffers\n");
1685 static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)
1687 struct ace_private *ap = netdev_priv(dev);
1688 struct ace_regs __iomem *regs = ap->regs;
1691 prefetchw(&ap->cur_mini_bufs);
1693 idx = ap->rx_mini_skbprd;
1694 for (i = 0; i < nr_bufs; i++) {
1695 struct sk_buff *skb;
1699 skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE);
1703 mapping = dma_map_page(&ap->pdev->dev,
1704 virt_to_page(skb->data),
1705 offset_in_page(skb->data),
1706 ACE_MINI_BUFSIZE, DMA_FROM_DEVICE);
1707 ap->skb->rx_mini_skbuff[idx].skb = skb;
1708 dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1711 rd = &ap->rx_mini_ring[idx];
1712 set_aceaddr(&rd->addr, mapping);
1713 rd->size = ACE_MINI_BUFSIZE;
1715 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1721 atomic_add(i, &ap->cur_mini_bufs);
1723 ap->rx_mini_skbprd = idx;
1725 writel(idx, ®s->RxMiniPrd);
1729 clear_bit(0, &ap->mini_refill_busy);
1732 printk(KERN_INFO "Out of memory when allocating "
1733 "mini receive buffers\n");
1739 * Load the jumbo rx ring, this may happen at any time if the MTU
1740 * is changed to a value > 1500.
1742 static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)
1744 struct ace_private *ap = netdev_priv(dev);
1745 struct ace_regs __iomem *regs = ap->regs;
1748 idx = ap->rx_jumbo_skbprd;
1750 for (i = 0; i < nr_bufs; i++) {
1751 struct sk_buff *skb;
1755 skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE);
1759 mapping = dma_map_page(&ap->pdev->dev,
1760 virt_to_page(skb->data),
1761 offset_in_page(skb->data),
1762 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
1763 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1764 dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1767 rd = &ap->rx_jumbo_ring[idx];
1768 set_aceaddr(&rd->addr, mapping);
1769 rd->size = ACE_JUMBO_BUFSIZE;
1771 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1777 atomic_add(i, &ap->cur_jumbo_bufs);
1778 ap->rx_jumbo_skbprd = idx;
1780 if (ACE_IS_TIGON_I(ap)) {
1782 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1784 cmd.idx = ap->rx_jumbo_skbprd;
1785 ace_issue_cmd(regs, &cmd);
1787 writel(idx, ®s->RxJumboPrd);
1792 clear_bit(0, &ap->jumbo_refill_busy);
1795 if (net_ratelimit())
1796 printk(KERN_INFO "Out of memory when allocating "
1797 "jumbo receive buffers\n");
1803 * All events are considered to be slow (RX/TX ints do not generate
1804 * events) and are handled here, outside the main interrupt handler,
1805 * to reduce the size of the handler.
1807 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1809 struct ace_private *ap;
1811 ap = netdev_priv(dev);
1813 while (evtcsm != evtprd) {
1814 switch (ap->evt_ring[evtcsm].evt) {
1816 printk(KERN_INFO "%s: Firmware up and running\n",
1821 case E_STATS_UPDATED:
1825 u16 code = ap->evt_ring[evtcsm].code;
1829 u32 state = readl(&ap->regs->GigLnkState);
1830 printk(KERN_WARNING "%s: Optical link UP "
1831 "(%s Duplex, Flow Control: %s%s)\n",
1833 state & LNK_FULL_DUPLEX ? "Full":"Half",
1834 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1835 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1839 printk(KERN_WARNING "%s: Optical link DOWN\n",
1842 case E_C_LINK_10_100:
1843 printk(KERN_WARNING "%s: 10/100BaseT link "
1847 printk(KERN_ERR "%s: Unknown optical link "
1848 "state %02x\n", ap->name, code);
1853 switch(ap->evt_ring[evtcsm].code) {
1854 case E_C_ERR_INVAL_CMD:
1855 printk(KERN_ERR "%s: invalid command error\n",
1858 case E_C_ERR_UNIMP_CMD:
1859 printk(KERN_ERR "%s: unimplemented command "
1860 "error\n", ap->name);
1862 case E_C_ERR_BAD_CFG:
1863 printk(KERN_ERR "%s: bad config error\n",
1867 printk(KERN_ERR "%s: unknown error %02x\n",
1868 ap->name, ap->evt_ring[evtcsm].code);
1871 case E_RESET_JUMBO_RNG:
1874 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1875 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1876 ap->rx_jumbo_ring[i].size = 0;
1877 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1878 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1879 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1883 if (ACE_IS_TIGON_I(ap)) {
1885 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1888 ace_issue_cmd(ap->regs, &cmd);
1890 writel(0, &((ap->regs)->RxJumboPrd));
1895 ap->rx_jumbo_skbprd = 0;
1896 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1898 clear_bit(0, &ap->jumbo_refill_busy);
1902 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1903 ap->name, ap->evt_ring[evtcsm].evt);
1905 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1912 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1914 struct ace_private *ap = netdev_priv(dev);
1916 int mini_count = 0, std_count = 0;
1920 prefetchw(&ap->cur_rx_bufs);
1921 prefetchw(&ap->cur_mini_bufs);
1923 while (idx != rxretprd) {
1924 struct ring_info *rip;
1925 struct sk_buff *skb;
1926 struct rx_desc *retdesc;
1928 int bd_flags, desc_type, mapsize;
1932 /* make sure the rx descriptor isn't read before rxretprd */
1933 if (idx == rxretcsm)
1936 retdesc = &ap->rx_return_ring[idx];
1937 skbidx = retdesc->idx;
1938 bd_flags = retdesc->flags;
1939 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1943 * Normal frames do not have any flags set
1945 * Mini and normal frames arrive frequently,
1946 * so use a local counter to avoid doing
1947 * atomic operations for each packet arriving.
1950 rip = &ap->skb->rx_std_skbuff[skbidx];
1951 mapsize = ACE_STD_BUFSIZE;
1955 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1956 mapsize = ACE_JUMBO_BUFSIZE;
1957 atomic_dec(&ap->cur_jumbo_bufs);
1960 rip = &ap->skb->rx_mini_skbuff[skbidx];
1961 mapsize = ACE_MINI_BUFSIZE;
1965 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
1966 "returned by NIC\n", dev->name,
1973 dma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping),
1974 mapsize, DMA_FROM_DEVICE);
1975 skb_put(skb, retdesc->size);
1980 csum = retdesc->tcp_udp_csum;
1982 skb->protocol = eth_type_trans(skb, dev);
1985 * Instead of forcing the poor tigon mips cpu to calculate
1986 * pseudo hdr checksum, we do this ourselves.
1988 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
1989 skb->csum = htons(csum);
1990 skb->ip_summed = CHECKSUM_COMPLETE;
1992 skb_checksum_none_assert(skb);
1996 if ((bd_flags & BD_FLG_VLAN_TAG))
1997 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), retdesc->vlan);
2000 dev->stats.rx_packets++;
2001 dev->stats.rx_bytes += retdesc->size;
2003 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2006 atomic_sub(std_count, &ap->cur_rx_bufs);
2007 if (!ACE_IS_TIGON_I(ap))
2008 atomic_sub(mini_count, &ap->cur_mini_bufs);
2012 * According to the documentation RxRetCsm is obsolete with
2013 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2015 if (ACE_IS_TIGON_I(ap)) {
2016 writel(idx, &ap->regs->RxRetCsm);
2027 static inline void ace_tx_int(struct net_device *dev,
2030 struct ace_private *ap = netdev_priv(dev);
2033 struct sk_buff *skb;
2034 struct tx_ring_info *info;
2036 info = ap->skb->tx_skbuff + idx;
2039 if (dma_unmap_len(info, maplen)) {
2040 dma_unmap_page(&ap->pdev->dev,
2041 dma_unmap_addr(info, mapping),
2042 dma_unmap_len(info, maplen),
2044 dma_unmap_len_set(info, maplen, 0);
2048 dev->stats.tx_packets++;
2049 dev->stats.tx_bytes += skb->len;
2050 dev_consume_skb_irq(skb);
2054 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2055 } while (idx != txcsm);
2057 if (netif_queue_stopped(dev))
2058 netif_wake_queue(dev);
2061 ap->tx_ret_csm = txcsm;
2063 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2065 * We could try to make it before. In this case we would get
2066 * the following race condition: hard_start_xmit on other cpu
2067 * enters after we advanced tx_ret_csm and fills space,
2068 * which we have just freed, so that we make illegal device wakeup.
2069 * There is no good way to workaround this (at entry
2070 * to ace_start_xmit detects this condition and prevents
2071 * ring corruption, but it is not a good workaround.)
2073 * When tx_ret_csm is advanced after, we wake up device _only_
2074 * if we really have some space in ring (though the core doing
2075 * hard_start_xmit can see full ring for some period and has to
2076 * synchronize.) Superb.
2077 * BUT! We get another subtle race condition. hard_start_xmit
2078 * may think that ring is full between wakeup and advancing
2079 * tx_ret_csm and will stop device instantly! It is not so bad.
2080 * We are guaranteed that there is something in ring, so that
2081 * the next irq will resume transmission. To speedup this we could
2082 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2083 * (see ace_start_xmit).
2085 * Well, this dilemma exists in all lock-free devices.
2086 * We, following scheme used in drivers by Donald Becker,
2087 * select the least dangerous.
2093 static irqreturn_t ace_interrupt(int irq, void *dev_id)
2095 struct net_device *dev = (struct net_device *)dev_id;
2096 struct ace_private *ap = netdev_priv(dev);
2097 struct ace_regs __iomem *regs = ap->regs;
2099 u32 txcsm, rxretcsm, rxretprd;
2103 * In case of PCI shared interrupts or spurious interrupts,
2104 * we want to make sure it is actually our interrupt before
2105 * spending any time in here.
2107 if (!(readl(®s->HostCtrl) & IN_INT))
2111 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2112 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2113 * writel(0, ®s->Mb0Lo).
2115 * "IRQ avoidance" recommended in docs applies to IRQs served
2116 * threads and it is wrong even for that case.
2118 writel(0, ®s->Mb0Lo);
2119 readl(®s->Mb0Lo);
2122 * There is no conflict between transmit handling in
2123 * start_xmit and receive processing, thus there is no reason
2124 * to take a spin lock for RX handling. Wait until we start
2125 * working on the other stuff - hey we don't need a spin lock
2128 rxretprd = *ap->rx_ret_prd;
2129 rxretcsm = ap->cur_rx;
2131 if (rxretprd != rxretcsm)
2132 ace_rx_int(dev, rxretprd, rxretcsm);
2134 txcsm = *ap->tx_csm;
2135 idx = ap->tx_ret_csm;
2139 * If each skb takes only one descriptor this check degenerates
2140 * to identity, because new space has just been opened.
2141 * But if skbs are fragmented we must check that this index
2142 * update releases enough of space, otherwise we just
2143 * wait for device to make more work.
2145 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2146 ace_tx_int(dev, txcsm, idx);
2149 evtcsm = readl(®s->EvtCsm);
2150 evtprd = *ap->evt_prd;
2152 if (evtcsm != evtprd) {
2153 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2154 writel(evtcsm, ®s->EvtCsm);
2158 * This has to go last in the interrupt handler and run with
2159 * the spin lock released ... what lock?
2161 if (netif_running(dev)) {
2163 int run_tasklet = 0;
2165 cur_size = atomic_read(&ap->cur_rx_bufs);
2166 if (cur_size < RX_LOW_STD_THRES) {
2167 if ((cur_size < RX_PANIC_STD_THRES) &&
2168 !test_and_set_bit(0, &ap->std_refill_busy)) {
2170 printk("low on std buffers %i\n", cur_size);
2172 ace_load_std_rx_ring(dev,
2173 RX_RING_SIZE - cur_size);
2178 if (!ACE_IS_TIGON_I(ap)) {
2179 cur_size = atomic_read(&ap->cur_mini_bufs);
2180 if (cur_size < RX_LOW_MINI_THRES) {
2181 if ((cur_size < RX_PANIC_MINI_THRES) &&
2182 !test_and_set_bit(0,
2183 &ap->mini_refill_busy)) {
2185 printk("low on mini buffers %i\n",
2188 ace_load_mini_rx_ring(dev,
2189 RX_MINI_SIZE - cur_size);
2196 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2197 if (cur_size < RX_LOW_JUMBO_THRES) {
2198 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2199 !test_and_set_bit(0,
2200 &ap->jumbo_refill_busy)){
2202 printk("low on jumbo buffers %i\n",
2205 ace_load_jumbo_rx_ring(dev,
2206 RX_JUMBO_SIZE - cur_size);
2211 if (run_tasklet && !ap->tasklet_pending) {
2212 ap->tasklet_pending = 1;
2213 tasklet_schedule(&ap->ace_tasklet);
2220 static int ace_open(struct net_device *dev)
2222 struct ace_private *ap = netdev_priv(dev);
2223 struct ace_regs __iomem *regs = ap->regs;
2226 if (!(ap->fw_running)) {
2227 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2231 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2233 cmd.evt = C_CLEAR_STATS;
2236 ace_issue_cmd(regs, &cmd);
2238 cmd.evt = C_HOST_STATE;
2239 cmd.code = C_C_STACK_UP;
2241 ace_issue_cmd(regs, &cmd);
2244 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2245 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2247 if (dev->flags & IFF_PROMISC) {
2248 cmd.evt = C_SET_PROMISC_MODE;
2249 cmd.code = C_C_PROMISC_ENABLE;
2251 ace_issue_cmd(regs, &cmd);
2259 cmd.evt = C_LNK_NEGOTIATION;
2262 ace_issue_cmd(regs, &cmd);
2265 netif_start_queue(dev);
2268 * Setup the bottom half rx ring refill handler
2270 tasklet_setup(&ap->ace_tasklet, ace_tasklet);
2275 static int ace_close(struct net_device *dev)
2277 struct ace_private *ap = netdev_priv(dev);
2278 struct ace_regs __iomem *regs = ap->regs;
2280 unsigned long flags;
2284 * Without (or before) releasing irq and stopping hardware, this
2285 * is an absolute non-sense, by the way. It will be reset instantly
2288 netif_stop_queue(dev);
2292 cmd.evt = C_SET_PROMISC_MODE;
2293 cmd.code = C_C_PROMISC_DISABLE;
2295 ace_issue_cmd(regs, &cmd);
2299 cmd.evt = C_HOST_STATE;
2300 cmd.code = C_C_STACK_DOWN;
2302 ace_issue_cmd(regs, &cmd);
2304 tasklet_kill(&ap->ace_tasklet);
2307 * Make sure one CPU is not processing packets while
2308 * buffers are being released by another.
2311 local_irq_save(flags);
2314 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2315 struct sk_buff *skb;
2316 struct tx_ring_info *info;
2318 info = ap->skb->tx_skbuff + i;
2321 if (dma_unmap_len(info, maplen)) {
2322 if (ACE_IS_TIGON_I(ap)) {
2323 /* NB: TIGON_1 is special, tx_ring is in io space */
2324 struct tx_desc __iomem *tx;
2325 tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
2326 writel(0, &tx->addr.addrhi);
2327 writel(0, &tx->addr.addrlo);
2328 writel(0, &tx->flagsize);
2330 memset(ap->tx_ring + i, 0,
2331 sizeof(struct tx_desc));
2332 dma_unmap_page(&ap->pdev->dev,
2333 dma_unmap_addr(info, mapping),
2334 dma_unmap_len(info, maplen),
2336 dma_unmap_len_set(info, maplen, 0);
2345 cmd.evt = C_RESET_JUMBO_RNG;
2348 ace_issue_cmd(regs, &cmd);
2351 ace_unmask_irq(dev);
2352 local_irq_restore(flags);
2358 static inline dma_addr_t
2359 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2360 struct sk_buff *tail, u32 idx)
2363 struct tx_ring_info *info;
2365 mapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data),
2366 offset_in_page(skb->data), skb->len,
2369 info = ap->skb->tx_skbuff + idx;
2371 dma_unmap_addr_set(info, mapping, mapping);
2372 dma_unmap_len_set(info, maplen, skb->len);
2378 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2379 u32 flagsize, u32 vlan_tag)
2381 #if !USE_TX_COAL_NOW
2382 flagsize &= ~BD_FLG_COAL_NOW;
2385 if (ACE_IS_TIGON_I(ap)) {
2386 struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
2387 writel(addr >> 32, &io->addr.addrhi);
2388 writel(addr & 0xffffffff, &io->addr.addrlo);
2389 writel(flagsize, &io->flagsize);
2390 writel(vlan_tag, &io->vlanres);
2392 desc->addr.addrhi = addr >> 32;
2393 desc->addr.addrlo = addr;
2394 desc->flagsize = flagsize;
2395 desc->vlanres = vlan_tag;
2400 static netdev_tx_t ace_start_xmit(struct sk_buff *skb,
2401 struct net_device *dev)
2403 struct ace_private *ap = netdev_priv(dev);
2404 struct ace_regs __iomem *regs = ap->regs;
2405 struct tx_desc *desc;
2407 unsigned long maxjiff = jiffies + 3*HZ;
2412 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2415 if (!skb_shinfo(skb)->nr_frags) {
2419 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2420 flagsize = (skb->len << 16) | (BD_FLG_END);
2421 if (skb->ip_summed == CHECKSUM_PARTIAL)
2422 flagsize |= BD_FLG_TCP_UDP_SUM;
2423 if (skb_vlan_tag_present(skb)) {
2424 flagsize |= BD_FLG_VLAN_TAG;
2425 vlan_tag = skb_vlan_tag_get(skb);
2427 desc = ap->tx_ring + idx;
2428 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2430 /* Look at ace_tx_int for explanations. */
2431 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2432 flagsize |= BD_FLG_COAL_NOW;
2434 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2440 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2441 flagsize = (skb_headlen(skb) << 16);
2442 if (skb->ip_summed == CHECKSUM_PARTIAL)
2443 flagsize |= BD_FLG_TCP_UDP_SUM;
2444 if (skb_vlan_tag_present(skb)) {
2445 flagsize |= BD_FLG_VLAN_TAG;
2446 vlan_tag = skb_vlan_tag_get(skb);
2449 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2451 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2453 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2454 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2455 struct tx_ring_info *info;
2457 len += skb_frag_size(frag);
2458 info = ap->skb->tx_skbuff + idx;
2459 desc = ap->tx_ring + idx;
2461 mapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0,
2462 skb_frag_size(frag),
2465 flagsize = skb_frag_size(frag) << 16;
2466 if (skb->ip_summed == CHECKSUM_PARTIAL)
2467 flagsize |= BD_FLG_TCP_UDP_SUM;
2468 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2470 if (i == skb_shinfo(skb)->nr_frags - 1) {
2471 flagsize |= BD_FLG_END;
2472 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2473 flagsize |= BD_FLG_COAL_NOW;
2476 * Only the last fragment frees
2483 dma_unmap_addr_set(info, mapping, mapping);
2484 dma_unmap_len_set(info, maplen, skb_frag_size(frag));
2485 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2491 ace_set_txprd(regs, ap, idx);
2493 if (flagsize & BD_FLG_COAL_NOW) {
2494 netif_stop_queue(dev);
2497 * A TX-descriptor producer (an IRQ) might have gotten
2498 * between, making the ring free again. Since xmit is
2499 * serialized, this is the only situation we have to
2502 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2503 netif_wake_queue(dev);
2506 return NETDEV_TX_OK;
2510 * This race condition is unavoidable with lock-free drivers.
2511 * We wake up the queue _before_ tx_prd is advanced, so that we can
2512 * enter hard_start_xmit too early, while tx ring still looks closed.
2513 * This happens ~1-4 times per 100000 packets, so that we can allow
2514 * to loop syncing to other CPU. Probably, we need an additional
2515 * wmb() in ace_tx_intr as well.
2517 * Note that this race is relieved by reserving one more entry
2518 * in tx ring than it is necessary (see original non-SG driver).
2519 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2520 * is already overkill.
2522 * Alternative is to return with 1 not throttling queue. In this
2523 * case loop becomes longer, no more useful effects.
2525 if (time_before(jiffies, maxjiff)) {
2531 /* The ring is stuck full. */
2532 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2533 return NETDEV_TX_BUSY;
2537 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2539 struct ace_private *ap = netdev_priv(dev);
2540 struct ace_regs __iomem *regs = ap->regs;
2542 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2545 if (new_mtu > ACE_STD_MTU) {
2547 printk(KERN_INFO "%s: Enabling Jumbo frame "
2548 "support\n", dev->name);
2550 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2551 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2552 ace_set_rxtx_parms(dev, 1);
2555 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2556 ace_sync_irq(dev->irq);
2557 ace_set_rxtx_parms(dev, 0);
2561 cmd.evt = C_RESET_JUMBO_RNG;
2564 ace_issue_cmd(regs, &cmd);
2571 static int ace_get_link_ksettings(struct net_device *dev,
2572 struct ethtool_link_ksettings *cmd)
2574 struct ace_private *ap = netdev_priv(dev);
2575 struct ace_regs __iomem *regs = ap->regs;
2579 memset(cmd, 0, sizeof(struct ethtool_link_ksettings));
2581 supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2582 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2583 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2584 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2586 cmd->base.port = PORT_FIBRE;
2588 link = readl(®s->GigLnkState);
2589 if (link & LNK_1000MB) {
2590 cmd->base.speed = SPEED_1000;
2592 link = readl(®s->FastLnkState);
2593 if (link & LNK_100MB)
2594 cmd->base.speed = SPEED_100;
2595 else if (link & LNK_10MB)
2596 cmd->base.speed = SPEED_10;
2598 cmd->base.speed = 0;
2600 if (link & LNK_FULL_DUPLEX)
2601 cmd->base.duplex = DUPLEX_FULL;
2603 cmd->base.duplex = DUPLEX_HALF;
2605 if (link & LNK_NEGOTIATE)
2606 cmd->base.autoneg = AUTONEG_ENABLE;
2608 cmd->base.autoneg = AUTONEG_DISABLE;
2612 * Current struct ethtool_cmd is insufficient
2614 ecmd->trace = readl(®s->TuneTrace);
2616 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2617 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2620 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
2626 static int ace_set_link_ksettings(struct net_device *dev,
2627 const struct ethtool_link_ksettings *cmd)
2629 struct ace_private *ap = netdev_priv(dev);
2630 struct ace_regs __iomem *regs = ap->regs;
2633 link = readl(®s->GigLnkState);
2634 if (link & LNK_1000MB)
2637 link = readl(®s->FastLnkState);
2638 if (link & LNK_100MB)
2640 else if (link & LNK_10MB)
2646 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2647 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2648 if (!ACE_IS_TIGON_I(ap))
2649 link |= LNK_TX_FLOW_CTL_Y;
2650 if (cmd->base.autoneg == AUTONEG_ENABLE)
2651 link |= LNK_NEGOTIATE;
2652 if (cmd->base.speed != speed) {
2653 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2654 switch (cmd->base.speed) {
2667 if (cmd->base.duplex == DUPLEX_FULL)
2668 link |= LNK_FULL_DUPLEX;
2670 if (link != ap->link) {
2672 printk(KERN_INFO "%s: Renegotiating link state\n",
2676 writel(link, ®s->TuneLink);
2677 if (!ACE_IS_TIGON_I(ap))
2678 writel(link, ®s->TuneFastLink);
2681 cmd.evt = C_LNK_NEGOTIATION;
2684 ace_issue_cmd(regs, &cmd);
2689 static void ace_get_drvinfo(struct net_device *dev,
2690 struct ethtool_drvinfo *info)
2692 struct ace_private *ap = netdev_priv(dev);
2694 strlcpy(info->driver, "acenic", sizeof(info->driver));
2695 snprintf(info->fw_version, sizeof(info->version), "%i.%i.%i",
2696 ap->firmware_major, ap->firmware_minor, ap->firmware_fix);
2699 strlcpy(info->bus_info, pci_name(ap->pdev),
2700 sizeof(info->bus_info));
2705 * Set the hardware MAC address.
2707 static int ace_set_mac_addr(struct net_device *dev, void *p)
2709 struct ace_private *ap = netdev_priv(dev);
2710 struct ace_regs __iomem *regs = ap->regs;
2711 struct sockaddr *addr=p;
2715 if(netif_running(dev))
2718 eth_hw_addr_set(dev, addr->sa_data);
2720 da = (const u8 *)dev->dev_addr;
2722 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2723 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2726 cmd.evt = C_SET_MAC_ADDR;
2729 ace_issue_cmd(regs, &cmd);
2735 static void ace_set_multicast_list(struct net_device *dev)
2737 struct ace_private *ap = netdev_priv(dev);
2738 struct ace_regs __iomem *regs = ap->regs;
2741 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2742 cmd.evt = C_SET_MULTICAST_MODE;
2743 cmd.code = C_C_MCAST_ENABLE;
2745 ace_issue_cmd(regs, &cmd);
2747 } else if (ap->mcast_all) {
2748 cmd.evt = C_SET_MULTICAST_MODE;
2749 cmd.code = C_C_MCAST_DISABLE;
2751 ace_issue_cmd(regs, &cmd);
2755 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2756 cmd.evt = C_SET_PROMISC_MODE;
2757 cmd.code = C_C_PROMISC_ENABLE;
2759 ace_issue_cmd(regs, &cmd);
2761 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2762 cmd.evt = C_SET_PROMISC_MODE;
2763 cmd.code = C_C_PROMISC_DISABLE;
2765 ace_issue_cmd(regs, &cmd);
2770 * For the time being multicast relies on the upper layers
2771 * filtering it properly. The Firmware does not allow one to
2772 * set the entire multicast list at a time and keeping track of
2773 * it here is going to be messy.
2775 if (!netdev_mc_empty(dev) && !ap->mcast_all) {
2776 cmd.evt = C_SET_MULTICAST_MODE;
2777 cmd.code = C_C_MCAST_ENABLE;
2779 ace_issue_cmd(regs, &cmd);
2780 }else if (!ap->mcast_all) {
2781 cmd.evt = C_SET_MULTICAST_MODE;
2782 cmd.code = C_C_MCAST_DISABLE;
2784 ace_issue_cmd(regs, &cmd);
2789 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2791 struct ace_private *ap = netdev_priv(dev);
2792 struct ace_mac_stats __iomem *mac_stats =
2793 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2795 dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2796 dev->stats.multicast = readl(&mac_stats->kept_mc);
2797 dev->stats.collisions = readl(&mac_stats->coll);
2803 static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2806 void __iomem *tdest;
2813 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2814 min_t(u32, size, ACE_WINDOW_SIZE));
2815 tdest = (void __iomem *) ®s->Window +
2816 (dest & (ACE_WINDOW_SIZE - 1));
2817 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2818 for (i = 0; i < (tsize / 4); i++) {
2819 /* Firmware is big-endian */
2820 writel(be32_to_cpup(src), tdest);
2830 static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2832 void __iomem *tdest;
2839 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2840 min_t(u32, size, ACE_WINDOW_SIZE));
2841 tdest = (void __iomem *) ®s->Window +
2842 (dest & (ACE_WINDOW_SIZE - 1));
2843 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2845 for (i = 0; i < (tsize / 4); i++) {
2846 writel(0, tdest + i*4);
2856 * Download the firmware into the SRAM on the NIC
2858 * This operation requires the NIC to be halted and is performed with
2859 * interrupts disabled and with the spinlock hold.
2861 static int ace_load_firmware(struct net_device *dev)
2863 const struct firmware *fw;
2864 const char *fw_name = "/*(DEBLOBBED)*/";
2865 struct ace_private *ap = netdev_priv(dev);
2866 struct ace_regs __iomem *regs = ap->regs;
2867 const __be32 *fw_data;
2871 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2872 printk(KERN_ERR "%s: trying to download firmware while the "
2873 "CPU is running!\n", ap->name);
2877 if (ACE_IS_TIGON_I(ap))
2878 fw_name = "/*(DEBLOBBED)*/";
2880 ret = reject_firmware(&fw, fw_name, &ap->pdev->dev);
2882 printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
2887 fw_data = (void *)fw->data;
2889 /* Firmware blob starts with version numbers, followed by
2890 load and start address. Remainder is the blob to be loaded
2891 contiguously from load address. We don't bother to represent
2892 the BSS/SBSS sections any more, since we were clearing the
2893 whole thing anyway. */
2894 ap->firmware_major = fw->data[0];
2895 ap->firmware_minor = fw->data[1];
2896 ap->firmware_fix = fw->data[2];
2898 ap->firmware_start = be32_to_cpu(fw_data[1]);
2899 if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
2900 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2901 ap->name, ap->firmware_start, fw_name);
2906 load_addr = be32_to_cpu(fw_data[2]);
2907 if (load_addr < 0x4000 || load_addr >= 0x80000) {
2908 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2909 ap->name, load_addr, fw_name);
2915 * Do not try to clear more than 512KiB or we end up seeing
2916 * funny things on NICs with only 512KiB SRAM
2918 ace_clear(regs, 0x2000, 0x80000-0x2000);
2919 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2921 release_firmware(fw);
2927 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2929 * Accessing the EEPROM is `interesting' to say the least - don't read
2930 * this code right after dinner.
2932 * This is all about black magic and bit-banging the device .... I
2933 * wonder in what hospital they have put the guy who designed the i2c
2936 * Oh yes, this is only the beginning!
2938 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2939 * code i2c readout code by beta testing all my hacks.
2941 static void eeprom_start(struct ace_regs __iomem *regs)
2945 readl(®s->LocalCtrl);
2946 udelay(ACE_SHORT_DELAY);
2947 local = readl(®s->LocalCtrl);
2948 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2949 writel(local, ®s->LocalCtrl);
2950 readl(®s->LocalCtrl);
2952 udelay(ACE_SHORT_DELAY);
2953 local |= EEPROM_CLK_OUT;
2954 writel(local, ®s->LocalCtrl);
2955 readl(®s->LocalCtrl);
2957 udelay(ACE_SHORT_DELAY);
2958 local &= ~EEPROM_DATA_OUT;
2959 writel(local, ®s->LocalCtrl);
2960 readl(®s->LocalCtrl);
2962 udelay(ACE_SHORT_DELAY);
2963 local &= ~EEPROM_CLK_OUT;
2964 writel(local, ®s->LocalCtrl);
2965 readl(®s->LocalCtrl);
2970 static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
2975 udelay(ACE_SHORT_DELAY);
2976 local = readl(®s->LocalCtrl);
2977 local &= ~EEPROM_DATA_OUT;
2978 local |= EEPROM_WRITE_ENABLE;
2979 writel(local, ®s->LocalCtrl);
2980 readl(®s->LocalCtrl);
2983 for (i = 0; i < 8; i++, magic <<= 1) {
2984 udelay(ACE_SHORT_DELAY);
2986 local |= EEPROM_DATA_OUT;
2988 local &= ~EEPROM_DATA_OUT;
2989 writel(local, ®s->LocalCtrl);
2990 readl(®s->LocalCtrl);
2993 udelay(ACE_SHORT_DELAY);
2994 local |= EEPROM_CLK_OUT;
2995 writel(local, ®s->LocalCtrl);
2996 readl(®s->LocalCtrl);
2998 udelay(ACE_SHORT_DELAY);
2999 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3000 writel(local, ®s->LocalCtrl);
3001 readl(®s->LocalCtrl);
3007 static int eeprom_check_ack(struct ace_regs __iomem *regs)
3012 local = readl(®s->LocalCtrl);
3013 local &= ~EEPROM_WRITE_ENABLE;
3014 writel(local, ®s->LocalCtrl);
3015 readl(®s->LocalCtrl);
3017 udelay(ACE_LONG_DELAY);
3018 local |= EEPROM_CLK_OUT;
3019 writel(local, ®s->LocalCtrl);
3020 readl(®s->LocalCtrl);
3022 udelay(ACE_SHORT_DELAY);
3023 /* sample data in middle of high clk */
3024 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3025 udelay(ACE_SHORT_DELAY);
3027 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3028 readl(®s->LocalCtrl);
3035 static void eeprom_stop(struct ace_regs __iomem *regs)
3039 udelay(ACE_SHORT_DELAY);
3040 local = readl(®s->LocalCtrl);
3041 local |= EEPROM_WRITE_ENABLE;
3042 writel(local, ®s->LocalCtrl);
3043 readl(®s->LocalCtrl);
3045 udelay(ACE_SHORT_DELAY);
3046 local &= ~EEPROM_DATA_OUT;
3047 writel(local, ®s->LocalCtrl);
3048 readl(®s->LocalCtrl);
3050 udelay(ACE_SHORT_DELAY);
3051 local |= EEPROM_CLK_OUT;
3052 writel(local, ®s->LocalCtrl);
3053 readl(®s->LocalCtrl);
3055 udelay(ACE_SHORT_DELAY);
3056 local |= EEPROM_DATA_OUT;
3057 writel(local, ®s->LocalCtrl);
3058 readl(®s->LocalCtrl);
3060 udelay(ACE_LONG_DELAY);
3061 local &= ~EEPROM_CLK_OUT;
3062 writel(local, ®s->LocalCtrl);
3068 * Read a whole byte from the EEPROM.
3070 static int read_eeprom_byte(struct net_device *dev, unsigned long offset)
3072 struct ace_private *ap = netdev_priv(dev);
3073 struct ace_regs __iomem *regs = ap->regs;
3074 unsigned long flags;
3080 * Don't take interrupts on this CPU will bit banging
3081 * the %#%#@$ I2C device
3083 local_irq_save(flags);
3087 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3088 if (eeprom_check_ack(regs)) {
3089 local_irq_restore(flags);
3090 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3092 goto eeprom_read_error;
3095 eeprom_prep(regs, (offset >> 8) & 0xff);
3096 if (eeprom_check_ack(regs)) {
3097 local_irq_restore(flags);
3098 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3101 goto eeprom_read_error;
3104 eeprom_prep(regs, offset & 0xff);
3105 if (eeprom_check_ack(regs)) {
3106 local_irq_restore(flags);
3107 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3110 goto eeprom_read_error;
3114 eeprom_prep(regs, EEPROM_READ_SELECT);
3115 if (eeprom_check_ack(regs)) {
3116 local_irq_restore(flags);
3117 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3120 goto eeprom_read_error;
3123 for (i = 0; i < 8; i++) {
3124 local = readl(®s->LocalCtrl);
3125 local &= ~EEPROM_WRITE_ENABLE;
3126 writel(local, ®s->LocalCtrl);
3127 readl(®s->LocalCtrl);
3128 udelay(ACE_LONG_DELAY);
3130 local |= EEPROM_CLK_OUT;
3131 writel(local, ®s->LocalCtrl);
3132 readl(®s->LocalCtrl);
3134 udelay(ACE_SHORT_DELAY);
3135 /* sample data mid high clk */
3136 result = (result << 1) |
3137 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3138 udelay(ACE_SHORT_DELAY);
3140 local = readl(®s->LocalCtrl);
3141 local &= ~EEPROM_CLK_OUT;
3142 writel(local, ®s->LocalCtrl);
3143 readl(®s->LocalCtrl);
3144 udelay(ACE_SHORT_DELAY);
3147 local |= EEPROM_WRITE_ENABLE;
3148 writel(local, ®s->LocalCtrl);
3149 readl(®s->LocalCtrl);
3151 udelay(ACE_SHORT_DELAY);
3155 local |= EEPROM_DATA_OUT;
3156 writel(local, ®s->LocalCtrl);
3157 readl(®s->LocalCtrl);
3159 udelay(ACE_SHORT_DELAY);
3160 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3161 readl(®s->LocalCtrl);
3162 udelay(ACE_LONG_DELAY);
3163 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3164 readl(®s->LocalCtrl);
3166 udelay(ACE_SHORT_DELAY);
3169 local_irq_restore(flags);
3174 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3179 module_pci_driver(acenic_pci_driver);