drivers/net/dsa/sja1105/sja1105_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
   3  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
   4  */
   5
   6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   7
   8 #include <linux/delay.h>
   9 #include <linux/module.h>
  10 #include <linux/printk.h>
  11 #include <linux/spi/spi.h>
  12 #include <linux/errno.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/phylink.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_mdio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/netdev_features.h>
  20 #include <linux/netdevice.h>
  21 #include <linux/if_bridge.h>
  22 #include <linux/if_ether.h>
  23 #include <linux/dsa/8021q.h>
  24 #include "sja1105.h"
  25 #include "sja1105_sgmii.h"
  26 #include "sja1105_tas.h"
  27
  28 #define SJA1105_DEFAULT_VLAN            (VLAN_N_VID - 1)
  29
  30 static const struct dsa_switch_ops sja1105_switch_ops;
  31
  32 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
  33                              unsigned int startup_delay)
  34 {
  35         gpiod_set_value_cansleep(gpio, 1);
  36         /* Wait for minimum reset pulse length */
  37         msleep(pulse_len);
  38         gpiod_set_value_cansleep(gpio, 0);
  39         /* Wait until chip is ready after reset */
  40         msleep(startup_delay);
  41 }
  42
  43 static void
  44 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
  45                            int from, int to, bool allow)
  46 {
  47         if (allow) {
  48                 l2_fwd[from].bc_domain  |= BIT(to);
  49                 l2_fwd[from].reach_port |= BIT(to);
  50                 l2_fwd[from].fl_domain  |= BIT(to);
  51         } else {
  52                 l2_fwd[from].bc_domain  &= ~BIT(to);
  53                 l2_fwd[from].reach_port &= ~BIT(to);
  54                 l2_fwd[from].fl_domain  &= ~BIT(to);
  55         }
  56 }
  57
  58 /* Structure used to temporarily transport device tree
  59  * settings into sja1105_setup
  60  */
  61 struct sja1105_dt_port {
  62         phy_interface_t phy_mode;
  63         sja1105_mii_role_t role;
  64 };
  65
  66 static int sja1105_init_mac_settings(struct sja1105_private *priv)
  67 {
  68         struct sja1105_mac_config_entry default_mac = {
  69                 /* Enable all 8 priority queues on egress.
  70                  * Every queue i holds top[i] - base[i] frames.
  71                  * Sum of top[i] - base[i] is 511 (max hardware limit).
  72                  */
  73                 .top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
  74                 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
  75                 .enabled = {true, true, true, true, true, true, true, true},
  76                 /* Keep standard IFG of 12 bytes on egress. */
  77                 .ifg = 0,
  78                 /* Always put the MAC speed in automatic mode, where it can be
  79                  * adjusted at runtime by PHYLINK.
  80                  */
  81                 .speed = SJA1105_SPEED_AUTO,
  82                 /* No static correction for 1-step 1588 events */
  83                 .tp_delin = 0,
  84                 .tp_delout = 0,
  85                 /* Disable aging for critical TTEthernet traffic */
  86                 .maxage = 0xFF,
  87                 /* Internal VLAN (pvid) to apply to untagged ingress */
  88                 .vlanprio = 0,
  89                 .vlanid = 1,
  90                 .ing_mirr = false,
  91                 .egr_mirr = false,
  92                 /* Don't drop traffic with other EtherType than ETH_P_IP */
  93                 .drpnona664 = false,
  94                 /* Don't drop double-tagged traffic */
  95                 .drpdtag = false,
  96                 /* Don't drop untagged traffic */
  97                 .drpuntag = false,
  98                 /* Don't retag 802.1p (VID 0) traffic with the pvid */
  99                 .retag = false,
 100                 /* Disable learning and I/O on user ports by default -
 101                  * STP will enable it.
 102                  */
 103                 .dyn_learn = false,
 104                 .egress = false,
 105                 .ingress = false,
 106         };
 107         struct sja1105_mac_config_entry *mac;
 108         struct sja1105_table *table;
 109         int i;
 110
 111         table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
 112
 113         /* Discard previous MAC Configuration Table */
 114         if (table->entry_count) {
 115                 kfree(table->entries);
 116                 table->entry_count = 0;
 117         }
 118
 119         table->entries = kcalloc(SJA1105_NUM_PORTS,
 120                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 121         if (!table->entries)
 122                 return -ENOMEM;
 123
 124         table->entry_count = SJA1105_NUM_PORTS;
 125
 126         mac = table->entries;
 127
 128         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 129                 mac[i] = default_mac;
 130                 if (i == dsa_upstream_port(priv->ds, i)) {
 131                         /* STP doesn't get called for CPU port, so we need to
 132                          * set the I/O parameters statically.
 133                          */
 134                         mac[i].dyn_learn = true;
 135                         mac[i].ingress = true;
 136                         mac[i].egress = true;
 137                 }
 138         }
 139
 140         return 0;
 141 }
 142
 143 static bool sja1105_supports_sgmii(struct sja1105_private *priv, int port)
 144 {
 145         if (priv->info->part_no != SJA1105R_PART_NO &&
 146             priv->info->part_no != SJA1105S_PART_NO)
 147                 return false;
 148
 149         if (port != SJA1105_SGMII_PORT)
 150                 return false;
 151
 152         if (dsa_is_unused_port(priv->ds, port))
 153                 return false;
 154
 155         return true;
 156 }
 157
 158 static int sja1105_init_mii_settings(struct sja1105_private *priv,
 159                                      struct sja1105_dt_port *ports)
 160 {
 161         struct device *dev = &priv->spidev->dev;
 162         struct sja1105_xmii_params_entry *mii;
 163         struct sja1105_table *table;
 164         int i;
 165
 166         table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
 167
 168         /* Discard previous xMII Mode Parameters Table */
 169         if (table->entry_count) {
 170                 kfree(table->entries);
 171                 table->entry_count = 0;
 172         }
 173
 174         table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT,
 175                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 176         if (!table->entries)
 177                 return -ENOMEM;
 178
 179         /* Override table based on PHYLINK DT bindings */
 180         table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT;
 181
 182         mii = table->entries;
 183
 184         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 185                 if (dsa_is_unused_port(priv->ds, i))
 186                         continue;
 187
 188                 switch (ports[i].phy_mode) {
 189                 case PHY_INTERFACE_MODE_MII:
 190                         mii->xmii_mode[i] = XMII_MODE_MII;
 191                         break;
 192                 case PHY_INTERFACE_MODE_RMII:
 193                         mii->xmii_mode[i] = XMII_MODE_RMII;
 194                         break;
 195                 case PHY_INTERFACE_MODE_RGMII:
 196                 case PHY_INTERFACE_MODE_RGMII_ID:
 197                 case PHY_INTERFACE_MODE_RGMII_RXID:
 198                 case PHY_INTERFACE_MODE_RGMII_TXID:
 199                         mii->xmii_mode[i] = XMII_MODE_RGMII;
 200                         break;
 201                 case PHY_INTERFACE_MODE_SGMII:
 202                         if (!sja1105_supports_sgmii(priv, i))
 203                                 return -EINVAL;
 204                         mii->xmii_mode[i] = XMII_MODE_SGMII;
 205                         break;
 206                 default:
 207                         dev_err(dev, "Unsupported PHY mode %s!\n",
 208                                 phy_modes(ports[i].phy_mode));
 209                         return -EINVAL;
 210                 }
 211
 212                 /* Even though the SerDes port is able to drive SGMII autoneg
 213                  * like a PHY would, from the perspective of the XMII tables,
 214                  * the SGMII port should always be put in MAC mode.
 215                  */
 216                 if (ports[i].phy_mode == PHY_INTERFACE_MODE_SGMII)
 217                         mii->phy_mac[i] = XMII_MAC;
 218                 else
 219                         mii->phy_mac[i] = ports[i].role;
 220         }
 221         return 0;
 222 }
 223
 224 static int sja1105_init_static_fdb(struct sja1105_private *priv)
 225 {
 226         struct sja1105_table *table;
 227
 228         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 229
 230         /* We only populate the FDB table through dynamic
 231          * L2 Address Lookup entries
 232          */
 233         if (table->entry_count) {
 234                 kfree(table->entries);
 235                 table->entry_count = 0;
 236         }
 237         return 0;
 238 }
 239
 240 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
 241 {
 242         struct sja1105_table *table;
 243         u64 max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / SJA1105_NUM_PORTS;
 244         struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
 245                 /* Learned FDB entries are forgotten after 300 seconds */
 246                 .maxage = SJA1105_AGEING_TIME_MS(300000),
 247                 /* All entries within a FDB bin are available for learning */
 248                 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
 249                 /* And the P/Q/R/S equivalent setting: */
 250                 .start_dynspc = 0,
 251                 .maxaddrp = {max_fdb_entries, max_fdb_entries, max_fdb_entries,
 252                              max_fdb_entries, max_fdb_entries, },
 253                 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
 254                 .poly = 0x97,
 255                 /* This selects between Independent VLAN Learning (IVL) and
 256                  * Shared VLAN Learning (SVL)
 257                  */
 258                 .shared_learn = true,
 259                 /* Don't discard management traffic based on ENFPORT -
 260                  * we don't perform SMAC port enforcement anyway, so
 261                  * what we are setting here doesn't matter.
 262                  */
 263                 .no_enf_hostprt = false,
 264                 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
 265                  * Maybe correlate with no_linklocal_learn from bridge driver?
 266                  */
 267                 .no_mgmt_learn = true,
 268                 /* P/Q/R/S only */
 269                 .use_static = true,
 270                 /* Dynamically learned FDB entries can overwrite other (older)
 271                  * dynamic FDB entries
 272                  */
 273                 .owr_dyn = true,
 274                 .drpnolearn = true,
 275         };
 276
 277         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
 278
 279         if (table->entry_count) {
 280                 kfree(table->entries);
 281                 table->entry_count = 0;
 282         }
 283
 284         table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,
 285                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 286         if (!table->entries)
 287                 return -ENOMEM;
 288
 289         table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT;
 290
 291         /* This table only has a single entry */
 292         ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
 293                                 default_l2_lookup_params;
 294
 295         return 0;
 296 }
 297
 298 /* Set up a default VLAN for untagged traffic injected from the CPU
 299  * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
 300  * All DT-defined ports are members of this VLAN, and there are no
 301  * restrictions on forwarding (since the CPU selects the destination).
 302  * Frames from this VLAN will always be transmitted as untagged, and
 303  * neither the bridge nor the 8021q module cannot create this VLAN ID.
 304  */
 305 static int sja1105_init_static_vlan(struct sja1105_private *priv)
 306 {
 307         struct sja1105_table *table;
 308         struct sja1105_vlan_lookup_entry pvid = {
 309                 .ving_mirr = 0,
 310                 .vegr_mirr = 0,
 311                 .vmemb_port = 0,
 312                 .vlan_bc = 0,
 313                 .tag_port = 0,
 314                 .vlanid = SJA1105_DEFAULT_VLAN,
 315         };
 316         struct dsa_switch *ds = priv->ds;
 317         int port;
 318
 319         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
 320
 321         if (table->entry_count) {
 322                 kfree(table->entries);
 323                 table->entry_count = 0;
 324         }
 325
 326         table->entries = kcalloc(1, table->ops->unpacked_entry_size,
 327                                  GFP_KERNEL);
 328         if (!table->entries)
 329                 return -ENOMEM;
 330
 331         table->entry_count = 1;
 332
 333         for (port = 0; port < ds->num_ports; port++) {
 334                 struct sja1105_bridge_vlan *v;
 335
 336                 if (dsa_is_unused_port(ds, port))
 337                         continue;
 338
 339                 pvid.vmemb_port |= BIT(port);
 340                 pvid.vlan_bc |= BIT(port);
 341                 pvid.tag_port &= ~BIT(port);
 342
 343                 v = kzalloc(sizeof(*v), GFP_KERNEL);
 344                 if (!v)
 345                         return -ENOMEM;
 346
 347                 v->port = port;
 348                 v->vid = SJA1105_DEFAULT_VLAN;
 349                 v->untagged = true;
 350                 if (dsa_is_cpu_port(ds, port))
 351                         v->pvid = true;
 352                 list_add(&v->list, &priv->dsa_8021q_vlans);
 353
 354                 v = kmemdup(v, sizeof(*v), GFP_KERNEL);
 355                 if (!v)
 356                         return -ENOMEM;
 357
 358                 list_add(&v->list, &priv->bridge_vlans);
 359         }
 360
 361         ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
 362         return 0;
 363 }
 364
 365 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
 366 {
 367         struct sja1105_l2_forwarding_entry *l2fwd;
 368         struct sja1105_table *table;
 369         int i, j;
 370
 371         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
 372
 373         if (table->entry_count) {
 374                 kfree(table->entries);
 375                 table->entry_count = 0;
 376         }
 377
 378         table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT,
 379                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 380         if (!table->entries)
 381                 return -ENOMEM;
 382
 383         table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT;
 384
 385         l2fwd = table->entries;
 386
 387         /* First 5 entries define the forwarding rules */
 388         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 389                 unsigned int upstream = dsa_upstream_port(priv->ds, i);
 390
 391                 for (j = 0; j < SJA1105_NUM_TC; j++)
 392                         l2fwd[i].vlan_pmap[j] = j;
 393
 394                 if (i == upstream)
 395                         continue;
 396
 397                 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
 398                 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
 399         }
 400         /* Next 8 entries define VLAN PCP mapping from ingress to egress.
 401          * Create a one-to-one mapping.
 402          */
 403         for (i = 0; i < SJA1105_NUM_TC; i++)
 404                 for (j = 0; j < SJA1105_NUM_PORTS; j++)
 405                         l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i;
 406
 407         return 0;
 408 }
 409
 410 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
 411 {
 412         struct sja1105_l2_forwarding_params_entry default_l2fwd_params = {
 413                 /* Disallow dynamic reconfiguration of vlan_pmap */
 414                 .max_dynp = 0,
 415                 /* Use a single memory partition for all ingress queues */
 416                 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 },
 417         };
 418         struct sja1105_table *table;
 419
 420         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 421
 422         if (table->entry_count) {
 423                 kfree(table->entries);
 424                 table->entry_count = 0;
 425         }
 426
 427         table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,
 428                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 429         if (!table->entries)
 430                 return -ENOMEM;
 431
 432         table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT;
 433
 434         /* This table only has a single entry */
 435         ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] =
 436                                 default_l2fwd_params;
 437
 438         return 0;
 439 }
 440
 441 void sja1105_frame_memory_partitioning(struct sja1105_private *priv)
 442 {
 443         struct sja1105_l2_forwarding_params_entry *l2_fwd_params;
 444         struct sja1105_vl_forwarding_params_entry *vl_fwd_params;
 445         struct sja1105_table *table;
 446         int max_mem;
 447
 448         /* VLAN retagging is implemented using a loopback port that consumes
 449          * frame buffers. That leaves less for us.
 450          */
 451         if (priv->vlan_state == SJA1105_VLAN_BEST_EFFORT)
 452                 max_mem = SJA1105_MAX_FRAME_MEMORY_RETAGGING;
 453         else
 454                 max_mem = SJA1105_MAX_FRAME_MEMORY;
 455
 456         table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
 457         l2_fwd_params = table->entries;
 458         l2_fwd_params->part_spc[0] = max_mem;
 459
 460         /* If we have any critical-traffic virtual links, we need to reserve
 461          * some frame buffer memory for them. At the moment, hardcode the value
 462          * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
 463          * remaining for best-effort traffic. TODO: figure out a more flexible
 464          * way to perform the frame buffer partitioning.
 465          */
 466         if (!priv->static_config.tables[BLK_IDX_VL_FORWARDING].entry_count)
 467                 return;
 468
 469         table = &priv->static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];
 470         vl_fwd_params = table->entries;
 471
 472         l2_fwd_params->part_spc[0] -= SJA1105_VL_FRAME_MEMORY;
 473         vl_fwd_params->partspc[0] = SJA1105_VL_FRAME_MEMORY;
 474 }
 475
 476 static int sja1105_init_general_params(struct sja1105_private *priv)
 477 {
 478         struct sja1105_general_params_entry default_general_params = {
 479                 /* Allow dynamic changing of the mirror port */
 480                 .mirr_ptacu = true,
 481                 .switchid = priv->ds->index,
 482                 /* Priority queue for link-local management frames
 483                  * (both ingress to and egress from CPU - PTP, STP etc)
 484                  */
 485                 .hostprio = 7,
 486                 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
 487                 .mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,
 488                 .incl_srcpt1 = false,
 489                 .send_meta1  = false,
 490                 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
 491                 .mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,
 492                 .incl_srcpt0 = false,
 493                 .send_meta0  = false,
 494                 /* The destination for traffic matching mac_fltres1 and
 495                  * mac_fltres0 on all ports except host_port. Such traffic
 496                  * receieved on host_port itself would be dropped, except
 497                  * by installing a temporary 'management route'
 498                  */
 499                 .host_port = dsa_upstream_port(priv->ds, 0),
 500                 /* Default to an invalid value */
 501                 .mirr_port = SJA1105_NUM_PORTS,
 502                 /* Link-local traffic received on casc_port will be forwarded
 503                  * to host_port without embedding the source port and device ID
 504                  * info in the destination MAC address (presumably because it
 505                  * is a cascaded port and a downstream SJA switch already did
 506                  * that). Default to an invalid port (to disable the feature)
 507                  * and overwrite this if we find any DSA (cascaded) ports.
 508                  */
 509                 .casc_port = SJA1105_NUM_PORTS,
 510                 /* No TTEthernet */
 511                 .vllupformat = SJA1105_VL_FORMAT_PSFP,
 512                 .vlmarker = 0,
 513                 .vlmask = 0,
 514                 /* Only update correctionField for 1-step PTP (L2 transport) */
 515                 .ignore2stf = 0,
 516                 /* Forcefully disable VLAN filtering by telling
 517                  * the switch that VLAN has a different EtherType.
 518                  */
 519                 .tpid = ETH_P_SJA1105,
 520                 .tpid2 = ETH_P_SJA1105,
 521         };
 522         struct sja1105_table *table;
 523
 524         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
 525
 526         if (table->entry_count) {
 527                 kfree(table->entries);
 528                 table->entry_count = 0;
 529         }
 530
 531         table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT,
 532                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 533         if (!table->entries)
 534                 return -ENOMEM;
 535
 536         table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT;
 537
 538         /* This table only has a single entry */
 539         ((struct sja1105_general_params_entry *)table->entries)[0] =
 540                                 default_general_params;
 541
 542         return 0;
 543 }
 544
 545 static int sja1105_init_avb_params(struct sja1105_private *priv)
 546 {
 547         struct sja1105_avb_params_entry *avb;
 548         struct sja1105_table *table;
 549
 550         table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS];
 551
 552         /* Discard previous AVB Parameters Table */
 553         if (table->entry_count) {
 554                 kfree(table->entries);
 555                 table->entry_count = 0;
 556         }
 557
 558         table->entries = kcalloc(SJA1105_MAX_AVB_PARAMS_COUNT,
 559                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 560         if (!table->entries)
 561                 return -ENOMEM;
 562
 563         table->entry_count = SJA1105_MAX_AVB_PARAMS_COUNT;
 564
 565         avb = table->entries;
 566
 567         /* Configure the MAC addresses for meta frames */
 568         avb->destmeta = SJA1105_META_DMAC;
 569         avb->srcmeta  = SJA1105_META_SMAC;
 570         /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
 571          * default. This is because there might be boards with a hardware
 572          * layout where enabling the pin as output might cause an electrical
 573          * clash. On E/T the pin is always an output, which the board designers
 574          * probably already knew, so even if there are going to be electrical
 575          * issues, there's nothing we can do.
 576          */
 577         avb->cas_master = false;
 578
 579         return 0;
 580 }
 581
 582 /* The L2 policing table is 2-stage. The table is looked up for each frame
 583  * according to the ingress port, whether it was broadcast or not, and the
 584  * classified traffic class (given by VLAN PCP). This portion of the lookup is
 585  * fixed, and gives access to the SHARINDX, an indirection register pointing
 586  * within the policing table itself, which is used to resolve the policer that
 587  * will be used for this frame.
 588  *
 589  *  Stage 1                              Stage 2
 590  * +------------+--------+              +---------------------------------+
 591  * |Port 0 TC 0 |SHARINDX|              | Policer 0: Rate, Burst, MTU     |
 592  * +------------+--------+              +---------------------------------+
 593  * |Port 0 TC 1 |SHARINDX|              | Policer 1: Rate, Burst, MTU     |
 594  * +------------+--------+              +---------------------------------+
 595  *    ...                               | Policer 2: Rate, Burst, MTU     |
 596  * +------------+--------+              +---------------------------------+
 597  * |Port 0 TC 7 |SHARINDX|              | Policer 3: Rate, Burst, MTU     |
 598  * +------------+--------+              +---------------------------------+
 599  * |Port 1 TC 0 |SHARINDX|              | Policer 4: Rate, Burst, MTU     |
 600  * +------------+--------+              +---------------------------------+
 601  *    ...                               | Policer 5: Rate, Burst, MTU     |
 602  * +------------+--------+              +---------------------------------+
 603  * |Port 1 TC 7 |SHARINDX|              | Policer 6: Rate, Burst, MTU     |
 604  * +------------+--------+              +---------------------------------+
 605  *    ...                               | Policer 7: Rate, Burst, MTU     |
 606  * +------------+--------+              +---------------------------------+
 607  * |Port 4 TC 7 |SHARINDX|                 ...
 608  * +------------+--------+
 609  * |Port 0 BCAST|SHARINDX|                 ...
 610  * +------------+--------+
 611  * |Port 1 BCAST|SHARINDX|                 ...
 612  * +------------+--------+
 613  *    ...                                  ...
 614  * +------------+--------+              +---------------------------------+
 615  * |Port 4 BCAST|SHARINDX|              | Policer 44: Rate, Burst, MTU    |
 616  * +------------+--------+              +---------------------------------+
 617  *
 618  * In this driver, we shall use policers 0-4 as statically alocated port
 619  * (matchall) policers. So we need to make the SHARINDX for all lookups
 620  * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
 621  * lookup) equal.
 622  * The remaining policers (40) shall be dynamically allocated for flower
 623  * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
 624  */
 625 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
 626
 627 static int sja1105_init_l2_policing(struct sja1105_private *priv)
 628 {
 629         struct sja1105_l2_policing_entry *policing;
 630         struct sja1105_table *table;
 631         int port, tc;
 632
 633         table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
 634
 635         /* Discard previous L2 Policing Table */
 636         if (table->entry_count) {
 637                 kfree(table->entries);
 638                 table->entry_count = 0;
 639         }
 640
 641         table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT,
 642                                  table->ops->unpacked_entry_size, GFP_KERNEL);
 643         if (!table->entries)
 644                 return -ENOMEM;
 645
 646         table->entry_count = SJA1105_MAX_L2_POLICING_COUNT;
 647
 648         policing = table->entries;
 649
 650         /* Setup shared indices for the matchall policers */
 651         for (port = 0; port < SJA1105_NUM_PORTS; port++) {
 652                 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + port;
 653
 654                 for (tc = 0; tc < SJA1105_NUM_TC; tc++)
 655                         policing[port * SJA1105_NUM_TC + tc].sharindx = port;
 656
 657                 policing[bcast].sharindx = port;
 658         }
 659
 660         /* Setup the matchall policer parameters */
 661         for (port = 0; port < SJA1105_NUM_PORTS; port++) {
 662                 int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
 663
 664                 if (dsa_is_cpu_port(priv->ds, port))
 665                         mtu += VLAN_HLEN;
 666
 667                 policing[port].smax = 65535; /* Burst size in bytes */
 668                 policing[port].rate = SJA1105_RATE_MBPS(1000);
 669                 policing[port].maxlen = mtu;
 670                 policing[port].partition = 0;
 671         }
 672
 673         return 0;
 674 }
 675
 676 static int sja1105_static_config_load(struct sja1105_private *priv,
 677                                       struct sja1105_dt_port *ports)
 678 {
 679         int rc;
 680
 681         sja1105_static_config_free(&priv->static_config);
 682         rc = sja1105_static_config_init(&priv->static_config,
 683                                         priv->info->static_ops,
 684                                         priv->info->device_id);
 685         if (rc)
 686                 return rc;
 687
 688         /* Build static configuration */
 689         rc = sja1105_init_mac_settings(priv);
 690         if (rc < 0)
 691                 return rc;
 692         rc = sja1105_init_mii_settings(priv, ports);
 693         if (rc < 0)
 694                 return rc;
 695         rc = sja1105_init_static_fdb(priv);
 696         if (rc < 0)
 697                 return rc;
 698         rc = sja1105_init_static_vlan(priv);
 699         if (rc < 0)
 700                 return rc;
 701         rc = sja1105_init_l2_lookup_params(priv);
 702         if (rc < 0)
 703                 return rc;
 704         rc = sja1105_init_l2_forwarding(priv);
 705         if (rc < 0)
 706                 return rc;
 707         rc = sja1105_init_l2_forwarding_params(priv);
 708         if (rc < 0)
 709                 return rc;
 710         rc = sja1105_init_l2_policing(priv);
 711         if (rc < 0)
 712                 return rc;
 713         rc = sja1105_init_general_params(priv);
 714         if (rc < 0)
 715                 return rc;
 716         rc = sja1105_init_avb_params(priv);
 717         if (rc < 0)
 718                 return rc;
 719
 720         /* Send initial configuration to hardware via SPI */
 721         return sja1105_static_config_upload(priv);
 722 }
 723
 724 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv,
 725                                       const struct sja1105_dt_port *ports)
 726 {
 727         int i;
 728
 729         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
 730                 if (ports[i].role == XMII_MAC)
 731                         continue;
 732
 733                 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||
 734                     ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
 735                         priv->rgmii_rx_delay[i] = true;
 736
 737                 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||
 738                     ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
 739                         priv->rgmii_tx_delay[i] = true;
 740
 741                 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) &&
 742                      !priv->info->setup_rgmii_delay)
 743                         return -EINVAL;
 744         }
 745         return 0;
 746 }
 747
 748 static int sja1105_parse_ports_node(struct sja1105_private *priv,
 749                                     struct sja1105_dt_port *ports,
 750                                     struct device_node *ports_node)
 751 {
 752         struct device *dev = &priv->spidev->dev;
 753         struct device_node *child;
 754
 755         for_each_available_child_of_node(ports_node, child) {
 756                 struct device_node *phy_node;
 757                 phy_interface_t phy_mode;
 758                 u32 index;
 759                 int err;
 760
 761                 /* Get switch port number from DT */
 762                 if (of_property_read_u32(child, "reg", &index) < 0) {
 763                         dev_err(dev, "Port number not defined in device tree "
 764                                 "(property \"reg\")\n");
 765                         of_node_put(child);
 766                         return -ENODEV;
 767                 }
 768
 769                 /* Get PHY mode from DT */
 770                 err = of_get_phy_mode(child, &phy_mode);
 771                 if (err) {
 772                         dev_err(dev, "Failed to read phy-mode or "
 773                                 "phy-interface-type property for port %d\n",
 774                                 index);
 775                         of_node_put(child);
 776                         return -ENODEV;
 777                 }
 778                 ports[index].phy_mode = phy_mode;
 779
 780                 phy_node = of_parse_phandle(child, "phy-handle", 0);
 781                 if (!phy_node) {
 782                         if (!of_phy_is_fixed_link(child)) {
 783                                 dev_err(dev, "phy-handle or fixed-link "
 784                                         "properties missing!\n");
 785                                 of_node_put(child);
 786                                 return -ENODEV;
 787                         }
 788                         /* phy-handle is missing, but fixed-link isn't.
 789                          * So it's a fixed link. Default to PHY role.
 790                          */
 791                         ports[index].role = XMII_PHY;
 792                 } else {
 793                         /* phy-handle present => put port in MAC role */
 794                         ports[index].role = XMII_MAC;
 795                         of_node_put(phy_node);
 796                 }
 797
 798                 /* The MAC/PHY role can be overridden with explicit bindings */
 799                 if (of_property_read_bool(child, "sja1105,role-mac"))
 800                         ports[index].role = XMII_MAC;
 801                 else if (of_property_read_bool(child, "sja1105,role-phy"))
 802                         ports[index].role = XMII_PHY;
 803         }
 804
 805         return 0;
 806 }
 807
 808 static int sja1105_parse_dt(struct sja1105_private *priv,
 809                             struct sja1105_dt_port *ports)
 810 {
 811         struct device *dev = &priv->spidev->dev;
 812         struct device_node *switch_node = dev->of_node;
 813         struct device_node *ports_node;
 814         int rc;
 815
 816         ports_node = of_get_child_by_name(switch_node, "ports");
 817         if (!ports_node) {
 818                 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
 819                 return -ENODEV;
 820         }
 821
 822         rc = sja1105_parse_ports_node(priv, ports, ports_node);
 823         of_node_put(ports_node);
 824
 825         return rc;
 826 }
 827
 828 static int sja1105_sgmii_read(struct sja1105_private *priv, int pcs_reg)
 829 {
 830         const struct sja1105_regs *regs = priv->info->regs;
 831         u32 val;
 832         int rc;
 833
 834         rc = sja1105_xfer_u32(priv, SPI_READ, regs->sgmii + pcs_reg, &val,
 835                               NULL);
 836         if (rc < 0)
 837                 return rc;
 838
 839         return val;
 840 }
 841
 842 static int sja1105_sgmii_write(struct sja1105_private *priv, int pcs_reg,
 843                                u16 pcs_val)
 844 {
 845         const struct sja1105_regs *regs = priv->info->regs;
 846         u32 val = pcs_val;
 847         int rc;
 848
 849         rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->sgmii + pcs_reg, &val,
 850                               NULL);
 851         if (rc < 0)
 852                 return rc;
 853
 854         return val;
 855 }
 856
 857 static void sja1105_sgmii_pcs_config(struct sja1105_private *priv,
 858                                      bool an_enabled, bool an_master)
 859 {
 860         u16 ac = SJA1105_AC_AUTONEG_MODE_SGMII;
 861
 862         /* DIGITAL_CONTROL_1: Enable vendor-specific MMD1, allow the PHY to
 863          * stop the clock during LPI mode, make the MAC reconfigure
 864          * autonomously after PCS autoneg is done, flush the internal FIFOs.
 865          */
 866         sja1105_sgmii_write(priv, SJA1105_DC1, SJA1105_DC1_EN_VSMMD1 |
 867                                                SJA1105_DC1_CLOCK_STOP_EN |
 868                                                SJA1105_DC1_MAC_AUTO_SW |
 869                                                SJA1105_DC1_INIT);
 870         /* DIGITAL_CONTROL_2: No polarity inversion for TX and RX lanes */
 871         sja1105_sgmii_write(priv, SJA1105_DC2, SJA1105_DC2_TX_POL_INV_DISABLE);
 872         /* AUTONEG_CONTROL: Use SGMII autoneg */
 873         if (an_master)
 874                 ac |= SJA1105_AC_PHY_MODE | SJA1105_AC_SGMII_LINK;
 875         sja1105_sgmii_write(priv, SJA1105_AC, ac);
 876         /* BASIC_CONTROL: enable in-band AN now, if requested. Otherwise,
 877          * sja1105_sgmii_pcs_force_speed must be called later for the link
 878          * to become operational.
 879          */
 880         if (an_enabled)
 881                 sja1105_sgmii_write(priv, MII_BMCR,
 882                                     BMCR_ANENABLE | BMCR_ANRESTART);
 883 }
 884
 885 static void sja1105_sgmii_pcs_force_speed(struct sja1105_private *priv,
 886                                           int speed)
 887 {
 888         int pcs_speed;
 889
 890         switch (speed) {
 891         case SPEED_1000:
 892                 pcs_speed = BMCR_SPEED1000;
 893                 break;
 894         case SPEED_100:
 895                 pcs_speed = BMCR_SPEED100;
 896                 break;
 897         case SPEED_10:
 898                 pcs_speed = BMCR_SPEED10;
 899                 break;
 900         default:
 901                 dev_err(priv->ds->dev, "Invalid speed %d\n", speed);
 902                 return;
 903         }
 904         sja1105_sgmii_write(priv, MII_BMCR, pcs_speed | BMCR_FULLDPLX);
 905 }
 906
 907 /* Convert link speed from SJA1105 to ethtool encoding */
 908 static int sja1105_speed[] = {
 909         [SJA1105_SPEED_AUTO]            = SPEED_UNKNOWN,
 910         [SJA1105_SPEED_10MBPS]          = SPEED_10,
 911         [SJA1105_SPEED_100MBPS]         = SPEED_100,
 912         [SJA1105_SPEED_1000MBPS]        = SPEED_1000,
 913 };
 914
 915 /* Set link speed in the MAC configuration for a specific port. */
 916 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
 917                                       int speed_mbps)
 918 {
 919         struct sja1105_xmii_params_entry *mii;
 920         struct sja1105_mac_config_entry *mac;
 921         struct device *dev = priv->ds->dev;
 922         sja1105_phy_interface_t phy_mode;
 923         sja1105_speed_t speed;
 924         int rc;
 925
 926         /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
 927          * tables. On E/T, MAC reconfig tables are not readable, only writable.
 928          * We have to *know* what the MAC looks like.  For the sake of keeping
 929          * the code common, we'll use the static configuration tables as a
 930          * reasonable approximation for both E/T and P/Q/R/S.
 931          */
 932         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
 933         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
 934
 935         switch (speed_mbps) {
 936         case SPEED_UNKNOWN:
 937                 /* PHYLINK called sja1105_mac_config() to inform us about
 938                  * the state->interface, but AN has not completed and the
 939                  * speed is not yet valid. UM10944.pdf says that setting
 940                  * SJA1105_SPEED_AUTO at runtime disables the port, so that is
 941                  * ok for power consumption in case AN will never complete -
 942                  * otherwise PHYLINK should come back with a new update.
 943                  */
 944                 speed = SJA1105_SPEED_AUTO;
 945                 break;
 946         case SPEED_10:
 947                 speed = SJA1105_SPEED_10MBPS;
 948                 break;
 949         case SPEED_100:
 950                 speed = SJA1105_SPEED_100MBPS;
 951                 break;
 952         case SPEED_1000:
 953                 speed = SJA1105_SPEED_1000MBPS;
 954                 break;
 955         default:
 956                 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
 957                 return -EINVAL;
 958         }
 959
 960         /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
 961          * table, since this will be used for the clocking setup, and we no
 962          * longer need to store it in the static config (already told hardware
 963          * we want auto during upload phase).
 964          * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
 965          * we need to configure the PCS only (if even that).
 966          */
 967         if (sja1105_supports_sgmii(priv, port))
 968                 mac[port].speed = SJA1105_SPEED_1000MBPS;
 969         else
 970                 mac[port].speed = speed;
 971
 972         /* Write to the dynamic reconfiguration tables */
 973         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
 974                                           &mac[port], true);
 975         if (rc < 0) {
 976                 dev_err(dev, "Failed to write MAC config: %d\n", rc);
 977                 return rc;
 978         }
 979
 980         /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
 981          * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
 982          * RMII no change of the clock setup is required. Actually, changing
 983          * the clock setup does interrupt the clock signal for a certain time
 984          * which causes trouble for all PHYs relying on this signal.
 985          */
 986         phy_mode = mii->xmii_mode[port];
 987         if (phy_mode != XMII_MODE_RGMII)
 988                 return 0;
 989
 990         return sja1105_clocking_setup_port(priv, port);
 991 }
 992
 993 /* The SJA1105 MAC programming model is through the static config (the xMII
 994  * Mode table cannot be dynamically reconfigured), and we have to program
 995  * that early (earlier than PHYLINK calls us, anyway).
 996  * So just error out in case the connected PHY attempts to change the initial
 997  * system interface MII protocol from what is defined in the DT, at least for
 998  * now.
 999  */
1000 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
1001                                       phy_interface_t interface)
1002 {
1003         struct sja1105_xmii_params_entry *mii;
1004         sja1105_phy_interface_t phy_mode;
1005
1006         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
1007         phy_mode = mii->xmii_mode[port];
1008
1009         switch (interface) {
1010         case PHY_INTERFACE_MODE_MII:
1011                 return (phy_mode != XMII_MODE_MII);
1012         case PHY_INTERFACE_MODE_RMII:
1013                 return (phy_mode != XMII_MODE_RMII);
1014         case PHY_INTERFACE_MODE_RGMII:
1015         case PHY_INTERFACE_MODE_RGMII_ID:
1016         case PHY_INTERFACE_MODE_RGMII_RXID:
1017         case PHY_INTERFACE_MODE_RGMII_TXID:
1018                 return (phy_mode != XMII_MODE_RGMII);
1019         case PHY_INTERFACE_MODE_SGMII:
1020                 return (phy_mode != XMII_MODE_SGMII);
1021         default:
1022                 return true;
1023         }
1024 }
1025
1026 static void sja1105_mac_config(struct dsa_switch *ds, int port,
1027                                unsigned int mode,
1028                                const struct phylink_link_state *state)
1029 {
1030         struct sja1105_private *priv = ds->priv;
1031         bool is_sgmii = sja1105_supports_sgmii(priv, port);
1032
1033         if (sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1034                 dev_err(ds->dev, "Changing PHY mode to %s not supported!\n",
1035                         phy_modes(state->interface));
1036                 return;
1037         }
1038
1039         if (phylink_autoneg_inband(mode) && !is_sgmii) {
1040                 dev_err(ds->dev, "In-band AN not supported!\n");
1041                 return;
1042         }
1043
1044         if (is_sgmii)
1045                 sja1105_sgmii_pcs_config(priv, phylink_autoneg_inband(mode),
1046                                          false);
1047 }
1048
1049 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
1050                                   unsigned int mode,
1051                                   phy_interface_t interface)
1052 {
1053         sja1105_inhibit_tx(ds->priv, BIT(port), true);
1054 }
1055
1056 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
1057                                 unsigned int mode,
1058                                 phy_interface_t interface,
1059                                 struct phy_device *phydev,
1060                                 int speed, int duplex,
1061                                 bool tx_pause, bool rx_pause)
1062 {
1063         struct sja1105_private *priv = ds->priv;
1064
1065         sja1105_adjust_port_config(priv, port, speed);
1066
1067         if (sja1105_supports_sgmii(priv, port) && !phylink_autoneg_inband(mode))
1068                 sja1105_sgmii_pcs_force_speed(priv, speed);
1069
1070         sja1105_inhibit_tx(priv, BIT(port), false);
1071 }
1072
1073 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
1074                                      unsigned long *supported,
1075                                      struct phylink_link_state *state)
1076 {
1077         /* Construct a new mask which exhaustively contains all link features
1078          * supported by the MAC, and then apply that (logical AND) to what will
1079          * be sent to the PHY for "marketing".
1080          */
1081         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
1082         struct sja1105_private *priv = ds->priv;
1083         struct sja1105_xmii_params_entry *mii;
1084
1085         mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
1086
1087         /* include/linux/phylink.h says:
1088          *     When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1089          *     expects the MAC driver to return all supported link modes.
1090          */
1091         if (state->interface != PHY_INTERFACE_MODE_NA &&
1092             sja1105_phy_mode_mismatch(priv, port, state->interface)) {
1093                 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1094                 return;
1095         }
1096
1097         /* The MAC does not support pause frames, and also doesn't
1098          * support half-duplex traffic modes.
1099          */
1100         phylink_set(mask, Autoneg);
1101         phylink_set(mask, MII);
1102         phylink_set(mask, 10baseT_Full);
1103         phylink_set(mask, 100baseT_Full);
1104         phylink_set(mask, 100baseT1_Full);
1105         if (mii->xmii_mode[port] == XMII_MODE_RGMII ||
1106             mii->xmii_mode[port] == XMII_MODE_SGMII)
1107                 phylink_set(mask, 1000baseT_Full);
1108
1109         bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
1110         bitmap_and(state->advertising, state->advertising, mask,
1111                    __ETHTOOL_LINK_MODE_MASK_NBITS);
1112 }
1113
1114 static int sja1105_mac_pcs_get_state(struct dsa_switch *ds, int port,
1115                                      struct phylink_link_state *state)
1116 {
1117         struct sja1105_private *priv = ds->priv;
1118         int ais;
1119
1120         /* Read the vendor-specific AUTONEG_INTR_STATUS register */
1121         ais = sja1105_sgmii_read(priv, SJA1105_AIS);
1122         if (ais < 0)
1123                 return ais;
1124
1125         switch (SJA1105_AIS_SPEED(ais)) {
1126         case 0:
1127                 state->speed = SPEED_10;
1128                 break;
1129         case 1:
1130                 state->speed = SPEED_100;
1131                 break;
1132         case 2:
1133                 state->speed = SPEED_1000;
1134                 break;
1135         default:
1136                 dev_err(ds->dev, "Invalid SGMII PCS speed %lu\n",
1137                         SJA1105_AIS_SPEED(ais));
1138         }
1139         state->duplex = SJA1105_AIS_DUPLEX_MODE(ais);
1140         state->an_complete = SJA1105_AIS_COMPLETE(ais);
1141         state->link = SJA1105_AIS_LINK_STATUS(ais);
1142
1143         return 0;
1144 }
1145
1146 static int
1147 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
1148                               const struct sja1105_l2_lookup_entry *requested)
1149 {
1150         struct sja1105_l2_lookup_entry *l2_lookup;
1151         struct sja1105_table *table;
1152         int i;
1153
1154         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1155         l2_lookup = table->entries;
1156
1157         for (i = 0; i < table->entry_count; i++)
1158                 if (l2_lookup[i].macaddr == requested->macaddr &&
1159                     l2_lookup[i].vlanid == requested->vlanid &&
1160                     l2_lookup[i].destports & BIT(port))
1161                         return i;
1162
1163         return -1;
1164 }
1165
1166 /* We want FDB entries added statically through the bridge command to persist
1167  * across switch resets, which are a common thing during normal SJA1105
1168  * operation. So we have to back them up in the static configuration tables
1169  * and hence apply them on next static config upload... yay!
1170  */
1171 static int
1172 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
1173                           const struct sja1105_l2_lookup_entry *requested,
1174                           bool keep)
1175 {
1176         struct sja1105_l2_lookup_entry *l2_lookup;
1177         struct sja1105_table *table;
1178         int rc, match;
1179
1180         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
1181
1182         match = sja1105_find_static_fdb_entry(priv, port, requested);
1183         if (match < 0) {
1184                 /* Can't delete a missing entry. */
1185                 if (!keep)
1186                         return 0;
1187
1188                 /* No match => new entry */
1189                 rc = sja1105_table_resize(table, table->entry_count + 1);
1190                 if (rc)
1191                         return rc;
1192
1193                 match = table->entry_count - 1;
1194         }
1195
1196         /* Assign pointer after the resize (it may be new memory) */
1197         l2_lookup = table->entries;
1198
1199         /* We have a match.
1200          * If the job was to add this FDB entry, it's already done (mostly
1201          * anyway, since the port forwarding mask may have changed, case in
1202          * which we update it).
1203          * Otherwise we have to delete it.
1204          */
1205         if (keep) {
1206                 l2_lookup[match] = *requested;
1207                 return 0;
1208         }
1209
1210         /* To remove, the strategy is to overwrite the element with
1211          * the last one, and then reduce the array size by 1
1212          */
1213         l2_lookup[match] = l2_lookup[table->entry_count - 1];
1214         return sja1105_table_resize(table, table->entry_count - 1);
1215 }
1216
1217 /* First-generation switches have a 4-way set associative TCAM that
1218  * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1219  * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1220  * For the placement of a newly learnt FDB entry, the switch selects the bin
1221  * based on a hash function, and the way within that bin incrementally.
1222  */
1223 static int sja1105et_fdb_index(int bin, int way)
1224 {
1225         return bin * SJA1105ET_FDB_BIN_SIZE + way;
1226 }
1227
1228 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
1229                                          const u8 *addr, u16 vid,
1230                                          struct sja1105_l2_lookup_entry *match,
1231                                          int *last_unused)
1232 {
1233         int way;
1234
1235         for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
1236                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1237                 int index = sja1105et_fdb_index(bin, way);
1238
1239                 /* Skip unused entries, optionally marking them
1240                  * into the return value
1241                  */
1242                 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1243                                                 index, &l2_lookup)) {
1244                         if (last_unused)
1245                                 *last_unused = way;
1246                         continue;
1247                 }
1248
1249                 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
1250                     l2_lookup.vlanid == vid) {
1251                         if (match)
1252                                 *match = l2_lookup;
1253                         return way;
1254                 }
1255         }
1256         /* Return an invalid entry index if not found */
1257         return -1;
1258 }
1259
1260 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
1261                       const unsigned char *addr, u16 vid)
1262 {
1263         struct sja1105_l2_lookup_entry l2_lookup = {0}, tmp;
1264         struct sja1105_private *priv = ds->priv;
1265         struct device *dev = ds->dev;
1266         int last_unused = -1;
1267         int start, end, i;
1268         int bin, way, rc;
1269
1270         bin = sja1105et_fdb_hash(priv, addr, vid);
1271
1272         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1273                                             &l2_lookup, &last_unused);
1274         if (way >= 0) {
1275                 /* We have an FDB entry. Is our port in the destination
1276                  * mask? If yes, we need to do nothing. If not, we need
1277                  * to rewrite the entry by adding this port to it.
1278                  */
1279                 if ((l2_lookup.destports & BIT(port)) && l2_lookup.lockeds)
1280                         return 0;
1281                 l2_lookup.destports |= BIT(port);
1282         } else {
1283                 int index = sja1105et_fdb_index(bin, way);
1284
1285                 /* We don't have an FDB entry. We construct a new one and
1286                  * try to find a place for it within the FDB table.
1287                  */
1288                 l2_lookup.macaddr = ether_addr_to_u64(addr);
1289                 l2_lookup.destports = BIT(port);
1290                 l2_lookup.vlanid = vid;
1291
1292                 if (last_unused >= 0) {
1293                         way = last_unused;
1294                 } else {
1295                         /* Bin is full, need to evict somebody.
1296                          * Choose victim at random. If you get these messages
1297                          * often, you may need to consider changing the
1298                          * distribution function:
1299                          * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1300                          */
1301                         get_random_bytes(&way, sizeof(u8));
1302                         way %= SJA1105ET_FDB_BIN_SIZE;
1303                         dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1304                                  bin, addr, way);
1305                         /* Evict entry */
1306                         sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1307                                                      index, NULL, false);
1308                 }
1309         }
1310         l2_lookup.lockeds = true;
1311         l2_lookup.index = sja1105et_fdb_index(bin, way);
1312
1313         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1314                                           l2_lookup.index, &l2_lookup,
1315                                           true);
1316         if (rc < 0)
1317                 return rc;
1318
1319         /* Invalidate a dynamically learned entry if that exists */
1320         start = sja1105et_fdb_index(bin, 0);
1321         end = sja1105et_fdb_index(bin, way);
1322
1323         for (i = start; i < end; i++) {
1324                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1325                                                  i, &tmp);
1326                 if (rc == -ENOENT)
1327                         continue;
1328                 if (rc)
1329                         return rc;
1330
1331                 if (tmp.macaddr != ether_addr_to_u64(addr) || tmp.vlanid != vid)
1332                         continue;
1333
1334                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1335                                                   i, NULL, false);
1336                 if (rc)
1337                         return rc;
1338
1339                 break;
1340         }
1341
1342         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1343 }
1344
1345 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1346                       const unsigned char *addr, u16 vid)
1347 {
1348         struct sja1105_l2_lookup_entry l2_lookup = {0};
1349         struct sja1105_private *priv = ds->priv;
1350         int index, bin, way, rc;
1351         bool keep;
1352
1353         bin = sja1105et_fdb_hash(priv, addr, vid);
1354         way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1355                                             &l2_lookup, NULL);
1356         if (way < 0)
1357                 return 0;
1358         index = sja1105et_fdb_index(bin, way);
1359
1360         /* We have an FDB entry. Is our port in the destination mask? If yes,
1361          * we need to remove it. If the resulting port mask becomes empty, we
1362          * need to completely evict the FDB entry.
1363          * Otherwise we just write it back.
1364          */
1365         l2_lookup.destports &= ~BIT(port);
1366
1367         if (l2_lookup.destports)
1368                 keep = true;
1369         else
1370                 keep = false;
1371
1372         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1373                                           index, &l2_lookup, keep);
1374         if (rc < 0)
1375                 return rc;
1376
1377         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1378 }
1379
1380 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1381                         const unsigned char *addr, u16 vid)
1382 {
1383         struct sja1105_l2_lookup_entry l2_lookup = {0}, tmp;
1384         struct sja1105_private *priv = ds->priv;
1385         int rc, i;
1386
1387         /* Search for an existing entry in the FDB table */
1388         l2_lookup.macaddr = ether_addr_to_u64(addr);
1389         l2_lookup.vlanid = vid;
1390         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1391         l2_lookup.mask_vlanid = VLAN_VID_MASK;
1392         l2_lookup.destports = BIT(port);
1393
1394         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1395                                          SJA1105_SEARCH, &l2_lookup);
1396         if (rc == 0) {
1397                 /* Found a static entry and this port is already in the entry's
1398                  * port mask => job done
1399                  */
1400                 if ((l2_lookup.destports & BIT(port)) && l2_lookup.lockeds)
1401                         return 0;
1402                 /* l2_lookup.index is populated by the switch in case it
1403                  * found something.
1404                  */
1405                 l2_lookup.destports |= BIT(port);
1406                 goto skip_finding_an_index;
1407         }
1408
1409         /* Not found, so try to find an unused spot in the FDB.
1410          * This is slightly inefficient because the strategy is knock-knock at
1411          * every possible position from 0 to 1023.
1412          */
1413         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1414                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1415                                                  i, NULL);
1416                 if (rc < 0)
1417                         break;
1418         }
1419         if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1420                 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1421                 return -EINVAL;
1422         }
1423         l2_lookup.index = i;
1424
1425 skip_finding_an_index:
1426         l2_lookup.lockeds = true;
1427
1428         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1429                                           l2_lookup.index, &l2_lookup,
1430                                           true);
1431         if (rc < 0)
1432                 return rc;
1433
1434         /* The switch learns dynamic entries and looks up the FDB left to
1435          * right. It is possible that our addition was concurrent with the
1436          * dynamic learning of the same address, so now that the static entry
1437          * has been installed, we are certain that address learning for this
1438          * particular address has been turned off, so the dynamic entry either
1439          * is in the FDB at an index smaller than the static one, or isn't (it
1440          * can also be at a larger index, but in that case it is inactive
1441          * because the static FDB entry will match first, and the dynamic one
1442          * will eventually age out). Search for a dynamically learned address
1443          * prior to our static one and invalidate it.
1444          */
1445         tmp = l2_lookup;
1446
1447         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1448                                          SJA1105_SEARCH, &tmp);
1449         if (rc < 0) {
1450                 dev_err(ds->dev,
1451                         "port %d failed to read back entry for %pM vid %d: %pe\n",
1452                         port, addr, vid, ERR_PTR(rc));
1453                 return rc;
1454         }
1455
1456         if (tmp.index < l2_lookup.index) {
1457                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1458                                                   tmp.index, NULL, false);
1459                 if (rc < 0)
1460                         return rc;
1461         }
1462
1463         return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1464 }
1465
1466 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1467                         const unsigned char *addr, u16 vid)
1468 {
1469         struct sja1105_l2_lookup_entry l2_lookup = {0};
1470         struct sja1105_private *priv = ds->priv;
1471         bool keep;
1472         int rc;
1473
1474         l2_lookup.macaddr = ether_addr_to_u64(addr);
1475         l2_lookup.vlanid = vid;
1476         l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1477         l2_lookup.mask_vlanid = VLAN_VID_MASK;
1478         l2_lookup.destports = BIT(port);
1479
1480         rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1481                                          SJA1105_SEARCH, &l2_lookup);
1482         if (rc < 0)
1483                 return 0;
1484
1485         l2_lookup.destports &= ~BIT(port);
1486
1487         /* Decide whether we remove just this port from the FDB entry,
1488          * or if we remove it completely.
1489          */
1490         if (l2_lookup.destports)
1491                 keep = true;
1492         else
1493                 keep = false;
1494
1495         rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1496                                           l2_lookup.index, &l2_lookup, keep);
1497         if (rc < 0)
1498                 return rc;
1499
1500         return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1501 }
1502
1503 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1504                            const unsigned char *addr, u16 vid)
1505 {
1506         struct sja1105_private *priv = ds->priv;
1507
1508         /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1509          * so the switch still does some VLAN processing internally.
1510          * But Shared VLAN Learning (SVL) is also active, and it will take
1511          * care of autonomous forwarding between the unique pvid's of each
1512          * port.  Here we just make sure that users can't add duplicate FDB
1513          * entries when in this mode - the actual VID doesn't matter except
1514          * for what gets printed in 'bridge fdb show'.  In the case of zero,
1515          * no VID gets printed at all.
1516          */
1517         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1518                 vid = 0;
1519
1520         return priv->info->fdb_add_cmd(ds, port, addr, vid);
1521 }
1522
1523 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1524                            const unsigned char *addr, u16 vid)
1525 {
1526         struct sja1105_private *priv = ds->priv;
1527
1528         if (priv->vlan_state != SJA1105_VLAN_FILTERING_FULL)
1529                 vid = 0;
1530
1531         return priv->info->fdb_del_cmd(ds, port, addr, vid);
1532 }
1533
1534 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1535                             dsa_fdb_dump_cb_t *cb, void *data)
1536 {
1537         struct sja1105_private *priv = ds->priv;
1538         struct device *dev = ds->dev;
1539         int i;
1540
1541         for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1542                 struct sja1105_l2_lookup_entry l2_lookup = {0};
1543                 u8 macaddr[ETH_ALEN];
1544                 int rc;
1545
1546                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1547                                                  i, &l2_lookup);
1548                 /* No fdb entry at i, not an issue */
1549                 if (rc == -ENOENT)
1550                         continue;
1551                 if (rc) {
1552                         dev_err(dev, "Failed to dump FDB: %d\n", rc);
1553                         return rc;
1554                 }
1555
1556                 /* FDB dump callback is per port. This means we have to
1557                  * disregard a valid entry if it's not for this port, even if
1558                  * only to revisit it later. This is inefficient because the
1559                  * 1024-sized FDB table needs to be traversed 4 times through
1560                  * SPI during a 'bridge fdb show' command.
1561                  */
1562                 if (!(l2_lookup.destports & BIT(port)))
1563                         continue;
1564                 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1565
1566                 /* We need to hide the dsa_8021q VLANs from the user. */
1567                 if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
1568                         l2_lookup.vlanid = 0;
1569                 rc = cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1570                 if (rc)
1571                         return rc;
1572         }
1573         return 0;
1574 }
1575
1576 /* This callback needs to be present */
1577 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port,
1578                                const struct switchdev_obj_port_mdb *mdb)
1579 {
1580         return 0;
1581 }
1582
1583 static void sja1105_mdb_add(struct dsa_switch *ds, int port,
1584                             const struct switchdev_obj_port_mdb *mdb)
1585 {
1586         sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1587 }
1588
1589 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1590                            const struct switchdev_obj_port_mdb *mdb)
1591 {
1592         return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1593 }
1594
1595 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1596                                  struct net_device *br, bool member)
1597 {
1598         struct sja1105_l2_forwarding_entry *l2_fwd;
1599         struct sja1105_private *priv = ds->priv;
1600         int i, rc;
1601
1602         l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1603
1604         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1605                 /* Add this port to the forwarding matrix of the
1606                  * other ports in the same bridge, and viceversa.
1607                  */
1608                 if (!dsa_is_user_port(ds, i))
1609                         continue;
1610                 /* For the ports already under the bridge, only one thing needs
1611                  * to be done, and that is to add this port to their
1612                  * reachability domain. So we can perform the SPI write for
1613                  * them immediately. However, for this port itself (the one
1614                  * that is new to the bridge), we need to add all other ports
1615                  * to its reachability domain. So we do that incrementally in
1616                  * this loop, and perform the SPI write only at the end, once
1617                  * the domain contains all other bridge ports.
1618                  */
1619                 if (i == port)
1620                         continue;
1621                 if (dsa_to_port(ds, i)->bridge_dev != br)
1622                         continue;
1623                 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1624                 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1625
1626                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1627                                                   i, &l2_fwd[i], true);
1628                 if (rc < 0)
1629                         return rc;
1630         }
1631
1632         return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1633                                             port, &l2_fwd[port], true);
1634 }
1635
1636 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1637                                          u8 state)
1638 {
1639         struct sja1105_private *priv = ds->priv;
1640         struct sja1105_mac_config_entry *mac;
1641
1642         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1643
1644         switch (state) {
1645         case BR_STATE_DISABLED:
1646         case BR_STATE_BLOCKING:
1647                 /* From UM10944 description of DRPDTAG (why put this there?):
1648                  * "Management traffic flows to the port regardless of the state
1649                  * of the INGRESS flag". So BPDUs are still be allowed to pass.
1650                  * At the moment no difference between DISABLED and BLOCKING.
1651                  */
1652                 mac[port].ingress   = false;
1653                 mac[port].egress    = false;
1654                 mac[port].dyn_learn = false;
1655                 break;
1656         case BR_STATE_LISTENING:
1657                 mac[port].ingress   = true;
1658                 mac[port].egress    = false;
1659                 mac[port].dyn_learn = false;
1660                 break;
1661         case BR_STATE_LEARNING:
1662                 mac[port].ingress   = true;
1663                 mac[port].egress    = false;
1664                 mac[port].dyn_learn = true;
1665                 break;
1666         case BR_STATE_FORWARDING:
1667                 mac[port].ingress   = true;
1668                 mac[port].egress    = true;
1669                 mac[port].dyn_learn = true;
1670                 break;
1671         default:
1672                 dev_err(ds->dev, "invalid STP state: %d\n", state);
1673                 return;
1674         }
1675
1676         sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1677                                      &mac[port], true);
1678 }
1679
1680 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1681                                struct net_device *br)
1682 {
1683         return sja1105_bridge_member(ds, port, br, true);
1684 }
1685
1686 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1687                                  struct net_device *br)
1688 {
1689         sja1105_bridge_member(ds, port, br, false);
1690 }
1691
1692 #define BYTES_PER_KBIT (1000LL / 8)
1693
1694 static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv)
1695 {
1696         int i;
1697
1698         for (i = 0; i < priv->info->num_cbs_shapers; i++)
1699                 if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope)
1700                         return i;
1701
1702         return -1;
1703 }
1704
1705 static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port,
1706                                      int prio)
1707 {
1708         int i;
1709
1710         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1711                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1712
1713                 if (cbs->port == port && cbs->prio == prio) {
1714                         memset(cbs, 0, sizeof(*cbs));
1715                         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS,
1716                                                             i, cbs, true);
1717                 }
1718         }
1719
1720         return 0;
1721 }
1722
1723 static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port,
1724                                 struct tc_cbs_qopt_offload *offload)
1725 {
1726         struct sja1105_private *priv = ds->priv;
1727         struct sja1105_cbs_entry *cbs;
1728         int index;
1729
1730         if (!offload->enable)
1731                 return sja1105_delete_cbs_shaper(priv, port, offload->queue);
1732
1733         index = sja1105_find_unused_cbs_shaper(priv);
1734         if (index < 0)
1735                 return -ENOSPC;
1736
1737         cbs = &priv->cbs[index];
1738         cbs->port = port;
1739         cbs->prio = offload->queue;
1740         /* locredit and sendslope are negative by definition. In hardware,
1741          * positive values must be provided, and the negative sign is implicit.
1742          */
1743         cbs->credit_hi = offload->hicredit;
1744         cbs->credit_lo = abs(offload->locredit);
1745         /* User space is in kbits/sec, hardware in bytes/sec */
1746         cbs->idle_slope = offload->idleslope * BYTES_PER_KBIT;
1747         cbs->send_slope = abs(offload->sendslope * BYTES_PER_KBIT);
1748         /* Convert the negative values from 64-bit 2's complement
1749          * to 32-bit 2's complement (for the case of 0x80000000 whose
1750          * negative is still negative).
1751          */
1752         cbs->credit_lo &= GENMASK_ULL(31, 0);
1753         cbs->send_slope &= GENMASK_ULL(31, 0);
1754
1755         return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs,
1756                                             true);
1757 }
1758
1759 static int sja1105_reload_cbs(struct sja1105_private *priv)
1760 {
1761         int rc = 0, i;
1762
1763         /* The credit based shapers are only allocated if
1764          * CONFIG_NET_SCH_CBS is enabled.
1765          */
1766         if (!priv->cbs)
1767                 return 0;
1768
1769         for (i = 0; i < priv->info->num_cbs_shapers; i++) {
1770                 struct sja1105_cbs_entry *cbs = &priv->cbs[i];
1771
1772                 if (!cbs->idle_slope && !cbs->send_slope)
1773                         continue;
1774
1775                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs,
1776                                                   true);
1777                 if (rc)
1778                         break;
1779         }
1780
1781         return rc;
1782 }
1783
1784 static const char * const sja1105_reset_reasons[] = {
1785         [SJA1105_VLAN_FILTERING] = "VLAN filtering",
1786         [SJA1105_RX_HWTSTAMPING] = "RX timestamping",
1787         [SJA1105_AGEING_TIME] = "Ageing time",
1788         [SJA1105_SCHEDULING] = "Time-aware scheduling",
1789         [SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing",
1790         [SJA1105_VIRTUAL_LINKS] = "Virtual links",
1791 };
1792
1793 /* For situations where we need to change a setting at runtime that is only
1794  * available through the static configuration, resetting the switch in order
1795  * to upload the new static config is unavoidable. Back up the settings we
1796  * modify at runtime (currently only MAC) and restore them after uploading,
1797  * such that this operation is relatively seamless.
1798  */
1799 int sja1105_static_config_reload(struct sja1105_private *priv,
1800                                  enum sja1105_reset_reason reason)
1801 {
1802         struct ptp_system_timestamp ptp_sts_before;
1803         struct ptp_system_timestamp ptp_sts_after;
1804         struct sja1105_mac_config_entry *mac;
1805         int speed_mbps[SJA1105_NUM_PORTS];
1806         struct dsa_switch *ds = priv->ds;
1807         s64 t1, t2, t3, t4;
1808         s64 t12, t34;
1809         u16 bmcr = 0;
1810         int rc, i;
1811         s64 now;
1812
1813         mutex_lock(&priv->mgmt_lock);
1814
1815         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1816
1817         /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1818          * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1819          * switch wants to see in the static config in order to allow us to
1820          * change it through the dynamic interface later.
1821          */
1822         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1823                 speed_mbps[i] = sja1105_speed[mac[i].speed];
1824                 mac[i].speed = SJA1105_SPEED_AUTO;
1825         }
1826
1827         if (sja1105_supports_sgmii(priv, SJA1105_SGMII_PORT))
1828                 bmcr = sja1105_sgmii_read(priv, MII_BMCR);
1829
1830         /* No PTP operations can run right now */
1831         mutex_lock(&priv->ptp_data.lock);
1832
1833         rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before);
1834         if (rc < 0)
1835                 goto out_unlock_ptp;
1836
1837         /* Reset switch and send updated static configuration */
1838         rc = sja1105_static_config_upload(priv);
1839         if (rc < 0)
1840                 goto out_unlock_ptp;
1841
1842         rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after);
1843         if (rc < 0)
1844                 goto out_unlock_ptp;
1845
1846         t1 = timespec64_to_ns(&ptp_sts_before.pre_ts);
1847         t2 = timespec64_to_ns(&ptp_sts_before.post_ts);
1848         t3 = timespec64_to_ns(&ptp_sts_after.pre_ts);
1849         t4 = timespec64_to_ns(&ptp_sts_after.post_ts);
1850         /* Mid point, corresponds to pre-reset PTPCLKVAL */
1851         t12 = t1 + (t2 - t1) / 2;
1852         /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1853         t34 = t3 + (t4 - t3) / 2;
1854         /* Advance PTPCLKVAL by the time it took since its readout */
1855         now += (t34 - t12);
1856
1857         __sja1105_ptp_adjtime(ds, now);
1858
1859 out_unlock_ptp:
1860         mutex_unlock(&priv->ptp_data.lock);
1861
1862         dev_info(priv->ds->dev,
1863                  "Reset switch and programmed static config. Reason: %s\n",
1864                  sja1105_reset_reasons[reason]);
1865
1866         /* Configure the CGU (PLLs) for MII and RMII PHYs.
1867          * For these interfaces there is no dynamic configuration
1868          * needed, since PLLs have same settings at all speeds.
1869          */
1870         rc = sja1105_clocking_setup(priv);
1871         if (rc < 0)
1872                 goto out;
1873
1874         for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1875                 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1876                 if (rc < 0)
1877                         goto out;
1878         }
1879
1880         if (sja1105_supports_sgmii(priv, SJA1105_SGMII_PORT)) {
1881                 bool an_enabled = !!(bmcr & BMCR_ANENABLE);
1882
1883                 sja1105_sgmii_pcs_config(priv, an_enabled, false);
1884
1885                 if (!an_enabled) {
1886                         int speed = SPEED_UNKNOWN;
1887
1888                         if (bmcr & BMCR_SPEED1000)
1889                                 speed = SPEED_1000;
1890                         else if (bmcr & BMCR_SPEED100)
1891                                 speed = SPEED_100;
1892                         else
1893                                 speed = SPEED_10;
1894
1895                         sja1105_sgmii_pcs_force_speed(priv, speed);
1896                 }
1897         }
1898
1899         rc = sja1105_reload_cbs(priv);
1900         if (rc < 0)
1901                 goto out;
1902 out:
1903         mutex_unlock(&priv->mgmt_lock);
1904
1905         return rc;
1906 }
1907
1908 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1909 {
1910         struct sja1105_mac_config_entry *mac;
1911
1912         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1913
1914         mac[port].vlanid = pvid;
1915
1916         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1917                                            &mac[port], true);
1918 }
1919
1920 static int sja1105_crosschip_bridge_join(struct dsa_switch *ds,
1921                                          int tree_index, int sw_index,
1922                                          int other_port, struct net_device *br)
1923 {
1924         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
1925         struct sja1105_private *other_priv = other_ds->priv;
1926         struct sja1105_private *priv = ds->priv;
1927         int port, rc;
1928
1929         if (other_ds->ops != &sja1105_switch_ops)
1930                 return 0;
1931
1932         for (port = 0; port < ds->num_ports; port++) {
1933                 if (!dsa_is_user_port(ds, port))
1934                         continue;
1935                 if (dsa_to_port(ds, port)->bridge_dev != br)
1936                         continue;
1937
1938                 rc = dsa_8021q_crosschip_bridge_join(priv->dsa_8021q_ctx,
1939                                                      port,
1940                                                      other_priv->dsa_8021q_ctx,
1941                                                      other_port);
1942                 if (rc)
1943                         return rc;
1944
1945                 rc = dsa_8021q_crosschip_bridge_join(other_priv->dsa_8021q_ctx,
1946                                                      other_port,
1947                                                      priv->dsa_8021q_ctx,
1948                                                      port);
1949                 if (rc)
1950                         return rc;
1951         }
1952
1953         return 0;
1954 }
1955
1956 static void sja1105_crosschip_bridge_leave(struct dsa_switch *ds,
1957                                            int tree_index, int sw_index,
1958                                            int other_port,
1959                                            struct net_device *br)
1960 {
1961         struct dsa_switch *other_ds = dsa_switch_find(tree_index, sw_index);
1962         struct sja1105_private *other_priv = other_ds->priv;
1963         struct sja1105_private *priv = ds->priv;
1964         int port;
1965
1966         if (other_ds->ops != &sja1105_switch_ops)
1967                 return;
1968
1969         for (port = 0; port < ds->num_ports; port++) {
1970                 if (!dsa_is_user_port(ds, port))
1971                         continue;
1972                 if (dsa_to_port(ds, port)->bridge_dev != br)
1973                         continue;
1974
1975                 dsa_8021q_crosschip_bridge_leave(priv->dsa_8021q_ctx, port,
1976                                                  other_priv->dsa_8021q_ctx,
1977                                                  other_port);
1978
1979                 dsa_8021q_crosschip_bridge_leave(other_priv->dsa_8021q_ctx,
1980                                                  other_port,
1981                                                  priv->dsa_8021q_ctx, port);
1982         }
1983 }
1984
1985 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
1986 {
1987         struct sja1105_private *priv = ds->priv;
1988         int rc;
1989
1990         rc = dsa_8021q_setup(priv->dsa_8021q_ctx, enabled);
1991         if (rc)
1992                 return rc;
1993
1994         dev_info(ds->dev, "%s switch tagging\n",
1995                  enabled ? "Enabled" : "Disabled");
1996         return 0;
1997 }
1998
1999 static enum dsa_tag_protocol
2000 sja1105_get_tag_protocol(struct dsa_switch *ds, int port,
2001                          enum dsa_tag_protocol mp)
2002 {
2003         return DSA_TAG_PROTO_SJA1105;
2004 }
2005
2006 static int sja1105_find_free_subvlan(u16 *subvlan_map, bool pvid)
2007 {
2008         int subvlan;
2009
2010         if (pvid)
2011                 return 0;
2012
2013         for (subvlan = 1; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2014                 if (subvlan_map[subvlan] == VLAN_N_VID)
2015                         return subvlan;
2016
2017         return -1;
2018 }
2019
2020 static int sja1105_find_subvlan(u16 *subvlan_map, u16 vid)
2021 {
2022         int subvlan;
2023
2024         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2025                 if (subvlan_map[subvlan] == vid)
2026                         return subvlan;
2027
2028         return -1;
2029 }
2030
2031 static int sja1105_find_committed_subvlan(struct sja1105_private *priv,
2032                                           int port, u16 vid)
2033 {
2034         struct sja1105_port *sp = &priv->ports[port];
2035
2036         return sja1105_find_subvlan(sp->subvlan_map, vid);
2037 }
2038
2039 static void sja1105_init_subvlan_map(u16 *subvlan_map)
2040 {
2041         int subvlan;
2042
2043         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2044                 subvlan_map[subvlan] = VLAN_N_VID;
2045 }
2046
2047 static void sja1105_commit_subvlan_map(struct sja1105_private *priv, int port,
2048                                        u16 *subvlan_map)
2049 {
2050         struct sja1105_port *sp = &priv->ports[port];
2051         int subvlan;
2052
2053         for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
2054                 sp->subvlan_map[subvlan] = subvlan_map[subvlan];
2055 }
2056
2057 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
2058 {
2059         struct sja1105_vlan_lookup_entry *vlan;
2060         int count, i;
2061
2062         vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
2063         count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
2064
2065         for (i = 0; i < count; i++)
2066                 if (vlan[i].vlanid == vid)
2067                         return i;
2068
2069         /* Return an invalid entry index if not found */
2070         return -1;
2071 }
2072
2073 static int
2074 sja1105_find_retagging_entry(struct sja1105_retagging_entry *retagging,
2075                              int count, int from_port, u16 from_vid,
2076                              u16 to_vid)
2077 {
2078         int i;
2079
2080         for (i = 0; i < count; i++)
2081                 if (retagging[i].ing_port == BIT(from_port) &&
2082                     retagging[i].vlan_ing == from_vid &&
2083                     retagging[i].vlan_egr == to_vid)
2084                         return i;
2085
2086         /* Return an invalid entry index if not found */
2087         return -1;
2088 }
2089
2090 static int sja1105_commit_vlans(struct sja1105_private *priv,
2091                                 struct sja1105_vlan_lookup_entry *new_vlan,
2092                                 struct sja1105_retagging_entry *new_retagging,
2093                                 int num_retagging)
2094 {
2095         struct sja1105_retagging_entry *retagging;
2096         struct sja1105_vlan_lookup_entry *vlan;
2097         struct sja1105_table *table;
2098         int num_vlans = 0;
2099         int rc, i, k = 0;
2100
2101         /* VLAN table */
2102         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2103         vlan = table->entries;
2104
2105         for (i = 0; i < VLAN_N_VID; i++) {
2106                 int match = sja1105_is_vlan_configured(priv, i);
2107
2108                 if (new_vlan[i].vlanid != VLAN_N_VID)
2109                         num_vlans++;
2110
2111                 if (new_vlan[i].vlanid == VLAN_N_VID && match >= 0) {
2112                         /* Was there before, no longer is. Delete */
2113                         dev_dbg(priv->ds->dev, "Deleting VLAN %d\n", i);
2114                         rc = sja1105_dynamic_config_write(priv,
2115                                                           BLK_IDX_VLAN_LOOKUP,
2116                                                           i, &vlan[match], false);
2117                         if (rc < 0)
2118                                 return rc;
2119                 } else if (new_vlan[i].vlanid != VLAN_N_VID) {
2120                         /* Nothing changed, don't do anything */
2121                         if (match >= 0 &&
2122                             vlan[match].vlanid == new_vlan[i].vlanid &&
2123                             vlan[match].tag_port == new_vlan[i].tag_port &&
2124                             vlan[match].vlan_bc == new_vlan[i].vlan_bc &&
2125                             vlan[match].vmemb_port == new_vlan[i].vmemb_port)
2126                                 continue;
2127                         /* Update entry */
2128                         dev_dbg(priv->ds->dev, "Updating VLAN %d\n", i);
2129                         rc = sja1105_dynamic_config_write(priv,
2130                                                           BLK_IDX_VLAN_LOOKUP,
2131                                                           i, &new_vlan[i],
2132                                                           true);
2133                         if (rc < 0)
2134                                 return rc;
2135                 }
2136         }
2137
2138         if (table->entry_count)
2139                 kfree(table->entries);
2140
2141         table->entries = kcalloc(num_vlans, table->ops->unpacked_entry_size,
2142                                  GFP_KERNEL);
2143         if (!table->entries)
2144                 return -ENOMEM;
2145
2146         table->entry_count = num_vlans;
2147         vlan = table->entries;
2148
2149         for (i = 0; i < VLAN_N_VID; i++) {
2150                 if (new_vlan[i].vlanid == VLAN_N_VID)
2151                         continue;
2152                 vlan[k++] = new_vlan[i];
2153         }
2154
2155         /* VLAN Retagging Table */
2156         table = &priv->static_config.tables[BLK_IDX_RETAGGING];
2157         retagging = table->entries;
2158
2159         for (i = 0; i < table->entry_count; i++) {
2160                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2161                                                   i, &retagging[i], false);
2162                 if (rc)
2163                         return rc;
2164         }
2165
2166         if (table->entry_count)
2167                 kfree(table->entries);
2168
2169         table->entries = kcalloc(num_retagging, table->ops->unpacked_entry_size,
2170                                  GFP_KERNEL);
2171         if (!table->entries)
2172                 return -ENOMEM;
2173
2174         table->entry_count = num_retagging;
2175         retagging = table->entries;
2176
2177         for (i = 0; i < num_retagging; i++) {
2178                 retagging[i] = new_retagging[i];
2179
2180                 /* Update entry */
2181                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_RETAGGING,
2182                                                   i, &retagging[i], true);
2183                 if (rc < 0)
2184                         return rc;
2185         }
2186
2187         return 0;
2188 }
2189
2190 struct sja1105_crosschip_vlan {
2191         struct list_head list;
2192         u16 vid;
2193         bool untagged;
2194         int port;
2195         int other_port;
2196         struct dsa_8021q_context *other_ctx;
2197 };
2198
2199 struct sja1105_crosschip_switch {
2200         struct list_head list;
2201         struct dsa_8021q_context *other_ctx;
2202 };
2203
2204 static int sja1105_commit_pvid(struct sja1105_private *priv)
2205 {
2206         struct sja1105_bridge_vlan *v;
2207         struct list_head *vlan_list;
2208         int rc = 0;
2209
2210         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2211                 vlan_list = &priv->bridge_vlans;
2212         else
2213                 vlan_list = &priv->dsa_8021q_vlans;
2214
2215         list_for_each_entry(v, vlan_list, list) {
2216                 if (v->pvid) {
2217                         rc = sja1105_pvid_apply(priv, v->port, v->vid);
2218                         if (rc)
2219                                 break;
2220                 }
2221         }
2222
2223         return rc;
2224 }
2225
2226 static int
2227 sja1105_build_bridge_vlans(struct sja1105_private *priv,
2228                            struct sja1105_vlan_lookup_entry *new_vlan)
2229 {
2230         struct sja1105_bridge_vlan *v;
2231
2232         if (priv->vlan_state == SJA1105_VLAN_UNAWARE)
2233                 return 0;
2234
2235         list_for_each_entry(v, &priv->bridge_vlans, list) {
2236                 int match = v->vid;
2237
2238                 new_vlan[match].vlanid = v->vid;
2239                 new_vlan[match].vmemb_port |= BIT(v->port);
2240                 new_vlan[match].vlan_bc |= BIT(v->port);
2241                 if (!v->untagged)
2242                         new_vlan[match].tag_port |= BIT(v->port);
2243         }
2244
2245         return 0;
2246 }
2247
2248 static int
2249 sja1105_build_dsa_8021q_vlans(struct sja1105_private *priv,
2250                               struct sja1105_vlan_lookup_entry *new_vlan)
2251 {
2252         struct sja1105_bridge_vlan *v;
2253
2254         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2255                 return 0;
2256
2257         list_for_each_entry(v, &priv->dsa_8021q_vlans, list) {
2258                 int match = v->vid;
2259
2260                 new_vlan[match].vlanid = v->vid;
2261                 new_vlan[match].vmemb_port |= BIT(v->port);
2262                 new_vlan[match].vlan_bc |= BIT(v->port);
2263                 if (!v->untagged)
2264                         new_vlan[match].tag_port |= BIT(v->port);
2265         }
2266
2267         return 0;
2268 }
2269
2270 static int sja1105_build_subvlans(struct sja1105_private *priv,
2271                                   u16 subvlan_map[][DSA_8021Q_N_SUBVLAN],
2272                                   struct sja1105_vlan_lookup_entry *new_vlan,
2273                                   struct sja1105_retagging_entry *new_retagging,
2274                                   int *num_retagging)
2275 {
2276         struct sja1105_bridge_vlan *v;
2277         int k = *num_retagging;
2278
2279         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2280                 return 0;
2281
2282         list_for_each_entry(v, &priv->bridge_vlans, list) {
2283                 int upstream = dsa_upstream_port(priv->ds, v->port);
2284                 int match, subvlan;
2285                 u16 rx_vid;
2286
2287                 /* Only sub-VLANs on user ports need to be applied.
2288                  * Bridge VLANs also include VLANs added automatically
2289                  * by DSA on the CPU port.
2290                  */
2291                 if (!dsa_is_user_port(priv->ds, v->port))
2292                         continue;
2293
2294                 subvlan = sja1105_find_subvlan(subvlan_map[v->port],
2295                                                v->vid);
2296                 if (subvlan < 0) {
2297                         subvlan = sja1105_find_free_subvlan(subvlan_map[v->port],
2298                                                             v->pvid);
2299                         if (subvlan < 0) {
2300                                 dev_err(priv->ds->dev, "No more free subvlans\n");
2301                                 return -ENOSPC;
2302                         }
2303                 }
2304
2305                 rx_vid = dsa_8021q_rx_vid_subvlan(priv->ds, v->port, subvlan);
2306
2307                 /* @v->vid on @v->port needs to be retagged to @rx_vid
2308                  * on @upstream. Assume @v->vid on @v->port and on
2309                  * @upstream was already configured by the previous
2310                  * iteration over bridge_vlans.
2311                  */
2312                 match = rx_vid;
2313                 new_vlan[match].vlanid = rx_vid;
2314                 new_vlan[match].vmemb_port |= BIT(v->port);
2315                 new_vlan[match].vmemb_port |= BIT(upstream);
2316                 new_vlan[match].vlan_bc |= BIT(v->port);
2317                 new_vlan[match].vlan_bc |= BIT(upstream);
2318                 /* The "untagged" flag is set the same as for the
2319                  * original VLAN
2320                  */
2321                 if (!v->untagged)
2322                         new_vlan[match].tag_port |= BIT(v->port);
2323                 /* But it's always tagged towards the CPU */
2324                 new_vlan[match].tag_port |= BIT(upstream);
2325
2326                 /* The Retagging Table generates packet *clones* with
2327                  * the new VLAN. This is a very odd hardware quirk
2328                  * which we need to suppress by dropping the original
2329                  * packet.
2330                  * Deny egress of the original VLAN towards the CPU
2331                  * port. This will force the switch to drop it, and
2332                  * we'll see only the retagged packets.
2333                  */
2334                 match = v->vid;
2335                 new_vlan[match].vlan_bc &= ~BIT(upstream);
2336
2337                 /* And the retagging itself */
2338                 new_retagging[k].vlan_ing = v->vid;
2339                 new_retagging[k].vlan_egr = rx_vid;
2340                 new_retagging[k].ing_port = BIT(v->port);
2341                 new_retagging[k].egr_port = BIT(upstream);
2342                 if (k++ == SJA1105_MAX_RETAGGING_COUNT) {
2343                         dev_err(priv->ds->dev, "No more retagging rules\n");
2344                         return -ENOSPC;
2345                 }
2346
2347                 subvlan_map[v->port][subvlan] = v->vid;
2348         }
2349
2350         *num_retagging = k;
2351
2352         return 0;
2353 }
2354
2355 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2356  * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2357  * the CPU port of neighbour switches.
2358  */
2359 static int
2360 sja1105_build_crosschip_subvlans(struct sja1105_private *priv,
2361                                  struct sja1105_vlan_lookup_entry *new_vlan,
2362                                  struct sja1105_retagging_entry *new_retagging,
2363                                  int *num_retagging)
2364 {
2365         struct sja1105_crosschip_vlan *tmp, *pos;
2366         struct dsa_8021q_crosschip_link *c;
2367         struct sja1105_bridge_vlan *v, *w;
2368         struct list_head crosschip_vlans;
2369         int k = *num_retagging;
2370         int rc = 0;
2371
2372         if (priv->vlan_state != SJA1105_VLAN_BEST_EFFORT)
2373                 return 0;
2374
2375         INIT_LIST_HEAD(&crosschip_vlans);
2376
2377         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2378                 struct sja1105_private *other_priv = c->other_ctx->ds->priv;
2379
2380                 if (other_priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2381                         continue;
2382
2383                 /* Crosschip links are also added to the CPU ports.
2384                  * Ignore those.
2385                  */
2386                 if (!dsa_is_user_port(priv->ds, c->port))
2387                         continue;
2388                 if (!dsa_is_user_port(c->other_ctx->ds, c->other_port))
2389                         continue;
2390
2391                 /* Search for VLANs on the remote port */
2392                 list_for_each_entry(v, &other_priv->bridge_vlans, list) {
2393                         bool already_added = false;
2394                         bool we_have_it = false;
2395
2396                         if (v->port != c->other_port)
2397                                 continue;
2398
2399                         /* If @v is a pvid on @other_ds, it does not need
2400                          * re-retagging, because its SVL field is 0 and we
2401                          * already allow that, via the dsa_8021q crosschip
2402                          * links.
2403                          */
2404                         if (v->pvid)
2405                                 continue;
2406
2407                         /* Search for the VLAN on our local port */
2408                         list_for_each_entry(w, &priv->bridge_vlans, list) {
2409                                 if (w->port == c->port && w->vid == v->vid) {
2410                                         we_have_it = true;
2411                                         break;
2412                                 }
2413                         }
2414
2415                         if (!we_have_it)
2416                                 continue;
2417
2418                         list_for_each_entry(tmp, &crosschip_vlans, list) {
2419                                 if (tmp->vid == v->vid &&
2420                                     tmp->untagged == v->untagged &&
2421                                     tmp->port == c->port &&
2422                                     tmp->other_port == v->port &&
2423                                     tmp->other_ctx == c->other_ctx) {
2424                                         already_added = true;
2425                                         break;
2426                                 }
2427                         }
2428
2429                         if (already_added)
2430                                 continue;
2431
2432                         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2433                         if (!tmp) {
2434                                 dev_err(priv->ds->dev, "Failed to allocate memory\n");
2435                                 rc = -ENOMEM;
2436                                 goto out;
2437                         }
2438                         tmp->vid = v->vid;
2439                         tmp->port = c->port;
2440                         tmp->other_port = v->port;
2441                         tmp->other_ctx = c->other_ctx;
2442                         tmp->untagged = v->untagged;
2443                         list_add(&tmp->list, &crosschip_vlans);
2444                 }
2445         }
2446
2447         list_for_each_entry(tmp, &crosschip_vlans, list) {
2448                 struct sja1105_private *other_priv = tmp->other_ctx->ds->priv;
2449                 int upstream = dsa_upstream_port(priv->ds, tmp->port);
2450                 int match, subvlan;
2451                 u16 rx_vid;
2452
2453                 subvlan = sja1105_find_committed_subvlan(other_priv,
2454                                                          tmp->other_port,
2455                                                          tmp->vid);
2456                 /* If this happens, it's a bug. The neighbour switch does not
2457                  * have a subvlan for tmp->vid on tmp->other_port, but it
2458                  * should, since we already checked for its vlan_state.
2459                  */
2460                 if (WARN_ON(subvlan < 0)) {
2461                         rc = -EINVAL;
2462                         goto out;
2463                 }
2464
2465                 rx_vid = dsa_8021q_rx_vid_subvlan(tmp->other_ctx->ds,
2466                                                   tmp->other_port,
2467                                                   subvlan);
2468
2469                 /* The @rx_vid retagged from @tmp->vid on
2470                  * {@tmp->other_ds, @tmp->other_port} needs to be
2471                  * re-retagged to @tmp->vid on the way back to us.
2472                  *
2473                  * Assume the original @tmp->vid is already configured
2474                  * on this local switch, otherwise we wouldn't be
2475                  * retagging its subvlan on the other switch in the
2476                  * first place. We just need to add a reverse retagging
2477                  * rule for @rx_vid and install @rx_vid on our ports.
2478                  */
2479                 match = rx_vid;
2480                 new_vlan[match].vlanid = rx_vid;
2481                 new_vlan[match].vmemb_port |= BIT(tmp->port);
2482                 new_vlan[match].vmemb_port |= BIT(upstream);
2483                 /* The "untagged" flag is set the same as for the
2484                  * original VLAN. And towards the CPU, it doesn't
2485                  * really matter, because @rx_vid will only receive
2486                  * traffic on that port. For consistency with other dsa_8021q
2487                  * VLANs, we'll keep the CPU port tagged.
2488                  */
2489                 if (!tmp->untagged)
2490                         new_vlan[match].tag_port |= BIT(tmp->port);
2491                 new_vlan[match].tag_port |= BIT(upstream);
2492                 /* Deny egress of @rx_vid towards our front-panel port.
2493                  * This will force the switch to drop it, and we'll see
2494                  * only the re-retagged packets (having the original,
2495                  * pre-initial-retagging, VLAN @tmp->vid).
2496                  */
2497                 new_vlan[match].vlan_bc &= ~BIT(tmp->port);
2498
2499                 /* On reverse retagging, the same ingress VLAN goes to multiple
2500                  * ports. So we have an opportunity to create composite rules
2501                  * to not waste the limited space in the retagging table.
2502                  */
2503                 k = sja1105_find_retagging_entry(new_retagging, *num_retagging,
2504                                                  upstream, rx_vid, tmp->vid);
2505                 if (k < 0) {
2506                         if (*num_retagging == SJA1105_MAX_RETAGGING_COUNT) {
2507                                 dev_err(priv->ds->dev, "No more retagging rules\n");
2508                                 rc = -ENOSPC;
2509                                 goto out;
2510                         }
2511                         k = (*num_retagging)++;
2512                 }
2513                 /* And the retagging itself */
2514                 new_retagging[k].vlan_ing = rx_vid;
2515                 new_retagging[k].vlan_egr = tmp->vid;
2516                 new_retagging[k].ing_port = BIT(upstream);
2517                 new_retagging[k].egr_port |= BIT(tmp->port);
2518         }
2519
2520 out:
2521         list_for_each_entry_safe(tmp, pos, &crosschip_vlans, list) {
2522                 list_del(&tmp->list);
2523                 kfree(tmp);
2524         }
2525
2526         return rc;
2527 }
2528
2529 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify);
2530
2531 static int sja1105_notify_crosschip_switches(struct sja1105_private *priv)
2532 {
2533         struct sja1105_crosschip_switch *s, *pos;
2534         struct list_head crosschip_switches;
2535         struct dsa_8021q_crosschip_link *c;
2536         int rc = 0;
2537
2538         INIT_LIST_HEAD(&crosschip_switches);
2539
2540         list_for_each_entry(c, &priv->dsa_8021q_ctx->crosschip_links, list) {
2541                 bool already_added = false;
2542
2543                 list_for_each_entry(s, &crosschip_switches, list) {
2544                         if (s->other_ctx == c->other_ctx) {
2545                                 already_added = true;
2546                                 break;
2547                         }
2548                 }
2549
2550                 if (already_added)
2551                         continue;
2552
2553                 s = kzalloc(sizeof(*s), GFP_KERNEL);
2554                 if (!s) {
2555                         dev_err(priv->ds->dev, "Failed to allocate memory\n");
2556                         rc = -ENOMEM;
2557                         goto out;
2558                 }
2559                 s->other_ctx = c->other_ctx;
2560                 list_add(&s->list, &crosschip_switches);
2561         }
2562
2563         list_for_each_entry(s, &crosschip_switches, list) {
2564                 struct sja1105_private *other_priv = s->other_ctx->ds->priv;
2565
2566                 rc = sja1105_build_vlan_table(other_priv, false);
2567                 if (rc)
2568                         goto out;
2569         }
2570
2571 out:
2572         list_for_each_entry_safe(s, pos, &crosschip_switches, list) {
2573                 list_del(&s->list);
2574                 kfree(s);
2575         }
2576
2577         return rc;
2578 }
2579
2580 static int sja1105_build_vlan_table(struct sja1105_private *priv, bool notify)
2581 {
2582         u16 subvlan_map[SJA1105_NUM_PORTS][DSA_8021Q_N_SUBVLAN];
2583         struct sja1105_retagging_entry *new_retagging;
2584         struct sja1105_vlan_lookup_entry *new_vlan;
2585         struct sja1105_table *table;
2586         int i, num_retagging = 0;
2587         int rc;
2588
2589         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2590         new_vlan = kcalloc(VLAN_N_VID,
2591                            table->ops->unpacked_entry_size, GFP_KERNEL);
2592         if (!new_vlan)
2593                 return -ENOMEM;
2594
2595         table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
2596         new_retagging = kcalloc(SJA1105_MAX_RETAGGING_COUNT,
2597                                 table->ops->unpacked_entry_size, GFP_KERNEL);
2598         if (!new_retagging) {
2599                 kfree(new_vlan);
2600                 return -ENOMEM;
2601         }
2602
2603         for (i = 0; i < VLAN_N_VID; i++)
2604                 new_vlan[i].vlanid = VLAN_N_VID;
2605
2606         for (i = 0; i < SJA1105_MAX_RETAGGING_COUNT; i++)
2607                 new_retagging[i].vlan_ing = VLAN_N_VID;
2608
2609         for (i = 0; i < priv->ds->num_ports; i++)
2610                 sja1105_init_subvlan_map(subvlan_map[i]);
2611
2612         /* Bridge VLANs */
2613         rc = sja1105_build_bridge_vlans(priv, new_vlan);
2614         if (rc)
2615                 goto out;
2616
2617         /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2618          * - RX VLANs
2619          * - TX VLANs
2620          * - Crosschip links
2621          */
2622         rc = sja1105_build_dsa_8021q_vlans(priv, new_vlan);
2623         if (rc)
2624                 goto out;
2625
2626         /* Private VLANs necessary for dsa_8021q operation, which we need to
2627          * determine on our own:
2628          * - Sub-VLANs
2629          * - Sub-VLANs of crosschip switches
2630          */
2631         rc = sja1105_build_subvlans(priv, subvlan_map, new_vlan, new_retagging,
2632                                     &num_retagging);
2633         if (rc)
2634                 goto out;
2635
2636         rc = sja1105_build_crosschip_subvlans(priv, new_vlan, new_retagging,
2637                                               &num_retagging);
2638         if (rc)
2639                 goto out;
2640
2641         rc = sja1105_commit_vlans(priv, new_vlan, new_retagging, num_retagging);
2642         if (rc)
2643                 goto out;
2644
2645         rc = sja1105_commit_pvid(priv);
2646         if (rc)
2647                 goto out;
2648
2649         for (i = 0; i < priv->ds->num_ports; i++)
2650                 sja1105_commit_subvlan_map(priv, i, subvlan_map[i]);
2651
2652         if (notify) {
2653                 rc = sja1105_notify_crosschip_switches(priv);
2654                 if (rc)
2655                         goto out;
2656         }
2657
2658 out:
2659         kfree(new_vlan);
2660         kfree(new_retagging);
2661
2662         return rc;
2663 }
2664
2665 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port,
2666                                 const struct switchdev_obj_port_vlan *vlan)
2667 {
2668         struct sja1105_private *priv = ds->priv;
2669         u16 vid;
2670
2671         if (priv->vlan_state == SJA1105_VLAN_FILTERING_FULL)
2672                 return 0;
2673
2674         /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2675          * bridge plus tagging), be sure to at least deny alterations to the
2676          * configuration done by dsa_8021q.
2677          */
2678         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
2679                 if (vid_is_dsa_8021q(vid)) {
2680                         dev_err(ds->dev, "Range 1024-3071 reserved for dsa_8021q operation\n");
2681                         return -EBUSY;
2682                 }
2683         }
2684
2685         return 0;
2686 }
2687
2688 /* The TPID setting belongs to the General Parameters table,
2689  * which can only be partially reconfigured at runtime (and not the TPID).
2690  * So a switch reset is required.
2691  */
2692 int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
2693                            struct switchdev_trans *trans)
2694 {
2695         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
2696         struct sja1105_general_params_entry *general_params;
2697         struct sja1105_private *priv = ds->priv;
2698         enum sja1105_vlan_state state;
2699         struct sja1105_table *table;
2700         struct sja1105_rule *rule;
2701         bool want_tagging;
2702         u16 tpid, tpid2;
2703         int rc;
2704
2705         if (switchdev_trans_ph_prepare(trans)) {
2706                 list_for_each_entry(rule, &priv->flow_block.rules, list) {
2707                         if (rule->type == SJA1105_RULE_VL) {
2708                                 dev_err(ds->dev,
2709                                         "Cannot change VLAN filtering with active VL rules\n");
2710                                 return -EBUSY;
2711                         }
2712                 }
2713
2714                 return 0;
2715         }
2716
2717         if (enabled) {
2718                 /* Enable VLAN filtering. */
2719                 tpid  = ETH_P_8021Q;
2720                 tpid2 = ETH_P_8021AD;
2721         } else {
2722                 /* Disable VLAN filtering. */
2723                 tpid  = ETH_P_SJA1105;
2724                 tpid2 = ETH_P_SJA1105;
2725         }
2726
2727         for (port = 0; port < ds->num_ports; port++) {
2728                 struct sja1105_port *sp = &priv->ports[port];
2729
2730                 if (enabled)
2731                         sp->xmit_tpid = priv->info->qinq_tpid;
2732                 else
2733                         sp->xmit_tpid = ETH_P_SJA1105;
2734         }
2735
2736         if (!enabled)
2737                 state = SJA1105_VLAN_UNAWARE;
2738         else if (priv->best_effort_vlan_filtering)
2739                 state = SJA1105_VLAN_BEST_EFFORT;
2740         else
2741                 state = SJA1105_VLAN_FILTERING_FULL;
2742
2743         if (priv->vlan_state == state)
2744                 return 0;
2745
2746         priv->vlan_state = state;
2747         want_tagging = (state == SJA1105_VLAN_UNAWARE ||
2748                         state == SJA1105_VLAN_BEST_EFFORT);
2749
2750         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
2751         general_params = table->entries;
2752         /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2753         general_params->tpid = tpid;
2754         /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2755         general_params->tpid2 = tpid2;
2756         /* When VLAN filtering is on, we need to at least be able to
2757          * decode management traffic through the "backup plan".
2758          */
2759         general_params->incl_srcpt1 = enabled;
2760         general_params->incl_srcpt0 = enabled;
2761
2762         want_tagging = priv->best_effort_vlan_filtering || !enabled;
2763
2764         /* VLAN filtering => independent VLAN learning.
2765          * No VLAN filtering (or best effort) => shared VLAN learning.
2766          *
2767          * In shared VLAN learning mode, untagged traffic still gets
2768          * pvid-tagged, and the FDB table gets populated with entries
2769          * containing the "real" (pvid or from VLAN tag) VLAN ID.
2770          * However the switch performs a masked L2 lookup in the FDB,
2771          * effectively only looking up a frame's DMAC (and not VID) for the
2772          * forwarding decision.
2773          *
2774          * This is extremely convenient for us, because in modes with
2775          * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2776          * each front panel port. This is good for identification but breaks
2777          * learning badly - the VID of the learnt FDB entry is unique, aka
2778          * no frames coming from any other port are going to have it. So
2779          * for forwarding purposes, this is as though learning was broken
2780          * (all frames get flooded).
2781          */
2782         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
2783         l2_lookup_params = table->entries;
2784         l2_lookup_params->shared_learn = want_tagging;
2785
2786         sja1105_frame_memory_partitioning(priv);
2787
2788         rc = sja1105_build_vlan_table(priv, false);
2789         if (rc)
2790                 return rc;
2791
2792         rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);
2793         if (rc)
2794                 dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
2795
2796         /* Switch port identification based on 802.1Q is only passable
2797          * if we are not under a vlan_filtering bridge. So make sure
2798          * the two configurations are mutually exclusive (of course, the
2799          * user may know better, i.e. best_effort_vlan_filtering).
2800          */
2801         return sja1105_setup_8021q_tagging(ds, want_tagging);
2802 }
2803
2804 /* Returns number of VLANs added (0 or 1) on success,
2805  * or a negative error code.
2806  */
2807 static int sja1105_vlan_add_one(struct dsa_switch *ds, int port, u16 vid,
2808                                 u16 flags, struct list_head *vlan_list)
2809 {
2810         bool untagged = flags & BRIDGE_VLAN_INFO_UNTAGGED;
2811         bool pvid = flags & BRIDGE_VLAN_INFO_PVID;
2812         struct sja1105_bridge_vlan *v;
2813
2814         list_for_each_entry(v, vlan_list, list) {
2815                 if (v->port == port && v->vid == vid) {
2816                         /* Already added */
2817                         if (v->untagged == untagged && v->pvid == pvid)
2818                                 /* Nothing changed */
2819                                 return 0;
2820
2821                         /* It's the same VLAN, but some of the flags changed
2822                          * and the user did not bother to delete it first.
2823                          * Update it and trigger sja1105_build_vlan_table.
2824                          */
2825                         v->untagged = untagged;
2826                         v->pvid = pvid;
2827                         return 1;
2828                 }
2829         }
2830
2831         v = kzalloc(sizeof(*v), GFP_KERNEL);
2832         if (!v) {
2833                 dev_err(ds->dev, "Out of memory while storing VLAN\n");
2834                 return -ENOMEM;
2835         }
2836
2837         v->port = port;
2838         v->vid = vid;
2839         v->untagged = untagged;
2840         v->pvid = pvid;
2841         list_add(&v->list, vlan_list);
2842
2843         return 1;
2844 }
2845
2846 /* Returns number of VLANs deleted (0 or 1) */
2847 static int sja1105_vlan_del_one(struct dsa_switch *ds, int port, u16 vid,
2848                                 struct list_head *vlan_list)
2849 {
2850         struct sja1105_bridge_vlan *v, *n;
2851
2852         list_for_each_entry_safe(v, n, vlan_list, list) {
2853                 if (v->port == port && v->vid == vid) {
2854                         list_del(&v->list);
2855                         kfree(v);
2856                         return 1;
2857                 }
2858         }
2859
2860         return 0;
2861 }
2862
2863 static void sja1105_vlan_add(struct dsa_switch *ds, int port,
2864                              const struct switchdev_obj_port_vlan *vlan)
2865 {
2866         struct sja1105_private *priv = ds->priv;
2867         bool vlan_table_changed = false;
2868         u16 vid;
2869         int rc;
2870
2871         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
2872                 rc = sja1105_vlan_add_one(ds, port, vid, vlan->flags,
2873                                           &priv->bridge_vlans);
2874                 if (rc < 0)
2875                         return;
2876                 if (rc > 0)
2877                         vlan_table_changed = true;
2878         }
2879
2880         if (!vlan_table_changed)
2881                 return;
2882
2883         rc = sja1105_build_vlan_table(priv, true);
2884         if (rc)
2885                 dev_err(ds->dev, "Failed to build VLAN table: %d\n", rc);
2886 }
2887
2888 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
2889                             const struct switchdev_obj_port_vlan *vlan)
2890 {
2891         struct sja1105_private *priv = ds->priv;
2892         bool vlan_table_changed = false;
2893         u16 vid;
2894         int rc;
2895
2896         for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
2897                 rc = sja1105_vlan_del_one(ds, port, vid, &priv->bridge_vlans);
2898                 if (rc > 0)
2899                         vlan_table_changed = true;
2900         }
2901
2902         if (!vlan_table_changed)
2903                 return 0;
2904
2905         return sja1105_build_vlan_table(priv, true);
2906 }
2907
2908 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
2909                                       u16 flags)
2910 {
2911         struct sja1105_private *priv = ds->priv;
2912         int rc;
2913
2914         rc = sja1105_vlan_add_one(ds, port, vid, flags, &priv->dsa_8021q_vlans);
2915         if (rc <= 0)
2916                 return rc;
2917
2918         return sja1105_build_vlan_table(priv, true);
2919 }
2920
2921 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
2922 {
2923         struct sja1105_private *priv = ds->priv;
2924         int rc;
2925
2926         rc = sja1105_vlan_del_one(ds, port, vid, &priv->dsa_8021q_vlans);
2927         if (!rc)
2928                 return 0;
2929
2930         return sja1105_build_vlan_table(priv, true);
2931 }
2932
2933 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops = {
2934         .vlan_add       = sja1105_dsa_8021q_vlan_add,
2935         .vlan_del       = sja1105_dsa_8021q_vlan_del,
2936 };
2937
2938 /* The programming model for the SJA1105 switch is "all-at-once" via static
2939  * configuration tables. Some of these can be dynamically modified at runtime,
2940  * but not the xMII mode parameters table.
2941  * Furthermode, some PHYs may not have crystals for generating their clocks
2942  * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
2943  * ref_clk pin. So port clocking needs to be initialized early, before
2944  * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
2945  * Setting correct PHY link speed does not matter now.
2946  * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
2947  * bindings are not yet parsed by DSA core. We need to parse early so that we
2948  * can populate the xMII mode parameters table.
2949  */
2950 static int sja1105_setup(struct dsa_switch *ds)
2951 {
2952         struct sja1105_dt_port ports[SJA1105_NUM_PORTS];
2953         struct sja1105_private *priv = ds->priv;
2954         int rc;
2955
2956         rc = sja1105_parse_dt(priv, ports);
2957         if (rc < 0) {
2958                 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
2959                 return rc;
2960         }
2961
2962         /* Error out early if internal delays are required through DT
2963          * and we can't apply them.
2964          */
2965         rc = sja1105_parse_rgmii_delays(priv, ports);
2966         if (rc < 0) {
2967                 dev_err(ds->dev, "RGMII delay not supported\n");
2968                 return rc;
2969         }
2970
2971         rc = sja1105_ptp_clock_register(ds);
2972         if (rc < 0) {
2973                 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
2974                 return rc;
2975         }
2976         /* Create and send configuration down to device */
2977         rc = sja1105_static_config_load(priv, ports);
2978         if (rc < 0) {
2979                 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
2980                 goto out_ptp_clock_unregister;
2981         }
2982         /* Configure the CGU (PHY link modes and speeds) */
2983         rc = sja1105_clocking_setup(priv);
2984         if (rc < 0) {
2985                 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc);
2986                 goto out_static_config_free;
2987         }
2988         /* On SJA1105, VLAN filtering per se is always enabled in hardware.
2989          * The only thing we can do to disable it is lie about what the 802.1Q
2990          * EtherType is.
2991          * So it will still try to apply VLAN filtering, but all ingress
2992          * traffic (except frames received with EtherType of ETH_P_SJA1105)
2993          * will be internally tagged with a distorted VLAN header where the
2994          * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
2995          */
2996         ds->vlan_filtering_is_global = true;
2997
2998         /* Advertise the 8 egress queues */
2999         ds->num_tx_queues = SJA1105_NUM_TC;
3000
3001         ds->mtu_enforcement_ingress = true;
3002
3003         ds->configure_vlan_while_not_filtering = true;
3004
3005         rc = sja1105_devlink_setup(ds);
3006         if (rc < 0)
3007                 goto out_static_config_free;
3008
3009         /* The DSA/switchdev model brings up switch ports in standalone mode by
3010          * default, and that means vlan_filtering is 0 since they're not under
3011          * a bridge, so it's safe to set up switch tagging at this time.
3012          */
3013         rtnl_lock();
3014         rc = sja1105_setup_8021q_tagging(ds, true);
3015         rtnl_unlock();
3016         if (rc)
3017                 goto out_devlink_teardown;
3018
3019         return 0;
3020
3021 out_devlink_teardown:
3022         sja1105_devlink_teardown(ds);
3023 out_ptp_clock_unregister:
3024         sja1105_ptp_clock_unregister(ds);
3025 out_static_config_free:
3026         sja1105_static_config_free(&priv->static_config);
3027
3028         return rc;
3029 }
3030
3031 static void sja1105_teardown(struct dsa_switch *ds)
3032 {
3033         struct sja1105_private *priv = ds->priv;
3034         struct sja1105_bridge_vlan *v, *n;
3035         int port;
3036
3037         for (port = 0; port < SJA1105_NUM_PORTS; port++) {
3038                 struct sja1105_port *sp = &priv->ports[port];
3039
3040                 if (!dsa_is_user_port(ds, port))
3041                         continue;
3042
3043                 if (sp->xmit_worker)
3044                         kthread_destroy_worker(sp->xmit_worker);
3045         }
3046
3047         sja1105_devlink_teardown(ds);
3048         sja1105_flower_teardown(ds);
3049         sja1105_tas_teardown(ds);
3050         sja1105_ptp_clock_unregister(ds);
3051         sja1105_static_config_free(&priv->static_config);
3052
3053         list_for_each_entry_safe(v, n, &priv->dsa_8021q_vlans, list) {
3054                 list_del(&v->list);
3055                 kfree(v);
3056         }
3057
3058         list_for_each_entry_safe(v, n, &priv->bridge_vlans, list) {
3059                 list_del(&v->list);
3060                 kfree(v);
3061         }
3062 }
3063
3064 static int sja1105_port_enable(struct dsa_switch *ds, int port,
3065                                struct phy_device *phy)
3066 {
3067         struct net_device *slave;
3068
3069         if (!dsa_is_user_port(ds, port))
3070                 return 0;
3071
3072         slave = dsa_to_port(ds, port)->slave;
3073
3074         slave->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3075
3076         return 0;
3077 }
3078
3079 static void sja1105_port_disable(struct dsa_switch *ds, int port)
3080 {
3081         struct sja1105_private *priv = ds->priv;
3082         struct sja1105_port *sp = &priv->ports[port];
3083
3084         if (!dsa_is_user_port(ds, port))
3085                 return;
3086
3087         kthread_cancel_work_sync(&sp->xmit_work);
3088         skb_queue_purge(&sp->xmit_queue);
3089 }
3090
3091 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
3092                              struct sk_buff *skb, bool takets)
3093 {
3094         struct sja1105_mgmt_entry mgmt_route = {0};
3095         struct sja1105_private *priv = ds->priv;
3096         struct ethhdr *hdr;
3097         int timeout = 10;
3098         int rc;
3099
3100         hdr = eth_hdr(skb);
3101
3102         mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
3103         mgmt_route.destports = BIT(port);
3104         mgmt_route.enfport = 1;
3105         mgmt_route.tsreg = 0;
3106         mgmt_route.takets = takets;
3107
3108         rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3109                                           slot, &mgmt_route, true);
3110         if (rc < 0) {
3111                 kfree_skb(skb);
3112                 return rc;
3113         }
3114
3115         /* Transfer skb to the host port. */
3116         dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
3117
3118         /* Wait until the switch has processed the frame */
3119         do {
3120                 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
3121                                                  slot, &mgmt_route);
3122                 if (rc < 0) {
3123                         dev_err_ratelimited(priv->ds->dev,
3124                                             "failed to poll for mgmt route\n");
3125                         continue;
3126                 }
3127
3128                 /* UM10944: The ENFPORT flag of the respective entry is
3129                  * cleared when a match is found. The host can use this
3130                  * flag as an acknowledgment.
3131                  */
3132                 cpu_relax();
3133         } while (mgmt_route.enfport && --timeout);
3134
3135         if (!timeout) {
3136                 /* Clean up the management route so that a follow-up
3137                  * frame may not match on it by mistake.
3138                  * This is only hardware supported on P/Q/R/S - on E/T it is
3139                  * a no-op and we are silently discarding the -EOPNOTSUPP.
3140                  */
3141                 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
3142                                              slot, &mgmt_route, false);
3143                 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
3144         }
3145
3146         return NETDEV_TX_OK;
3147 }
3148
3149 #define work_to_port(work) \
3150                 container_of((work), struct sja1105_port, xmit_work)
3151 #define tagger_to_sja1105(t) \
3152                 container_of((t), struct sja1105_private, tagger_data)
3153
3154 /* Deferred work is unfortunately necessary because setting up the management
3155  * route cannot be done from atomit context (SPI transfer takes a sleepable
3156  * lock on the bus)
3157  */
3158 static void sja1105_port_deferred_xmit(struct kthread_work *work)
3159 {
3160         struct sja1105_port *sp = work_to_port(work);
3161         struct sja1105_tagger_data *tagger_data = sp->data;
3162         struct sja1105_private *priv = tagger_to_sja1105(tagger_data);
3163         int port = sp - priv->ports;
3164         struct sk_buff *skb;
3165
3166         while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) {
3167                 struct sk_buff *clone = DSA_SKB_CB(skb)->clone;
3168
3169                 mutex_lock(&priv->mgmt_lock);
3170
3171                 sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone);
3172
3173                 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3174                 if (clone)
3175                         sja1105_ptp_txtstamp_skb(priv->ds, port, clone);
3176
3177                 mutex_unlock(&priv->mgmt_lock);
3178         }
3179 }
3180
3181 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3182  * which cannot be reconfigured at runtime. So a switch reset is required.
3183  */
3184 static int sja1105_set_ageing_time(struct dsa_switch *ds,
3185                                    unsigned int ageing_time)
3186 {
3187         struct sja1105_l2_lookup_params_entry *l2_lookup_params;
3188         struct sja1105_private *priv = ds->priv;
3189         struct sja1105_table *table;
3190         unsigned int maxage;
3191
3192         table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
3193         l2_lookup_params = table->entries;
3194
3195         maxage = SJA1105_AGEING_TIME_MS(ageing_time);
3196
3197         if (l2_lookup_params->maxage == maxage)
3198                 return 0;
3199
3200         l2_lookup_params->maxage = maxage;
3201
3202         return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);
3203 }
3204
3205 static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
3206 {
3207         struct sja1105_l2_policing_entry *policing;
3208         struct sja1105_private *priv = ds->priv;
3209
3210         new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;
3211
3212         if (dsa_is_cpu_port(ds, port))
3213                 new_mtu += VLAN_HLEN;
3214
3215         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3216
3217         if (policing[port].maxlen == new_mtu)
3218                 return 0;
3219
3220         policing[port].maxlen = new_mtu;
3221
3222         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3223 }
3224
3225 static int sja1105_get_max_mtu(struct dsa_switch *ds, int port)
3226 {
3227         return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN;
3228 }
3229
3230 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
3231                                  enum tc_setup_type type,
3232                                  void *type_data)
3233 {
3234         switch (type) {
3235         case TC_SETUP_QDISC_TAPRIO:
3236                 return sja1105_setup_tc_taprio(ds, port, type_data);
3237         case TC_SETUP_QDISC_CBS:
3238                 return sja1105_setup_tc_cbs(ds, port, type_data);
3239         default:
3240                 return -EOPNOTSUPP;
3241         }
3242 }
3243
3244 /* We have a single mirror (@to) port, but can configure ingress and egress
3245  * mirroring on all other (@from) ports.
3246  * We need to allow mirroring rules only as long as the @to port is always the
3247  * same, and we need to unset the @to port from mirr_port only when there is no
3248  * mirroring rule that references it.
3249  */
3250 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,
3251                                 bool ingress, bool enabled)
3252 {
3253         struct sja1105_general_params_entry *general_params;
3254         struct sja1105_mac_config_entry *mac;
3255         struct sja1105_table *table;
3256         bool already_enabled;
3257         u64 new_mirr_port;
3258         int rc;
3259
3260         table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
3261         general_params = table->entries;
3262
3263         mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
3264
3265         already_enabled = (general_params->mirr_port != SJA1105_NUM_PORTS);
3266         if (already_enabled && enabled && general_params->mirr_port != to) {
3267                 dev_err(priv->ds->dev,
3268                         "Delete mirroring rules towards port %llu first\n",
3269                         general_params->mirr_port);
3270                 return -EBUSY;
3271         }
3272
3273         new_mirr_port = to;
3274         if (!enabled) {
3275                 bool keep = false;
3276                 int port;
3277
3278                 /* Anybody still referencing mirr_port? */
3279                 for (port = 0; port < SJA1105_NUM_PORTS; port++) {
3280                         if (mac[port].ing_mirr || mac[port].egr_mirr) {
3281                                 keep = true;
3282                                 break;
3283                         }
3284                 }
3285                 /* Unset already_enabled for next time */
3286                 if (!keep)
3287                         new_mirr_port = SJA1105_NUM_PORTS;
3288         }
3289         if (new_mirr_port != general_params->mirr_port) {
3290                 general_params->mirr_port = new_mirr_port;
3291
3292                 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,
3293                                                   0, general_params, true);
3294                 if (rc < 0)
3295                         return rc;
3296         }
3297
3298         if (ingress)
3299                 mac[from].ing_mirr = enabled;
3300         else
3301                 mac[from].egr_mirr = enabled;
3302
3303         return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,
3304                                             &mac[from], true);
3305 }
3306
3307 static int sja1105_mirror_add(struct dsa_switch *ds, int port,
3308                               struct dsa_mall_mirror_tc_entry *mirror,
3309                               bool ingress)
3310 {
3311         return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3312                                     ingress, true);
3313 }
3314
3315 static void sja1105_mirror_del(struct dsa_switch *ds, int port,
3316                                struct dsa_mall_mirror_tc_entry *mirror)
3317 {
3318         sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
3319                              mirror->ingress, false);
3320 }
3321
3322 static int sja1105_port_policer_add(struct dsa_switch *ds, int port,
3323                                     struct dsa_mall_policer_tc_entry *policer)
3324 {
3325         struct sja1105_l2_policing_entry *policing;
3326         struct sja1105_private *priv = ds->priv;
3327
3328         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3329
3330         /* In hardware, every 8 microseconds the credit level is incremented by
3331          * the value of RATE bytes divided by 64, up to a maximum of SMAX
3332          * bytes.
3333          */
3334         policing[port].rate = div_u64(512 * policer->rate_bytes_per_sec,
3335                                       1000000);
3336         policing[port].smax = policer->burst;
3337
3338         return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3339 }
3340
3341 static void sja1105_port_policer_del(struct dsa_switch *ds, int port)
3342 {
3343         struct sja1105_l2_policing_entry *policing;
3344         struct sja1105_private *priv = ds->priv;
3345
3346         policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries;
3347
3348         policing[port].rate = SJA1105_RATE_MBPS(1000);
3349         policing[port].smax = 65535;
3350
3351         sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);
3352 }
3353
3354 static const struct dsa_switch_ops sja1105_switch_ops = {
3355         .get_tag_protocol       = sja1105_get_tag_protocol,
3356         .setup                  = sja1105_setup,
3357         .teardown               = sja1105_teardown,
3358         .set_ageing_time        = sja1105_set_ageing_time,
3359         .port_change_mtu        = sja1105_change_mtu,
3360         .port_max_mtu           = sja1105_get_max_mtu,
3361         .phylink_validate       = sja1105_phylink_validate,
3362         .phylink_mac_link_state = sja1105_mac_pcs_get_state,
3363         .phylink_mac_config     = sja1105_mac_config,
3364         .phylink_mac_link_up    = sja1105_mac_link_up,
3365         .phylink_mac_link_down  = sja1105_mac_link_down,
3366         .get_strings            = sja1105_get_strings,
3367         .get_ethtool_stats      = sja1105_get_ethtool_stats,
3368         .get_sset_count         = sja1105_get_sset_count,
3369         .get_ts_info            = sja1105_get_ts_info,
3370         .port_enable            = sja1105_port_enable,
3371         .port_disable           = sja1105_port_disable,
3372         .port_fdb_dump          = sja1105_fdb_dump,
3373         .port_fdb_add           = sja1105_fdb_add,
3374         .port_fdb_del           = sja1105_fdb_del,
3375         .port_bridge_join       = sja1105_bridge_join,
3376         .port_bridge_leave      = sja1105_bridge_leave,
3377         .port_stp_state_set     = sja1105_bridge_stp_state_set,
3378         .port_vlan_prepare      = sja1105_vlan_prepare,
3379         .port_vlan_filtering    = sja1105_vlan_filtering,
3380         .port_vlan_add          = sja1105_vlan_add,
3381         .port_vlan_del          = sja1105_vlan_del,
3382         .port_mdb_prepare       = sja1105_mdb_prepare,
3383         .port_mdb_add           = sja1105_mdb_add,
3384         .port_mdb_del           = sja1105_mdb_del,
3385         .port_hwtstamp_get      = sja1105_hwtstamp_get,
3386         .port_hwtstamp_set      = sja1105_hwtstamp_set,
3387         .port_rxtstamp          = sja1105_port_rxtstamp,
3388         .port_txtstamp          = sja1105_port_txtstamp,
3389         .port_setup_tc          = sja1105_port_setup_tc,
3390         .port_mirror_add        = sja1105_mirror_add,
3391         .port_mirror_del        = sja1105_mirror_del,
3392         .port_policer_add       = sja1105_port_policer_add,
3393         .port_policer_del       = sja1105_port_policer_del,
3394         .cls_flower_add         = sja1105_cls_flower_add,
3395         .cls_flower_del         = sja1105_cls_flower_del,
3396         .cls_flower_stats       = sja1105_cls_flower_stats,
3397         .crosschip_bridge_join  = sja1105_crosschip_bridge_join,
3398         .crosschip_bridge_leave = sja1105_crosschip_bridge_leave,
3399         .devlink_param_get      = sja1105_devlink_param_get,
3400         .devlink_param_set      = sja1105_devlink_param_set,
3401         .devlink_info_get       = sja1105_devlink_info_get,
3402 };
3403
3404 static const struct of_device_id sja1105_dt_ids[];
3405
3406 static int sja1105_check_device_id(struct sja1105_private *priv)
3407 {
3408         const struct sja1105_regs *regs = priv->info->regs;
3409         u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
3410         struct device *dev = &priv->spidev->dev;
3411         const struct of_device_id *match;
3412         u32 device_id;
3413         u64 part_no;
3414         int rc;
3415
3416         rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
3417                               NULL);
3418         if (rc < 0)
3419                 return rc;
3420
3421         rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id,
3422                               SJA1105_SIZE_DEVICE_ID);
3423         if (rc < 0)
3424                 return rc;
3425
3426         sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3427
3428         for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3429                 const struct sja1105_info *info = match->data;
3430
3431                 /* Is what's been probed in our match table at all? */
3432                 if (info->device_id != device_id || info->part_no != part_no)
3433                         continue;
3434
3435                 /* But is it what's in the device tree? */
3436                 if (priv->info->device_id != device_id ||
3437                     priv->info->part_no != part_no) {
3438                         dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n",
3439                                  priv->info->name, info->name);
3440                         /* It isn't. No problem, pick that up. */
3441                         priv->info = info;
3442                 }
3443
3444                 return 0;
3445         }
3446
3447         dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3448                 device_id, part_no);
3449
3450         return -ENODEV;
3451 }
3452
3453 static int sja1105_probe(struct spi_device *spi)
3454 {
3455         struct sja1105_tagger_data *tagger_data;
3456         struct device *dev = &spi->dev;
3457         struct sja1105_private *priv;
3458         struct dsa_switch *ds;
3459         int rc, port;
3460
3461         if (!dev->of_node) {
3462                 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
3463                 return -EINVAL;
3464         }
3465
3466         priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
3467         if (!priv)
3468                 return -ENOMEM;
3469
3470         /* Configure the optional reset pin and bring up switch */
3471         priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
3472         if (IS_ERR(priv->reset_gpio))
3473                 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
3474         else
3475                 sja1105_hw_reset(priv->reset_gpio, 1, 1);
3476
3477         /* Populate our driver private structure (priv) based on
3478          * the device tree node that was probed (spi)
3479          */
3480         priv->spidev = spi;
3481         spi_set_drvdata(spi, priv);
3482
3483         /* Configure the SPI bus */
3484         spi->bits_per_word = 8;
3485         rc = spi_setup(spi);
3486         if (rc < 0) {
3487                 dev_err(dev, "Could not init SPI\n");
3488                 return rc;
3489         }
3490
3491         priv->info = of_device_get_match_data(dev);
3492
3493         /* Detect hardware device */
3494         rc = sja1105_check_device_id(priv);
3495         if (rc < 0) {
3496                 dev_err(dev, "Device ID check failed: %d\n", rc);
3497                 return rc;
3498         }
3499
3500         dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
3501
3502         ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
3503         if (!ds)
3504                 return -ENOMEM;
3505
3506         ds->dev = dev;
3507         ds->num_ports = SJA1105_NUM_PORTS;
3508         ds->ops = &sja1105_switch_ops;
3509         ds->priv = priv;
3510         priv->ds = ds;
3511
3512         tagger_data = &priv->tagger_data;
3513
3514         mutex_init(&priv->ptp_data.lock);
3515         mutex_init(&priv->mgmt_lock);
3516
3517         priv->dsa_8021q_ctx = devm_kzalloc(dev, sizeof(*priv->dsa_8021q_ctx),
3518                                            GFP_KERNEL);
3519         if (!priv->dsa_8021q_ctx)
3520                 return -ENOMEM;
3521
3522         priv->dsa_8021q_ctx->ops = &sja1105_dsa_8021q_ops;
3523         priv->dsa_8021q_ctx->proto = htons(ETH_P_8021Q);
3524         priv->dsa_8021q_ctx->ds = ds;
3525
3526         INIT_LIST_HEAD(&priv->dsa_8021q_ctx->crosschip_links);
3527         INIT_LIST_HEAD(&priv->bridge_vlans);
3528         INIT_LIST_HEAD(&priv->dsa_8021q_vlans);
3529
3530         sja1105_tas_setup(ds);
3531         sja1105_flower_setup(ds);
3532
3533         rc = dsa_register_switch(priv->ds);
3534         if (rc)
3535                 return rc;
3536
3537         if (IS_ENABLED(CONFIG_NET_SCH_CBS)) {
3538                 priv->cbs = devm_kcalloc(dev, priv->info->num_cbs_shapers,
3539                                          sizeof(struct sja1105_cbs_entry),
3540                                          GFP_KERNEL);
3541                 if (!priv->cbs) {
3542                         rc = -ENOMEM;
3543                         goto out_unregister_switch;
3544                 }
3545         }
3546
3547         /* Connections between dsa_port and sja1105_port */
3548         for (port = 0; port < SJA1105_NUM_PORTS; port++) {
3549                 struct sja1105_port *sp = &priv->ports[port];
3550                 struct dsa_port *dp = dsa_to_port(ds, port);
3551                 struct net_device *slave;
3552                 int subvlan;
3553
3554                 if (!dsa_is_user_port(ds, port))
3555                         continue;
3556
3557                 dp->priv = sp;
3558                 sp->dp = dp;
3559                 sp->data = tagger_data;
3560                 slave = dp->slave;
3561                 kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit);
3562                 sp->xmit_worker = kthread_create_worker(0, "%s_xmit",
3563                                                         slave->name);
3564                 if (IS_ERR(sp->xmit_worker)) {
3565                         rc = PTR_ERR(sp->xmit_worker);
3566                         dev_err(ds->dev,
3567                                 "failed to create deferred xmit thread: %d\n",
3568                                 rc);
3569                         goto out_destroy_workers;
3570                 }
3571                 skb_queue_head_init(&sp->xmit_queue);
3572                 sp->xmit_tpid = ETH_P_SJA1105;
3573
3574                 for (subvlan = 0; subvlan < DSA_8021Q_N_SUBVLAN; subvlan++)
3575                         sp->subvlan_map[subvlan] = VLAN_N_VID;
3576         }
3577
3578         return 0;
3579
3580 out_destroy_workers:
3581         while (port-- > 0) {
3582                 struct sja1105_port *sp = &priv->ports[port];
3583
3584                 if (!dsa_is_user_port(ds, port))
3585                         continue;
3586
3587                 kthread_destroy_worker(sp->xmit_worker);
3588         }
3589
3590 out_unregister_switch:
3591         dsa_unregister_switch(ds);
3592
3593         return rc;
3594 }
3595
3596 static int sja1105_remove(struct spi_device *spi)
3597 {
3598         struct sja1105_private *priv = spi_get_drvdata(spi);
3599
3600         dsa_unregister_switch(priv->ds);
3601         return 0;
3602 }
3603
3604 static const struct of_device_id sja1105_dt_ids[] = {
3605         { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
3606         { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
3607         { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
3608         { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
3609         { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
3610         { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
3611         { /* sentinel */ },
3612 };
3613 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
3614
3615 static struct spi_driver sja1105_driver = {
3616         .driver = {
3617                 .name  = "sja1105",
3618                 .owner = THIS_MODULE,
3619                 .of_match_table = of_match_ptr(sja1105_dt_ids),
3620         },
3621         .probe  = sja1105_probe,
3622         .remove = sja1105_remove,
3623 };
3624
3625 module_spi_driver(sja1105_driver);
3626
3627 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3628 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3629 MODULE_DESCRIPTION("SJA1105 Driver");
3630 MODULE_LICENSE("GPL v2");