1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek Simple Management Interface (SMI) driver
3 * It can be discussed how "simple" this interface is.
5 * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
6 * but the protocol is not MDIO at all. Instead it is a Realtek
7 * pecularity that need to bit-bang the lines in a special way to
8 * communicate with the switch.
10 * ASICs we intend to support with this driver:
12 * RTL8366 - The original version, apparently
13 * RTL8369 - Similar enough to have the same datsheet as RTL8366
14 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
15 * different register layout from the other two
16 * RTL8366S - Is this "RTL8366 super"?
17 * RTL8367 - Has an OpenWRT driver as well
18 * RTL8368S - Seems to be an alternative name for RTL8366RB
19 * RTL8370 - Also uses SMI
21 * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
22 * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
23 * Copyright (C) 2010 Roman Yeryomin <roman@advem.lv>
24 * Copyright (C) 2011 Colin Leitner <colin.leitner@googlemail.com>
25 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/device.h>
31 #include <linux/spinlock.h>
32 #include <linux/skbuff.h>
34 #include <linux/of_mdio.h>
35 #include <linux/delay.h>
36 #include <linux/gpio/consumer.h>
37 #include <linux/platform_device.h>
38 #include <linux/regmap.h>
39 #include <linux/bitops.h>
40 #include <linux/if_bridge.h>
44 #define REALTEK_SMI_ACK_RETRY_COUNT 5
46 static inline void realtek_smi_clk_delay(struct realtek_priv *priv)
48 ndelay(priv->clk_delay);
51 static void realtek_smi_start(struct realtek_priv *priv)
53 /* Set GPIO pins to output mode, with initial state:
56 gpiod_direction_output(priv->mdc, 0);
57 gpiod_direction_output(priv->mdio, 1);
58 realtek_smi_clk_delay(priv);
60 /* CLK 1: 0 -> 1, 1 -> 0 */
61 gpiod_set_value(priv->mdc, 1);
62 realtek_smi_clk_delay(priv);
63 gpiod_set_value(priv->mdc, 0);
64 realtek_smi_clk_delay(priv);
67 gpiod_set_value(priv->mdc, 1);
68 realtek_smi_clk_delay(priv);
69 gpiod_set_value(priv->mdio, 0);
70 realtek_smi_clk_delay(priv);
71 gpiod_set_value(priv->mdc, 0);
72 realtek_smi_clk_delay(priv);
73 gpiod_set_value(priv->mdio, 1);
76 static void realtek_smi_stop(struct realtek_priv *priv)
78 realtek_smi_clk_delay(priv);
79 gpiod_set_value(priv->mdio, 0);
80 gpiod_set_value(priv->mdc, 1);
81 realtek_smi_clk_delay(priv);
82 gpiod_set_value(priv->mdio, 1);
83 realtek_smi_clk_delay(priv);
84 gpiod_set_value(priv->mdc, 1);
85 realtek_smi_clk_delay(priv);
86 gpiod_set_value(priv->mdc, 0);
87 realtek_smi_clk_delay(priv);
88 gpiod_set_value(priv->mdc, 1);
91 realtek_smi_clk_delay(priv);
92 gpiod_set_value(priv->mdc, 0);
93 realtek_smi_clk_delay(priv);
94 gpiod_set_value(priv->mdc, 1);
96 /* Set GPIO pins to input mode */
97 gpiod_direction_input(priv->mdio);
98 gpiod_direction_input(priv->mdc);
101 static void realtek_smi_write_bits(struct realtek_priv *priv, u32 data, u32 len)
103 for (; len > 0; len--) {
104 realtek_smi_clk_delay(priv);
107 gpiod_set_value(priv->mdio, !!(data & (1 << (len - 1))));
108 realtek_smi_clk_delay(priv);
111 gpiod_set_value(priv->mdc, 1);
112 realtek_smi_clk_delay(priv);
113 gpiod_set_value(priv->mdc, 0);
117 static void realtek_smi_read_bits(struct realtek_priv *priv, u32 len, u32 *data)
119 gpiod_direction_input(priv->mdio);
121 for (*data = 0; len > 0; len--) {
124 realtek_smi_clk_delay(priv);
127 gpiod_set_value(priv->mdc, 1);
128 realtek_smi_clk_delay(priv);
129 u = !!gpiod_get_value(priv->mdio);
130 gpiod_set_value(priv->mdc, 0);
132 *data |= (u << (len - 1));
135 gpiod_direction_output(priv->mdio, 0);
138 static int realtek_smi_wait_for_ack(struct realtek_priv *priv)
146 realtek_smi_read_bits(priv, 1, &ack);
150 if (++retry_cnt > REALTEK_SMI_ACK_RETRY_COUNT) {
151 dev_err(priv->dev, "ACK timeout\n");
159 static int realtek_smi_write_byte(struct realtek_priv *priv, u8 data)
161 realtek_smi_write_bits(priv, data, 8);
162 return realtek_smi_wait_for_ack(priv);
165 static int realtek_smi_write_byte_noack(struct realtek_priv *priv, u8 data)
167 realtek_smi_write_bits(priv, data, 8);
171 static int realtek_smi_read_byte0(struct realtek_priv *priv, u8 *data)
176 realtek_smi_read_bits(priv, 8, &t);
180 realtek_smi_write_bits(priv, 0x00, 1);
185 static int realtek_smi_read_byte1(struct realtek_priv *priv, u8 *data)
190 realtek_smi_read_bits(priv, 8, &t);
194 realtek_smi_write_bits(priv, 0x01, 1);
199 static int realtek_smi_read_reg(struct realtek_priv *priv, u32 addr, u32 *data)
206 spin_lock_irqsave(&priv->lock, flags);
208 realtek_smi_start(priv);
210 /* Send READ command */
211 ret = realtek_smi_write_byte(priv, priv->cmd_read);
216 ret = realtek_smi_write_byte(priv, addr & 0xff);
221 ret = realtek_smi_write_byte(priv, addr >> 8);
226 realtek_smi_read_byte0(priv, &lo);
227 /* Read DATA[15:8] */
228 realtek_smi_read_byte1(priv, &hi);
230 *data = ((u32)lo) | (((u32)hi) << 8);
235 realtek_smi_stop(priv);
236 spin_unlock_irqrestore(&priv->lock, flags);
241 static int realtek_smi_write_reg(struct realtek_priv *priv,
242 u32 addr, u32 data, bool ack)
247 spin_lock_irqsave(&priv->lock, flags);
249 realtek_smi_start(priv);
251 /* Send WRITE command */
252 ret = realtek_smi_write_byte(priv, priv->cmd_write);
257 ret = realtek_smi_write_byte(priv, addr & 0xff);
262 ret = realtek_smi_write_byte(priv, addr >> 8);
266 /* Write DATA[7:0] */
267 ret = realtek_smi_write_byte(priv, data & 0xff);
271 /* Write DATA[15:8] */
273 ret = realtek_smi_write_byte(priv, data >> 8);
275 ret = realtek_smi_write_byte_noack(priv, data >> 8);
282 realtek_smi_stop(priv);
283 spin_unlock_irqrestore(&priv->lock, flags);
288 /* There is one single case when we need to use this accessor and that
289 * is when issueing soft reset. Since the device reset as soon as we write
290 * that bit, no ACK will come back for natural reasons.
292 static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val)
294 return realtek_smi_write_reg(ctx, reg, val, false);
297 /* Regmap accessors */
299 static int realtek_smi_write(void *ctx, u32 reg, u32 val)
301 struct realtek_priv *priv = ctx;
303 return realtek_smi_write_reg(priv, reg, val, true);
306 static int realtek_smi_read(void *ctx, u32 reg, u32 *val)
308 struct realtek_priv *priv = ctx;
310 return realtek_smi_read_reg(priv, reg, val);
313 static void realtek_smi_lock(void *ctx)
315 struct realtek_priv *priv = ctx;
317 mutex_lock(&priv->map_lock);
320 static void realtek_smi_unlock(void *ctx)
322 struct realtek_priv *priv = ctx;
324 mutex_unlock(&priv->map_lock);
327 static const struct regmap_config realtek_smi_regmap_config = {
328 .reg_bits = 10, /* A4..A0 R4..R0 */
331 /* PHY regs are at 0x8000 */
332 .max_register = 0xffff,
333 .reg_format_endian = REGMAP_ENDIAN_BIG,
334 .reg_read = realtek_smi_read,
335 .reg_write = realtek_smi_write,
336 .cache_type = REGCACHE_NONE,
337 .lock = realtek_smi_lock,
338 .unlock = realtek_smi_unlock,
341 static const struct regmap_config realtek_smi_nolock_regmap_config = {
342 .reg_bits = 10, /* A4..A0 R4..R0 */
345 /* PHY regs are at 0x8000 */
346 .max_register = 0xffff,
347 .reg_format_endian = REGMAP_ENDIAN_BIG,
348 .reg_read = realtek_smi_read,
349 .reg_write = realtek_smi_write,
350 .cache_type = REGCACHE_NONE,
351 .disable_locking = true,
354 static int realtek_smi_mdio_read(struct mii_bus *bus, int addr, int regnum)
356 struct realtek_priv *priv = bus->priv;
358 return priv->ops->phy_read(priv, addr, regnum);
361 static int realtek_smi_mdio_write(struct mii_bus *bus, int addr, int regnum,
364 struct realtek_priv *priv = bus->priv;
366 return priv->ops->phy_write(priv, addr, regnum, val);
369 static int realtek_smi_setup_mdio(struct dsa_switch *ds)
371 struct realtek_priv *priv = ds->priv;
372 struct device_node *mdio_np;
375 mdio_np = of_get_compatible_child(priv->dev->of_node, "realtek,smi-mdio");
377 dev_err(priv->dev, "no MDIO bus node\n");
381 priv->user_mii_bus = devm_mdiobus_alloc(priv->dev);
382 if (!priv->user_mii_bus) {
386 priv->user_mii_bus->priv = priv;
387 priv->user_mii_bus->name = "SMI user MII";
388 priv->user_mii_bus->read = realtek_smi_mdio_read;
389 priv->user_mii_bus->write = realtek_smi_mdio_write;
390 snprintf(priv->user_mii_bus->id, MII_BUS_ID_SIZE, "SMI-%d",
392 priv->user_mii_bus->dev.of_node = mdio_np;
393 priv->user_mii_bus->parent = priv->dev;
394 ds->user_mii_bus = priv->user_mii_bus;
396 ret = devm_of_mdiobus_register(priv->dev, priv->user_mii_bus, mdio_np);
398 dev_err(priv->dev, "unable to register MDIO bus %s\n",
399 priv->user_mii_bus->id);
406 of_node_put(mdio_np);
411 static int realtek_smi_probe(struct platform_device *pdev)
413 const struct realtek_variant *var;
414 struct device *dev = &pdev->dev;
415 struct realtek_priv *priv;
416 struct regmap_config rc;
417 struct device_node *np;
420 var = of_device_get_match_data(dev);
423 priv = devm_kzalloc(dev, sizeof(*priv) + var->chip_data_sz, GFP_KERNEL);
426 priv->chip_data = (void *)priv + sizeof(*priv);
428 mutex_init(&priv->map_lock);
430 rc = realtek_smi_regmap_config;
432 priv->map = devm_regmap_init(dev, NULL, priv, &rc);
433 if (IS_ERR(priv->map)) {
434 ret = PTR_ERR(priv->map);
435 dev_err(dev, "regmap init failed: %d\n", ret);
439 rc = realtek_smi_nolock_regmap_config;
440 priv->map_nolock = devm_regmap_init(dev, NULL, priv, &rc);
441 if (IS_ERR(priv->map_nolock)) {
442 ret = PTR_ERR(priv->map_nolock);
443 dev_err(dev, "regmap init failed: %d\n", ret);
447 /* Link forward and backward */
449 priv->clk_delay = var->clk_delay;
450 priv->cmd_read = var->cmd_read;
451 priv->cmd_write = var->cmd_write;
452 priv->ops = var->ops;
454 priv->setup_interface = realtek_smi_setup_mdio;
455 priv->write_reg_noack = realtek_smi_write_reg_noack;
457 dev_set_drvdata(dev, priv);
458 spin_lock_init(&priv->lock);
460 /* TODO: if power is software controlled, set up any regulators here */
462 priv->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
463 if (IS_ERR(priv->reset)) {
464 dev_err(dev, "failed to get RESET GPIO\n");
465 return PTR_ERR(priv->reset);
468 gpiod_set_value(priv->reset, 1);
469 dev_dbg(dev, "asserted RESET\n");
470 msleep(REALTEK_HW_STOP_DELAY);
471 gpiod_set_value(priv->reset, 0);
472 msleep(REALTEK_HW_START_DELAY);
473 dev_dbg(dev, "deasserted RESET\n");
476 /* Fetch MDIO pins */
477 priv->mdc = devm_gpiod_get_optional(dev, "mdc", GPIOD_OUT_LOW);
478 if (IS_ERR(priv->mdc))
479 return PTR_ERR(priv->mdc);
480 priv->mdio = devm_gpiod_get_optional(dev, "mdio", GPIOD_OUT_LOW);
481 if (IS_ERR(priv->mdio))
482 return PTR_ERR(priv->mdio);
484 priv->leds_disabled = of_property_read_bool(np, "realtek,disable-leds");
486 ret = priv->ops->detect(priv);
488 dev_err(dev, "unable to detect switch\n");
492 priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
497 priv->ds->num_ports = priv->num_ports;
498 priv->ds->priv = priv;
500 priv->ds->ops = var->ds_ops_smi;
501 ret = dsa_register_switch(priv->ds);
503 dev_err_probe(dev, ret, "unable to register switch\n");
509 static void realtek_smi_remove(struct platform_device *pdev)
511 struct realtek_priv *priv = platform_get_drvdata(pdev);
516 dsa_unregister_switch(priv->ds);
517 if (priv->user_mii_bus)
518 of_node_put(priv->user_mii_bus->dev.of_node);
520 /* leave the device reset asserted */
522 gpiod_set_value(priv->reset, 1);
525 static void realtek_smi_shutdown(struct platform_device *pdev)
527 struct realtek_priv *priv = platform_get_drvdata(pdev);
532 dsa_switch_shutdown(priv->ds);
534 platform_set_drvdata(pdev, NULL);
537 static const struct of_device_id realtek_smi_of_match[] = {
538 #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB)
540 .compatible = "realtek,rtl8366rb",
541 .data = &rtl8366rb_variant,
544 #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB)
546 .compatible = "realtek,rtl8365mb",
547 .data = &rtl8365mb_variant,
552 MODULE_DEVICE_TABLE(of, realtek_smi_of_match);
554 static struct platform_driver realtek_smi_driver = {
556 .name = "realtek-smi",
557 .of_match_table = realtek_smi_of_match,
559 .probe = realtek_smi_probe,
560 .remove_new = realtek_smi_remove,
561 .shutdown = realtek_smi_shutdown,
563 module_platform_driver(realtek_smi_driver);
565 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
566 MODULE_DESCRIPTION("Driver for Realtek ethernet switch connected via SMI interface");
567 MODULE_LICENSE("GPL");