1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell 88E6xxx Switch hardware timestamping support
5 * Copyright (c) 2008 Marvell Semiconductor
7 * Copyright (c) 2017 National Instruments
8 * Erik Hons <erik.hons@ni.com>
9 * Brandon Streiff <brandon.streiff@ni.com>
10 * Dane Wagner <dane.wagner@ni.com>
17 #include <linux/ptp_classify.h>
19 #define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))
21 static int mv88e6xxx_port_ptp_read(struct mv88e6xxx_chip *chip, int port,
22 int addr, u16 *data, int len)
24 if (!chip->info->ops->avb_ops->port_ptp_read)
27 return chip->info->ops->avb_ops->port_ptp_read(chip, port, addr,
31 static int mv88e6xxx_port_ptp_write(struct mv88e6xxx_chip *chip, int port,
34 if (!chip->info->ops->avb_ops->port_ptp_write)
37 return chip->info->ops->avb_ops->port_ptp_write(chip, port, addr,
41 static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip *chip, int addr,
44 if (!chip->info->ops->avb_ops->ptp_write)
47 return chip->info->ops->avb_ops->ptp_write(chip, addr, data);
50 static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip *chip, int addr,
53 if (!chip->info->ops->avb_ops->ptp_read)
56 return chip->info->ops->avb_ops->ptp_read(chip, addr, data, 1);
59 /* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX
60 * timestamp. When working properly, hardware will produce a timestamp
61 * within 1ms. Software may enounter delays due to MDIO contention, so
62 * the timeout is set accordingly.
64 #define TX_TSTAMP_TIMEOUT msecs_to_jiffies(40)
66 int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,
67 struct ethtool_ts_info *info)
69 const struct mv88e6xxx_ptp_ops *ptp_ops;
70 struct mv88e6xxx_chip *chip;
73 ptp_ops = chip->info->ops->ptp_ops;
75 if (!chip->info->ptp_support)
78 info->so_timestamping =
79 SOF_TIMESTAMPING_TX_HARDWARE |
80 SOF_TIMESTAMPING_RX_HARDWARE |
81 SOF_TIMESTAMPING_RAW_HARDWARE;
82 info->phc_index = ptp_clock_index(chip->ptp_clock);
84 (1 << HWTSTAMP_TX_OFF) |
85 (1 << HWTSTAMP_TX_ON);
86 info->rx_filters = ptp_ops->rx_filters;
91 static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,
92 struct hwtstamp_config *config)
94 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
95 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
96 bool tstamp_enable = false;
98 /* Prevent the TX/RX paths from trying to interact with the
99 * timestamp hardware while we reconfigure it.
101 clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state);
103 /* reserved for future extensions */
107 switch (config->tx_type) {
108 case HWTSTAMP_TX_OFF:
109 tstamp_enable = false;
112 tstamp_enable = true;
118 /* The switch supports timestamping both L2 and L4; one cannot be
119 * disabled independently of the other.
122 if (!(BIT(config->rx_filter) & ptp_ops->rx_filters)) {
123 config->rx_filter = HWTSTAMP_FILTER_NONE;
124 dev_dbg(chip->dev, "Unsupported rx_filter %d\n",
129 switch (config->rx_filter) {
130 case HWTSTAMP_FILTER_NONE:
131 tstamp_enable = false;
133 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
134 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
135 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
136 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
137 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
138 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
139 case HWTSTAMP_FILTER_PTP_V2_EVENT:
140 case HWTSTAMP_FILTER_PTP_V2_SYNC:
141 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
142 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
144 case HWTSTAMP_FILTER_ALL:
146 config->rx_filter = HWTSTAMP_FILTER_NONE;
150 mv88e6xxx_reg_lock(chip);
152 chip->enable_count += 1;
153 if (chip->enable_count == 1 && ptp_ops->global_enable)
154 ptp_ops->global_enable(chip);
155 if (ptp_ops->port_enable)
156 ptp_ops->port_enable(chip, port);
158 if (ptp_ops->port_disable)
159 ptp_ops->port_disable(chip, port);
160 chip->enable_count -= 1;
161 if (chip->enable_count == 0 && ptp_ops->global_disable)
162 ptp_ops->global_disable(chip);
164 mv88e6xxx_reg_unlock(chip);
166 /* Once hardware has been configured, enable timestamp checks
167 * in the RX/TX paths.
170 set_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state);
175 int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,
178 struct mv88e6xxx_chip *chip = ds->priv;
179 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
180 struct hwtstamp_config config;
183 if (!chip->info->ptp_support)
186 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
189 err = mv88e6xxx_set_hwtstamp_config(chip, port, &config);
193 /* Save the chosen configuration to be returned later. */
194 memcpy(&ps->tstamp_config, &config, sizeof(config));
196 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
200 int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,
203 struct mv88e6xxx_chip *chip = ds->priv;
204 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
205 struct hwtstamp_config *config = &ps->tstamp_config;
207 if (!chip->info->ptp_support)
210 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
214 /* Returns a pointer to the PTP header if the caller should time stamp,
215 * or NULL if the caller should not.
217 static struct ptp_header *mv88e6xxx_should_tstamp(struct mv88e6xxx_chip *chip,
218 int port, struct sk_buff *skb,
221 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
222 struct ptp_header *hdr;
224 if (!chip->info->ptp_support)
227 hdr = ptp_parse_header(skb, type);
231 if (!test_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state))
237 static int mv88e6xxx_ts_valid(u16 status)
239 if (!(status & MV88E6XXX_PTP_TS_VALID))
241 if (status & MV88E6XXX_PTP_TS_STATUS_MASK)
246 static int seq_match(struct sk_buff *skb, u16 ts_seqid)
248 unsigned int type = SKB_PTP_TYPE(skb);
249 struct ptp_header *hdr;
251 hdr = ptp_parse_header(skb, type);
253 return ts_seqid == ntohs(hdr->sequence_id);
256 static void mv88e6xxx_get_rxts(struct mv88e6xxx_chip *chip,
257 struct mv88e6xxx_port_hwtstamp *ps,
258 struct sk_buff *skb, u16 reg,
259 struct sk_buff_head *rxq)
261 u16 buf[4] = { 0 }, status, seq_id;
262 struct skb_shared_hwtstamps *shwt;
263 struct sk_buff_head received;
264 u64 ns, timelo, timehi;
268 /* The latched timestamp belongs to one of the received frames. */
269 __skb_queue_head_init(&received);
270 spin_lock_irqsave(&rxq->lock, flags);
271 skb_queue_splice_tail_init(rxq, &received);
272 spin_unlock_irqrestore(&rxq->lock, flags);
274 mv88e6xxx_reg_lock(chip);
275 err = mv88e6xxx_port_ptp_read(chip, ps->port_id,
276 reg, buf, ARRAY_SIZE(buf));
277 mv88e6xxx_reg_unlock(chip);
279 pr_err("failed to get the receive time stamp\n");
286 if (status & MV88E6XXX_PTP_TS_VALID) {
287 mv88e6xxx_reg_lock(chip);
288 err = mv88e6xxx_port_ptp_write(chip, ps->port_id, reg, 0);
289 mv88e6xxx_reg_unlock(chip);
291 pr_err("failed to clear the receive status\n");
293 /* Since the device can only handle one time stamp at a time,
294 * we purge any extra frames from the queue.
296 for ( ; skb; skb = __skb_dequeue(&received)) {
297 if (mv88e6xxx_ts_valid(status) && seq_match(skb, seq_id)) {
298 ns = timehi << 16 | timelo;
300 mv88e6xxx_reg_lock(chip);
301 ns = timecounter_cyc2time(&chip->tstamp_tc, ns);
302 mv88e6xxx_reg_unlock(chip);
303 shwt = skb_hwtstamps(skb);
304 memset(shwt, 0, sizeof(*shwt));
305 shwt->hwtstamp = ns_to_ktime(ns);
306 status &= ~MV88E6XXX_PTP_TS_VALID;
312 static void mv88e6xxx_rxtstamp_work(struct mv88e6xxx_chip *chip,
313 struct mv88e6xxx_port_hwtstamp *ps)
315 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
318 skb = skb_dequeue(&ps->rx_queue);
321 mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr0_sts_reg,
324 skb = skb_dequeue(&ps->rx_queue2);
326 mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops->arr1_sts_reg,
330 static int is_pdelay_resp(const struct ptp_header *hdr)
332 return (hdr->tsmt & 0xf) == 3;
335 bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,
336 struct sk_buff *skb, unsigned int type)
338 struct mv88e6xxx_port_hwtstamp *ps;
339 struct mv88e6xxx_chip *chip;
340 struct ptp_header *hdr;
343 ps = &chip->port_hwtstamp[port];
345 if (ps->tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT)
348 hdr = mv88e6xxx_should_tstamp(chip, port, skb, type);
352 SKB_PTP_TYPE(skb) = type;
354 if (is_pdelay_resp(hdr))
355 skb_queue_tail(&ps->rx_queue2, skb);
357 skb_queue_tail(&ps->rx_queue, skb);
359 ptp_schedule_worker(chip->ptp_clock, 0);
364 static int mv88e6xxx_txtstamp_work(struct mv88e6xxx_chip *chip,
365 struct mv88e6xxx_port_hwtstamp *ps)
367 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
368 struct skb_shared_hwtstamps shhwtstamps;
369 u16 departure_block[4], status;
370 struct sk_buff *tmp_skb;
378 mv88e6xxx_reg_lock(chip);
379 err = mv88e6xxx_port_ptp_read(chip, ps->port_id,
380 ptp_ops->dep_sts_reg,
382 ARRAY_SIZE(departure_block));
383 mv88e6xxx_reg_unlock(chip);
386 goto free_and_clear_skb;
388 if (!(departure_block[0] & MV88E6XXX_PTP_TS_VALID)) {
389 if (time_is_before_jiffies(ps->tx_tstamp_start +
390 TX_TSTAMP_TIMEOUT)) {
391 dev_warn(chip->dev, "p%d: clearing tx timestamp hang\n",
393 goto free_and_clear_skb;
395 /* The timestamp should be available quickly, while getting it
396 * is high priority and time bounded to only 10ms. A poll is
397 * warranted so restart the work.
402 /* We have the timestamp; go ahead and clear valid now */
403 mv88e6xxx_reg_lock(chip);
404 mv88e6xxx_port_ptp_write(chip, ps->port_id, ptp_ops->dep_sts_reg, 0);
405 mv88e6xxx_reg_unlock(chip);
407 status = departure_block[0] & MV88E6XXX_PTP_TS_STATUS_MASK;
408 if (status != MV88E6XXX_PTP_TS_STATUS_NORMAL) {
409 dev_warn(chip->dev, "p%d: tx timestamp overrun\n", ps->port_id);
410 goto free_and_clear_skb;
413 if (departure_block[3] != ps->tx_seq_id) {
414 dev_warn(chip->dev, "p%d: unexpected seq. id\n", ps->port_id);
415 goto free_and_clear_skb;
418 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
419 time_raw = ((u32)departure_block[2] << 16) | departure_block[1];
420 mv88e6xxx_reg_lock(chip);
421 ns = timecounter_cyc2time(&chip->tstamp_tc, time_raw);
422 mv88e6xxx_reg_unlock(chip);
423 shhwtstamps.hwtstamp = ns_to_ktime(ns);
426 "p%d: txtstamp %llx status 0x%04x skb ID 0x%04x hw ID 0x%04x\n",
427 ps->port_id, ktime_to_ns(shhwtstamps.hwtstamp),
428 departure_block[0], ps->tx_seq_id, departure_block[3]);
430 /* skb_complete_tx_timestamp() will free up the client to make
431 * another timestamp-able transmit. We have to be ready for it
432 * -- by clearing the ps->tx_skb "flag" -- beforehand.
435 tmp_skb = ps->tx_skb;
437 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
438 skb_complete_tx_timestamp(tmp_skb, &shhwtstamps);
443 dev_kfree_skb_any(ps->tx_skb);
445 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
450 long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp)
452 struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
453 struct dsa_switch *ds = chip->ds;
454 struct mv88e6xxx_port_hwtstamp *ps;
457 for (i = 0; i < ds->num_ports; i++) {
458 if (!dsa_is_user_port(ds, i))
461 ps = &chip->port_hwtstamp[i];
462 if (test_bit(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &ps->state))
463 restart |= mv88e6xxx_txtstamp_work(chip, ps);
465 mv88e6xxx_rxtstamp_work(chip, ps);
468 return restart ? 1 : -1;
471 bool mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,
472 struct sk_buff *clone, unsigned int type)
474 struct mv88e6xxx_chip *chip = ds->priv;
475 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
476 struct ptp_header *hdr;
478 if (!(skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP))
481 hdr = mv88e6xxx_should_tstamp(chip, port, clone, type);
485 if (test_and_set_bit_lock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,
490 ps->tx_tstamp_start = jiffies;
491 ps->tx_seq_id = be16_to_cpu(hdr->sequence_id);
493 ptp_schedule_worker(chip->ptp_clock, 0);
497 int mv88e6165_global_disable(struct mv88e6xxx_chip *chip)
502 err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val);
505 val |= MV88E6165_PTP_CFG_DISABLE_PTP;
507 return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);
510 int mv88e6165_global_enable(struct mv88e6xxx_chip *chip)
515 err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &val);
519 val &= ~(MV88E6165_PTP_CFG_DISABLE_PTP | MV88E6165_PTP_CFG_TSPEC_MASK);
521 return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);
524 int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port)
526 return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,
527 MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP);
530 int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port)
532 return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,
533 MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH);
536 static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip *chip, int port)
538 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
539 struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port];
543 skb_queue_head_init(&ps->rx_queue);
544 skb_queue_head_init(&ps->rx_queue2);
546 if (ptp_ops->port_disable)
547 return ptp_ops->port_disable(chip, port);
552 int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)
554 const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops;
558 /* Disable timestamping on all ports. */
559 for (i = 0; i < mv88e6xxx_num_ports(chip); ++i) {
560 err = mv88e6xxx_hwtstamp_port_setup(chip, i);
565 /* Disable PTP globally */
566 if (ptp_ops->global_disable) {
567 err = ptp_ops->global_disable(chip);
572 /* Set the ethertype of L2 PTP messages */
573 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_GC_ETYPE, ETH_P_1588);
577 /* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to
578 * timestamp. This affects all ports that have timestamping enabled,
579 * but the timestamp config is per-port; thus we configure all events
580 * here and only support the HWTSTAMP_FILTER_*_EVENT filter types.
582 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_MSGTYPE,
583 MV88E6XXX_PTP_MSGTYPE_ALL_EVENT);
587 /* Use ARRIVAL1 for peer delay response messages. */
588 err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_TS_ARRIVAL_PTR,
589 MV88E6XXX_PTP_MSGTYPE_PDLAY_RES);
593 /* 88E6341 devices default to timestamping at the PHY, but this has
594 * a hardware issue that results in unreliable timestamps. Force
595 * these devices to timestamp at the MAC.
597 if (chip->info->family == MV88E6XXX_FAMILY_6341) {
598 u16 val = MV88E6341_PTP_CFG_UPDATE |
599 MV88E6341_PTP_CFG_MODE_IDX |
600 MV88E6341_PTP_CFG_MODE_TS_AT_MAC;
601 err = mv88e6xxx_ptp_write(chip, MV88E6341_PTP_CFG, val);
609 void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)