1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Microchip switch driver common header
4 * Copyright (C) 2017-2019 Microchip Technology Inc.
10 #include <linux/etherdevice.h>
11 #include <linux/kernel.h>
12 #include <linux/mutex.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
16 #include <linux/irq.h>
17 #include <linux/platform_data/microchip-ksz.h>
21 #define KSZ_MAX_NUM_PORTS 8
26 enum ksz_regmap_width {
38 struct mutex cnt_mutex; /* structure access */
41 struct rtnl_link_stats64 stats64;
42 struct ethtool_pause_stats pause_stats;
43 struct spinlock stats64_lock;
46 struct ksz_mib_names {
48 char string[ETH_GSTRING_LEN];
51 struct ksz_chip_data {
61 bool tc_cbs_supported;
62 bool tc_ets_supported;
63 const struct ksz_dev_ops *ops;
64 bool ksz87xx_eee_link_erratum;
65 const struct ksz_mib_names *mib_names;
74 int broadcast_ctrl_reg;
75 int multicast_ctrl_reg;
77 bool supports_mii[KSZ_MAX_NUM_PORTS];
78 bool supports_rmii[KSZ_MAX_NUM_PORTS];
79 bool supports_rgmii[KSZ_MAX_NUM_PORTS];
80 bool internal_phy[KSZ_MAX_NUM_PORTS];
81 bool gbit_capable[KSZ_MAX_NUM_PORTS];
82 const struct regmap_access_table *wr_table;
83 const struct regmap_access_table *rd_table;
90 struct irq_domain *domain;
94 struct ksz_device *dev;
98 struct ksz_port *port;
105 struct ksz_switch_macaddr {
106 unsigned char addr[ETH_ALEN];
111 bool remove_tag; /* Remove Tag flag set, for ksz8795 only */
114 struct phy_device phydev;
116 u32 fiber:1; /* port is fiber */
118 u32 read:1; /* read MIB counters in background */
119 u32 freeze:1; /* MIB counter freeze is enabled */
121 struct ksz_port_mib mib;
122 phy_interface_t interface;
125 struct ksz_device *ksz_dev;
129 #if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ_PTP)
130 struct hwtstamp_config tstamp_config;
133 struct ksz_irq ptpirq;
134 struct ksz_ptp_irq ptpmsg_irq[3];
136 struct completion tstamp_msg_comp;
142 struct dsa_switch *ds;
143 struct ksz_platform_data *pdata;
144 const struct ksz_chip_data *info;
146 struct mutex dev_mutex; /* device access */
147 struct mutex regmap_mutex; /* regmap access */
148 struct mutex alu_mutex; /* ALU access */
149 struct mutex vlan_mutex; /* vlan access */
150 const struct ksz_dev_ops *dev_ops;
153 struct regmap *regmap[__KSZ_NUM_REGMAPS];
158 struct gpio_desc *reset_gpio; /* Optional reset GPIO */
160 /* chip specific data */
163 int cpu_port; /* port connected to CPU */
165 phy_interface_t compat_interface;
167 bool synclko_disable;
170 struct vlan_table *vlan_cache;
172 struct ksz_port *ports;
173 struct delayed_work mib_read;
174 unsigned long mib_read_interval;
178 struct mutex lock_irq; /* IRQ Access */
180 struct ksz_ptp_data ptp_data;
182 struct ksz_switch_macaddr *switch_macaddr;
183 struct net_device *hsr_dev; /* HSR */
187 /* List of supported models */
232 PORT_802_1P_REMAPPING,
234 MIB_COUNTER_OVERFLOW,
237 VLAN_TABLE_MEMBERSHIP,
239 STATIC_MAC_TABLE_VALID,
240 STATIC_MAC_TABLE_USE_FID,
241 STATIC_MAC_TABLE_FID,
242 STATIC_MAC_TABLE_OVERRIDE,
243 STATIC_MAC_TABLE_FWD_PORTS,
244 DYNAMIC_MAC_TABLE_ENTRIES_H,
245 DYNAMIC_MAC_TABLE_MAC_EMPTY,
246 DYNAMIC_MAC_TABLE_NOT_READY,
247 DYNAMIC_MAC_TABLE_ENTRIES,
248 DYNAMIC_MAC_TABLE_FID,
249 DYNAMIC_MAC_TABLE_SRC_PORT,
250 DYNAMIC_MAC_TABLE_TIMESTAMP,
258 VLAN_TABLE_MEMBERSHIP_S,
260 STATIC_MAC_FWD_PORTS,
262 DYNAMIC_MAC_ENTRIES_H,
265 DYNAMIC_MAC_TIMESTAMP,
266 DYNAMIC_MAC_SRC_PORT,
270 enum ksz_xmii_ctrl0 {
277 enum ksz_xmii_ctrl1 {
306 int (*setup)(struct dsa_switch *ds);
307 void (*teardown)(struct dsa_switch *ds);
308 u32 (*get_port_addr)(int port, int offset);
309 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
310 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
311 void (*port_cleanup)(struct ksz_device *dev, int port);
312 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
313 int (*set_ageing_time)(struct ksz_device *dev, unsigned int msecs);
314 int (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
315 int (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
316 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
318 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
319 u64 *dropped, u64 *cnt);
320 void (*r_mib_stat64)(struct ksz_device *dev, int port);
321 int (*vlan_filtering)(struct ksz_device *dev, int port,
322 bool flag, struct netlink_ext_ack *extack);
323 int (*vlan_add)(struct ksz_device *dev, int port,
324 const struct switchdev_obj_port_vlan *vlan,
325 struct netlink_ext_ack *extack);
326 int (*vlan_del)(struct ksz_device *dev, int port,
327 const struct switchdev_obj_port_vlan *vlan);
328 int (*mirror_add)(struct ksz_device *dev, int port,
329 struct dsa_mall_mirror_tc_entry *mirror,
330 bool ingress, struct netlink_ext_ack *extack);
331 void (*mirror_del)(struct ksz_device *dev, int port,
332 struct dsa_mall_mirror_tc_entry *mirror);
333 int (*fdb_add)(struct ksz_device *dev, int port,
334 const unsigned char *addr, u16 vid, struct dsa_db db);
335 int (*fdb_del)(struct ksz_device *dev, int port,
336 const unsigned char *addr, u16 vid, struct dsa_db db);
337 int (*fdb_dump)(struct ksz_device *dev, int port,
338 dsa_fdb_dump_cb_t *cb, void *data);
339 int (*mdb_add)(struct ksz_device *dev, int port,
340 const struct switchdev_obj_port_mdb *mdb,
342 int (*mdb_del)(struct ksz_device *dev, int port,
343 const struct switchdev_obj_port_mdb *mdb,
345 void (*get_caps)(struct ksz_device *dev, int port,
346 struct phylink_config *config);
347 int (*change_mtu)(struct ksz_device *dev, int port, int mtu);
348 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
349 void (*port_init_cnt)(struct ksz_device *dev, int port);
350 void (*phylink_mac_config)(struct ksz_device *dev, int port,
352 const struct phylink_link_state *state);
353 void (*phylink_mac_link_up)(struct ksz_device *dev, int port,
355 phy_interface_t interface,
356 struct phy_device *phydev, int speed,
357 int duplex, bool tx_pause, bool rx_pause);
358 void (*setup_rgmii_delay)(struct ksz_device *dev, int port);
359 int (*tc_cbs_set_cinc)(struct ksz_device *dev, int port, u32 val);
360 void (*get_wol)(struct ksz_device *dev, int port,
361 struct ethtool_wolinfo *wol);
362 int (*set_wol)(struct ksz_device *dev, int port,
363 struct ethtool_wolinfo *wol);
364 void (*wol_pre_shutdown)(struct ksz_device *dev, bool *wol_enabled);
365 void (*config_cpu_port)(struct dsa_switch *ds);
366 int (*enable_stp_addr)(struct ksz_device *dev);
367 int (*reset)(struct ksz_device *dev);
368 int (*init)(struct ksz_device *dev);
369 void (*exit)(struct ksz_device *dev);
372 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
373 int ksz_switch_register(struct ksz_device *dev);
374 void ksz_switch_remove(struct ksz_device *dev);
376 void ksz_init_mib_timer(struct ksz_device *dev);
377 bool ksz_is_port_mac_global_usable(struct dsa_switch *ds, int port);
378 void ksz_r_mib_stats64(struct ksz_device *dev, int port);
379 void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port);
380 void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
381 bool ksz_get_gbit(struct ksz_device *dev, int port);
382 phy_interface_t ksz_get_xmii(struct ksz_device *dev, int port, bool gbit);
383 extern const struct ksz_chip_data ksz_switch_chips[];
384 int ksz_switch_macaddr_get(struct dsa_switch *ds, int port,
385 struct netlink_ext_ack *extack);
386 void ksz_switch_macaddr_put(struct dsa_switch *ds);
387 void ksz_switch_shutdown(struct ksz_device *dev);
389 /* Common register access functions */
390 static inline struct regmap *ksz_regmap_8(struct ksz_device *dev)
392 return dev->regmap[KSZ_REGMAP_8];
395 static inline struct regmap *ksz_regmap_16(struct ksz_device *dev)
397 return dev->regmap[KSZ_REGMAP_16];
400 static inline struct regmap *ksz_regmap_32(struct ksz_device *dev)
402 return dev->regmap[KSZ_REGMAP_32];
405 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
408 int ret = regmap_read(ksz_regmap_8(dev), reg, &value);
411 dev_err(dev->dev, "can't read 8bit reg: 0x%x %pe\n", reg,
418 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
421 int ret = regmap_read(ksz_regmap_16(dev), reg, &value);
424 dev_err(dev->dev, "can't read 16bit reg: 0x%x %pe\n", reg,
431 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
434 int ret = regmap_read(ksz_regmap_32(dev), reg, &value);
437 dev_err(dev->dev, "can't read 32bit reg: 0x%x %pe\n", reg,
444 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
449 ret = regmap_bulk_read(ksz_regmap_32(dev), reg, value, 2);
451 dev_err(dev->dev, "can't read 64bit reg: 0x%x %pe\n", reg,
454 *val = (u64)value[0] << 32 | value[1];
459 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
463 ret = regmap_write(ksz_regmap_8(dev), reg, value);
465 dev_err(dev->dev, "can't write 8bit reg: 0x%x %pe\n", reg,
471 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
475 ret = regmap_write(ksz_regmap_16(dev), reg, value);
477 dev_err(dev->dev, "can't write 16bit reg: 0x%x %pe\n", reg,
483 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
487 ret = regmap_write(ksz_regmap_32(dev), reg, value);
489 dev_err(dev->dev, "can't write 32bit reg: 0x%x %pe\n", reg,
495 static inline int ksz_rmw16(struct ksz_device *dev, u32 reg, u16 mask,
500 ret = regmap_update_bits(ksz_regmap_16(dev), reg, mask, value);
502 dev_err(dev->dev, "can't rmw 16bit reg 0x%x: %pe\n", reg,
508 static inline int ksz_rmw32(struct ksz_device *dev, u32 reg, u32 mask,
513 ret = regmap_update_bits(ksz_regmap_32(dev), reg, mask, value);
515 dev_err(dev->dev, "can't rmw 32bit reg 0x%x: %pe\n", reg,
521 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
525 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
526 value = swab64(value);
527 val[0] = swab32(value & 0xffffffffULL);
528 val[1] = swab32(value >> 32ULL);
530 return regmap_bulk_write(ksz_regmap_32(dev), reg, val, 2);
533 static inline int ksz_rmw8(struct ksz_device *dev, int offset, u8 mask, u8 val)
537 ret = regmap_update_bits(ksz_regmap_8(dev), offset, mask, val);
539 dev_err(dev->dev, "can't rmw 8bit reg 0x%x: %pe\n", offset,
545 static inline int ksz_pread8(struct ksz_device *dev, int port, int offset,
548 return ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
551 static inline int ksz_pread16(struct ksz_device *dev, int port, int offset,
554 return ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
557 static inline int ksz_pread32(struct ksz_device *dev, int port, int offset,
560 return ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
563 static inline int ksz_pwrite8(struct ksz_device *dev, int port, int offset,
566 return ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
569 static inline int ksz_pwrite16(struct ksz_device *dev, int port, int offset,
572 return ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset),
576 static inline int ksz_pwrite32(struct ksz_device *dev, int port, int offset,
579 return ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset),
583 static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset,
586 return ksz_rmw8(dev, dev->dev_ops->get_port_addr(port, offset),
590 static inline int ksz_prmw32(struct ksz_device *dev, int port, int offset,
593 return ksz_rmw32(dev, dev->dev_ops->get_port_addr(port, offset),
597 static inline void ksz_regmap_lock(void *__mtx)
599 struct mutex *mtx = __mtx;
603 static inline void ksz_regmap_unlock(void *__mtx)
605 struct mutex *mtx = __mtx;
609 static inline bool ksz_is_ksz87xx(struct ksz_device *dev)
611 return dev->chip_id == KSZ8795_CHIP_ID ||
612 dev->chip_id == KSZ8794_CHIP_ID ||
613 dev->chip_id == KSZ8765_CHIP_ID;
616 static inline bool ksz_is_ksz88x3(struct ksz_device *dev)
618 return dev->chip_id == KSZ8830_CHIP_ID;
621 static inline int is_lan937x(struct ksz_device *dev)
623 return dev->chip_id == LAN9370_CHIP_ID ||
624 dev->chip_id == LAN9371_CHIP_ID ||
625 dev->chip_id == LAN9372_CHIP_ID ||
626 dev->chip_id == LAN9373_CHIP_ID ||
627 dev->chip_id == LAN9374_CHIP_ID;
630 /* STP State Defines */
631 #define PORT_TX_ENABLE BIT(2)
632 #define PORT_RX_ENABLE BIT(1)
633 #define PORT_LEARN_DISABLE BIT(0)
635 /* Switch ID Defines */
636 #define REG_CHIP_ID0 0x00
638 #define SW_FAMILY_ID_M GENMASK(15, 8)
639 #define KSZ87_FAMILY_ID 0x87
640 #define KSZ88_FAMILY_ID 0x88
642 #define KSZ8_PORT_STATUS_0 0x08
643 #define KSZ8_PORT_FIBER_MODE BIT(7)
645 #define SW_CHIP_ID_M GENMASK(7, 4)
646 #define KSZ87_CHIP_ID_94 0x6
647 #define KSZ87_CHIP_ID_95 0x9
648 #define KSZ88_CHIP_ID_63 0x3
650 #define SW_REV_ID_M GENMASK(7, 4)
652 /* KSZ9893, KSZ9563, KSZ8563 specific register */
653 #define REG_CHIP_ID4 0x0f
654 #define SKU_ID_KSZ8563 0x3c
655 #define SKU_ID_KSZ9563 0x1c
657 /* Driver set switch broadcast storm protection at 10% rate. */
658 #define BROADCAST_STORM_PROT_RATE 10
660 /* 148,800 frames * 67 ms / 100 */
661 #define BROADCAST_STORM_VALUE 9969
663 #define BROADCAST_STORM_RATE_HI 0x07
664 #define BROADCAST_STORM_RATE_LO 0xFF
665 #define BROADCAST_STORM_RATE 0x07FF
667 #define MULTICAST_STORM_DISABLE BIT(6)
669 #define SW_START 0x01
671 /* xMII configuration */
672 #define P_MII_DUPLEX_M BIT(6)
673 #define P_MII_100MBIT_M BIT(4)
675 #define P_GMII_1GBIT_M BIT(6)
676 #define P_RGMII_ID_IG_ENABLE BIT(4)
677 #define P_RGMII_ID_EG_ENABLE BIT(3)
678 #define P_MII_MAC_MODE BIT(2)
679 #define P_MII_SEL_M 0x3
682 #define REG_SW_PORT_INT_STATUS__1 0x001B
683 #define REG_SW_PORT_INT_MASK__1 0x001F
685 #define REG_PORT_INT_STATUS 0x001B
686 #define REG_PORT_INT_MASK 0x001F
688 #define PORT_SRC_PHY_INT 1
689 #define PORT_SRC_PTP_INT 2
691 #define KSZ8795_HUGE_PACKET_SIZE 2000
692 #define KSZ8863_HUGE_PACKET_SIZE 1916
693 #define KSZ8863_NORMAL_PACKET_SIZE 1536
694 #define KSZ8_LEGAL_PACKET_SIZE 1518
695 #define KSZ9477_MAX_FRAME_SIZE 9000
697 #define KSZ8873_REG_GLOBAL_CTRL_12 0x0e
698 /* Drive Strength of I/O Pad
701 #define KSZ8873_DRIVE_STRENGTH_16MA BIT(6)
703 #define KSZ8795_REG_SW_CTRL_20 0xa3
704 #define KSZ9477_REG_SW_IO_STRENGTH 0x010d
705 #define SW_DRIVE_STRENGTH_M 0x7
706 #define SW_DRIVE_STRENGTH_2MA 0
707 #define SW_DRIVE_STRENGTH_4MA 1
708 #define SW_DRIVE_STRENGTH_8MA 2
709 #define SW_DRIVE_STRENGTH_12MA 3
710 #define SW_DRIVE_STRENGTH_16MA 4
711 #define SW_DRIVE_STRENGTH_20MA 5
712 #define SW_DRIVE_STRENGTH_24MA 6
713 #define SW_DRIVE_STRENGTH_28MA 7
714 #define SW_HI_SPEED_DRIVE_STRENGTH_S 4
715 #define SW_LO_SPEED_DRIVE_STRENGTH_S 0
717 #define KSZ9477_REG_PORT_OUT_RATE_0 0x0420
718 #define KSZ9477_OUT_RATE_NO_LIMIT 0
720 #define KSZ9477_PORT_MRI_TC_MAP__4 0x0808
722 #define KSZ9477_PORT_TC_MAP_S 4
723 #define KSZ9477_MAX_TC_PRIO 7
725 /* CBS related registers */
726 #define REG_PORT_MTI_QUEUE_INDEX__4 0x0900
728 #define REG_PORT_MTI_QUEUE_CTRL_0 0x0914
730 #define MTI_SCHEDULE_MODE_M GENMASK(7, 6)
731 #define MTI_SCHEDULE_STRICT_PRIO 0
732 #define MTI_SCHEDULE_WRR 2
733 #define MTI_SHAPING_M GENMASK(5, 4)
734 #define MTI_SHAPING_OFF 0
735 #define MTI_SHAPING_SRP 1
736 #define MTI_SHAPING_TIME_AWARE 2
738 #define KSZ9477_PORT_MTI_QUEUE_CTRL_1 0x0915
739 #define KSZ9477_DEFAULT_WRR_WEIGHT 1
741 #define REG_PORT_MTI_HI_WATER_MARK 0x0916
742 #define REG_PORT_MTI_LO_WATER_MARK 0x0918
744 /* Regmap tables generation */
745 #define KSZ_SPI_OP_RD 3
746 #define KSZ_SPI_OP_WR 2
748 #define swabnot_used(x) 0
750 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
751 swab##swp((opcode) << ((regbits) + (regpad)))
753 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
756 .val_bits = (width), \
758 .reg_bits = (regbits) + (regalign), \
759 .pad_bits = (regpad), \
760 .max_register = BIT(regbits) - 1, \
761 .cache_type = REGCACHE_NONE, \
763 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
766 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
768 .lock = ksz_regmap_lock, \
769 .unlock = ksz_regmap_unlock, \
770 .reg_format_endian = REGMAP_ENDIAN_BIG, \
771 .val_format_endian = REGMAP_ENDIAN_BIG \
774 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
775 static const struct regmap_config ksz##_regmap_config[] = { \
776 [KSZ_REGMAP_8] = KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
777 [KSZ_REGMAP_16] = KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
778 [KSZ_REGMAP_32] = KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \