1 // SPDX-License-Identifier: GPL-2.0
3 * e100net.c: A network driver for the ETRAX 100LX network controller.
5 * Copyright (c) 1998-2002 Axis Communications AB.
7 * The outline of this driver comes from skeleton.c.
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/types.h>
14 #include <linux/fcntl.h>
15 #include <linux/interrupt.h>
16 #include <linux/ptrace.h>
17 #include <linux/ioport.h>
19 #include <linux/string.h>
20 #include <linux/spinlock.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/bitops.h>
26 #include <linux/mii.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/ethtool.h>
32 #include <arch/svinto.h>/* DMA and register descriptions */
33 #include <asm/io.h> /* CRIS_LED_* I/O functions */
36 #include <asm/ethernet.h>
37 #include <asm/cache.h>
38 #include <arch/io_interface_mux.h>
44 * The name of the card. Is used for messages and in the requests for
45 * io regions, irqs and dma channels
48 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
50 /* A default ethernet address. Highlevel SW will set the real one later */
52 static struct sockaddr default_mac = {
54 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
57 /* Information that need to be kept for each board. */
59 struct mii_if_info mii_if;
61 /* Tx control lock. This protects the transmit buffer ring
62 * state along with the "tx full" state of the driver. This
63 * means all netif_queue flow control actions are protected
64 * by this lock as well.
68 spinlock_t led_lock; /* Protect LED state */
69 spinlock_t transceiver_lock; /* Protect transceiver state. */
72 typedef struct etrax_eth_descr
74 etrax_dma_descr descr;
78 /* Some transceivers requires special handling */
79 struct transceiver_ops
82 void (*check_speed)(struct net_device* dev);
83 void (*check_duplex)(struct net_device* dev);
94 /* Dma descriptors etc. */
96 #define MAX_MEDIA_DATA_SIZE 1522
98 #define MIN_PACKET_LEN 46
99 #define ETHER_HEAD_LEN 14
104 #define MDIO_START 0x1
105 #define MDIO_READ 0x2
106 #define MDIO_WRITE 0x1
107 #define MDIO_PREAMBLE 0xfffffffful
109 /* Broadcom specific */
110 #define MDIO_AUX_CTRL_STATUS_REG 0x18
111 #define MDIO_BC_FULL_DUPLEX_IND 0x1
112 #define MDIO_BC_SPEED 0x2
115 #define MDIO_TDK_DIAGNOSTIC_REG 18
116 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
117 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
119 /*Intel LXT972A specific*/
120 #define MDIO_INT_STATUS_REG_2 0x0011
121 #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
122 #define MDIO_INT_SPEED (1 << 14)
124 /* Network flash constants */
125 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
126 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
127 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
128 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
130 #define NO_NETWORK_ACTIVITY 0
131 #define NETWORK_ACTIVITY 1
133 #define NBR_OF_RX_DESC 32
134 #define NBR_OF_TX_DESC 16
136 /* Large packets are sent directly to upper layers while small packets are */
137 /* copied (to reduce memory waste). The following constant decides the breakpoint */
138 #define RX_COPYBREAK 256
140 /* Due to a chip bug we need to flush the cache when descriptors are returned */
141 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
142 /* The following constant determines the number of descriptors to return. */
143 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
145 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
147 /* Define some macros to access ETRAX 100 registers */
148 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
149 IO_FIELD_(reg##_, field##_, val)
150 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
151 IO_STATE_(reg##_, field##_, _##val)
153 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
155 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
157 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
159 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
160 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
161 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
162 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
164 static unsigned int network_rec_config_shadow = 0;
166 static unsigned int network_tr_ctrl_shadow = 0;
168 /* Network speed indication. */
169 static DEFINE_TIMER(speed_timer, NULL, 0, 0);
170 static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
171 static int current_speed; /* Speed read from transceiver */
172 static int current_speed_selection; /* Speed selected by user */
173 static unsigned long led_next_time;
174 static int led_active;
175 static int rx_queue_len;
178 static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
179 static int full_duplex;
180 static enum duplex current_duplex;
182 /* Index to functions, as function prototypes. */
184 static int etrax_ethernet_init(void);
186 static int e100_open(struct net_device *dev);
187 static int e100_set_mac_address(struct net_device *dev, void *addr);
188 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
189 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
190 static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
191 static void e100_rx(struct net_device *dev);
192 static int e100_close(struct net_device *dev);
193 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
194 static int e100_set_config(struct net_device* dev, struct ifmap* map);
195 static void e100_tx_timeout(struct net_device *dev);
196 static struct net_device_stats *e100_get_stats(struct net_device *dev);
197 static void set_multicast_list(struct net_device *dev);
198 static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
199 static void update_rx_stats(struct net_device_stats *);
200 static void update_tx_stats(struct net_device_stats *);
201 static int e100_probe_transceiver(struct net_device* dev);
203 static void e100_check_speed(unsigned long priv);
204 static void e100_set_speed(struct net_device* dev, unsigned long speed);
205 static void e100_check_duplex(unsigned long priv);
206 static void e100_set_duplex(struct net_device* dev, enum duplex);
207 static void e100_negotiate(struct net_device* dev);
209 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
210 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
212 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
213 static void e100_send_mdio_bit(unsigned char bit);
214 static unsigned char e100_receive_mdio_bit(void);
215 static void e100_reset_transceiver(struct net_device* net);
217 static void e100_clear_network_leds(unsigned long dummy);
218 static void e100_set_network_leds(int active);
220 static const struct ethtool_ops e100_ethtool_ops;
221 #if defined(CONFIG_ETRAX_NO_PHY)
222 static void dummy_check_speed(struct net_device* dev);
223 static void dummy_check_duplex(struct net_device* dev);
225 static void broadcom_check_speed(struct net_device* dev);
226 static void broadcom_check_duplex(struct net_device* dev);
227 static void tdk_check_speed(struct net_device* dev);
228 static void tdk_check_duplex(struct net_device* dev);
229 static void intel_check_speed(struct net_device* dev);
230 static void intel_check_duplex(struct net_device* dev);
231 static void generic_check_speed(struct net_device* dev);
232 static void generic_check_duplex(struct net_device* dev);
234 #ifdef CONFIG_NET_POLL_CONTROLLER
235 static void e100_netpoll(struct net_device* dev);
238 static int autoneg_normal = 1;
240 struct transceiver_ops transceivers[] =
242 #if defined(CONFIG_ETRAX_NO_PHY)
243 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
245 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
246 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
247 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
248 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
249 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
253 struct transceiver_ops* transceiver = &transceivers[0];
255 static const struct net_device_ops e100_netdev_ops = {
256 .ndo_open = e100_open,
257 .ndo_stop = e100_close,
258 .ndo_start_xmit = e100_send_packet,
259 .ndo_tx_timeout = e100_tx_timeout,
260 .ndo_get_stats = e100_get_stats,
261 .ndo_set_rx_mode = set_multicast_list,
262 .ndo_do_ioctl = e100_ioctl,
263 .ndo_set_mac_address = e100_set_mac_address,
264 .ndo_validate_addr = eth_validate_addr,
265 .ndo_set_config = e100_set_config,
266 #ifdef CONFIG_NET_POLL_CONTROLLER
267 .ndo_poll_controller = e100_netpoll,
271 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
274 * Check for a network adaptor of this type, and return '0' if one exists.
275 * If dev->base_addr == 0, probe all likely locations.
276 * If dev->base_addr == 1, always return failure.
277 * If dev->base_addr == 2, allocate space for the device and return success
278 * (detachable devices only).
282 etrax_ethernet_init(void)
284 struct net_device *dev;
285 struct net_local* np;
289 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
291 if (cris_request_io_interface(if_eth, cardname)) {
292 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
296 dev = alloc_etherdev(sizeof(struct net_local));
300 np = netdev_priv(dev);
302 /* we do our own locking */
303 dev->features |= NETIF_F_LLTX;
305 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
307 /* now setup our etrax specific stuff */
309 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
310 dev->dma = NETWORK_RX_DMA_NBR;
312 /* fill in our handlers so the network layer can talk to us in the future */
314 dev->ethtool_ops = &e100_ethtool_ops;
315 dev->netdev_ops = &e100_netdev_ops;
317 spin_lock_init(&np->lock);
318 spin_lock_init(&np->led_lock);
319 spin_lock_init(&np->transceiver_lock);
321 /* Initialise the list of Etrax DMA-descriptors */
323 /* Initialise receive descriptors */
325 for (i = 0; i < NBR_OF_RX_DESC; i++) {
326 /* Allocate two extra cachelines to make sure that buffer used
327 * by DMA does not share cacheline with any other data (to
330 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
331 if (!RxDescList[i].skb)
333 RxDescList[i].descr.ctrl = 0;
334 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
335 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
336 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
337 RxDescList[i].descr.status = 0;
338 RxDescList[i].descr.hw_len = 0;
339 prepare_rx_descriptor(&RxDescList[i].descr);
342 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
343 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
346 /* Initialize transmit descriptors */
347 for (i = 0; i < NBR_OF_TX_DESC; i++) {
348 TxDescList[i].descr.ctrl = 0;
349 TxDescList[i].descr.sw_len = 0;
350 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
351 TxDescList[i].descr.buf = 0;
352 TxDescList[i].descr.status = 0;
353 TxDescList[i].descr.hw_len = 0;
354 TxDescList[i].skb = 0;
357 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
358 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
360 /* Initialise initial pointers */
362 myNextRxDesc = &RxDescList[0];
363 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
364 myFirstTxDesc = &TxDescList[0];
365 myNextTxDesc = &TxDescList[0];
366 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
368 /* Register device */
369 err = register_netdev(dev);
375 /* set the default MAC address */
377 e100_set_mac_address(dev, &default_mac);
379 /* Initialize speed indicator stuff. */
382 current_speed_selection = 0; /* Auto */
383 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
384 speed_timer.data = (unsigned long)dev;
385 speed_timer.function = e100_check_speed;
387 clear_led_timer.function = e100_clear_network_leds;
388 clear_led_timer.data = (unsigned long)dev;
391 current_duplex = autoneg;
392 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
393 duplex_timer.data = (unsigned long)dev;
394 duplex_timer.function = e100_check_duplex;
396 /* Initialize mii interface */
397 np->mii_if.phy_id_mask = 0x1f;
398 np->mii_if.reg_num_mask = 0x1f;
399 np->mii_if.dev = dev;
400 np->mii_if.mdio_read = e100_get_mdio_reg;
401 np->mii_if.mdio_write = e100_set_mdio_reg;
403 /* Initialize group address registers to make sure that no */
404 /* unwanted addresses are matched */
405 *R_NETWORK_GA_0 = 0x00000000;
406 *R_NETWORK_GA_1 = 0x00000000;
408 /* Initialize next time the led can flash */
409 led_next_time = jiffies;
412 device_initcall(etrax_ethernet_init)
414 /* set MAC address of the interface. called from the core after a
415 * SIOCSIFADDR ioctl, and from the bootup above.
419 e100_set_mac_address(struct net_device *dev, void *p)
421 struct net_local *np = netdev_priv(dev);
422 struct sockaddr *addr = p;
424 spin_lock(&np->lock); /* preemption protection */
428 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
430 /* Write it to the hardware.
431 * Note the way the address is wrapped:
432 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
433 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
436 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
437 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
438 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
441 /* show it in the log as well */
443 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
445 spin_unlock(&np->lock);
451 * Open/initialize the board. This is called (in the current kernel)
452 * sometime after booting when the 'ifconfig' program is run.
454 * This routine should set everything up anew at each open, even
455 * registers that "should" only need to be set once at boot, so that
456 * there is non-reboot way to recover if something goes wrong.
460 e100_open(struct net_device *dev)
464 /* enable the MDIO output pin */
466 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
469 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
470 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
471 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
473 /* clear dma0 and 1 eop and descr irq masks */
475 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
476 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
477 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
478 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
480 /* Reset and wait for the DMA channels */
482 RESET_DMA(NETWORK_TX_DMA_NBR);
483 RESET_DMA(NETWORK_RX_DMA_NBR);
484 WAIT_DMA(NETWORK_TX_DMA_NBR);
485 WAIT_DMA(NETWORK_RX_DMA_NBR);
487 /* Initialise the etrax network controller */
489 /* allocate the irq corresponding to the receiving DMA */
491 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname,
496 /* allocate the irq corresponding to the transmitting DMA */
498 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
499 cardname, (void *)dev)) {
503 /* allocate the irq corresponding to the network errors etc */
505 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
506 cardname, (void *)dev)) {
511 * Always allocate the DMA channels after the IRQ,
512 * and clean up on failure.
515 if (cris_request_dma(NETWORK_TX_DMA_NBR,
517 DMA_VERBOSE_ON_ERROR,
522 if (cris_request_dma(NETWORK_RX_DMA_NBR,
524 DMA_VERBOSE_ON_ERROR,
529 /* give the HW an idea of what MAC address we want */
531 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
532 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
533 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
537 /* use promiscuous mode for testing */
538 *R_NETWORK_GA_0 = 0xffffffff;
539 *R_NETWORK_GA_1 = 0xffffffff;
541 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
543 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
544 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
545 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
546 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
547 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
550 *R_NETWORK_GEN_CONFIG =
551 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
552 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
554 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
555 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
557 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
558 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
560 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
561 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
563 local_irq_save(flags);
565 /* enable the irq's for ethernet DMA */
568 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
569 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
572 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
573 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
574 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
576 /* make sure the irqs are cleared */
578 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
579 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
581 /* make sure the rec and transmit error counters are cleared */
583 (void)*R_REC_COUNTERS; /* dummy read */
584 (void)*R_TR_COUNTERS; /* dummy read */
586 /* start the receiving DMA channel so we can receive packets from now on */
588 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
589 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
591 /* Set up transmit DMA channel so it can be restarted later */
593 *R_DMA_CH0_FIRST = 0;
594 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
595 netif_start_queue(dev);
597 local_irq_restore(flags);
599 /* Probe for transceiver */
600 if (e100_probe_transceiver(dev))
603 /* Start duplex/speed timers */
604 add_timer(&speed_timer);
605 add_timer(&duplex_timer);
607 /* We are now ready to accept transmit requeusts from
608 * the queueing layer of the networking.
610 netif_carrier_on(dev);
615 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
617 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
619 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
621 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
623 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
628 #if defined(CONFIG_ETRAX_NO_PHY)
630 dummy_check_speed(struct net_device* dev)
636 generic_check_speed(struct net_device* dev)
639 struct net_local *np = netdev_priv(dev);
641 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
642 if ((data & ADVERTISE_100FULL) ||
643 (data & ADVERTISE_100HALF))
650 tdk_check_speed(struct net_device* dev)
653 struct net_local *np = netdev_priv(dev);
655 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
656 MDIO_TDK_DIAGNOSTIC_REG);
657 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
661 broadcom_check_speed(struct net_device* dev)
664 struct net_local *np = netdev_priv(dev);
666 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
667 MDIO_AUX_CTRL_STATUS_REG);
668 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
672 intel_check_speed(struct net_device* dev)
675 struct net_local *np = netdev_priv(dev);
677 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
678 MDIO_INT_STATUS_REG_2);
679 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
683 e100_check_speed(unsigned long priv)
685 struct net_device* dev = (struct net_device*)priv;
686 struct net_local *np = netdev_priv(dev);
687 static int led_initiated = 0;
689 int old_speed = current_speed;
691 spin_lock(&np->transceiver_lock);
693 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
694 if (!(data & BMSR_LSTATUS)) {
697 transceiver->check_speed(dev);
700 spin_lock(&np->led_lock);
701 if ((old_speed != current_speed) || !led_initiated) {
703 e100_set_network_leds(NO_NETWORK_ACTIVITY);
705 netif_carrier_on(dev);
707 netif_carrier_off(dev);
709 spin_unlock(&np->led_lock);
711 /* Reinitialize the timer. */
712 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
713 add_timer(&speed_timer);
715 spin_unlock(&np->transceiver_lock);
719 e100_negotiate(struct net_device* dev)
721 struct net_local *np = netdev_priv(dev);
722 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
725 /* Discard old speed and duplex settings */
726 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
727 ADVERTISE_10HALF | ADVERTISE_10FULL);
729 switch (current_speed_selection) {
731 if (current_duplex == full)
732 data |= ADVERTISE_10FULL;
733 else if (current_duplex == half)
734 data |= ADVERTISE_10HALF;
736 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
740 if (current_duplex == full)
741 data |= ADVERTISE_100FULL;
742 else if (current_duplex == half)
743 data |= ADVERTISE_100HALF;
745 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
749 if (current_duplex == full)
750 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
751 else if (current_duplex == half)
752 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
754 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
755 ADVERTISE_100HALF | ADVERTISE_100FULL;
758 default: /* assume autoneg speed and duplex */
759 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
760 ADVERTISE_100HALF | ADVERTISE_100FULL;
764 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
766 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
767 if (autoneg_normal) {
768 /* Renegotiate with link partner */
769 data |= BMCR_ANENABLE | BMCR_ANRESTART;
771 /* Don't negotiate speed or duplex */
772 data &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
774 /* Set speed and duplex static */
775 if (current_speed_selection == 10)
776 data &= ~BMCR_SPEED100;
778 data |= BMCR_SPEED100;
780 if (current_duplex != full)
781 data &= ~BMCR_FULLDPLX;
783 data |= BMCR_FULLDPLX;
785 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
789 e100_set_speed(struct net_device* dev, unsigned long speed)
791 struct net_local *np = netdev_priv(dev);
793 spin_lock(&np->transceiver_lock);
794 if (speed != current_speed_selection) {
795 current_speed_selection = speed;
798 spin_unlock(&np->transceiver_lock);
802 e100_check_duplex(unsigned long priv)
804 struct net_device *dev = (struct net_device *)priv;
805 struct net_local *np = netdev_priv(dev);
808 spin_lock(&np->transceiver_lock);
809 old_duplex = full_duplex;
810 transceiver->check_duplex(dev);
811 if (old_duplex != full_duplex) {
813 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
814 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
817 /* Reinitialize the timer. */
818 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
819 add_timer(&duplex_timer);
820 np->mii_if.full_duplex = full_duplex;
821 spin_unlock(&np->transceiver_lock);
823 #if defined(CONFIG_ETRAX_NO_PHY)
825 dummy_check_duplex(struct net_device* dev)
831 generic_check_duplex(struct net_device* dev)
834 struct net_local *np = netdev_priv(dev);
836 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
837 if ((data & ADVERTISE_10FULL) ||
838 (data & ADVERTISE_100FULL))
845 tdk_check_duplex(struct net_device* dev)
848 struct net_local *np = netdev_priv(dev);
850 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
851 MDIO_TDK_DIAGNOSTIC_REG);
852 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
856 broadcom_check_duplex(struct net_device* dev)
859 struct net_local *np = netdev_priv(dev);
861 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
862 MDIO_AUX_CTRL_STATUS_REG);
863 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
867 intel_check_duplex(struct net_device* dev)
870 struct net_local *np = netdev_priv(dev);
872 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
873 MDIO_INT_STATUS_REG_2);
874 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
878 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
880 struct net_local *np = netdev_priv(dev);
882 spin_lock(&np->transceiver_lock);
883 if (new_duplex != current_duplex) {
884 current_duplex = new_duplex;
887 spin_unlock(&np->transceiver_lock);
891 e100_probe_transceiver(struct net_device* dev)
895 #if !defined(CONFIG_ETRAX_NO_PHY)
896 unsigned int phyid_high;
897 unsigned int phyid_low;
899 struct transceiver_ops* ops = NULL;
900 struct net_local *np = netdev_priv(dev);
902 spin_lock(&np->transceiver_lock);
904 /* Probe MDIO physical address */
905 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
906 np->mii_if.phy_id++) {
907 if (e100_get_mdio_reg(dev,
908 np->mii_if.phy_id, MII_BMSR) != 0xffff)
911 if (np->mii_if.phy_id == 32) {
916 /* Get manufacturer */
917 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
918 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
919 oui = (phyid_high << 6) | (phyid_low >> 10);
921 for (ops = &transceivers[0]; ops->oui; ops++) {
927 spin_unlock(&np->transceiver_lock);
933 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
935 unsigned short cmd; /* Data to be sent on MDIO port */
936 int data; /* Data read from MDIO */
939 /* Start of frame, OP Code, Physical Address, Register Address */
940 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
943 e100_send_mdio_cmd(cmd, 0);
948 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
949 data |= (e100_receive_mdio_bit() << bitCounter);
956 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
961 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
964 e100_send_mdio_cmd(cmd, 1);
967 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
968 e100_send_mdio_bit(GET_BIT(bitCounter, value));
974 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
977 unsigned char data = 0x2;
980 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
981 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
983 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
984 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
987 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
989 e100_send_mdio_bit(GET_BIT(bitCounter, data));
991 e100_receive_mdio_bit();
995 e100_send_mdio_bit(unsigned char bit)
997 *R_NETWORK_MGM_CTRL =
998 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
999 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1001 *R_NETWORK_MGM_CTRL =
1002 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1003 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
1004 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1008 static unsigned char
1009 e100_receive_mdio_bit(void)
1012 *R_NETWORK_MGM_CTRL = 0;
1013 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1015 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1021 e100_reset_transceiver(struct net_device* dev)
1023 struct net_local *np = netdev_priv(dev);
1025 unsigned short data;
1028 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1030 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1032 e100_send_mdio_cmd(cmd, 1);
1036 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1037 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1041 /* Called by upper layers if they decide it took too long to complete
1042 * sending a packet - we need to reset and stuff.
1046 e100_tx_timeout(struct net_device *dev)
1048 struct net_local *np = netdev_priv(dev);
1049 unsigned long flags;
1051 spin_lock_irqsave(&np->lock, flags);
1053 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1054 tx_done(dev) ? "IRQ problem" : "network cable problem");
1056 /* remember we got an error */
1058 dev->stats.tx_errors++;
1060 /* reset the TX DMA in case it has hung on something */
1062 RESET_DMA(NETWORK_TX_DMA_NBR);
1063 WAIT_DMA(NETWORK_TX_DMA_NBR);
1065 /* Reset the transceiver. */
1067 e100_reset_transceiver(dev);
1069 /* and get rid of the packets that never got an interrupt */
1070 while (myFirstTxDesc != myNextTxDesc) {
1071 dev_kfree_skb(myFirstTxDesc->skb);
1072 myFirstTxDesc->skb = 0;
1073 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1076 /* Set up transmit DMA channel so it can be restarted later */
1077 *R_DMA_CH0_FIRST = 0;
1078 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1080 /* tell the upper layers we're ok again */
1082 netif_wake_queue(dev);
1083 spin_unlock_irqrestore(&np->lock, flags);
1087 /* This will only be invoked if the driver is _not_ in XOFF state.
1088 * What this means is that we need not check it, and that this
1089 * invariant will hold if we make sure that the netif_*_queue()
1090 * calls are done at the proper times.
1094 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1096 struct net_local *np = netdev_priv(dev);
1097 unsigned char *buf = skb->data;
1098 unsigned long flags;
1101 printk("send packet len %d\n", length);
1103 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1105 myNextTxDesc->skb = skb;
1107 netif_trans_update(dev); /* NETIF_F_LLTX driver :( */
1109 e100_hardware_send_packet(np, buf, skb->len);
1111 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1113 /* Stop queue if full */
1114 if (myNextTxDesc == myFirstTxDesc) {
1115 netif_stop_queue(dev);
1118 spin_unlock_irqrestore(&np->lock, flags);
1120 return NETDEV_TX_OK;
1124 * The typical workload of the driver:
1125 * Handle the network interface interrupts.
1129 e100rxtx_interrupt(int irq, void *dev_id)
1131 struct net_device *dev = (struct net_device *)dev_id;
1132 unsigned long irqbits;
1135 * Note that both rx and tx interrupts are blocked at this point,
1136 * regardless of which got us here.
1139 irqbits = *R_IRQ_MASK2_RD;
1141 /* Handle received packets */
1142 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1143 /* acknowledge the eop interrupt */
1145 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1147 /* check if one or more complete packets were indeed received */
1149 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1150 (myNextRxDesc != myLastRxDesc)) {
1151 /* Take out the buffer and give it to the OS, then
1152 * allocate a new buffer to put a packet in.
1155 dev->stats.rx_packets++;
1156 /* restart/continue on the channel, for safety */
1157 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1158 /* clear dma channel 1 eop/descr irq bits */
1159 *R_DMA_CH1_CLR_INTR =
1160 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1161 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1163 /* now, we might have gotten another packet
1164 so we have to loop back and check if so */
1168 /* Report any packets that have been sent */
1169 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1170 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1171 dev->stats.tx_bytes += myFirstTxDesc->skb->len;
1172 dev->stats.tx_packets++;
1174 /* dma is ready with the transmission of the data in tx_skb, so now
1175 we can release the skb memory */
1176 dev_kfree_skb_irq(myFirstTxDesc->skb);
1177 myFirstTxDesc->skb = 0;
1178 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1179 /* Wake up queue. */
1180 netif_wake_queue(dev);
1183 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1184 /* acknowledge the eop interrupt. */
1185 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1192 e100nw_interrupt(int irq, void *dev_id)
1194 struct net_device *dev = (struct net_device *)dev_id;
1195 unsigned long irqbits = *R_IRQ_MASK0_RD;
1197 /* check for underrun irq */
1198 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1199 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1200 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1201 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1202 dev->stats.tx_errors++;
1203 D(printk("ethernet receiver underrun!\n"));
1206 /* check for overrun irq */
1207 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1208 update_rx_stats(&dev->stats); /* this will ack the irq */
1209 D(printk("ethernet receiver overrun!\n"));
1211 /* check for excessive collision irq */
1212 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1213 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1214 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1215 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1216 dev->stats.tx_errors++;
1217 D(printk("ethernet excessive collisions!\n"));
1222 /* We have a good packet(s), get it/them out of the buffers. */
1224 e100_rx(struct net_device *dev)
1226 struct sk_buff *skb;
1228 struct net_local *np = netdev_priv(dev);
1229 unsigned char *skb_data_ptr;
1233 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1234 spin_lock(&np->led_lock);
1235 if (!led_active && time_after(jiffies, led_next_time)) {
1236 /* light the network leds depending on the current speed. */
1237 e100_set_network_leds(NETWORK_ACTIVITY);
1239 /* Set the earliest time we may clear the LED */
1240 led_next_time = jiffies + NET_FLASH_TIME;
1242 mod_timer(&clear_led_timer, jiffies + HZ/10);
1244 spin_unlock(&np->led_lock);
1246 length = myNextRxDesc->descr.hw_len - 4;
1247 dev->stats.rx_bytes += length;
1250 printk("Got a packet of length %d:\n", length);
1251 /* dump the first bytes in the packet */
1252 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1253 for (i = 0; i < 8; i++) {
1254 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1255 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1256 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1261 if (length < RX_COPYBREAK) {
1262 /* Small packet, copy data */
1263 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1265 dev->stats.rx_errors++;
1266 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1267 goto update_nextrxdesc;
1270 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1271 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1274 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1275 skb->head, skb->data, skb_tail_pointer(skb),
1276 skb_end_pointer(skb));
1277 printk("copying packet to 0x%x.\n", skb_data_ptr);
1280 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1283 /* Large packet, send directly to upper layers and allocate new
1284 * memory (aligned to cache line boundary to avoid bug).
1285 * Before sending the skb to upper layers we must make sure
1286 * that skb->data points to the aligned start of the packet.
1289 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1291 dev->stats.rx_errors++;
1292 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1293 goto update_nextrxdesc;
1295 skb = myNextRxDesc->skb;
1296 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1297 skb_put(skb, length + align);
1298 skb_pull(skb, align); /* Remove alignment bytes */
1299 myNextRxDesc->skb = new_skb;
1300 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1303 skb->protocol = eth_type_trans(skb, dev);
1305 /* Send the packet to the upper layers */
1309 /* Prepare for next packet */
1310 myNextRxDesc->descr.status = 0;
1311 prevRxDesc = myNextRxDesc;
1312 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1316 /* Check if descriptors should be returned */
1317 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1318 flush_etrax_cache();
1319 prevRxDesc->descr.ctrl |= d_eol;
1320 myLastRxDesc->descr.ctrl &= ~d_eol;
1321 myLastRxDesc = prevRxDesc;
1326 /* The inverse routine to net_open(). */
1328 e100_close(struct net_device *dev)
1330 printk(KERN_INFO "Closing %s.\n", dev->name);
1332 netif_stop_queue(dev);
1335 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1336 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1337 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1340 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1341 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1342 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1343 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1345 /* Stop the receiver and the transmitter */
1347 RESET_DMA(NETWORK_TX_DMA_NBR);
1348 RESET_DMA(NETWORK_RX_DMA_NBR);
1350 /* Flush the Tx and disable Rx here. */
1352 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1353 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1354 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1356 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1357 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1359 /* Update the statistics here. */
1361 update_rx_stats(&dev->stats);
1362 update_tx_stats(&dev->stats);
1364 /* Stop speed/duplex timers */
1365 del_timer(&speed_timer);
1366 del_timer(&duplex_timer);
1372 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1374 struct mii_ioctl_data *data = if_mii(ifr);
1375 struct net_local *np = netdev_priv(dev);
1379 spin_lock(&np->lock); /* Preempt protection */
1381 /* The ioctls below should be considered obsolete but are */
1382 /* still present for compatibility with old scripts/apps */
1383 case SET_ETH_SPEED_10: /* 10 Mbps */
1384 e100_set_speed(dev, 10);
1386 case SET_ETH_SPEED_100: /* 100 Mbps */
1387 e100_set_speed(dev, 100);
1389 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1390 e100_set_speed(dev, 0);
1392 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1393 e100_set_duplex(dev, half);
1395 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1396 e100_set_duplex(dev, full);
1398 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1399 e100_set_duplex(dev, autoneg);
1401 case SET_ETH_AUTONEG:
1402 old_autoneg = autoneg_normal;
1403 autoneg_normal = *(int*)data;
1404 if (autoneg_normal != old_autoneg)
1405 e100_negotiate(dev);
1408 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1412 spin_unlock(&np->lock);
1416 static int e100_get_link_ksettings(struct net_device *dev,
1417 struct ethtool_link_ksettings *cmd)
1419 struct net_local *np = netdev_priv(dev);
1422 spin_lock_irq(&np->lock);
1423 mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1424 spin_unlock_irq(&np->lock);
1426 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1427 ethtool_convert_link_mode_to_legacy_u32(&supported,
1428 cmd->link_modes.supported);
1430 supported &= ~(SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full);
1432 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1438 static int e100_set_link_ksettings(struct net_device *dev,
1439 const struct ethtool_link_ksettings *ecmd)
1441 if (ecmd->base.autoneg == AUTONEG_ENABLE) {
1442 e100_set_duplex(dev, autoneg);
1443 e100_set_speed(dev, 0);
1445 e100_set_duplex(dev, ecmd->base.duplex == DUPLEX_HALF ?
1447 e100_set_speed(dev, ecmd->base.speed == SPEED_10 ? 10 : 100);
1453 static void e100_get_drvinfo(struct net_device *dev,
1454 struct ethtool_drvinfo *info)
1456 strlcpy(info->driver, "ETRAX 100LX", sizeof(info->driver));
1457 strlcpy(info->version, "$Revision: 1.31 $", sizeof(info->version));
1458 strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
1459 strlcpy(info->bus_info, "N/A", sizeof(info->bus_info));
1462 static int e100_nway_reset(struct net_device *dev)
1464 if (current_duplex == autoneg && current_speed_selection == 0)
1465 e100_negotiate(dev);
1469 static const struct ethtool_ops e100_ethtool_ops = {
1470 .get_drvinfo = e100_get_drvinfo,
1471 .nway_reset = e100_nway_reset,
1472 .get_link = ethtool_op_get_link,
1473 .get_link_ksettings = e100_get_link_ksettings,
1474 .set_link_ksettings = e100_set_link_ksettings,
1478 e100_set_config(struct net_device *dev, struct ifmap *map)
1480 struct net_local *np = netdev_priv(dev);
1482 spin_lock(&np->lock); /* Preempt protection */
1485 case IF_PORT_UNKNOWN:
1487 e100_set_speed(dev, 0);
1488 e100_set_duplex(dev, autoneg);
1490 case IF_PORT_10BASET:
1491 e100_set_speed(dev, 10);
1492 e100_set_duplex(dev, autoneg);
1494 case IF_PORT_100BASET:
1495 case IF_PORT_100BASETX:
1496 e100_set_speed(dev, 100);
1497 e100_set_duplex(dev, autoneg);
1499 case IF_PORT_100BASEFX:
1500 case IF_PORT_10BASE2:
1502 spin_unlock(&np->lock);
1505 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1506 spin_unlock(&np->lock);
1509 spin_unlock(&np->lock);
1514 update_rx_stats(struct net_device_stats *es)
1516 unsigned long r = *R_REC_COUNTERS;
1517 /* update stats relevant to reception errors */
1518 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1519 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1520 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1521 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1525 update_tx_stats(struct net_device_stats *es)
1527 unsigned long r = *R_TR_COUNTERS;
1528 /* update stats relevant to transmission errors */
1530 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1531 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1535 * Get the current statistics.
1536 * This may be called with the card open or closed.
1538 static struct net_device_stats *
1539 e100_get_stats(struct net_device *dev)
1541 struct net_local *lp = netdev_priv(dev);
1542 unsigned long flags;
1544 spin_lock_irqsave(&lp->lock, flags);
1546 update_rx_stats(&dev->stats);
1547 update_tx_stats(&dev->stats);
1549 spin_unlock_irqrestore(&lp->lock, flags);
1554 * Set or clear the multicast filter for this adaptor.
1555 * num_addrs == -1 Promiscuous mode, receive all packets
1556 * num_addrs == 0 Normal mode, clear multicast list
1557 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1558 * and do best-effort filtering.
1561 set_multicast_list(struct net_device *dev)
1563 struct net_local *lp = netdev_priv(dev);
1564 int num_addr = netdev_mc_count(dev);
1565 unsigned long int lo_bits;
1566 unsigned long int hi_bits;
1568 spin_lock(&lp->lock);
1569 if (dev->flags & IFF_PROMISC) {
1570 /* promiscuous mode */
1571 lo_bits = 0xfffffffful;
1572 hi_bits = 0xfffffffful;
1574 /* Enable individual receive */
1575 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1576 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1577 } else if (dev->flags & IFF_ALLMULTI) {
1578 /* enable all multicasts */
1579 lo_bits = 0xfffffffful;
1580 hi_bits = 0xfffffffful;
1582 /* Disable individual receive */
1583 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1584 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1585 } else if (num_addr == 0) {
1586 /* Normal, clear the mc list */
1587 lo_bits = 0x00000000ul;
1588 hi_bits = 0x00000000ul;
1590 /* Disable individual receive */
1591 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1592 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1594 /* MC mode, receive normal and MC packets */
1596 struct netdev_hw_addr *ha;
1599 lo_bits = 0x00000000ul;
1600 hi_bits = 0x00000000ul;
1601 netdev_for_each_mc_addr(ha, dev) {
1602 /* Calculate the hash index for the GA registers */
1606 hash_ix ^= (*baddr) & 0x3f;
1607 hash_ix ^= ((*baddr) >> 6) & 0x03;
1609 hash_ix ^= ((*baddr) << 2) & 0x03c;
1610 hash_ix ^= ((*baddr) >> 4) & 0xf;
1612 hash_ix ^= ((*baddr) << 4) & 0x30;
1613 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1615 hash_ix ^= (*baddr) & 0x3f;
1616 hash_ix ^= ((*baddr) >> 6) & 0x03;
1618 hash_ix ^= ((*baddr) << 2) & 0x03c;
1619 hash_ix ^= ((*baddr) >> 4) & 0xf;
1621 hash_ix ^= ((*baddr) << 4) & 0x30;
1622 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1626 if (hash_ix >= 32) {
1627 hi_bits |= (1 << (hash_ix-32));
1629 lo_bits |= (1 << hash_ix);
1632 /* Disable individual receive */
1633 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1634 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1636 *R_NETWORK_GA_0 = lo_bits;
1637 *R_NETWORK_GA_1 = hi_bits;
1638 spin_unlock(&lp->lock);
1642 e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1644 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1646 spin_lock(&np->led_lock);
1647 if (!led_active && time_after(jiffies, led_next_time)) {
1648 /* light the network leds depending on the current speed. */
1649 e100_set_network_leds(NETWORK_ACTIVITY);
1651 /* Set the earliest time we may clear the LED */
1652 led_next_time = jiffies + NET_FLASH_TIME;
1654 mod_timer(&clear_led_timer, jiffies + HZ/10);
1656 spin_unlock(&np->led_lock);
1658 /* configure the tx dma descriptor */
1659 myNextTxDesc->descr.sw_len = length;
1660 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1661 myNextTxDesc->descr.buf = virt_to_phys(buf);
1663 /* Move end of list */
1664 myLastTxDesc->descr.ctrl &= ~d_eol;
1665 myLastTxDesc = myNextTxDesc;
1667 /* Restart DMA channel */
1668 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1672 e100_clear_network_leds(unsigned long dummy)
1674 struct net_device *dev = (struct net_device *)dummy;
1675 struct net_local *np = netdev_priv(dev);
1677 spin_lock(&np->led_lock);
1679 if (led_active && time_after(jiffies, led_next_time)) {
1680 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1682 /* Set the earliest time we may set the LED */
1683 led_next_time = jiffies + NET_FLASH_PAUSE;
1687 spin_unlock(&np->led_lock);
1691 e100_set_network_leds(int active)
1693 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1694 int light_leds = (active == NO_NETWORK_ACTIVITY);
1695 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1696 int light_leds = (active == NETWORK_ACTIVITY);
1698 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1701 if (!current_speed) {
1702 /* Make LED red, link is down */
1703 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1704 } else if (light_leds) {
1705 if (current_speed == 10) {
1706 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1708 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1711 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1715 #ifdef CONFIG_NET_POLL_CONTROLLER
1717 e100_netpoll(struct net_device* netdev)
1719 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev);
1725 e100_boot_setup(char* str)
1727 struct sockaddr sa = {0};
1730 /* Parse the colon separated Ethernet station address */
1731 for (i = 0; i < ETH_ALEN; i++) {
1733 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1734 printk(KERN_WARNING "Malformed station address");
1737 sa.sa_data[i] = (char)tmp;
1744 __setup("etrax100_eth=", e100_boot_setup);