drivers/net/can/c_can/c_can_platform.c

   1 /*
   2  * Platform CAN bus driver for Bosch C_CAN controller
   3  *
   4  * Copyright (C) 2010 ST Microelectronics
   5  * Bhupesh Sharma <bhupesh.sharma@st.com>
   6  *
   7  * Borrowed heavily from the C_CAN driver originally written by:
   8  * Copyright (C) 2007
   9  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
  10  * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
  11  *
  12  * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
  13  * Bosch C_CAN user manual can be obtained from:
  14  * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
  15  * users_manual_c_can.pdf
  16  *
  17  * This file is licensed under the terms of the GNU General Public
  18  * License version 2. This program is licensed "as is" without any
  19  * warranty of any kind, whether express or implied.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/delay.h>
  26 #include <linux/netdevice.h>
  27 #include <linux/if_arp.h>
  28 #include <linux/if_ether.h>
  29 #include <linux/list.h>
  30 #include <linux/io.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/pm_runtime.h>
  33 #include <linux/clk.h>
  34 #include <linux/of.h>
  35 #include <linux/of_device.h>
  36 #include <linux/mfd/syscon.h>
  37 #include <linux/regmap.h>
  38
  39 #include <linux/can/dev.h>
  40
  41 #include "c_can.h"
  42
  43 #define DCAN_RAM_INIT_BIT               (1 << 3)
  44 static DEFINE_SPINLOCK(raminit_lock);
  45 /*
  46  * 16-bit c_can registers can be arranged differently in the memory
  47  * architecture of different implementations. For example: 16-bit
  48  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
  49  * Handle the same by providing a common read/write interface.
  50  */
  51 static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
  52                                                 enum reg index)
  53 {
  54         return readw(priv->base + priv->regs[index]);
  55 }
  56
  57 static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
  58                                                 enum reg index, u16 val)
  59 {
  60         writew(val, priv->base + priv->regs[index]);
  61 }
  62
  63 static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
  64                                                 enum reg index)
  65 {
  66         return readw(priv->base + 2 * priv->regs[index]);
  67 }
  68
  69 static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
  70                                                 enum reg index, u16 val)
  71 {
  72         writew(val, priv->base + 2 * priv->regs[index]);
  73 }
  74
  75 static void c_can_hw_raminit_wait_syscon(const struct c_can_priv *priv,
  76                                          u32 mask, u32 val)
  77 {
  78         const struct c_can_raminit *raminit = &priv->raminit_sys;
  79         int timeout = 0;
  80         u32 ctrl = 0;
  81
  82         /* We look only at the bits of our instance. */
  83         val &= mask;
  84         do {
  85                 udelay(1);
  86                 timeout++;
  87
  88                 regmap_read(raminit->syscon, raminit->reg, &ctrl);
  89                 if (timeout == 1000) {
  90                         dev_err(&priv->dev->dev, "%s: time out\n", __func__);
  91                         break;
  92                 }
  93         } while ((ctrl & mask) != val);
  94 }
  95
  96 static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable)
  97 {
  98         const struct c_can_raminit *raminit = &priv->raminit_sys;
  99         u32 ctrl = 0;
 100         u32 mask;
 101
 102         spin_lock(&raminit_lock);
 103
 104         mask = 1 << raminit->bits.start | 1 << raminit->bits.done;
 105         regmap_read(raminit->syscon, raminit->reg, &ctrl);
 106
 107         /* We clear the start bit first. The start bit is
 108          * looking at the 0 -> transition, but is not self clearing;
 109          * NOTE: DONE must be written with 1 to clear it.
 110          * We can't clear the DONE bit here using regmap_update_bits()
 111          * as it will bypass the write if initial condition is START:0 DONE:1
 112          * e.g. on DRA7 which needs START pulse.
 113          */
 114         ctrl &= ~mask;  /* START = 0, DONE = 0 */
 115         regmap_update_bits(raminit->syscon, raminit->reg, mask, ctrl);
 116
 117         /* check if START bit is 0. Ignore DONE bit for now
 118          * as it can be either 0 or 1.
 119          */
 120         c_can_hw_raminit_wait_syscon(priv, 1 << raminit->bits.start, ctrl);
 121
 122         if (enable) {
 123                 /* Clear DONE bit & set START bit. */
 124                 ctrl |= 1 << raminit->bits.start;
 125                 /* DONE must be written with 1 to clear it */
 126                 ctrl |= 1 << raminit->bits.done;
 127                 regmap_update_bits(raminit->syscon, raminit->reg, mask, ctrl);
 128                 /* prevent further clearing of DONE bit */
 129                 ctrl &= ~(1 << raminit->bits.done);
 130                 /* clear START bit if start pulse is needed */
 131                 if (raminit->needs_pulse) {
 132                         ctrl &= ~(1 << raminit->bits.start);
 133                         regmap_update_bits(raminit->syscon, raminit->reg,
 134                                            mask, ctrl);
 135                 }
 136
 137                 ctrl |= 1 << raminit->bits.done;
 138                 c_can_hw_raminit_wait_syscon(priv, mask, ctrl);
 139         }
 140         spin_unlock(&raminit_lock);
 141 }
 142
 143 static u32 c_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)
 144 {
 145         u32 val;
 146
 147         val = priv->read_reg(priv, index);
 148         val |= ((u32) priv->read_reg(priv, index + 1)) << 16;
 149
 150         return val;
 151 }
 152
 153 static void c_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,
 154                 u32 val)
 155 {
 156         priv->write_reg(priv, index + 1, val >> 16);
 157         priv->write_reg(priv, index, val);
 158 }
 159
 160 static u32 d_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)
 161 {
 162         return readl(priv->base + priv->regs[index]);
 163 }
 164
 165 static void d_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,
 166                 u32 val)
 167 {
 168         writel(val, priv->base + priv->regs[index]);
 169 }
 170
 171 static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask)
 172 {
 173         while (priv->read_reg32(priv, C_CAN_FUNCTION_REG) & mask)
 174                 udelay(1);
 175 }
 176
 177 static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
 178 {
 179         u32 ctrl;
 180
 181         ctrl = priv->read_reg32(priv, C_CAN_FUNCTION_REG);
 182         ctrl &= ~DCAN_RAM_INIT_BIT;
 183         priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);
 184         c_can_hw_raminit_wait(priv, ctrl);
 185
 186         if (enable) {
 187                 ctrl |= DCAN_RAM_INIT_BIT;
 188                 priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);
 189                 c_can_hw_raminit_wait(priv, ctrl);
 190         }
 191 }
 192
 193 static const struct c_can_driver_data c_can_drvdata = {
 194         .id = BOSCH_C_CAN,
 195 };
 196
 197 static const struct c_can_driver_data d_can_drvdata = {
 198         .id = BOSCH_D_CAN,
 199 };
 200
 201 static const struct raminit_bits dra7_raminit_bits[] = {
 202         [0] = { .start = 3, .done = 1, },
 203         [1] = { .start = 5, .done = 2, },
 204 };
 205
 206 static const struct c_can_driver_data dra7_dcan_drvdata = {
 207         .id = BOSCH_D_CAN,
 208         .raminit_num = ARRAY_SIZE(dra7_raminit_bits),
 209         .raminit_bits = dra7_raminit_bits,
 210         .raminit_pulse = true,
 211 };
 212
 213 static const struct raminit_bits am3352_raminit_bits[] = {
 214         [0] = { .start = 0, .done = 8, },
 215         [1] = { .start = 1, .done = 9, },
 216 };
 217
 218 static const struct c_can_driver_data am3352_dcan_drvdata = {
 219         .id = BOSCH_D_CAN,
 220         .raminit_num = ARRAY_SIZE(am3352_raminit_bits),
 221         .raminit_bits = am3352_raminit_bits,
 222 };
 223
 224 static struct platform_device_id c_can_id_table[] = {
 225         {
 226                 .name = KBUILD_MODNAME,
 227                 .driver_data = (kernel_ulong_t)&c_can_drvdata,
 228         },
 229         {
 230                 .name = "c_can",
 231                 .driver_data = (kernel_ulong_t)&c_can_drvdata,
 232         },
 233         {
 234                 .name = "d_can",
 235                 .driver_data = (kernel_ulong_t)&d_can_drvdata,
 236         },
 237         { /* sentinel */ },
 238 };
 239 MODULE_DEVICE_TABLE(platform, c_can_id_table);
 240
 241 static const struct of_device_id c_can_of_table[] = {
 242         { .compatible = "bosch,c_can", .data = &c_can_drvdata },
 243         { .compatible = "bosch,d_can", .data = &d_can_drvdata },
 244         { .compatible = "ti,dra7-d_can", .data = &dra7_dcan_drvdata },
 245         { .compatible = "ti,am3352-d_can", .data = &am3352_dcan_drvdata },
 246         { .compatible = "ti,am4372-d_can", .data = &am3352_dcan_drvdata },
 247         { /* sentinel */ },
 248 };
 249 MODULE_DEVICE_TABLE(of, c_can_of_table);
 250
 251 static int c_can_plat_probe(struct platform_device *pdev)
 252 {
 253         int ret;
 254         void __iomem *addr;
 255         struct net_device *dev;
 256         struct c_can_priv *priv;
 257         const struct of_device_id *match;
 258         struct resource *mem;
 259         int irq;
 260         struct clk *clk;
 261         const struct c_can_driver_data *drvdata;
 262         struct device_node *np = pdev->dev.of_node;
 263
 264         match = of_match_device(c_can_of_table, &pdev->dev);
 265         if (match) {
 266                 drvdata = match->data;
 267         } else if (pdev->id_entry->driver_data) {
 268                 drvdata = (struct c_can_driver_data *)
 269                         platform_get_device_id(pdev)->driver_data;
 270         } else {
 271                 return -ENODEV;
 272         }
 273
 274         /* get the appropriate clk */
 275         clk = devm_clk_get(&pdev->dev, NULL);
 276         if (IS_ERR(clk)) {
 277                 ret = PTR_ERR(clk);
 278                 goto exit;
 279         }
 280
 281         /* get the platform data */
 282         irq = platform_get_irq(pdev, 0);
 283         if (irq <= 0) {
 284                 ret = -ENODEV;
 285                 goto exit;
 286         }
 287
 288         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 289         addr = devm_ioremap_resource(&pdev->dev, mem);
 290         if (IS_ERR(addr)) {
 291                 ret =  PTR_ERR(addr);
 292                 goto exit;
 293         }
 294
 295         /* allocate the c_can device */
 296         dev = alloc_c_can_dev();
 297         if (!dev) {
 298                 ret = -ENOMEM;
 299                 goto exit;
 300         }
 301
 302         priv = netdev_priv(dev);
 303         switch (drvdata->id) {
 304         case BOSCH_C_CAN:
 305                 priv->regs = reg_map_c_can;
 306                 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
 307                 case IORESOURCE_MEM_32BIT:
 308                         priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
 309                         priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
 310                         priv->read_reg32 = c_can_plat_read_reg32;
 311                         priv->write_reg32 = c_can_plat_write_reg32;
 312                         break;
 313                 case IORESOURCE_MEM_16BIT:
 314                 default:
 315                         priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
 316                         priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
 317                         priv->read_reg32 = c_can_plat_read_reg32;
 318                         priv->write_reg32 = c_can_plat_write_reg32;
 319                         break;
 320                 }
 321                 break;
 322         case BOSCH_D_CAN:
 323                 priv->regs = reg_map_d_can;
 324                 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
 325                 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
 326                 priv->read_reg32 = d_can_plat_read_reg32;
 327                 priv->write_reg32 = d_can_plat_write_reg32;
 328
 329                 /* Check if we need custom RAMINIT via syscon. Mostly for TI
 330                  * platforms. Only supported with DT boot.
 331                  */
 332                 if (np && of_property_read_bool(np, "syscon-raminit")) {
 333                         u32 id;
 334                         struct c_can_raminit *raminit = &priv->raminit_sys;
 335
 336                         ret = -EINVAL;
 337                         raminit->syscon = syscon_regmap_lookup_by_phandle(np,
 338                                                                           "syscon-raminit");
 339                         if (IS_ERR(raminit->syscon)) {
 340                                 /* can fail with -EPROBE_DEFER */
 341                                 ret = PTR_ERR(raminit->syscon);
 342                                 free_c_can_dev(dev);
 343                                 return ret;
 344                         }
 345
 346                         if (of_property_read_u32_index(np, "syscon-raminit", 1,
 347                                                        &raminit->reg)) {
 348                                 dev_err(&pdev->dev,
 349                                         "couldn't get the RAMINIT reg. offset!\n");
 350                                 goto exit_free_device;
 351                         }
 352
 353                         if (of_property_read_u32_index(np, "syscon-raminit", 2,
 354                                                        &id)) {
 355                                 dev_err(&pdev->dev,
 356                                         "couldn't get the CAN instance ID\n");
 357                                 goto exit_free_device;
 358                         }
 359
 360                         if (id >= drvdata->raminit_num) {
 361                                 dev_err(&pdev->dev,
 362                                         "Invalid CAN instance ID\n");
 363                                 goto exit_free_device;
 364                         }
 365
 366                         raminit->bits = drvdata->raminit_bits[id];
 367                         raminit->needs_pulse = drvdata->raminit_pulse;
 368
 369                         priv->raminit = c_can_hw_raminit_syscon;
 370                 } else {
 371                         priv->raminit = c_can_hw_raminit;
 372                 }
 373                 break;
 374         default:
 375                 ret = -EINVAL;
 376                 goto exit_free_device;
 377         }
 378
 379         dev->irq = irq;
 380         priv->base = addr;
 381         priv->device = &pdev->dev;
 382         priv->can.clock.freq = clk_get_rate(clk);
 383         priv->priv = clk;
 384         priv->type = drvdata->id;
 385
 386         platform_set_drvdata(pdev, dev);
 387         SET_NETDEV_DEV(dev, &pdev->dev);
 388
 389         pm_runtime_enable(priv->device);
 390         ret = register_c_can_dev(dev);
 391         if (ret) {
 392                 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
 393                         KBUILD_MODNAME, ret);
 394                 goto exit_free_device;
 395         }
 396
 397         dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
 398                  KBUILD_MODNAME, priv->base, dev->irq);
 399         return 0;
 400
 401 exit_free_device:
 402         pm_runtime_disable(priv->device);
 403         free_c_can_dev(dev);
 404 exit:
 405         dev_err(&pdev->dev, "probe failed\n");
 406
 407         return ret;
 408 }
 409
 410 static int c_can_plat_remove(struct platform_device *pdev)
 411 {
 412         struct net_device *dev = platform_get_drvdata(pdev);
 413         struct c_can_priv *priv = netdev_priv(dev);
 414
 415         unregister_c_can_dev(dev);
 416         pm_runtime_disable(priv->device);
 417         free_c_can_dev(dev);
 418
 419         return 0;
 420 }
 421
 422 #ifdef CONFIG_PM
 423 static int c_can_suspend(struct platform_device *pdev, pm_message_t state)
 424 {
 425         int ret;
 426         struct net_device *ndev = platform_get_drvdata(pdev);
 427         struct c_can_priv *priv = netdev_priv(ndev);
 428
 429         if (priv->type != BOSCH_D_CAN) {
 430                 dev_warn(&pdev->dev, "Not supported\n");
 431                 return 0;
 432         }
 433
 434         if (netif_running(ndev)) {
 435                 netif_stop_queue(ndev);
 436                 netif_device_detach(ndev);
 437         }
 438
 439         ret = c_can_power_down(ndev);
 440         if (ret) {
 441                 netdev_err(ndev, "failed to enter power down mode\n");
 442                 return ret;
 443         }
 444
 445         priv->can.state = CAN_STATE_SLEEPING;
 446
 447         return 0;
 448 }
 449
 450 static int c_can_resume(struct platform_device *pdev)
 451 {
 452         int ret;
 453         struct net_device *ndev = platform_get_drvdata(pdev);
 454         struct c_can_priv *priv = netdev_priv(ndev);
 455
 456         if (priv->type != BOSCH_D_CAN) {
 457                 dev_warn(&pdev->dev, "Not supported\n");
 458                 return 0;
 459         }
 460
 461         ret = c_can_power_up(ndev);
 462         if (ret) {
 463                 netdev_err(ndev, "Still in power down mode\n");
 464                 return ret;
 465         }
 466
 467         priv->can.state = CAN_STATE_ERROR_ACTIVE;
 468
 469         if (netif_running(ndev)) {
 470                 netif_device_attach(ndev);
 471                 netif_start_queue(ndev);
 472         }
 473
 474         return 0;
 475 }
 476 #else
 477 #define c_can_suspend NULL
 478 #define c_can_resume NULL
 479 #endif
 480
 481 static struct platform_driver c_can_plat_driver = {
 482         .driver = {
 483                 .name = KBUILD_MODNAME,
 484                 .of_match_table = c_can_of_table,
 485         },
 486         .probe = c_can_plat_probe,
 487         .remove = c_can_plat_remove,
 488         .suspend = c_can_suspend,
 489         .resume = c_can_resume,
 490         .id_table = c_can_id_table,
 491 };
 492
 493 module_platform_driver(c_can_plat_driver);
 494
 495 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
 496 MODULE_LICENSE("GPL v2");
 497 MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");