1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #include <linux/mtd/spi-nor.h>
12 is25lp256_post_bfpt_fixups(struct spi_nor *nor,
13 const struct sfdp_parameter_header *bfpt_header,
14 const struct sfdp_bfpt *bfpt)
17 * IS25LP256 supports 4B opcodes, but the BFPT advertises
18 * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY.
19 * Overwrite the number of address bytes advertised by the BFPT.
21 if ((bfpt->dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
22 BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
23 nor->params->addr_nbytes = 4;
28 static const struct spi_nor_fixups is25lp256_fixups = {
29 .post_bfpt = is25lp256_post_bfpt_fixups,
32 static int pm25lv_nor_late_init(struct spi_nor *nor)
34 struct spi_nor_erase_map *map = &nor->params->erase_map;
37 /* The PM25LV series has a different 4k sector erase opcode */
38 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
39 if (map->erase_type[i].size == 4096)
40 map->erase_type[i].opcode = SPINOR_OP_BE_4K_PMC;
45 static const struct spi_nor_fixups pm25lv_nor_fixups = {
46 .late_init = pm25lv_nor_late_init,
49 static const struct flash_info issi_nor_parts[] = {
52 .sector_size = SZ_32K,
54 .no_sfdp_flags = SECT_4K,
55 .fixups = &pm25lv_nor_fixups
58 .sector_size = SZ_32K,
60 .no_sfdp_flags = SECT_4K,
61 .fixups = &pm25lv_nor_fixups
63 .id = SNOR_ID(0x7f, 0x9d, 0x20),
65 .sector_size = SZ_32K,
67 .no_sfdp_flags = SECT_4K,
69 .id = SNOR_ID(0x7f, 0x9d, 0x46),
72 .no_sfdp_flags = SECT_4K,
74 .id = SNOR_ID(0x9d, 0x40, 0x13),
77 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
79 .id = SNOR_ID(0x9d, 0x60, 0x14),
82 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
84 .id = SNOR_ID(0x9d, 0x60, 0x15),
87 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
89 .id = SNOR_ID(0x9d, 0x60, 0x16),
92 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
94 .id = SNOR_ID(0x9d, 0x60, 0x17),
97 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
99 .id = SNOR_ID(0x9d, 0x60, 0x18),
102 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ,
104 .id = SNOR_ID(0x9d, 0x60, 0x19),
106 .fixups = &is25lp256_fixups,
107 .fixup_flags = SPI_NOR_4B_OPCODES,
109 .id = SNOR_ID(0x9d, 0x70, 0x16),
112 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
114 .id = SNOR_ID(0x9d, 0x70, 0x17),
117 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
119 .id = SNOR_ID(0x9d, 0x70, 0x18),
122 .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
124 .id = SNOR_ID(0x9d, 0x70, 0x19),
126 .flags = SPI_NOR_QUAD_PP,
127 .fixups = &is25lp256_fixups,
128 .fixup_flags = SPI_NOR_4B_OPCODES,
132 static void issi_nor_default_init(struct spi_nor *nor)
134 nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
137 static const struct spi_nor_fixups issi_fixups = {
138 .default_init = issi_nor_default_init,
141 const struct spi_nor_manufacturer spi_nor_issi = {
143 .parts = issi_nor_parts,
144 .nparts = ARRAY_SIZE(issi_nor_parts),
145 .fixups = &issi_fixups,