drivers/mtd/nand/raw/socrates_nand.c

   1 /*
   2  *  Copyright © 2008 Ilya Yanok, Emcraft Systems
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  */
  10
  11 #include <linux/slab.h>
  12 #include <linux/module.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/rawnand.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/of_address.h>
  17 #include <linux/of_platform.h>
  18 #include <linux/io.h>
  19
  20 #define FPGA_NAND_CMD_MASK              (0x7 << 28)
  21 #define FPGA_NAND_CMD_COMMAND           (0x0 << 28)
  22 #define FPGA_NAND_CMD_ADDR              (0x1 << 28)
  23 #define FPGA_NAND_CMD_READ              (0x2 << 28)
  24 #define FPGA_NAND_CMD_WRITE             (0x3 << 28)
  25 #define FPGA_NAND_BUSY                  (0x1 << 15)
  26 #define FPGA_NAND_ENABLE                (0x1 << 31)
  27 #define FPGA_NAND_DATA_SHIFT            16
  28
  29 struct socrates_nand_host {
  30         struct nand_chip        nand_chip;
  31         void __iomem            *io_base;
  32         struct device           *dev;
  33 };
  34
  35 /**
  36  * socrates_nand_write_buf -  write buffer to chip
  37  * @mtd:        MTD device structure
  38  * @buf:        data buffer
  39  * @len:        number of bytes to write
  40  */
  41 static void socrates_nand_write_buf(struct mtd_info *mtd,
  42                 const uint8_t *buf, int len)
  43 {
  44         int i;
  45         struct nand_chip *this = mtd_to_nand(mtd);
  46         struct socrates_nand_host *host = nand_get_controller_data(this);
  47
  48         for (i = 0; i < len; i++) {
  49                 out_be32(host->io_base, FPGA_NAND_ENABLE |
  50                                 FPGA_NAND_CMD_WRITE |
  51                                 (buf[i] << FPGA_NAND_DATA_SHIFT));
  52         }
  53 }
  54
  55 /**
  56  * socrates_nand_read_buf -  read chip data into buffer
  57  * @mtd:        MTD device structure
  58  * @buf:        buffer to store date
  59  * @len:        number of bytes to read
  60  */
  61 static void socrates_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  62 {
  63         int i;
  64         struct nand_chip *this = mtd_to_nand(mtd);
  65         struct socrates_nand_host *host = nand_get_controller_data(this);
  66         uint32_t val;
  67
  68         val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ;
  69
  70         out_be32(host->io_base, val);
  71         for (i = 0; i < len; i++) {
  72                 buf[i] = (in_be32(host->io_base) >>
  73                                 FPGA_NAND_DATA_SHIFT) & 0xff;
  74         }
  75 }
  76
  77 /**
  78  * socrates_nand_read_byte -  read one byte from the chip
  79  * @mtd:        MTD device structure
  80  */
  81 static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
  82 {
  83         uint8_t byte;
  84         socrates_nand_read_buf(mtd, &byte, sizeof(byte));
  85         return byte;
  86 }
  87
  88 /**
  89  * socrates_nand_read_word -  read one word from the chip
  90  * @mtd:        MTD device structure
  91  */
  92 static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
  93 {
  94         uint16_t word;
  95         socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
  96         return word;
  97 }
  98
  99 /*
 100  * Hardware specific access to control-lines
 101  */
 102 static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 103                 unsigned int ctrl)
 104 {
 105         struct nand_chip *nand_chip = mtd_to_nand(mtd);
 106         struct socrates_nand_host *host = nand_get_controller_data(nand_chip);
 107         uint32_t val;
 108
 109         if (cmd == NAND_CMD_NONE)
 110                 return;
 111
 112         if (ctrl & NAND_CLE)
 113                 val = FPGA_NAND_CMD_COMMAND;
 114         else
 115                 val = FPGA_NAND_CMD_ADDR;
 116
 117         if (ctrl & NAND_NCE)
 118                 val |= FPGA_NAND_ENABLE;
 119
 120         val |= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT;
 121
 122         out_be32(host->io_base, val);
 123 }
 124
 125 /*
 126  * Read the Device Ready pin.
 127  */
 128 static int socrates_nand_device_ready(struct mtd_info *mtd)
 129 {
 130         struct nand_chip *nand_chip = mtd_to_nand(mtd);
 131         struct socrates_nand_host *host = nand_get_controller_data(nand_chip);
 132
 133         if (in_be32(host->io_base) & FPGA_NAND_BUSY)
 134                 return 0; /* busy */
 135         return 1;
 136 }
 137
 138 /*
 139  * Probe for the NAND device.
 140  */
 141 static int socrates_nand_probe(struct platform_device *ofdev)
 142 {
 143         struct socrates_nand_host *host;
 144         struct mtd_info *mtd;
 145         struct nand_chip *nand_chip;
 146         int res;
 147
 148         /* Allocate memory for the device structure (and zero it) */
 149         host = devm_kzalloc(&ofdev->dev, sizeof(*host), GFP_KERNEL);
 150         if (!host)
 151                 return -ENOMEM;
 152
 153         host->io_base = of_iomap(ofdev->dev.of_node, 0);
 154         if (host->io_base == NULL) {
 155                 dev_err(&ofdev->dev, "ioremap failed\n");
 156                 return -EIO;
 157         }
 158
 159         nand_chip = &host->nand_chip;
 160         mtd = nand_to_mtd(nand_chip);
 161         host->dev = &ofdev->dev;
 162
 163         /* link the private data structures */
 164         nand_set_controller_data(nand_chip, host);
 165         nand_set_flash_node(nand_chip, ofdev->dev.of_node);
 166         mtd->name = "socrates_nand";
 167         mtd->dev.parent = &ofdev->dev;
 168
 169         /*should never be accessed directly */
 170         nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
 171         nand_chip->IO_ADDR_W = (void *)0xdeadbeef;
 172
 173         nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
 174         nand_chip->read_byte = socrates_nand_read_byte;
 175         nand_chip->read_word = socrates_nand_read_word;
 176         nand_chip->write_buf = socrates_nand_write_buf;
 177         nand_chip->read_buf = socrates_nand_read_buf;
 178         nand_chip->dev_ready = socrates_nand_device_ready;
 179
 180         nand_chip->ecc.mode = NAND_ECC_SOFT;    /* enable ECC */
 181         nand_chip->ecc.algo = NAND_ECC_HAMMING;
 182
 183         /* TODO: I have no idea what real delay is. */
 184         nand_chip->chip_delay = 20;             /* 20us command delay time */
 185
 186         dev_set_drvdata(&ofdev->dev, host);
 187
 188         res = nand_scan(nand_chip, 1);
 189         if (res)
 190                 goto out;
 191
 192         res = mtd_device_register(mtd, NULL, 0);
 193         if (!res)
 194                 return res;
 195
 196         nand_cleanup(nand_chip);
 197
 198 out:
 199         iounmap(host->io_base);
 200         return res;
 201 }
 202
 203 /*
 204  * Remove a NAND device.
 205  */
 206 static int socrates_nand_remove(struct platform_device *ofdev)
 207 {
 208         struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
 209
 210         nand_release(&host->nand_chip);
 211
 212         iounmap(host->io_base);
 213
 214         return 0;
 215 }
 216
 217 static const struct of_device_id socrates_nand_match[] =
 218 {
 219         {
 220                 .compatible   = "abb,socrates-nand",
 221         },
 222         {},
 223 };
 224
 225 MODULE_DEVICE_TABLE(of, socrates_nand_match);
 226
 227 static struct platform_driver socrates_nand_driver = {
 228         .driver = {
 229                 .name = "socrates_nand",
 230                 .of_match_table = socrates_nand_match,
 231         },
 232         .probe          = socrates_nand_probe,
 233         .remove         = socrates_nand_remove,
 234 };
 235
 236 module_platform_driver(socrates_nand_driver);
 237
 238 MODULE_LICENSE("GPL");
 239 MODULE_AUTHOR("Ilya Yanok");
 240 MODULE_DESCRIPTION("NAND driver for Socrates board");