1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
4 * driver for Ricoh xD readers
7 #define DRV_NAME "r852"
8 #define pr_fmt(fmt) DRV_NAME ": " fmt
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/jiffies.h>
13 #include <linux/workqueue.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/pci_ids.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <asm/byteorder.h>
20 #include <linux/sched.h>
21 #include "sm_common.h"
25 static bool r852_enable_dma = 1;
26 module_param(r852_enable_dma, bool, S_IRUGO);
27 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
30 module_param(debug, int, S_IRUGO | S_IWUSR);
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
34 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
36 uint8_t reg = readb(dev->mmio + address);
41 static inline void r852_write_reg(struct r852_device *dev,
42 int address, uint8_t value)
44 writeb(value, dev->mmio + address);
48 /* read dword sized register */
49 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
51 uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
55 /* write dword sized register */
56 static inline void r852_write_reg_dword(struct r852_device *dev,
57 int address, uint32_t value)
59 writel(cpu_to_le32(value), dev->mmio + address);
62 /* returns pointer to our private structure */
63 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
65 struct nand_chip *chip = mtd_to_nand(mtd);
66 return nand_get_controller_data(chip);
70 /* check if controller supports dma */
71 static void r852_dma_test(struct r852_device *dev)
73 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
74 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
77 message("Non dma capable device detected, dma disabled");
79 if (!r852_enable_dma) {
80 message("disabling dma on user request");
86 * Enable dma. Enables ether first or second stage of the DMA,
87 * Expects dev->dma_dir and dev->dma_state be set
89 static void r852_dma_enable(struct r852_device *dev)
91 uint8_t dma_reg, dma_irq_reg;
93 /* Set up dma settings */
94 dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
95 dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
98 dma_reg |= R852_DMA_READ;
100 if (dev->dma_state == DMA_INTERNAL) {
101 dma_reg |= R852_DMA_INTERNAL;
102 /* Precaution to make sure HW doesn't write */
103 /* to random kernel memory */
104 r852_write_reg_dword(dev, R852_DMA_ADDR,
105 cpu_to_le32(dev->phys_bounce_buffer));
107 dma_reg |= R852_DMA_MEMORY;
108 r852_write_reg_dword(dev, R852_DMA_ADDR,
109 cpu_to_le32(dev->phys_dma_addr));
112 /* Precaution: make sure write reached the device */
113 r852_read_reg_dword(dev, R852_DMA_ADDR);
115 r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
118 dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
119 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
121 R852_DMA_IRQ_INTERNAL |
123 R852_DMA_IRQ_MEMORY);
127 * Disable dma, called from the interrupt handler, which specifies
128 * success of the operation via 'error' argument
130 static void r852_dma_done(struct r852_device *dev, int error)
132 WARN_ON(dev->dma_stage == 0);
134 r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
135 r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
137 r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
138 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
140 /* Precaution to make sure HW doesn't write to random kernel memory */
141 r852_write_reg_dword(dev, R852_DMA_ADDR,
142 cpu_to_le32(dev->phys_bounce_buffer));
143 r852_read_reg_dword(dev, R852_DMA_ADDR);
145 dev->dma_error = error;
148 if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
149 dma_unmap_single(&dev->pci_dev->dev, dev->phys_dma_addr,
151 dev->dma_dir ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
155 * Wait, till dma is done, which includes both phases of it
157 static int r852_dma_wait(struct r852_device *dev)
159 long timeout = wait_for_completion_timeout(&dev->dma_done,
160 msecs_to_jiffies(1000));
162 dbg("timeout waiting for DMA interrupt");
170 * Read/Write one page using dma. Only pages can be read (512 bytes)
172 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
180 /* Set dma direction */
181 dev->dma_dir = do_read;
183 reinit_completion(&dev->dma_done);
185 dbg_verbose("doing dma %s ", do_read ? "read" : "write");
187 /* Set initial dma state: for reading first fill on board buffer,
188 from device, for writes first fill the buffer from memory*/
189 dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
191 /* if incoming buffer is not page aligned, we should do bounce */
192 if ((unsigned long)buf & (R852_DMA_LEN-1))
196 dev->phys_dma_addr = dma_map_single(&dev->pci_dev->dev, buf,
198 do_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
199 if (dma_mapping_error(&dev->pci_dev->dev, dev->phys_dma_addr))
204 dbg_verbose("dma: using bounce buffer");
205 dev->phys_dma_addr = dev->phys_bounce_buffer;
207 memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
211 spin_lock_irqsave(&dev->irqlock, flags);
212 r852_dma_enable(dev);
213 spin_unlock_irqrestore(&dev->irqlock, flags);
215 /* Wait till complete */
216 error = r852_dma_wait(dev);
219 r852_dma_done(dev, error);
223 if (do_read && bounce)
224 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
228 * Program data lines of the nand chip to send data to it
230 static void r852_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
232 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
235 /* Don't allow any access to hardware if we suspect card removal */
236 if (dev->card_unstable)
239 /* Special case for whole sector read */
240 if (len == R852_DMA_LEN && dev->dma_usable) {
241 r852_do_dma(dev, (uint8_t *)buf, 0);
245 /* write DWORD chinks - faster */
247 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
248 r852_write_reg_dword(dev, R852_DATALINE, reg);
256 r852_write_reg(dev, R852_DATALINE, *buf++);
262 * Read data lines of the nand chip to retrieve data
264 static void r852_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
266 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
269 if (dev->card_unstable) {
270 /* since we can't signal error here, at least, return
271 predictable buffer */
276 /* special case for whole sector read */
277 if (len == R852_DMA_LEN && dev->dma_usable) {
278 r852_do_dma(dev, buf, 1);
282 /* read in dword sized chunks */
285 reg = r852_read_reg_dword(dev, R852_DATALINE);
287 *buf++ = (reg >> 8) & 0xFF;
288 *buf++ = (reg >> 16) & 0xFF;
289 *buf++ = (reg >> 24) & 0xFF;
293 /* read the reset by bytes */
295 *buf++ = r852_read_reg(dev, R852_DATALINE);
299 * Read one byte from nand chip
301 static uint8_t r852_read_byte(struct nand_chip *chip)
303 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
305 /* Same problem as in r852_read_buf.... */
306 if (dev->card_unstable)
309 return r852_read_reg(dev, R852_DATALINE);
313 * Control several chip lines & send commands
315 static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl)
317 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
319 if (dev->card_unstable)
322 if (ctrl & NAND_CTRL_CHANGE) {
324 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
325 R852_CTL_ON | R852_CTL_CARDENABLE);
328 dev->ctlreg |= R852_CTL_DATA;
331 dev->ctlreg |= R852_CTL_COMMAND;
334 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
336 dev->ctlreg &= ~R852_CTL_WRITE;
338 /* when write is stareted, enable write access */
339 if (dat == NAND_CMD_ERASE1)
340 dev->ctlreg |= R852_CTL_WRITE;
342 r852_write_reg(dev, R852_CTL, dev->ctlreg);
345 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
347 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
348 dev->ctlreg |= R852_CTL_WRITE;
349 r852_write_reg(dev, R852_CTL, dev->ctlreg);
352 if (dat != NAND_CMD_NONE)
353 r852_write_reg(dev, R852_DATALINE, dat);
357 * Wait till card is ready.
358 * based on nand_wait, but returns errors on DMA error
360 static int r852_wait(struct nand_chip *chip)
362 struct r852_device *dev = nand_get_controller_data(chip);
364 unsigned long timeout;
367 timeout = jiffies + msecs_to_jiffies(400);
369 while (time_before(jiffies, timeout))
370 if (chip->legacy.dev_ready(chip))
373 nand_status_op(chip, &status);
375 /* Unfortunelly, no way to send detailed error status... */
376 if (dev->dma_error) {
377 status |= NAND_STATUS_FAIL;
384 * Check if card is ready
387 static int r852_ready(struct nand_chip *chip)
389 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
390 return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
395 * Set ECC engine mode
398 static void r852_ecc_hwctl(struct nand_chip *chip, int mode)
400 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
402 if (dev->card_unstable)
408 /* enable ecc generation/check*/
409 dev->ctlreg |= R852_CTL_ECC_ENABLE;
411 /* flush ecc buffer */
412 r852_write_reg(dev, R852_CTL,
413 dev->ctlreg | R852_CTL_ECC_ACCESS);
415 r852_read_reg_dword(dev, R852_DATALINE);
416 r852_write_reg(dev, R852_CTL, dev->ctlreg);
419 case NAND_ECC_READSYN:
420 /* disable ecc generation */
421 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
422 r852_write_reg(dev, R852_CTL, dev->ctlreg);
427 * Calculate ECC, only used for writes
430 static int r852_ecc_calculate(struct nand_chip *chip, const uint8_t *dat,
433 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
434 struct sm_oob *oob = (struct sm_oob *)ecc_code;
437 if (dev->card_unstable)
440 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
441 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
443 ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
444 ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
446 oob->ecc1[0] = (ecc1) & 0xFF;
447 oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
448 oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
450 oob->ecc2[0] = (ecc2) & 0xFF;
451 oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
452 oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
454 r852_write_reg(dev, R852_CTL, dev->ctlreg);
459 * Correct the data using ECC, hw did almost everything for us
462 static int r852_ecc_correct(struct nand_chip *chip, uint8_t *dat,
463 uint8_t *read_ecc, uint8_t *calc_ecc)
466 uint8_t ecc_status, err_byte;
469 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
471 if (dev->card_unstable)
474 if (dev->dma_error) {
479 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
480 ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
481 r852_write_reg(dev, R852_CTL, dev->ctlreg);
483 for (i = 0 ; i <= 1 ; i++) {
485 ecc_status = (ecc_reg >> 8) & 0xFF;
487 /* ecc uncorrectable error */
488 if (ecc_status & R852_ECC_FAIL) {
489 dbg("ecc: unrecoverable error, in half %d", i);
494 /* correctable error */
495 if (ecc_status & R852_ECC_CORRECTABLE) {
497 err_byte = ecc_reg & 0xFF;
498 dbg("ecc: recoverable error, "
499 "in half %d, byte %d, bit %d", i,
500 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
503 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
515 * This is copy of nand_read_oob_std
516 * nand_read_oob_syndrome assumes we can send column address - we can't
518 static int r852_read_oob(struct nand_chip *chip, int page)
520 struct mtd_info *mtd = nand_to_mtd(chip);
522 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
526 * Start the nand engine
529 static void r852_engine_enable(struct r852_device *dev)
531 if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
532 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
533 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
535 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
536 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
539 r852_write_reg(dev, R852_CTL, 0);
544 * Stop the nand engine
547 static void r852_engine_disable(struct r852_device *dev)
549 r852_write_reg_dword(dev, R852_HW, 0);
550 r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
554 * Test if card is present
557 static void r852_card_update_present(struct r852_device *dev)
562 spin_lock_irqsave(&dev->irqlock, flags);
563 reg = r852_read_reg(dev, R852_CARD_STA);
564 dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
565 spin_unlock_irqrestore(&dev->irqlock, flags);
569 * Update card detection IRQ state according to current card state
570 * which is read in r852_card_update_present
572 static void r852_update_card_detect(struct r852_device *dev)
574 int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
575 dev->card_unstable = 0;
577 card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
578 card_detect_reg |= R852_CARD_IRQ_GENABLE;
580 card_detect_reg |= dev->card_detected ?
581 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
583 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
586 static ssize_t r852_media_type_show(struct device *sys_dev,
587 struct device_attribute *attr, char *buf)
589 struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
590 struct r852_device *dev = r852_get_dev(mtd);
591 char *data = dev->sm ? "smartmedia" : "xd";
597 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
600 /* Detect properties of card in slot */
601 static void r852_update_media_status(struct r852_device *dev)
607 spin_lock_irqsave(&dev->irqlock, flags);
608 if (!dev->card_detected) {
609 message("card removed");
610 spin_unlock_irqrestore(&dev->irqlock, flags);
614 readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
615 reg = r852_read_reg(dev, R852_DMA_CAP);
616 dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
618 message("detected %s %s card in slot",
619 dev->sm ? "SmartMedia" : "xD",
620 readonly ? "readonly" : "writeable");
622 dev->readonly = readonly;
623 spin_unlock_irqrestore(&dev->irqlock, flags);
627 * Register the nand device
628 * Called when the card is detected
630 static int r852_register_nand_device(struct r852_device *dev)
632 struct mtd_info *mtd = nand_to_mtd(dev->chip);
634 WARN_ON(dev->card_registered);
636 mtd->dev.parent = &dev->pci_dev->dev;
639 dev->chip->options |= NAND_ROM;
641 r852_engine_enable(dev);
643 if (sm_register_device(mtd, dev->sm))
646 if (device_create_file(&mtd->dev, &dev_attr_media_type)) {
647 message("can't create media type sysfs attribute");
651 dev->card_registered = 1;
654 WARN_ON(mtd_device_unregister(nand_to_mtd(dev->chip)));
655 nand_cleanup(dev->chip);
657 /* Force card redetect */
658 dev->card_detected = 0;
663 * Unregister the card
666 static void r852_unregister_nand_device(struct r852_device *dev)
668 struct mtd_info *mtd = nand_to_mtd(dev->chip);
670 if (!dev->card_registered)
673 device_remove_file(&mtd->dev, &dev_attr_media_type);
674 WARN_ON(mtd_device_unregister(mtd));
675 nand_cleanup(dev->chip);
676 r852_engine_disable(dev);
677 dev->card_registered = 0;
680 /* Card state updater */
681 static void r852_card_detect_work(struct work_struct *work)
683 struct r852_device *dev =
684 container_of(work, struct r852_device, card_detect_work.work);
686 r852_card_update_present(dev);
687 r852_update_card_detect(dev);
688 dev->card_unstable = 0;
691 if (dev->card_detected == dev->card_registered)
694 /* Read media properties */
695 r852_update_media_status(dev);
697 /* Register the card */
698 if (dev->card_detected)
699 r852_register_nand_device(dev);
701 r852_unregister_nand_device(dev);
703 r852_update_card_detect(dev);
706 /* Ack + disable IRQ generation */
707 static void r852_disable_irqs(struct r852_device *dev)
710 reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
711 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
713 reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
714 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
715 reg & ~R852_DMA_IRQ_MASK);
717 r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
718 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
721 /* Interrupt handler */
722 static irqreturn_t r852_irq(int irq, void *data)
724 struct r852_device *dev = (struct r852_device *)data;
726 uint8_t card_status, dma_status;
728 irqreturn_t ret = IRQ_NONE;
730 spin_lock_irqsave(&dev->irqlock, flags);
732 /* handle card detection interrupts first */
733 card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
734 r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
736 if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
739 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
741 /* we shouldn't receive any interrupts if we wait for card
743 WARN_ON(dev->card_unstable);
745 /* disable irqs while card is unstable */
746 /* this will timeout DMA if active, but better that garbage */
747 r852_disable_irqs(dev);
749 if (dev->card_unstable)
752 /* let, card state to settle a bit, and then do the work */
753 dev->card_unstable = 1;
754 queue_delayed_work(dev->card_workqueue,
755 &dev->card_detect_work, msecs_to_jiffies(100));
760 /* Handle dma interrupts */
761 dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
762 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
764 if (dma_status & R852_DMA_IRQ_MASK) {
768 if (dma_status & R852_DMA_IRQ_ERROR) {
769 dbg("received dma error IRQ");
770 r852_dma_done(dev, -EIO);
771 complete(&dev->dma_done);
775 /* received DMA interrupt out of nowhere? */
776 WARN_ON_ONCE(dev->dma_stage == 0);
778 if (dev->dma_stage == 0)
781 /* done device access */
782 if (dev->dma_state == DMA_INTERNAL &&
783 (dma_status & R852_DMA_IRQ_INTERNAL)) {
785 dev->dma_state = DMA_MEMORY;
789 /* done memory DMA */
790 if (dev->dma_state == DMA_MEMORY &&
791 (dma_status & R852_DMA_IRQ_MEMORY)) {
792 dev->dma_state = DMA_INTERNAL;
796 /* Enable 2nd half of dma dance */
797 if (dev->dma_stage == 2)
798 r852_dma_enable(dev);
801 if (dev->dma_stage == 3) {
802 r852_dma_done(dev, 0);
803 complete(&dev->dma_done);
808 /* Handle unknown interrupts */
810 dbg("bad dma IRQ status = %x", dma_status);
812 if (card_status & ~R852_CARD_STA_CD)
813 dbg("strange card status = %x", card_status);
816 spin_unlock_irqrestore(&dev->irqlock, flags);
820 static int r852_attach_chip(struct nand_chip *chip)
822 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
825 chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
826 chip->ecc.size = R852_DMA_LEN;
827 chip->ecc.bytes = SM_OOB_SIZE;
828 chip->ecc.strength = 2;
829 chip->ecc.hwctl = r852_ecc_hwctl;
830 chip->ecc.calculate = r852_ecc_calculate;
831 chip->ecc.correct = r852_ecc_correct;
834 chip->ecc.read_oob = r852_read_oob;
839 static const struct nand_controller_ops r852_ops = {
840 .attach_chip = r852_attach_chip,
843 static int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
846 struct nand_chip *chip;
847 struct r852_device *dev;
849 /* pci initialization */
850 error = pci_enable_device(pci_dev);
855 pci_set_master(pci_dev);
857 error = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
861 error = pci_request_regions(pci_dev, DRV_NAME);
868 /* init nand chip, but register it only on card insert */
869 chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
875 chip->legacy.cmd_ctrl = r852_cmdctl;
876 chip->legacy.waitfunc = r852_wait;
877 chip->legacy.dev_ready = r852_ready;
880 chip->legacy.read_byte = r852_read_byte;
881 chip->legacy.read_buf = r852_read_buf;
882 chip->legacy.write_buf = r852_write_buf;
884 /* init our device structure */
885 dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
890 nand_set_controller_data(chip, dev);
892 dev->pci_dev = pci_dev;
893 pci_set_drvdata(pci_dev, dev);
895 nand_controller_init(&dev->controller);
896 dev->controller.ops = &r852_ops;
897 chip->controller = &dev->controller;
899 dev->bounce_buffer = dma_alloc_coherent(&pci_dev->dev, R852_DMA_LEN,
900 &dev->phys_bounce_buffer, GFP_KERNEL);
902 if (!dev->bounce_buffer)
907 dev->mmio = pci_ioremap_bar(pci_dev, 0);
913 dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
915 if (!dev->tmp_buffer)
918 init_completion(&dev->dma_done);
920 dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
922 if (!dev->card_workqueue)
925 INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
927 /* shutdown everything - precation */
928 r852_engine_disable(dev);
929 r852_disable_irqs(dev);
933 dev->irq = pci_dev->irq;
934 spin_lock_init(&dev->irqlock);
936 dev->card_detected = 0;
937 r852_card_update_present(dev);
939 /*register irq handler*/
941 if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
945 /* kick initial present test */
946 queue_delayed_work(dev->card_workqueue,
947 &dev->card_detect_work, 0);
950 pr_notice("driver loaded successfully\n");
954 destroy_workqueue(dev->card_workqueue);
956 kfree(dev->tmp_buffer);
958 pci_iounmap(pci_dev, dev->mmio);
960 dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
961 dev->phys_bounce_buffer);
967 pci_release_regions(pci_dev);
970 pci_disable_device(pci_dev);
975 static void r852_remove(struct pci_dev *pci_dev)
977 struct r852_device *dev = pci_get_drvdata(pci_dev);
979 /* Stop detect workqueue -
980 we are going to unregister the device anyway*/
981 cancel_delayed_work_sync(&dev->card_detect_work);
982 destroy_workqueue(dev->card_workqueue);
984 /* Unregister the device, this might make more IO */
985 r852_unregister_nand_device(dev);
987 /* Stop interrupts */
988 r852_disable_irqs(dev);
989 free_irq(dev->irq, dev);
992 kfree(dev->tmp_buffer);
993 pci_iounmap(pci_dev, dev->mmio);
994 dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
995 dev->phys_bounce_buffer);
1000 /* Shutdown the PCI device */
1001 pci_release_regions(pci_dev);
1002 pci_disable_device(pci_dev);
1005 static void r852_shutdown(struct pci_dev *pci_dev)
1007 struct r852_device *dev = pci_get_drvdata(pci_dev);
1009 cancel_delayed_work_sync(&dev->card_detect_work);
1010 r852_disable_irqs(dev);
1011 synchronize_irq(dev->irq);
1012 pci_disable_device(pci_dev);
1015 #ifdef CONFIG_PM_SLEEP
1016 static int r852_suspend(struct device *device)
1018 struct r852_device *dev = dev_get_drvdata(device);
1020 if (dev->ctlreg & R852_CTL_CARDENABLE)
1023 /* First make sure the detect work is gone */
1024 cancel_delayed_work_sync(&dev->card_detect_work);
1026 /* Turn off the interrupts and stop the device */
1027 r852_disable_irqs(dev);
1028 r852_engine_disable(dev);
1030 /* If card was pulled off just during the suspend, which is very
1031 unlikely, we will remove it on resume, it too late now
1033 dev->card_unstable = 0;
1037 static int r852_resume(struct device *device)
1039 struct r852_device *dev = dev_get_drvdata(device);
1041 r852_disable_irqs(dev);
1042 r852_card_update_present(dev);
1043 r852_engine_disable(dev);
1046 /* If card status changed, just do the work */
1047 if (dev->card_detected != dev->card_registered) {
1048 dbg("card was %s during low power state",
1049 dev->card_detected ? "added" : "removed");
1051 queue_delayed_work(dev->card_workqueue,
1052 &dev->card_detect_work, msecs_to_jiffies(1000));
1056 /* Otherwise, initialize the card */
1057 if (dev->card_registered) {
1058 r852_engine_enable(dev);
1059 nand_select_target(dev->chip, 0);
1060 nand_reset_op(dev->chip);
1061 nand_deselect_target(dev->chip);
1064 /* Program card detection IRQ */
1065 r852_update_card_detect(dev);
1070 static const struct pci_device_id r852_pci_id_tbl[] = {
1072 { PCI_VDEVICE(RICOH, 0x0852), },
1076 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1078 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1080 static struct pci_driver r852_pci_driver = {
1082 .id_table = r852_pci_id_tbl,
1083 .probe = r852_probe,
1084 .remove = r852_remove,
1085 .shutdown = r852_shutdown,
1086 .driver.pm = &r852_pm_ops,
1089 module_pci_driver(r852_pci_driver);
1091 MODULE_LICENSE("GPL");
1092 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1093 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");