GNU Linux-libre 5.10.215-gnu1
[releases.git] / drivers / mtd / nand / raw / pasemi_nand.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2006-2007 PA Semi, Inc
4  *
5  * Author: Egor Martovetsky <egor@pasemi.com>
6  * Maintained by: Olof Johansson <olof@lixom.net>
7  *
8  * Driver for the PWRficient onchip NAND flash interface
9  */
10
11 #undef DEBUG
12
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/rawnand.h>
17 #include <linux/mtd/nand_ecc.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/pci.h>
23
24 #include <asm/io.h>
25
26 #define LBICTRL_LPCCTL_NR               0x00004000
27 #define CLE_PIN_CTL                     15
28 #define ALE_PIN_CTL                     14
29
30 static unsigned int lpcctl;
31 static struct mtd_info *pasemi_nand_mtd;
32 static struct nand_controller controller;
33 static const char driver_name[] = "pasemi-nand";
34
35 static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
36 {
37         while (len > 0x800) {
38                 memcpy_fromio(buf, chip->legacy.IO_ADDR_R, 0x800);
39                 buf += 0x800;
40                 len -= 0x800;
41         }
42         memcpy_fromio(buf, chip->legacy.IO_ADDR_R, len);
43 }
44
45 static void pasemi_write_buf(struct nand_chip *chip, const u_char *buf,
46                              int len)
47 {
48         while (len > 0x800) {
49                 memcpy_toio(chip->legacy.IO_ADDR_R, buf, 0x800);
50                 buf += 0x800;
51                 len -= 0x800;
52         }
53         memcpy_toio(chip->legacy.IO_ADDR_R, buf, len);
54 }
55
56 static void pasemi_hwcontrol(struct nand_chip *chip, int cmd,
57                              unsigned int ctrl)
58 {
59         if (cmd == NAND_CMD_NONE)
60                 return;
61
62         if (ctrl & NAND_CLE)
63                 out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
64         else
65                 out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
66
67         /* Push out posted writes */
68         eieio();
69         inl(lpcctl);
70 }
71
72 static int pasemi_device_ready(struct nand_chip *chip)
73 {
74         return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
75 }
76
77 static int pasemi_attach_chip(struct nand_chip *chip)
78 {
79         if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
80             chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
81                 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
82
83         return 0;
84 }
85
86 static const struct nand_controller_ops pasemi_ops = {
87         .attach_chip = pasemi_attach_chip,
88 };
89
90 static int pasemi_nand_probe(struct platform_device *ofdev)
91 {
92         struct device *dev = &ofdev->dev;
93         struct pci_dev *pdev;
94         struct device_node *np = dev->of_node;
95         struct resource res;
96         struct nand_chip *chip;
97         int err = 0;
98
99         err = of_address_to_resource(np, 0, &res);
100
101         if (err)
102                 return -EINVAL;
103
104         /* We only support one device at the moment */
105         if (pasemi_nand_mtd)
106                 return -ENODEV;
107
108         dev_dbg(dev, "pasemi_nand at %pR\n", &res);
109
110         /* Allocate memory for MTD device structure and private data */
111         chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
112         if (!chip) {
113                 err = -ENOMEM;
114                 goto out;
115         }
116
117         controller.ops = &pasemi_ops;
118         nand_controller_init(&controller);
119         chip->controller = &controller;
120
121         pasemi_nand_mtd = nand_to_mtd(chip);
122
123         /* Link the private data with the MTD structure */
124         pasemi_nand_mtd->dev.parent = dev;
125
126         chip->legacy.IO_ADDR_R = of_iomap(np, 0);
127         chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
128
129         if (!chip->legacy.IO_ADDR_R) {
130                 err = -EIO;
131                 goto out_mtd;
132         }
133
134         pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
135         if (!pdev) {
136                 err = -ENODEV;
137                 goto out_ior;
138         }
139
140         lpcctl = pci_resource_start(pdev, 0);
141         pci_dev_put(pdev);
142
143         if (!request_region(lpcctl, 4, driver_name)) {
144                 err = -EBUSY;
145                 goto out_ior;
146         }
147
148         chip->legacy.cmd_ctrl = pasemi_hwcontrol;
149         chip->legacy.dev_ready = pasemi_device_ready;
150         chip->legacy.read_buf = pasemi_read_buf;
151         chip->legacy.write_buf = pasemi_write_buf;
152         chip->legacy.chip_delay = 0;
153
154         /* Enable the following for a flash based bad block table */
155         chip->bbt_options = NAND_BBT_USE_FLASH;
156
157         /*
158          * This driver assumes that the default ECC engine should be TYPE_SOFT.
159          * Set ->engine_type before registering the NAND devices in order to
160          * provide a driver specific default value.
161          */
162         chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
163
164         /* Scan to find existence of the device */
165         err = nand_scan(chip, 1);
166         if (err)
167                 goto out_lpc;
168
169         if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
170                 dev_err(dev, "Unable to register MTD device\n");
171                 err = -ENODEV;
172                 goto out_cleanup_nand;
173         }
174
175         dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
176                  lpcctl);
177
178         return 0;
179
180  out_cleanup_nand:
181         nand_cleanup(chip);
182  out_lpc:
183         release_region(lpcctl, 4);
184  out_ior:
185         iounmap(chip->legacy.IO_ADDR_R);
186  out_mtd:
187         kfree(chip);
188  out:
189         return err;
190 }
191
192 static int pasemi_nand_remove(struct platform_device *ofdev)
193 {
194         struct nand_chip *chip;
195         int ret;
196
197         if (!pasemi_nand_mtd)
198                 return 0;
199
200         chip = mtd_to_nand(pasemi_nand_mtd);
201
202         /* Release resources, unregister device */
203         ret = mtd_device_unregister(pasemi_nand_mtd);
204         WARN_ON(ret);
205         nand_cleanup(chip);
206
207         release_region(lpcctl, 4);
208
209         iounmap(chip->legacy.IO_ADDR_R);
210
211         /* Free the MTD device structure */
212         kfree(chip);
213
214         pasemi_nand_mtd = NULL;
215
216         return 0;
217 }
218
219 static const struct of_device_id pasemi_nand_match[] =
220 {
221         {
222                 .compatible   = "pasemi,localbus-nand",
223         },
224         {},
225 };
226
227 MODULE_DEVICE_TABLE(of, pasemi_nand_match);
228
229 static struct platform_driver pasemi_nand_driver =
230 {
231         .driver = {
232                 .name = driver_name,
233                 .of_match_table = pasemi_nand_match,
234         },
235         .probe          = pasemi_nand_probe,
236         .remove         = pasemi_nand_remove,
237 };
238
239 module_platform_driver(pasemi_nand_driver);
240
241 MODULE_LICENSE("GPL");
242 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
243 MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");