1 // SPDX-License-Identifier: GPL-2.0
3 * NAND Flash Controller Device Driver
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
7 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
15 #define DENALI_NAND_NAME "denali-nand-pci"
17 #define INTEL_CE4100 1
20 /* List of platforms this NAND controller has be integrated into */
21 static const struct pci_device_id denali_pci_ids[] = {
22 { PCI_VDEVICE(INTEL, 0x0701), INTEL_CE4100 },
23 { PCI_VDEVICE(INTEL, 0x0809), INTEL_MRST },
24 { /* end: all zeroes */ }
26 MODULE_DEVICE_TABLE(pci, denali_pci_ids);
28 NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15);
30 static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
32 resource_size_t csr_base, mem_base;
33 unsigned long csr_len, mem_len;
34 struct denali_controller *denali;
35 struct denali_chip *dchip;
38 denali = devm_kzalloc(&dev->dev, sizeof(*denali), GFP_KERNEL);
42 ret = pcim_enable_device(dev);
44 dev_err(&dev->dev, "Spectra: pci_enable_device failed.\n");
48 if (id->driver_data == INTEL_CE4100) {
49 mem_base = pci_resource_start(dev, 0);
50 mem_len = pci_resource_len(dev, 1);
51 csr_base = pci_resource_start(dev, 1);
52 csr_len = pci_resource_len(dev, 1);
54 csr_base = pci_resource_start(dev, 0);
55 csr_len = pci_resource_len(dev, 0);
56 mem_base = pci_resource_start(dev, 1);
57 mem_len = pci_resource_len(dev, 1);
59 mem_base = csr_base + csr_len;
65 denali->dev = &dev->dev;
66 denali->irq = dev->irq;
67 denali->ecc_caps = &denali_pci_ecc_caps;
68 denali->clk_rate = 50000000; /* 50 MHz */
69 denali->clk_x_rate = 200000000; /* 200 MHz */
71 ret = pci_request_regions(dev, DENALI_NAND_NAME);
73 dev_err(&dev->dev, "Spectra: Unable to request memory regions\n");
77 denali->reg = devm_ioremap(denali->dev, csr_base, csr_len);
79 dev_err(&dev->dev, "Spectra: Unable to remap memory region\n");
83 denali->host = devm_ioremap(denali->dev, mem_base, mem_len);
85 dev_err(&dev->dev, "Spectra: ioremap failed!");
89 ret = denali_init(denali);
93 nsels = denali->nbanks;
95 dchip = devm_kzalloc(denali->dev, struct_size(dchip, sels, nsels),
99 goto out_remove_denali;
102 dchip->chip.base.ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH;
104 dchip->nsels = nsels;
106 for (i = 0; i < nsels; i++)
107 dchip->sels[i].bank = i;
109 ret = denali_chip_init(denali, dchip);
111 goto out_remove_denali;
113 pci_set_drvdata(dev, denali);
118 denali_remove(denali);
122 static void denali_pci_remove(struct pci_dev *dev)
124 struct denali_controller *denali = pci_get_drvdata(dev);
126 denali_remove(denali);
129 static struct pci_driver denali_pci_driver = {
130 .name = DENALI_NAND_NAME,
131 .id_table = denali_pci_ids,
132 .probe = denali_pci_probe,
133 .remove = denali_pci_remove,
135 module_pci_driver(denali_pci_driver);
137 MODULE_DESCRIPTION("PCI driver for Denali NAND controller");
138 MODULE_AUTHOR("Intel Corporation and its suppliers");
139 MODULE_LICENSE("GPL v2");