2 * Driver for the MMC / SD / SDIO IP found in:
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
9 * Copyright (C) 2011 Guennadi Liakhovetski
10 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * This driver draws mainly on scattered spec sheets, Reverse engineering
18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
19 * support). (Further 4 bit support from a later datasheet).
22 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/card.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/slot-gpio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/sizes.h>
50 #include <linux/spinlock.h>
51 #include <linux/swiotlb.h>
52 #include <linux/workqueue.h>
56 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
57 struct mmc_data *data)
60 host->dma_ops->start(host, data);
63 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
66 host->dma_ops->enable(host, enable);
69 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
70 struct tmio_mmc_data *pdata)
73 host->dma_ops->request(host, pdata);
80 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
83 host->dma_ops->release(host);
86 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
89 host->dma_ops->abort(host);
92 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
95 host->dma_ops->dataend(host);
98 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
100 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
101 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
103 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
105 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
107 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
108 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
110 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
112 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
114 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
117 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
119 host->sg_len = data->sg_len;
120 host->sg_ptr = data->sg;
121 host->sg_orig = data->sg;
125 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
127 host->sg_ptr = sg_next(host->sg_ptr);
129 return --host->sg_len;
132 #define CMDREQ_TIMEOUT 5000
134 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
136 struct tmio_mmc_host *host = mmc_priv(mmc);
138 if (enable && !host->sdio_irq_enabled) {
141 /* Keep device active while SDIO irq is enabled */
142 pm_runtime_get_sync(mmc_dev(mmc));
144 host->sdio_irq_enabled = true;
145 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
147 /* Clear obsolete interrupts before enabling */
148 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
149 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
150 sdio_status |= TMIO_SDIO_SETBITS_MASK;
151 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
153 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
154 } else if (!enable && host->sdio_irq_enabled) {
155 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
158 host->sdio_irq_enabled = false;
159 pm_runtime_mark_last_busy(mmc_dev(mmc));
160 pm_runtime_put_autosuspend(mmc_dev(mmc));
164 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
166 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
167 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
169 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
170 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
173 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
174 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
179 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
181 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
182 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
186 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
187 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
189 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
190 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
194 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
195 unsigned int new_clock)
199 if (new_clock == 0) {
200 tmio_mmc_clk_stop(host);
204 if (host->clk_update)
205 clock = host->clk_update(host, new_clock) / 512;
207 clock = host->mmc->f_min;
209 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
212 /* 1/1 clock is option */
213 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
216 if (host->set_clk_div)
217 host->set_clk_div(host->pdev, (clk >> 22) & 1);
219 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
220 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
221 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
222 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
225 tmio_mmc_clk_start(host);
228 static void tmio_mmc_reset(struct tmio_mmc_host *host)
230 /* FIXME - should we set stop clock reg here */
231 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
232 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
233 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
235 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
236 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
237 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
240 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
241 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
242 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
247 static void tmio_mmc_reset_work(struct work_struct *work)
249 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
250 delayed_reset_work.work);
251 struct mmc_request *mrq;
254 spin_lock_irqsave(&host->lock, flags);
258 * is request already finished? Since we use a non-blocking
259 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
260 * us, so, have to check for IS_ERR(host->mrq)
262 if (IS_ERR_OR_NULL(mrq) ||
263 time_is_after_jiffies(host->last_req_ts +
264 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
265 spin_unlock_irqrestore(&host->lock, flags);
269 dev_warn(&host->pdev->dev,
270 "timeout waiting for hardware interrupt (CMD%u)\n",
274 host->data->error = -ETIMEDOUT;
276 host->cmd->error = -ETIMEDOUT;
278 mrq->cmd->error = -ETIMEDOUT;
282 host->force_pio = false;
284 spin_unlock_irqrestore(&host->lock, flags);
286 tmio_mmc_reset(host);
288 /* Ready for new calls */
291 tmio_mmc_abort_dma(host);
292 mmc_request_done(host->mmc, mrq);
295 /* These are the bitmasks the tmio chip requires to implement the MMC response
296 * types. Note that R1 and R6 are the same in this scheme. */
297 #define APP_CMD 0x0040
298 #define RESP_NONE 0x0300
299 #define RESP_R1 0x0400
300 #define RESP_R1B 0x0500
301 #define RESP_R2 0x0600
302 #define RESP_R3 0x0700
303 #define DATA_PRESENT 0x0800
304 #define TRANSFER_READ 0x1000
305 #define TRANSFER_MULTI 0x2000
306 #define SECURITY_CMD 0x4000
307 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
309 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
310 struct mmc_command *cmd)
312 struct mmc_data *data = host->data;
314 u32 irq_mask = TMIO_MASK_CMD;
316 switch (mmc_resp_type(cmd)) {
317 case MMC_RSP_NONE: c |= RESP_NONE; break;
319 case MMC_RSP_R1_NO_CRC:
321 case MMC_RSP_R1B: c |= RESP_R1B; break;
322 case MMC_RSP_R2: c |= RESP_R2; break;
323 case MMC_RSP_R3: c |= RESP_R3; break;
325 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
331 /* FIXME - this seems to be ok commented out but the spec suggest this bit
332 * should be set when issuing app commands.
333 * if(cmd->flags & MMC_FLAG_ACMD)
338 if (data->blocks > 1) {
339 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
343 * Disable auto CMD12 at IO_RW_EXTENDED and
344 * SET_BLOCK_COUNT when doing multiple block transfer
346 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
347 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
350 if (data->flags & MMC_DATA_READ)
354 if (!host->native_hotplug)
355 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
356 tmio_mmc_enable_mmc_irqs(host, irq_mask);
358 /* Fire off the command */
359 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
360 sd_ctrl_write16(host, CTL_SD_CMD, c);
365 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
369 int is_read = host->data->flags & MMC_DATA_READ;
375 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
377 u32 *buf32 = (u32 *)buf;
380 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
383 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
386 /* if count was multiple of 4 */
394 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
395 memcpy(buf32, &data, count);
397 memcpy(&data, buf32, count);
398 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
405 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
407 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
409 /* if count was even number */
413 /* if count was odd number */
414 buf8 = (u8 *)(buf + (count >> 1));
419 * driver and this function are assuming that
420 * it is used as little endian
423 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
425 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
429 * This chip always returns (at least?) as much data as you ask for.
430 * I'm unsure what happens if you ask for less than a block. This should be
431 * looked into to ensure that a funny length read doesn't hose the controller.
433 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
435 struct mmc_data *data = host->data;
441 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
442 pr_err("PIO IRQ in DMA mode!\n");
445 pr_debug("Spurious PIO IRQ\n");
449 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
450 buf = (unsigned short *)(sg_virt + host->sg_off);
452 count = host->sg_ptr->length - host->sg_off;
453 if (count > data->blksz)
456 pr_debug("count: %08x offset: %08x flags %08x\n",
457 count, host->sg_off, data->flags);
459 /* Transfer the data */
460 tmio_mmc_transfer_data(host, buf, count);
462 host->sg_off += count;
464 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
466 if (host->sg_off == host->sg_ptr->length)
467 tmio_mmc_next_sg(host);
470 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
472 if (host->sg_ptr == &host->bounce_sg) {
474 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
476 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
477 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
481 /* needs to be called with host->lock held */
482 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
484 struct mmc_data *data = host->data;
485 struct mmc_command *stop;
490 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
495 /* FIXME - return correct transfer count on errors */
497 data->bytes_xfered = data->blocks * data->blksz;
499 data->bytes_xfered = 0;
501 pr_debug("Completed data request\n");
504 * FIXME: other drivers allow an optional stop command of any given type
505 * which we dont do, as the chip can auto generate them.
506 * Perhaps we can be smarter about when to use auto CMD12 and
507 * only issue the auto request when we know this is the desired
508 * stop command, allowing fallback to the stop command the
509 * upper layers expect. For now, we do what works.
512 if (data->flags & MMC_DATA_READ) {
513 if (host->chan_rx && !host->force_pio)
514 tmio_mmc_check_bounce_buffer(host);
515 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
518 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
522 if (stop && !host->mrq->sbc) {
523 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
524 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
525 stop->opcode, stop->arg);
527 /* fill in response from auto CMD12 */
528 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
530 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
533 schedule_work(&host->done);
535 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
537 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
539 struct mmc_data *data;
541 spin_lock(&host->lock);
547 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
548 stat & TMIO_STAT_TXUNDERRUN)
549 data->error = -EILSEQ;
550 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
551 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
555 * Has all data been written out yet? Testing on SuperH showed,
556 * that in most cases the first interrupt comes already with the
557 * BUSY status bit clear, but on some operations, like mount or
558 * in the beginning of a write / sync / umount, there is one
559 * DATAEND interrupt with the BUSY bit set, in this cases
560 * waiting for one more interrupt fixes the problem.
562 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
563 if (status & TMIO_STAT_SCLKDIVEN)
566 if (!(status & TMIO_STAT_CMD_BUSY))
571 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
572 tmio_mmc_dataend_dma(host);
574 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
575 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
576 tmio_mmc_dataend_dma(host);
578 tmio_mmc_do_data_irq(host);
579 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
582 spin_unlock(&host->lock);
585 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
587 struct mmc_command *cmd = host->cmd;
590 spin_lock(&host->lock);
593 pr_debug("Spurious CMD irq\n");
597 /* This controller is sicker than the PXA one. Not only do we need to
598 * drop the top 8 bits of the first response word, we also need to
599 * modify the order of the response for short response command types.
602 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
603 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
605 if (cmd->flags & MMC_RSP_136) {
606 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
607 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
608 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
610 } else if (cmd->flags & MMC_RSP_R3) {
611 cmd->resp[0] = cmd->resp[3];
614 if (stat & TMIO_STAT_CMDTIMEOUT)
615 cmd->error = -ETIMEDOUT;
616 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
617 stat & TMIO_STAT_STOPBIT_ERR ||
618 stat & TMIO_STAT_CMD_IDX_ERR)
619 cmd->error = -EILSEQ;
621 /* If there is data to handle we enable data IRQs here, and
622 * we will ultimatley finish the request in the data_end handler.
623 * If theres no data or we encountered an error, finish now.
625 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
626 if (host->data->flags & MMC_DATA_READ) {
627 if (host->force_pio || !host->chan_rx)
628 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
630 tasklet_schedule(&host->dma_issue);
632 if (host->force_pio || !host->chan_tx)
633 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
635 tasklet_schedule(&host->dma_issue);
638 schedule_work(&host->done);
642 spin_unlock(&host->lock);
645 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
646 int ireg, int status)
648 struct mmc_host *mmc = host->mmc;
650 /* Card insert / remove attempts */
651 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
652 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
653 TMIO_STAT_CARD_REMOVE);
654 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
655 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
656 !work_pending(&mmc->detect.work))
657 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
664 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
667 /* Command completion */
668 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
669 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
670 TMIO_STAT_CMDTIMEOUT);
671 tmio_mmc_cmd_irq(host, status);
676 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
677 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
678 tmio_mmc_pio_irq(host);
682 /* Data transfer completion */
683 if (ireg & TMIO_STAT_DATAEND) {
684 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
685 tmio_mmc_data_irq(host, status);
692 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
694 struct mmc_host *mmc = host->mmc;
695 struct tmio_mmc_data *pdata = host->pdata;
696 unsigned int ireg, status;
697 unsigned int sdio_status;
699 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
702 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
703 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
705 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
706 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
707 sdio_status |= TMIO_SDIO_SETBITS_MASK;
709 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
711 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
712 mmc_signal_sdio_irq(mmc);
717 irqreturn_t tmio_mmc_irq(int irq, void *devid)
719 struct tmio_mmc_host *host = devid;
720 unsigned int ireg, status;
722 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
723 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
725 /* Clear the status except the interrupt status */
726 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
728 if (__tmio_mmc_card_detect_irq(host, ireg, status))
730 if (__tmio_mmc_sdcard_irq(host, ireg, status))
733 if (__tmio_mmc_sdio_irq(host))
738 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
740 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
741 struct mmc_data *data)
743 struct tmio_mmc_data *pdata = host->pdata;
745 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
746 data->blksz, data->blocks);
748 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
749 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
750 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
751 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
753 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
754 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
755 mmc_hostname(host->mmc), data->blksz);
760 tmio_mmc_init_sg(host, data);
763 /* Set transfer length / blocksize */
764 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
765 if (host->mmc->max_blk_count >= SZ_64K)
766 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
768 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
770 tmio_mmc_start_dma(host, data);
775 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
777 struct tmio_mmc_host *host = mmc_priv(mmc);
780 host->hw_reset(host);
783 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
785 struct tmio_mmc_host *host = mmc_priv(mmc);
788 if (!host->init_tuning || !host->select_tuning)
789 /* Tuning is not supported */
792 host->tap_num = host->init_tuning(host);
794 /* Tuning is not supported */
797 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
798 dev_warn_once(&host->pdev->dev,
799 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
803 bitmap_zero(host->taps, host->tap_num * 2);
805 /* Issue CMD19 twice for each tap */
806 for (i = 0; i < 2 * host->tap_num; i++) {
807 if (host->prepare_tuning)
808 host->prepare_tuning(host, i % host->tap_num);
810 ret = mmc_send_tuning(mmc, opcode, NULL);
811 if (ret && ret != -EILSEQ)
814 set_bit(i, host->taps);
819 ret = host->select_tuning(host);
823 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
824 tmio_mmc_hw_reset(mmc);
830 static void tmio_process_mrq(struct tmio_mmc_host *host,
831 struct mmc_request *mrq)
833 struct mmc_command *cmd;
836 if (mrq->sbc && host->cmd != mrq->sbc) {
841 ret = tmio_mmc_start_data(host, mrq->data);
847 ret = tmio_mmc_start_command(host, cmd);
851 schedule_delayed_work(&host->delayed_reset_work,
852 msecs_to_jiffies(CMDREQ_TIMEOUT));
856 host->force_pio = false;
858 mrq->cmd->error = ret;
859 mmc_request_done(host->mmc, mrq);
862 /* Process requests from the MMC layer */
863 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
865 struct tmio_mmc_host *host = mmc_priv(mmc);
868 spin_lock_irqsave(&host->lock, flags);
871 pr_debug("request not null\n");
872 if (IS_ERR(host->mrq)) {
873 spin_unlock_irqrestore(&host->lock, flags);
874 mrq->cmd->error = -EAGAIN;
875 mmc_request_done(mmc, mrq);
880 host->last_req_ts = jiffies;
884 spin_unlock_irqrestore(&host->lock, flags);
886 tmio_process_mrq(host, mrq);
889 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
891 struct mmc_request *mrq;
894 spin_lock_irqsave(&host->lock, flags);
897 if (IS_ERR_OR_NULL(mrq)) {
898 spin_unlock_irqrestore(&host->lock, flags);
902 /* If not SET_BLOCK_COUNT, clear old data */
903 if (host->cmd != mrq->sbc) {
906 host->force_pio = false;
910 cancel_delayed_work(&host->delayed_reset_work);
912 spin_unlock_irqrestore(&host->lock, flags);
914 if (mrq->cmd->error || (mrq->data && mrq->data->error))
915 tmio_mmc_abort_dma(host);
917 /* SCC error means retune, but executed command was still successful */
918 if (host->check_scc_error && host->check_scc_error(host))
919 mmc_retune_needed(host->mmc);
921 /* If SET_BLOCK_COUNT, continue with main command */
922 if (host->mrq && !mrq->cmd->error) {
923 tmio_process_mrq(host, mrq);
927 mmc_request_done(host->mmc, mrq);
930 static void tmio_mmc_done_work(struct work_struct *work)
932 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
934 tmio_mmc_finish_request(host);
937 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
939 if (!host->clk_enable)
942 return host->clk_enable(host);
945 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
947 if (host->clk_disable)
948 host->clk_disable(host);
951 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
953 struct mmc_host *mmc = host->mmc;
956 /* .set_ios() is returning void, so, no chance to report an error */
959 host->set_pwr(host->pdev, 1);
961 if (!IS_ERR(mmc->supply.vmmc)) {
962 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
964 * Attention: empiric value. With a b43 WiFi SDIO card this
965 * delay proved necessary for reliable card-insertion probing.
966 * 100us were not enough. Is this the same 140us delay, as in
967 * tmio_mmc_set_ios()?
972 * It seems, VccQ should be switched on after Vcc, this is also what the
973 * omap_hsmmc.c driver does.
975 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
976 ret = regulator_enable(mmc->supply.vqmmc);
981 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
985 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
987 struct mmc_host *mmc = host->mmc;
989 if (!IS_ERR(mmc->supply.vqmmc))
990 regulator_disable(mmc->supply.vqmmc);
992 if (!IS_ERR(mmc->supply.vmmc))
993 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
996 host->set_pwr(host->pdev, 0);
999 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
1000 unsigned char bus_width)
1002 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
1003 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
1005 /* reg now applies to MMC_BUS_WIDTH_4 */
1006 if (bus_width == MMC_BUS_WIDTH_1)
1007 reg |= CARD_OPT_WIDTH;
1008 else if (bus_width == MMC_BUS_WIDTH_8)
1009 reg |= CARD_OPT_WIDTH8;
1011 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
1014 /* Set MMC clock / power.
1015 * Note: This controller uses a simple divider scheme therefore it cannot
1016 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
1017 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
1020 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1022 struct tmio_mmc_host *host = mmc_priv(mmc);
1023 struct device *dev = &host->pdev->dev;
1024 unsigned long flags;
1026 mutex_lock(&host->ios_lock);
1028 spin_lock_irqsave(&host->lock, flags);
1030 if (IS_ERR(host->mrq)) {
1032 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1033 current->comm, task_pid_nr(current),
1034 ios->clock, ios->power_mode);
1035 host->mrq = ERR_PTR(-EINTR);
1038 "%s.%d: CMD%u active since %lu, now %lu!\n",
1039 current->comm, task_pid_nr(current),
1040 host->mrq->cmd->opcode, host->last_req_ts,
1043 spin_unlock_irqrestore(&host->lock, flags);
1045 mutex_unlock(&host->ios_lock);
1049 host->mrq = ERR_PTR(-EBUSY);
1051 spin_unlock_irqrestore(&host->lock, flags);
1053 switch (ios->power_mode) {
1055 tmio_mmc_power_off(host);
1056 tmio_mmc_clk_stop(host);
1059 tmio_mmc_power_on(host, ios->vdd);
1060 tmio_mmc_set_clock(host, ios->clock);
1061 tmio_mmc_set_bus_width(host, ios->bus_width);
1064 tmio_mmc_set_clock(host, ios->clock);
1065 tmio_mmc_set_bus_width(host, ios->bus_width);
1069 /* Let things settle. delay taken from winCE driver */
1071 if (PTR_ERR(host->mrq) == -EINTR)
1072 dev_dbg(&host->pdev->dev,
1073 "%s.%d: IOS interrupted: clk %u, mode %u",
1074 current->comm, task_pid_nr(current),
1075 ios->clock, ios->power_mode);
1078 host->clk_cache = ios->clock;
1080 mutex_unlock(&host->ios_lock);
1083 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1085 struct tmio_mmc_host *host = mmc_priv(mmc);
1086 struct tmio_mmc_data *pdata = host->pdata;
1087 int ret = mmc_gpio_get_ro(mmc);
1092 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1093 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1098 static int tmio_multi_io_quirk(struct mmc_card *card,
1099 unsigned int direction, int blk_size)
1101 struct tmio_mmc_host *host = mmc_priv(card->host);
1103 if (host->multi_io_quirk)
1104 return host->multi_io_quirk(card, direction, blk_size);
1109 static struct mmc_host_ops tmio_mmc_ops = {
1110 .request = tmio_mmc_request,
1111 .set_ios = tmio_mmc_set_ios,
1112 .get_ro = tmio_mmc_get_ro,
1113 .get_cd = mmc_gpio_get_cd,
1114 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1115 .multi_io_quirk = tmio_multi_io_quirk,
1116 .hw_reset = tmio_mmc_hw_reset,
1117 .execute_tuning = tmio_mmc_execute_tuning,
1120 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1122 struct tmio_mmc_data *pdata = host->pdata;
1123 struct mmc_host *mmc = host->mmc;
1126 err = mmc_regulator_get_supply(mmc);
1130 /* use ocr_mask if no regulator */
1131 if (!mmc->ocr_avail)
1132 mmc->ocr_avail = pdata->ocr_mask;
1136 * There is possibility that regulator has not been probed
1138 if (!mmc->ocr_avail)
1139 return -EPROBE_DEFER;
1144 static void tmio_mmc_of_parse(struct platform_device *pdev,
1145 struct tmio_mmc_data *pdata)
1147 const struct device_node *np = pdev->dev.of_node;
1152 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1153 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1156 struct tmio_mmc_host*
1157 tmio_mmc_host_alloc(struct platform_device *pdev)
1159 struct tmio_mmc_host *host;
1160 struct mmc_host *mmc;
1162 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1166 host = mmc_priv(mmc);
1172 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1174 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1176 mmc_free_host(host->mmc);
1178 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1180 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1181 struct tmio_mmc_data *pdata,
1182 const struct tmio_mmc_dma_ops *dma_ops)
1184 struct platform_device *pdev = _host->pdev;
1185 struct mmc_host *mmc = _host->mmc;
1186 struct resource *res_ctl;
1188 u32 irq_mask = TMIO_MASK_CMD;
1190 tmio_mmc_of_parse(pdev, pdata);
1192 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1193 _host->write16_hook = NULL;
1195 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1199 ret = mmc_of_parse(mmc);
1203 _host->pdata = pdata;
1204 platform_set_drvdata(pdev, mmc);
1206 _host->set_pwr = pdata->set_pwr;
1207 _host->set_clk_div = pdata->set_clk_div;
1209 ret = tmio_mmc_init_ocr(_host);
1213 _host->ctl = devm_ioremap(&pdev->dev,
1214 res_ctl->start, resource_size(res_ctl));
1218 tmio_mmc_ops.card_busy = _host->card_busy;
1219 tmio_mmc_ops.start_signal_voltage_switch =
1220 _host->start_signal_voltage_switch;
1221 mmc->ops = &tmio_mmc_ops;
1223 mmc->caps |= MMC_CAP_ERASE | MMC_CAP_4_BIT_DATA | pdata->capabilities;
1224 mmc->caps2 |= pdata->capabilities2;
1225 mmc->max_segs = pdata->max_segs ? : 32;
1226 mmc->max_blk_size = 512;
1227 mmc->max_blk_count = pdata->max_blk_count ? :
1228 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1229 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1231 * Since swiotlb has memory size limitation, this will calculate
1232 * the maximum size locally (because we don't have any APIs for it now)
1233 * and check the current max_req_size. And then, this will update
1234 * the max_req_size if needed as a workaround.
1236 if (swiotlb_max_segment()) {
1237 unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1239 if (mmc->max_req_size > max_size)
1240 mmc->max_req_size = max_size;
1242 mmc->max_seg_size = mmc->max_req_size;
1244 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1245 mmc->caps & MMC_CAP_NEEDS_POLL ||
1246 !mmc_card_is_removable(mmc));
1249 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1250 * hotplug gets disabled. It seems RuntimePM related yet we need further
1251 * research. Since we are planning a PM overhaul anyway, let's enforce
1252 * for now the device being active by enabling native hotplug always.
1254 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1255 _host->native_hotplug = true;
1257 if (tmio_mmc_clk_enable(_host) < 0) {
1258 mmc->f_max = pdata->hclk;
1259 mmc->f_min = mmc->f_max / 512;
1263 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1264 * looping forever...
1266 if (mmc->f_min == 0)
1270 * While using internal tmio hardware logic for card detection, we need
1271 * to ensure it stays powered for it to work.
1273 if (_host->native_hotplug)
1274 pm_runtime_get_noresume(&pdev->dev);
1276 _host->sdio_irq_enabled = false;
1277 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1278 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1280 tmio_mmc_clk_stop(_host);
1281 tmio_mmc_reset(_host);
1283 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1284 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1286 /* Unmask the IRQs we want to know about */
1287 if (!_host->chan_rx)
1288 irq_mask |= TMIO_MASK_READOP;
1289 if (!_host->chan_tx)
1290 irq_mask |= TMIO_MASK_WRITEOP;
1291 if (!_host->native_hotplug)
1292 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1294 _host->sdcard_irq_mask &= ~irq_mask;
1296 spin_lock_init(&_host->lock);
1297 mutex_init(&_host->ios_lock);
1299 /* Init delayed work for request timeouts */
1300 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1301 INIT_WORK(&_host->done, tmio_mmc_done_work);
1303 /* See if we also get DMA */
1304 _host->dma_ops = dma_ops;
1305 tmio_mmc_request_dma(_host, pdata);
1307 pm_runtime_set_active(&pdev->dev);
1308 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1309 pm_runtime_use_autosuspend(&pdev->dev);
1310 pm_runtime_enable(&pdev->dev);
1312 ret = mmc_add_host(mmc);
1314 tmio_mmc_host_remove(_host);
1318 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1320 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1321 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1323 tmio_mmc_host_remove(_host);
1326 mmc_gpiod_request_cd_irq(mmc);
1331 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1333 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1335 struct platform_device *pdev = host->pdev;
1336 struct mmc_host *mmc = host->mmc;
1338 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1339 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1341 if (!host->native_hotplug)
1342 pm_runtime_get_sync(&pdev->dev);
1344 dev_pm_qos_hide_latency_limit(&pdev->dev);
1346 mmc_remove_host(mmc);
1347 cancel_work_sync(&host->done);
1348 cancel_delayed_work_sync(&host->delayed_reset_work);
1349 tmio_mmc_release_dma(host);
1351 pm_runtime_put_sync(&pdev->dev);
1352 pm_runtime_disable(&pdev->dev);
1354 tmio_mmc_clk_disable(host);
1356 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1359 int tmio_mmc_host_runtime_suspend(struct device *dev)
1361 struct mmc_host *mmc = dev_get_drvdata(dev);
1362 struct tmio_mmc_host *host = mmc_priv(mmc);
1364 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1366 if (host->clk_cache)
1367 tmio_mmc_clk_stop(host);
1369 tmio_mmc_clk_disable(host);
1373 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1375 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1377 return host->tap_num && mmc_can_retune(host->mmc);
1380 int tmio_mmc_host_runtime_resume(struct device *dev)
1382 struct mmc_host *mmc = dev_get_drvdata(dev);
1383 struct tmio_mmc_host *host = mmc_priv(mmc);
1385 tmio_mmc_reset(host);
1386 tmio_mmc_clk_enable(host);
1388 if (host->clk_cache)
1389 tmio_mmc_set_clock(host, host->clk_cache);
1391 tmio_mmc_enable_dma(host, true);
1393 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1394 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1398 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1401 MODULE_LICENSE("GPL v2");