GNU Linux-libre 5.10.217-gnu1
[releases.git] / drivers / mmc / host / sdhci_f_sdh30.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * linux/drivers/mmc/host/sdhci_f_sdh30.c
4  *
5  * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
6  *              Vincent Yang <vincent.yang@tw.fujitsu.com>
7  * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
8  */
9
10 #include <linux/acpi.h>
11 #include <linux/err.h>
12 #include <linux/delay.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/property.h>
16 #include <linux/clk.h>
17
18 #include "sdhci-pltfm.h"
19 #include "sdhci_f_sdh30.h"
20
21 struct f_sdhost_priv {
22         struct clk *clk_iface;
23         struct clk *clk;
24         u32 vendor_hs200;
25         struct device *dev;
26         bool enable_cmd_dat_delay;
27 };
28
29 static void *sdhci_f_sdhost_priv(struct sdhci_host *host)
30 {
31         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
32
33         return sdhci_pltfm_priv(pltfm_host);
34 }
35
36 static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
37 {
38         struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
39         u32 ctrl = 0;
40
41         usleep_range(2500, 3000);
42         ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
43         ctrl |= F_SDH30_CRES_O_DN;
44         sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
45         ctrl |= F_SDH30_MSEL_O_1_8;
46         sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
47
48         ctrl &= ~F_SDH30_CRES_O_DN;
49         sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
50         usleep_range(2500, 3000);
51
52         if (priv->vendor_hs200) {
53                 dev_info(priv->dev, "%s: setting hs200\n", __func__);
54                 ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
55                 ctrl |= priv->vendor_hs200;
56                 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
57         }
58
59         ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
60         ctrl |= F_SDH30_CMD_CHK_DIS;
61         sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
62 }
63
64 static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
65 {
66         return F_SDH30_MIN_CLOCK;
67 }
68
69 static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
70 {
71         struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
72         u32 ctl;
73
74         if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
75                 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
76
77         sdhci_reset(host, mask);
78
79         if (priv->enable_cmd_dat_delay) {
80                 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
81                 ctl |= F_SDH30_CMD_DAT_DELAY;
82                 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
83         }
84 }
85
86 static const struct sdhci_ops sdhci_f_sdh30_ops = {
87         .voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
88         .get_min_clock = sdhci_f_sdh30_get_min_clock,
89         .reset = sdhci_f_sdh30_reset,
90         .set_clock = sdhci_set_clock,
91         .set_bus_width = sdhci_set_bus_width,
92         .set_uhs_signaling = sdhci_set_uhs_signaling,
93 };
94
95 static const struct sdhci_pltfm_data sdhci_f_sdh30_pltfm_data = {
96         .ops = &sdhci_f_sdh30_ops,
97         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
98                 | SDHCI_QUIRK_INVERTED_WRITE_PROTECT,
99         .quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE
100                 |  SDHCI_QUIRK2_TUNING_WORK_AROUND,
101 };
102
103 static int sdhci_f_sdh30_probe(struct platform_device *pdev)
104 {
105         struct sdhci_host *host;
106         struct device *dev = &pdev->dev;
107         int ctrl = 0, ret = 0;
108         struct f_sdhost_priv *priv;
109         struct sdhci_pltfm_host *pltfm_host;
110         u32 reg = 0;
111
112         host = sdhci_pltfm_init(pdev, &sdhci_f_sdh30_pltfm_data,
113                                 sizeof(struct f_sdhost_priv));
114         if (IS_ERR(host))
115                 return PTR_ERR(host);
116
117         pltfm_host = sdhci_priv(host);
118         priv = sdhci_pltfm_priv(pltfm_host);
119         priv->dev = dev;
120
121         priv->enable_cmd_dat_delay = device_property_read_bool(dev,
122                                                 "fujitsu,cmd-dat-delay-select");
123
124         ret = mmc_of_parse(host->mmc);
125         if (ret)
126                 goto err;
127
128         if (dev_of_node(dev)) {
129                 sdhci_get_of_property(pdev);
130
131                 priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
132                 if (IS_ERR(priv->clk_iface)) {
133                         ret = PTR_ERR(priv->clk_iface);
134                         goto err;
135                 }
136
137                 ret = clk_prepare_enable(priv->clk_iface);
138                 if (ret)
139                         goto err;
140
141                 priv->clk = devm_clk_get(&pdev->dev, "core");
142                 if (IS_ERR(priv->clk)) {
143                         ret = PTR_ERR(priv->clk);
144                         goto err_clk;
145                 }
146
147                 ret = clk_prepare_enable(priv->clk);
148                 if (ret)
149                         goto err_clk;
150         }
151
152         /* init vendor specific regs */
153         ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
154         ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
155                 F_SDH30_AHB_INCR_4;
156         ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
157         sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
158
159         reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
160         sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
161         msleep(20);
162         sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
163
164         reg = sdhci_readl(host, SDHCI_CAPABILITIES);
165         if (reg & SDHCI_CAN_DO_8BIT)
166                 priv->vendor_hs200 = F_SDH30_EMMC_HS200;
167
168         if (!(reg & SDHCI_TIMEOUT_CLK_MASK))
169                 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
170
171         ret = sdhci_add_host(host);
172         if (ret)
173                 goto err_add_host;
174
175         return 0;
176
177 err_add_host:
178         clk_disable_unprepare(priv->clk);
179 err_clk:
180         clk_disable_unprepare(priv->clk_iface);
181 err:
182         sdhci_pltfm_free(pdev);
183
184         return ret;
185 }
186
187 static int sdhci_f_sdh30_remove(struct platform_device *pdev)
188 {
189         struct sdhci_host *host = platform_get_drvdata(pdev);
190         struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
191         struct clk *clk_iface = priv->clk_iface;
192         struct clk *clk = priv->clk;
193
194         sdhci_pltfm_unregister(pdev);
195
196         clk_disable_unprepare(clk_iface);
197         clk_disable_unprepare(clk);
198
199         return 0;
200 }
201
202 #ifdef CONFIG_OF
203 static const struct of_device_id f_sdh30_dt_ids[] = {
204         { .compatible = "fujitsu,mb86s70-sdhci-3.0" },
205         { /* sentinel */ }
206 };
207 MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
208 #endif
209
210 #ifdef CONFIG_ACPI
211 static const struct acpi_device_id f_sdh30_acpi_ids[] = {
212         { "SCX0002" },
213         { /* sentinel */ }
214 };
215 MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
216 #endif
217
218 static struct platform_driver sdhci_f_sdh30_driver = {
219         .driver = {
220                 .name = "f_sdh30",
221                 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
222                 .of_match_table = of_match_ptr(f_sdh30_dt_ids),
223                 .acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
224                 .pm     = &sdhci_pltfm_pmops,
225         },
226         .probe  = sdhci_f_sdh30_probe,
227         .remove = sdhci_f_sdh30_remove,
228 };
229
230 module_platform_driver(sdhci_f_sdh30_driver);
231
232 MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
233 MODULE_LICENSE("GPL v2");
234 MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
235 MODULE_ALIAS("platform:f_sdh30");