drivers/mmc/host/sdhci-acpi.c

   1 /*
   2  * Secure Digital Host Controller Interface ACPI driver.
   3  *
   4  * Copyright (c) 2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/export.h>
  23 #include <linux/module.h>
  24 #include <linux/device.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/ioport.h>
  27 #include <linux/io.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/compiler.h>
  30 #include <linux/stddef.h>
  31 #include <linux/bitops.h>
  32 #include <linux/types.h>
  33 #include <linux/err.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/acpi.h>
  36 #include <linux/pm.h>
  37 #include <linux/pm_runtime.h>
  38 #include <linux/delay.h>
  39
  40 #include <linux/mmc/host.h>
  41 #include <linux/mmc/pm.h>
  42 #include <linux/mmc/slot-gpio.h>
  43
  44 #ifdef CONFIG_X86
  45 #include <asm/cpu_device_id.h>
  46 #include <asm/intel-family.h>
  47 #include <asm/iosf_mbi.h>
  48 #include <linux/pci.h>
  49 #endif
  50
  51 #include "sdhci.h"
  52
  53 enum {
  54         SDHCI_ACPI_SD_CD                = BIT(0),
  55         SDHCI_ACPI_RUNTIME_PM           = BIT(1),
  56         SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
  57 };
  58
  59 struct sdhci_acpi_chip {
  60         const struct    sdhci_ops *ops;
  61         unsigned int    quirks;
  62         unsigned int    quirks2;
  63         unsigned long   caps;
  64         unsigned int    caps2;
  65         mmc_pm_flag_t   pm_caps;
  66 };
  67
  68 struct sdhci_acpi_slot {
  69         const struct    sdhci_acpi_chip *chip;
  70         unsigned int    quirks;
  71         unsigned int    quirks2;
  72         unsigned long   caps;
  73         unsigned int    caps2;
  74         mmc_pm_flag_t   pm_caps;
  75         unsigned int    flags;
  76         size_t          priv_size;
  77         int (*probe_slot)(struct platform_device *, const char *, const char *);
  78         int (*remove_slot)(struct platform_device *);
  79         int (*free_slot)(struct platform_device *pdev);
  80         int (*setup_host)(struct platform_device *pdev);
  81 };
  82
  83 struct sdhci_acpi_host {
  84         struct sdhci_host               *host;
  85         const struct sdhci_acpi_slot    *slot;
  86         struct platform_device          *pdev;
  87         bool                            use_runtime_pm;
  88         unsigned long                   private[0] ____cacheline_aligned;
  89 };
  90
  91 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
  92 {
  93         return (void *)c->private;
  94 }
  95
  96 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
  97 {
  98         return c->slot && (c->slot->flags & flag);
  99 }
 100
 101 #define INTEL_DSM_HS_CAPS_SDR25         BIT(0)
 102 #define INTEL_DSM_HS_CAPS_DDR50         BIT(1)
 103 #define INTEL_DSM_HS_CAPS_SDR50         BIT(2)
 104 #define INTEL_DSM_HS_CAPS_SDR104        BIT(3)
 105
 106 enum {
 107         INTEL_DSM_FNS           =  0,
 108         INTEL_DSM_V18_SWITCH    =  3,
 109         INTEL_DSM_V33_SWITCH    =  4,
 110         INTEL_DSM_HS_CAPS       =  8,
 111 };
 112
 113 struct intel_host {
 114         u32     dsm_fns;
 115         u32     hs_caps;
 116 };
 117
 118 static const guid_t intel_dsm_guid =
 119         GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
 120                   0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
 121
 122 static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
 123                        unsigned int fn, u32 *result)
 124 {
 125         union acpi_object *obj;
 126         int err = 0;
 127
 128         obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
 129         if (!obj)
 130                 return -EOPNOTSUPP;
 131
 132         if (obj->type == ACPI_TYPE_INTEGER) {
 133                 *result = obj->integer.value;
 134         } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
 135                 size_t len = min_t(size_t, obj->buffer.length, 4);
 136
 137                 *result = 0;
 138                 memcpy(result, obj->buffer.pointer, len);
 139         } else {
 140                 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
 141                         __func__, fn, obj->type, obj->buffer.length);
 142                 err = -EINVAL;
 143         }
 144
 145         ACPI_FREE(obj);
 146
 147         return err;
 148 }
 149
 150 static int intel_dsm(struct intel_host *intel_host, struct device *dev,
 151                      unsigned int fn, u32 *result)
 152 {
 153         if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
 154                 return -EOPNOTSUPP;
 155
 156         return __intel_dsm(intel_host, dev, fn, result);
 157 }
 158
 159 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
 160                            struct mmc_host *mmc)
 161 {
 162         int err;
 163
 164         intel_host->hs_caps = ~0;
 165
 166         err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
 167         if (err) {
 168                 pr_debug("%s: DSM not supported, error %d\n",
 169                          mmc_hostname(mmc), err);
 170                 return;
 171         }
 172
 173         pr_debug("%s: DSM function mask %#x\n",
 174                  mmc_hostname(mmc), intel_host->dsm_fns);
 175
 176         intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
 177 }
 178
 179 static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
 180                                              struct mmc_ios *ios)
 181 {
 182         struct device *dev = mmc_dev(mmc);
 183         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
 184         struct intel_host *intel_host = sdhci_acpi_priv(c);
 185         unsigned int fn;
 186         u32 result = 0;
 187         int err;
 188
 189         err = sdhci_start_signal_voltage_switch(mmc, ios);
 190         if (err)
 191                 return err;
 192
 193         switch (ios->signal_voltage) {
 194         case MMC_SIGNAL_VOLTAGE_330:
 195                 fn = INTEL_DSM_V33_SWITCH;
 196                 break;
 197         case MMC_SIGNAL_VOLTAGE_180:
 198                 fn = INTEL_DSM_V18_SWITCH;
 199                 break;
 200         default:
 201                 return 0;
 202         }
 203
 204         err = intel_dsm(intel_host, dev, fn, &result);
 205         pr_debug("%s: %s DSM fn %u error %d result %u\n",
 206                  mmc_hostname(mmc), __func__, fn, err, result);
 207
 208         return 0;
 209 }
 210
 211 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
 212 {
 213         u8 reg;
 214
 215         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
 216         reg |= 0x10;
 217         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 218         /* For eMMC, minimum is 1us but give it 9us for good measure */
 219         udelay(9);
 220         reg &= ~0x10;
 221         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 222         /* For eMMC, minimum is 200us but give it 300us for good measure */
 223         usleep_range(300, 1000);
 224 }
 225
 226 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
 227         .set_clock = sdhci_set_clock,
 228         .set_bus_width = sdhci_set_bus_width,
 229         .reset = sdhci_reset,
 230         .set_uhs_signaling = sdhci_set_uhs_signaling,
 231 };
 232
 233 static const struct sdhci_ops sdhci_acpi_ops_int = {
 234         .set_clock = sdhci_set_clock,
 235         .set_bus_width = sdhci_set_bus_width,
 236         .reset = sdhci_reset,
 237         .set_uhs_signaling = sdhci_set_uhs_signaling,
 238         .hw_reset   = sdhci_acpi_int_hw_reset,
 239 };
 240
 241 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
 242         .ops = &sdhci_acpi_ops_int,
 243 };
 244
 245 #ifdef CONFIG_X86
 246
 247 static bool sdhci_acpi_byt(void)
 248 {
 249         static const struct x86_cpu_id byt[] = {
 250                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
 251                 {}
 252         };
 253
 254         return x86_match_cpu(byt);
 255 }
 256
 257 static bool sdhci_acpi_cht(void)
 258 {
 259         static const struct x86_cpu_id cht[] = {
 260                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
 261                 {}
 262         };
 263
 264         return x86_match_cpu(cht);
 265 }
 266
 267 #define BYT_IOSF_SCCEP                  0x63
 268 #define BYT_IOSF_OCP_NETCTRL0           0x1078
 269 #define BYT_IOSF_OCP_TIMEOUT_BASE       GENMASK(10, 8)
 270
 271 static void sdhci_acpi_byt_setting(struct device *dev)
 272 {
 273         u32 val = 0;
 274
 275         if (!sdhci_acpi_byt())
 276                 return;
 277
 278         if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
 279                           &val)) {
 280                 dev_err(dev, "%s read error\n", __func__);
 281                 return;
 282         }
 283
 284         if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
 285                 return;
 286
 287         val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
 288
 289         if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
 290                            val)) {
 291                 dev_err(dev, "%s write error\n", __func__);
 292                 return;
 293         }
 294
 295         dev_dbg(dev, "%s completed\n", __func__);
 296 }
 297
 298 static bool sdhci_acpi_byt_defer(struct device *dev)
 299 {
 300         if (!sdhci_acpi_byt())
 301                 return false;
 302
 303         if (!iosf_mbi_available())
 304                 return true;
 305
 306         sdhci_acpi_byt_setting(dev);
 307
 308         return false;
 309 }
 310
 311 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
 312                                     unsigned int slot, unsigned int parent_slot)
 313 {
 314         struct pci_dev *dev, *parent, *from = NULL;
 315
 316         while (1) {
 317                 dev = pci_get_device(vendor, device, from);
 318                 pci_dev_put(from);
 319                 if (!dev)
 320                         break;
 321                 parent = pci_upstream_bridge(dev);
 322                 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
 323                     parent && PCI_SLOT(parent->devfn) == parent_slot &&
 324                     !pci_upstream_bridge(parent)) {
 325                         pci_dev_put(dev);
 326                         return true;
 327                 }
 328                 from = dev;
 329         }
 330
 331         return false;
 332 }
 333
 334 /*
 335  * GPDwin uses PCI wifi which conflicts with SDIO's use of
 336  * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
 337  * problematic, but since SDIO is only used for wifi, the presence of the PCI
 338  * wifi card in the expected slot with an ACPI companion node, is used to
 339  * indicate that acpi_device_fix_up_power() should be avoided.
 340  */
 341 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
 342                                                    const char *uid)
 343 {
 344         return sdhci_acpi_cht() &&
 345                !strcmp(hid, "80860F14") &&
 346                !strcmp(uid, "2") &&
 347                sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
 348 }
 349
 350 #else
 351
 352 static inline void sdhci_acpi_byt_setting(struct device *dev)
 353 {
 354 }
 355
 356 static inline bool sdhci_acpi_byt_defer(struct device *dev)
 357 {
 358         return false;
 359 }
 360
 361 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
 362                                                    const char *uid)
 363 {
 364         return false;
 365 }
 366
 367 #endif
 368
 369 static int bxt_get_cd(struct mmc_host *mmc)
 370 {
 371         int gpio_cd = mmc_gpio_get_cd(mmc);
 372         struct sdhci_host *host = mmc_priv(mmc);
 373         unsigned long flags;
 374         int ret = 0;
 375
 376         if (!gpio_cd)
 377                 return 0;
 378
 379         spin_lock_irqsave(&host->lock, flags);
 380
 381         if (host->flags & SDHCI_DEVICE_DEAD)
 382                 goto out;
 383
 384         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
 385 out:
 386         spin_unlock_irqrestore(&host->lock, flags);
 387
 388         return ret;
 389 }
 390
 391 static int intel_probe_slot(struct platform_device *pdev, const char *hid,
 392                             const char *uid)
 393 {
 394         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
 395         struct intel_host *intel_host = sdhci_acpi_priv(c);
 396         struct sdhci_host *host = c->host;
 397
 398         if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
 399             sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
 400             sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
 401                 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
 402
 403         if (hid && !strcmp(hid, "80865ACA"))
 404                 host->mmc_host_ops.get_cd = bxt_get_cd;
 405
 406         intel_dsm_init(intel_host, &pdev->dev, host->mmc);
 407
 408         host->mmc_host_ops.start_signal_voltage_switch =
 409                                         intel_start_signal_voltage_switch;
 410
 411         return 0;
 412 }
 413
 414 static int intel_setup_host(struct platform_device *pdev)
 415 {
 416         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
 417         struct intel_host *intel_host = sdhci_acpi_priv(c);
 418
 419         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
 420                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
 421
 422         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
 423                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
 424
 425         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
 426                 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
 427
 428         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
 429                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
 430
 431         return 0;
 432 }
 433
 434 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
 435         .chip    = &sdhci_acpi_chip_int,
 436         .caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
 437                    MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
 438                    MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
 439         .flags   = SDHCI_ACPI_RUNTIME_PM,
 440         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 441         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 442                    SDHCI_QUIRK2_STOP_WITH_TC |
 443                    SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
 444         .probe_slot     = intel_probe_slot,
 445         .setup_host     = intel_setup_host,
 446         .priv_size      = sizeof(struct intel_host),
 447 };
 448
 449 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
 450         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
 451                    SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 452         .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
 453         .caps    = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
 454                    MMC_CAP_WAIT_WHILE_BUSY,
 455         .flags   = SDHCI_ACPI_RUNTIME_PM,
 456         .pm_caps = MMC_PM_KEEP_POWER,
 457         .probe_slot     = intel_probe_slot,
 458         .setup_host     = intel_setup_host,
 459         .priv_size      = sizeof(struct intel_host),
 460 };
 461
 462 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
 463         .flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
 464                    SDHCI_ACPI_RUNTIME_PM,
 465         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 466         .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 467                    SDHCI_QUIRK2_STOP_WITH_TC,
 468         .caps    = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
 469         .probe_slot     = intel_probe_slot,
 470         .setup_host     = intel_setup_host,
 471         .priv_size      = sizeof(struct intel_host),
 472 };
 473
 474 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
 475         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
 476         .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
 477         .caps    = MMC_CAP_NONREMOVABLE,
 478 };
 479
 480 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
 481         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
 482         .caps    = MMC_CAP_NONREMOVABLE,
 483 };
 484
 485 /* AMD sdhci reset dll register. */
 486 #define SDHCI_AMD_RESET_DLL_REGISTER    0x908
 487
 488 static int amd_select_drive_strength(struct mmc_card *card,
 489                                      unsigned int max_dtr, int host_drv,
 490                                      int card_drv, int *drv_type)
 491 {
 492         return MMC_SET_DRIVER_TYPE_A;
 493 }
 494
 495 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
 496 {
 497         /* AMD Platform requires dll setting */
 498         sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
 499         usleep_range(10, 20);
 500         sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
 501 }
 502
 503 /*
 504  * For AMD Platform it is required to disable the tuning
 505  * bit first controller to bring to HS Mode from HS200
 506  * mode, later enable to tune to HS400 mode.
 507  */
 508 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 509 {
 510         struct sdhci_host *host = mmc_priv(mmc);
 511         unsigned int old_timing = host->timing;
 512
 513         sdhci_set_ios(mmc, ios);
 514         if (old_timing == MMC_TIMING_MMC_HS200 &&
 515             ios->timing == MMC_TIMING_MMC_HS)
 516                 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
 517         if (old_timing != MMC_TIMING_MMC_HS400 &&
 518             ios->timing == MMC_TIMING_MMC_HS400) {
 519                 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
 520                 sdhci_acpi_amd_hs400_dll(host);
 521         }
 522 }
 523
 524 static const struct sdhci_ops sdhci_acpi_ops_amd = {
 525         .set_clock      = sdhci_set_clock,
 526         .set_bus_width  = sdhci_set_bus_width,
 527         .reset          = sdhci_reset,
 528         .set_uhs_signaling = sdhci_set_uhs_signaling,
 529 };
 530
 531 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
 532         .ops = &sdhci_acpi_ops_amd,
 533 };
 534
 535 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
 536                                           const char *hid, const char *uid)
 537 {
 538         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
 539         struct sdhci_host *host   = c->host;
 540
 541         sdhci_read_caps(host);
 542         if (host->caps1 & SDHCI_SUPPORT_DDR50)
 543                 host->mmc->caps = MMC_CAP_1_8V_DDR;
 544
 545         if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
 546             (host->mmc->caps & MMC_CAP_1_8V_DDR))
 547                 host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
 548
 549         /*
 550          * There are two types of presets out in the wild:
 551          * 1) Default/broken presets.
 552          *    These presets have two sets of problems:
 553          *    a) The clock divisor for SDR12, SDR25, and SDR50 is too small.
 554          *       This results in clock frequencies that are 2x higher than
 555          *       acceptable. i.e., SDR12 = 25 MHz, SDR25 = 50 MHz, SDR50 =
 556          *       100 MHz.x
 557          *    b) The HS200 and HS400 driver strengths don't match.
 558          *       By default, the SDR104 preset register has a driver strength of
 559          *       A, but the (internal) HS400 preset register has a driver
 560          *       strength of B. As part of initializing HS400, HS200 tuning
 561          *       needs to be performed. Having different driver strengths
 562          *       between tuning and operation is wrong. It results in different
 563          *       rise/fall times that lead to incorrect sampling.
 564          * 2) Firmware with properly initialized presets.
 565          *    These presets have proper clock divisors. i.e., SDR12 => 12MHz,
 566          *    SDR25 => 25 MHz, SDR50 => 50 MHz. Additionally the HS200 and
 567          *    HS400 preset driver strengths match.
 568          *
 569          *    Enabling presets for HS400 doesn't work for the following reasons:
 570          *    1) sdhci_set_ios has a hard coded list of timings that are used
 571          *       to determine if presets should be enabled.
 572          *    2) sdhci_get_preset_value is using a non-standard register to
 573          *       read out HS400 presets. The AMD controller doesn't support this
 574          *       non-standard register. In fact, it doesn't expose the HS400
 575          *       preset register anywhere in the SDHCI memory map. This results
 576          *       in reading a garbage value and using the wrong presets.
 577          *
 578          *       Since HS400 and HS200 presets must be identical, we could
 579          *       instead use the the SDR104 preset register.
 580          *
 581          *    If the above issues are resolved we could remove this quirk for
 582          *    firmware that that has valid presets (i.e., SDR12 <= 12 MHz).
 583          */
 584         host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
 585
 586         host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
 587         host->mmc_host_ops.set_ios = amd_set_ios;
 588         return 0;
 589 }
 590
 591 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
 592         .chip           = &sdhci_acpi_chip_amd,
 593         .caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
 594         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
 595                           SDHCI_QUIRK_32BIT_DMA_SIZE |
 596                           SDHCI_QUIRK_32BIT_ADMA_SIZE,
 597         .quirks2        = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
 598         .probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
 599 };
 600
 601 struct sdhci_acpi_uid_slot {
 602         const char *hid;
 603         const char *uid;
 604         const struct sdhci_acpi_slot *slot;
 605 };
 606
 607 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
 608         { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
 609         { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
 610         { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
 611         { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
 612         { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
 613         { "80860F14" , "3" , &sdhci_acpi_slot_int_sd   },
 614         { "80860F16" , NULL, &sdhci_acpi_slot_int_sd   },
 615         { "INT33BB"  , "2" , &sdhci_acpi_slot_int_sdio },
 616         { "INT33BB"  , "3" , &sdhci_acpi_slot_int_sd },
 617         { "INT33C6"  , NULL, &sdhci_acpi_slot_int_sdio },
 618         { "INT3436"  , NULL, &sdhci_acpi_slot_int_sdio },
 619         { "INT344D"  , NULL, &sdhci_acpi_slot_int_sdio },
 620         { "PNP0FFF"  , "3" , &sdhci_acpi_slot_int_sd   },
 621         { "PNP0D40"  },
 622         { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
 623         { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
 624         { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
 625         { },
 626 };
 627
 628 static const struct acpi_device_id sdhci_acpi_ids[] = {
 629         { "80865ACA" },
 630         { "80865ACC" },
 631         { "80865AD0" },
 632         { "80860F14" },
 633         { "80860F16" },
 634         { "INT33BB"  },
 635         { "INT33C6"  },
 636         { "INT3436"  },
 637         { "INT344D"  },
 638         { "PNP0D40"  },
 639         { "QCOM8051" },
 640         { "QCOM8052" },
 641         { "AMDI0040" },
 642         { },
 643 };
 644 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
 645
 646 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
 647                                                          const char *uid)
 648 {
 649         const struct sdhci_acpi_uid_slot *u;
 650
 651         for (u = sdhci_acpi_uids; u->hid; u++) {
 652                 if (strcmp(u->hid, hid))
 653                         continue;
 654                 if (!u->uid)
 655                         return u->slot;
 656                 if (uid && !strcmp(u->uid, uid))
 657                         return u->slot;
 658         }
 659         return NULL;
 660 }
 661
 662 static int sdhci_acpi_probe(struct platform_device *pdev)
 663 {
 664         struct device *dev = &pdev->dev;
 665         const struct sdhci_acpi_slot *slot;
 666         struct acpi_device *device, *child;
 667         struct sdhci_acpi_host *c;
 668         struct sdhci_host *host;
 669         struct resource *iomem;
 670         resource_size_t len;
 671         size_t priv_size;
 672         const char *hid;
 673         const char *uid;
 674         int err;
 675
 676         device = ACPI_COMPANION(dev);
 677         if (!device)
 678                 return -ENODEV;
 679
 680         hid = acpi_device_hid(device);
 681         uid = acpi_device_uid(device);
 682
 683         slot = sdhci_acpi_get_slot(hid, uid);
 684
 685         /* Power on the SDHCI controller and its children */
 686         acpi_device_fix_up_power(device);
 687         if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
 688                 list_for_each_entry(child, &device->children, node)
 689                         if (child->status.present && child->status.enabled)
 690                                 acpi_device_fix_up_power(child);
 691         }
 692
 693         if (sdhci_acpi_byt_defer(dev))
 694                 return -EPROBE_DEFER;
 695
 696         iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 697         if (!iomem)
 698                 return -ENOMEM;
 699
 700         len = resource_size(iomem);
 701         if (len < 0x100)
 702                 dev_err(dev, "Invalid iomem size!\n");
 703
 704         if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
 705                 return -ENOMEM;
 706
 707         priv_size = slot ? slot->priv_size : 0;
 708         host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
 709         if (IS_ERR(host))
 710                 return PTR_ERR(host);
 711
 712         c = sdhci_priv(host);
 713         c->host = host;
 714         c->slot = slot;
 715         c->pdev = pdev;
 716         c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
 717
 718         platform_set_drvdata(pdev, c);
 719
 720         host->hw_name   = "ACPI";
 721         host->ops       = &sdhci_acpi_ops_dflt;
 722         host->irq       = platform_get_irq(pdev, 0);
 723         if (host->irq < 0) {
 724                 err = -EINVAL;
 725                 goto err_free;
 726         }
 727
 728         host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
 729                                             resource_size(iomem));
 730         if (host->ioaddr == NULL) {
 731                 err = -ENOMEM;
 732                 goto err_free;
 733         }
 734
 735         if (c->slot) {
 736                 if (c->slot->probe_slot) {
 737                         err = c->slot->probe_slot(pdev, hid, uid);
 738                         if (err)
 739                                 goto err_free;
 740                 }
 741                 if (c->slot->chip) {
 742                         host->ops            = c->slot->chip->ops;
 743                         host->quirks        |= c->slot->chip->quirks;
 744                         host->quirks2       |= c->slot->chip->quirks2;
 745                         host->mmc->caps     |= c->slot->chip->caps;
 746                         host->mmc->caps2    |= c->slot->chip->caps2;
 747                         host->mmc->pm_caps  |= c->slot->chip->pm_caps;
 748                 }
 749                 host->quirks        |= c->slot->quirks;
 750                 host->quirks2       |= c->slot->quirks2;
 751                 host->mmc->caps     |= c->slot->caps;
 752                 host->mmc->caps2    |= c->slot->caps2;
 753                 host->mmc->pm_caps  |= c->slot->pm_caps;
 754         }
 755
 756         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
 757
 758         if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
 759                 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
 760
 761                 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
 762                 if (err) {
 763                         if (err == -EPROBE_DEFER)
 764                                 goto err_free;
 765                         dev_warn(dev, "failed to setup card detect gpio\n");
 766                         c->use_runtime_pm = false;
 767                 }
 768         }
 769
 770         err = sdhci_setup_host(host);
 771         if (err)
 772                 goto err_free;
 773
 774         if (c->slot && c->slot->setup_host) {
 775                 err = c->slot->setup_host(pdev);
 776                 if (err)
 777                         goto err_cleanup;
 778         }
 779
 780         err = __sdhci_add_host(host);
 781         if (err)
 782                 goto err_cleanup;
 783
 784         if (c->use_runtime_pm) {
 785                 pm_runtime_set_active(dev);
 786                 pm_suspend_ignore_children(dev, 1);
 787                 pm_runtime_set_autosuspend_delay(dev, 50);
 788                 pm_runtime_use_autosuspend(dev);
 789                 pm_runtime_enable(dev);
 790         }
 791
 792         device_enable_async_suspend(dev);
 793
 794         return 0;
 795
 796 err_cleanup:
 797         sdhci_cleanup_host(c->host);
 798 err_free:
 799         if (c->slot && c->slot->free_slot)
 800                 c->slot->free_slot(pdev);
 801
 802         sdhci_free_host(c->host);
 803         return err;
 804 }
 805
 806 static int sdhci_acpi_remove(struct platform_device *pdev)
 807 {
 808         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
 809         struct device *dev = &pdev->dev;
 810         int dead;
 811
 812         if (c->use_runtime_pm) {
 813                 pm_runtime_get_sync(dev);
 814                 pm_runtime_disable(dev);
 815                 pm_runtime_put_noidle(dev);
 816         }
 817
 818         if (c->slot && c->slot->remove_slot)
 819                 c->slot->remove_slot(pdev);
 820
 821         dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
 822         sdhci_remove_host(c->host, dead);
 823
 824         if (c->slot && c->slot->free_slot)
 825                 c->slot->free_slot(pdev);
 826
 827         sdhci_free_host(c->host);
 828
 829         return 0;
 830 }
 831
 832 #ifdef CONFIG_PM_SLEEP
 833
 834 static int sdhci_acpi_suspend(struct device *dev)
 835 {
 836         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
 837         struct sdhci_host *host = c->host;
 838
 839         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
 840                 mmc_retune_needed(host->mmc);
 841
 842         return sdhci_suspend_host(host);
 843 }
 844
 845 static int sdhci_acpi_resume(struct device *dev)
 846 {
 847         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
 848
 849         sdhci_acpi_byt_setting(&c->pdev->dev);
 850
 851         return sdhci_resume_host(c->host);
 852 }
 853
 854 #endif
 855
 856 #ifdef CONFIG_PM
 857
 858 static int sdhci_acpi_runtime_suspend(struct device *dev)
 859 {
 860         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
 861         struct sdhci_host *host = c->host;
 862
 863         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
 864                 mmc_retune_needed(host->mmc);
 865
 866         return sdhci_runtime_suspend_host(host);
 867 }
 868
 869 static int sdhci_acpi_runtime_resume(struct device *dev)
 870 {
 871         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
 872
 873         sdhci_acpi_byt_setting(&c->pdev->dev);
 874
 875         return sdhci_runtime_resume_host(c->host);
 876 }
 877
 878 #endif
 879
 880 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
 881         SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
 882         SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
 883                         sdhci_acpi_runtime_resume, NULL)
 884 };
 885
 886 static struct platform_driver sdhci_acpi_driver = {
 887         .driver = {
 888                 .name                   = "sdhci-acpi",
 889                 .acpi_match_table       = sdhci_acpi_ids,
 890                 .pm                     = &sdhci_acpi_pm_ops,
 891         },
 892         .probe  = sdhci_acpi_probe,
 893         .remove = sdhci_acpi_remove,
 894 };
 895
 896 module_platform_driver(sdhci_acpi_driver);
 897
 898 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
 899 MODULE_AUTHOR("Adrian Hunter");
 900 MODULE_LICENSE("GPL v2");