1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
5 * IDT PCIe-switch NTB Linux driver
8 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru>
11 * NOTE of the IDT 89HPESx SMBus-slave interface driver
12 * This driver primarily is developed to have an access to EEPROM device of
13 * IDT PCIe-switches. IDT provides a simple SMBus interface to perform IO-
14 * operations from/to EEPROM, which is located at private (so called Master)
15 * SMBus of switches. Using that interface this the driver creates a simple
16 * binary sysfs-file in the device directory:
17 * /sys/bus/i2c/devices/<bus>-<devaddr>/eeprom
18 * In case if read-only flag is specified in the dts-node of device desription,
19 * User-space applications won't be able to write to the EEPROM sysfs-node.
20 * Additionally IDT 89HPESx SMBus interface has an ability to write/read
21 * data of device CSRs. This driver exposes debugf-file to perform simple IO
22 * operations using that ability for just basic debug purpose. Particularly
23 * next file is created in the specific debugfs-directory:
24 * /sys/kernel/debug/idt_csr/
25 * Format of the debugfs-node is:
26 * $ cat /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>;
27 * <CSR address>:<CSR value>
28 * So reading the content of the file gives current CSR address and it value.
29 * If User-space application wishes to change current CSR address,
30 * it can just write a proper value to the sysfs-file:
31 * $ echo "<CSR address>" > /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>
32 * If it wants to change the CSR value as well, the format of the write
34 * $ echo "<CSR address>:<CSR value>" > \
35 * /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>;
36 * CSR address and value can be any of hexadecimal, decimal or octal format.
39 #include <linux/kernel.h>
40 #include <linux/init.h>
41 #include <linux/module.h>
42 #include <linux/types.h>
43 #include <linux/sizes.h>
44 #include <linux/slab.h>
45 #include <linux/mutex.h>
46 #include <linux/sysfs.h>
47 #include <linux/debugfs.h>
48 #include <linux/mod_devicetable.h>
49 #include <linux/property.h>
50 #include <linux/i2c.h>
51 #include <linux/pci_ids.h>
52 #include <linux/delay.h>
54 #define IDT_NAME "89hpesx"
55 #define IDT_89HPESX_DESC "IDT 89HPESx SMBus-slave interface driver"
56 #define IDT_89HPESX_VER "1.0"
58 MODULE_DESCRIPTION(IDT_89HPESX_DESC);
59 MODULE_VERSION(IDT_89HPESX_VER);
60 MODULE_LICENSE("GPL v2");
61 MODULE_AUTHOR("T-platforms");
64 * csr_dbgdir - CSR read/write operations Debugfs directory
66 static struct dentry *csr_dbgdir;
69 * struct idt_89hpesx_dev - IDT 89HPESx device data structure
70 * @eesize: Size of EEPROM in bytes (calculated from "idt,eecompatible")
71 * @eero: EEPROM Read-only flag
72 * @eeaddr: EEPROM custom address
74 * @inieecmd: Initial cmd value for EEPROM read/write operations
75 * @inicsrcmd: Initial cmd value for CSR read/write operations
76 * @iniccode: Initialial command code value for IO-operations
78 * @csr: CSR address to perform read operation
80 * @smb_write: SMBus write method
81 * @smb_read: SMBus read method
82 * @smb_mtx: SMBus mutex
84 * @client: i2c client used to perform IO operations
86 * @ee_file: EEPROM read/write sysfs-file
89 struct idt_89hpesx_dev {
100 int (*smb_write)(struct idt_89hpesx_dev *, const struct idt_smb_seq *);
101 int (*smb_read)(struct idt_89hpesx_dev *, struct idt_smb_seq *);
102 struct mutex smb_mtx;
104 struct i2c_client *client;
106 struct bin_attribute *ee_file;
107 struct dentry *csr_dir;
111 * struct idt_smb_seq - sequence of data to be read/written from/to IDT 89HPESx
112 * @ccode: SMBus command code
113 * @bytecnt: Byte count of operation
114 * @data: Data to by written
123 * struct idt_eeprom_seq - sequence of data to be read/written from/to EEPROM
124 * @cmd: Transaction CMD
125 * @eeaddr: EEPROM custom address
126 * @memaddr: Internal memory address of EEPROM
127 * @data: Data to be written at the memory address
129 struct idt_eeprom_seq {
137 * struct idt_csr_seq - sequence of data to be read/written from/to CSR
138 * @cmd: Transaction CMD
139 * @csraddr: Internal IDT device CSR address
140 * @data: Data to be read/written from/to the CSR address
149 * SMBus command code macros
150 * @CCODE_END: Indicates the end of transaction
151 * @CCODE_START: Indicates the start of transaction
152 * @CCODE_CSR: CSR read/write transaction
153 * @CCODE_EEPROM: EEPROM read/write transaction
154 * @CCODE_BYTE: Supplied data has BYTE length
155 * @CCODE_WORD: Supplied data has WORD length
156 * @CCODE_BLOCK: Supplied data has variable length passed in bytecnt
157 * byte right following CCODE byte
159 #define CCODE_END ((u8)0x01)
160 #define CCODE_START ((u8)0x02)
161 #define CCODE_CSR ((u8)0x00)
162 #define CCODE_EEPROM ((u8)0x04)
163 #define CCODE_BYTE ((u8)0x00)
164 #define CCODE_WORD ((u8)0x20)
165 #define CCODE_BLOCK ((u8)0x40)
166 #define CCODE_PEC ((u8)0x80)
169 * EEPROM command macros
170 * @EEPROM_OP_WRITE: EEPROM write operation
171 * @EEPROM_OP_READ: EEPROM read operation
172 * @EEPROM_USA: Use specified address of EEPROM
173 * @EEPROM_NAERR: EEPROM device is not ready to respond
174 * @EEPROM_LAERR: EEPROM arbitration loss error
175 * @EEPROM_MSS: EEPROM misplace start & stop bits error
176 * @EEPROM_WR_CNT: Bytes count to perform write operation
177 * @EEPROM_WRRD_CNT: Bytes count to write before reading
178 * @EEPROM_RD_CNT: Bytes count to perform read operation
179 * @EEPROM_DEF_SIZE: Fall back size of EEPROM
180 * @EEPROM_DEF_ADDR: Defatul EEPROM address
181 * @EEPROM_TOUT: Timeout before retry read operation if eeprom is busy
183 #define EEPROM_OP_WRITE ((u8)0x00)
184 #define EEPROM_OP_READ ((u8)0x01)
185 #define EEPROM_USA ((u8)0x02)
186 #define EEPROM_NAERR ((u8)0x08)
187 #define EEPROM_LAERR ((u8)0x10)
188 #define EEPROM_MSS ((u8)0x20)
189 #define EEPROM_WR_CNT ((u8)5)
190 #define EEPROM_WRRD_CNT ((u8)4)
191 #define EEPROM_RD_CNT ((u8)5)
192 #define EEPROM_DEF_SIZE ((u16)4096)
193 #define EEPROM_DEF_ADDR ((u8)0x50)
194 #define EEPROM_TOUT (100)
198 * @CSR_DWE: Enable all four bytes of the operation
199 * @CSR_OP_WRITE: CSR write operation
200 * @CSR_OP_READ: CSR read operation
201 * @CSR_RERR: Read operation error
202 * @CSR_WERR: Write operation error
203 * @CSR_WR_CNT: Bytes count to perform write operation
204 * @CSR_WRRD_CNT: Bytes count to write before reading
205 * @CSR_RD_CNT: Bytes count to perform read operation
206 * @CSR_MAX: Maximum CSR address
207 * @CSR_DEF: Default CSR address
208 * @CSR_REAL_ADDR: CSR real unshifted address
210 #define CSR_DWE ((u8)0x0F)
211 #define CSR_OP_WRITE ((u8)0x00)
212 #define CSR_OP_READ ((u8)0x10)
213 #define CSR_RERR ((u8)0x40)
214 #define CSR_WERR ((u8)0x80)
215 #define CSR_WR_CNT ((u8)7)
216 #define CSR_WRRD_CNT ((u8)3)
217 #define CSR_RD_CNT ((u8)7)
218 #define CSR_MAX ((u32)0x3FFFF)
219 #define CSR_DEF ((u16)0x0000)
220 #define CSR_REAL_ADDR(val) ((unsigned int)val << 2)
223 * IDT 89HPESx basic register
224 * @IDT_VIDDID_CSR: PCIe VID and DID of IDT 89HPESx
225 * @IDT_VID_MASK: Mask of VID
227 #define IDT_VIDDID_CSR ((u32)0x0000)
228 #define IDT_VID_MASK ((u32)0xFFFF)
231 * IDT 89HPESx can send NACK when new command is sent before previous one
232 * fininshed execution. In this case driver retries operation
234 * @RETRY_CNT: Number of retries before giving up and fail
235 * @idt_smb_safe: Generate a retry loop on corresponding SMBus method
237 #define RETRY_CNT (128)
238 #define idt_smb_safe(ops, args...) ({ \
239 int __retry = RETRY_CNT; \
242 __sts = i2c_smbus_ ## ops ## _data(args); \
243 } while (__retry-- && __sts < 0); \
247 /*===========================================================================
248 * i2c bus level IO-operations
249 *===========================================================================
253 * idt_smb_write_byte() - SMBus write method when I2C_SMBUS_BYTE_DATA operation
255 * @pdev: Pointer to the driver data
256 * @seq: Sequence of data to be written
258 static int idt_smb_write_byte(struct idt_89hpesx_dev *pdev,
259 const struct idt_smb_seq *seq)
265 /* Loop over the supplied data sending byte one-by-one */
266 for (idx = 0; idx < seq->bytecnt; idx++) {
267 /* Collect the command code byte */
268 ccode = seq->ccode | CCODE_BYTE;
270 ccode |= CCODE_START;
271 if (idx == seq->bytecnt - 1)
274 /* Send data to the device */
275 sts = idt_smb_safe(write_byte, pdev->client, ccode,
285 * idt_smb_read_byte() - SMBus read method when I2C_SMBUS_BYTE_DATA operation
287 * @pdev: Pointer to the driver data
288 * @seq: Buffer to read data to
290 static int idt_smb_read_byte(struct idt_89hpesx_dev *pdev,
291 struct idt_smb_seq *seq)
297 /* Loop over the supplied buffer receiving byte one-by-one */
298 for (idx = 0; idx < seq->bytecnt; idx++) {
299 /* Collect the command code byte */
300 ccode = seq->ccode | CCODE_BYTE;
302 ccode |= CCODE_START;
303 if (idx == seq->bytecnt - 1)
306 /* Read data from the device */
307 sts = idt_smb_safe(read_byte, pdev->client, ccode);
311 seq->data[idx] = (u8)sts;
318 * idt_smb_write_word() - SMBus write method when I2C_SMBUS_BYTE_DATA and
319 * I2C_FUNC_SMBUS_WORD_DATA operations are available
320 * @pdev: Pointer to the driver data
321 * @seq: Sequence of data to be written
323 static int idt_smb_write_word(struct idt_89hpesx_dev *pdev,
324 const struct idt_smb_seq *seq)
330 /* Calculate the even count of data to send */
331 evencnt = seq->bytecnt - (seq->bytecnt % 2);
333 /* Loop over the supplied data sending two bytes at a time */
334 for (idx = 0; idx < evencnt; idx += 2) {
335 /* Collect the command code byte */
336 ccode = seq->ccode | CCODE_WORD;
338 ccode |= CCODE_START;
339 if (idx == evencnt - 2)
342 /* Send word data to the device */
343 sts = idt_smb_safe(write_word, pdev->client, ccode,
344 *(u16 *)&seq->data[idx]);
349 /* If there is odd number of bytes then send just one last byte */
350 if (seq->bytecnt != evencnt) {
351 /* Collect the command code byte */
352 ccode = seq->ccode | CCODE_BYTE | CCODE_END;
354 ccode |= CCODE_START;
356 /* Send byte data to the device */
357 sts = idt_smb_safe(write_byte, pdev->client, ccode,
367 * idt_smb_read_word() - SMBus read method when I2C_SMBUS_BYTE_DATA and
368 * I2C_FUNC_SMBUS_WORD_DATA operations are available
369 * @pdev: Pointer to the driver data
370 * @seq: Buffer to read data to
372 static int idt_smb_read_word(struct idt_89hpesx_dev *pdev,
373 struct idt_smb_seq *seq)
379 /* Calculate the even count of data to send */
380 evencnt = seq->bytecnt - (seq->bytecnt % 2);
382 /* Loop over the supplied data reading two bytes at a time */
383 for (idx = 0; idx < evencnt; idx += 2) {
384 /* Collect the command code byte */
385 ccode = seq->ccode | CCODE_WORD;
387 ccode |= CCODE_START;
388 if (idx == evencnt - 2)
391 /* Read word data from the device */
392 sts = idt_smb_safe(read_word, pdev->client, ccode);
396 *(u16 *)&seq->data[idx] = (u16)sts;
399 /* If there is odd number of bytes then receive just one last byte */
400 if (seq->bytecnt != evencnt) {
401 /* Collect the command code byte */
402 ccode = seq->ccode | CCODE_BYTE | CCODE_END;
404 ccode |= CCODE_START;
406 /* Read last data byte from the device */
407 sts = idt_smb_safe(read_byte, pdev->client, ccode);
411 seq->data[idx] = (u8)sts;
418 * idt_smb_write_block() - SMBus write method when I2C_SMBUS_BLOCK_DATA
419 * operation is available
420 * @pdev: Pointer to the driver data
421 * @seq: Sequence of data to be written
423 static int idt_smb_write_block(struct idt_89hpesx_dev *pdev,
424 const struct idt_smb_seq *seq)
428 /* Return error if too much data passed to send */
429 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX)
432 /* Collect the command code byte */
433 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END;
435 /* Send block of data to the device */
436 return idt_smb_safe(write_block, pdev->client, ccode, seq->bytecnt,
441 * idt_smb_read_block() - SMBus read method when I2C_SMBUS_BLOCK_DATA
442 * operation is available
443 * @pdev: Pointer to the driver data
444 * @seq: Buffer to read data to
446 static int idt_smb_read_block(struct idt_89hpesx_dev *pdev,
447 struct idt_smb_seq *seq)
452 /* Return error if too much data passed to send */
453 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX)
456 /* Collect the command code byte */
457 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END;
459 /* Read block of data from the device */
460 sts = idt_smb_safe(read_block, pdev->client, ccode, seq->data);
461 if (sts != seq->bytecnt)
462 return (sts < 0 ? sts : -ENODATA);
468 * idt_smb_write_i2c_block() - SMBus write method when I2C_SMBUS_I2C_BLOCK_DATA
469 * operation is available
470 * @pdev: Pointer to the driver data
471 * @seq: Sequence of data to be written
473 * NOTE It's usual SMBus write block operation, except the actual data length is
474 * sent as first byte of data
476 static int idt_smb_write_i2c_block(struct idt_89hpesx_dev *pdev,
477 const struct idt_smb_seq *seq)
479 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1];
481 /* Return error if too much data passed to send */
482 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX)
485 /* Collect the data to send. Length byte must be added prior the data */
486 buf[0] = seq->bytecnt;
487 memcpy(&buf[1], seq->data, seq->bytecnt);
489 /* Collect the command code byte */
490 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END;
492 /* Send length and block of data to the device */
493 return idt_smb_safe(write_i2c_block, pdev->client, ccode,
494 seq->bytecnt + 1, buf);
498 * idt_smb_read_i2c_block() - SMBus read method when I2C_SMBUS_I2C_BLOCK_DATA
499 * operation is available
500 * @pdev: Pointer to the driver data
501 * @seq: Buffer to read data to
503 * NOTE It's usual SMBus read block operation, except the actual data length is
504 * retrieved as first byte of data
506 static int idt_smb_read_i2c_block(struct idt_89hpesx_dev *pdev,
507 struct idt_smb_seq *seq)
509 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1];
512 /* Return error if too much data passed to send */
513 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX)
516 /* Collect the command code byte */
517 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END;
519 /* Read length and block of data from the device */
520 sts = idt_smb_safe(read_i2c_block, pdev->client, ccode,
521 seq->bytecnt + 1, buf);
522 if (sts != seq->bytecnt + 1)
523 return (sts < 0 ? sts : -ENODATA);
524 if (buf[0] != seq->bytecnt)
527 /* Copy retrieved data to the output data buffer */
528 memcpy(seq->data, &buf[1], seq->bytecnt);
533 /*===========================================================================
534 * EEPROM IO-operations
535 *===========================================================================
539 * idt_eeprom_read_byte() - read just one byte from EEPROM
540 * @pdev: Pointer to the driver data
541 * @memaddr: Start EEPROM memory address
542 * @data: Data to be written to EEPROM
544 static int idt_eeprom_read_byte(struct idt_89hpesx_dev *pdev, u16 memaddr,
547 struct device *dev = &pdev->client->dev;
548 struct idt_eeprom_seq eeseq;
549 struct idt_smb_seq smbseq;
552 /* Initialize SMBus sequence fields */
553 smbseq.ccode = pdev->iniccode | CCODE_EEPROM;
554 smbseq.data = (u8 *)&eeseq;
557 * Sometimes EEPROM may respond with NACK if it's busy with previous
558 * operation, so we need to perform a few attempts of read cycle
562 /* Send EEPROM memory address to read data from */
563 smbseq.bytecnt = EEPROM_WRRD_CNT;
564 eeseq.cmd = pdev->inieecmd | EEPROM_OP_READ;
565 eeseq.eeaddr = pdev->eeaddr;
566 eeseq.memaddr = cpu_to_le16(memaddr);
567 ret = pdev->smb_write(pdev, &smbseq);
569 dev_err(dev, "Failed to init eeprom addr 0x%02hhx",
574 /* Perform read operation */
575 smbseq.bytecnt = EEPROM_RD_CNT;
576 ret = pdev->smb_read(pdev, &smbseq);
578 dev_err(dev, "Failed to read eeprom data 0x%02hhx",
583 /* Restart read operation if the device is busy */
584 if (retry && (eeseq.cmd & EEPROM_NAERR)) {
585 dev_dbg(dev, "EEPROM busy, retry reading after %d ms",
591 /* Check whether IDT successfully read data from EEPROM */
592 if (eeseq.cmd & (EEPROM_NAERR | EEPROM_LAERR | EEPROM_MSS)) {
594 "Communication with eeprom failed, cmd 0x%hhx",
600 /* Save retrieved data and exit the loop */
605 /* Return the status of operation */
610 * idt_eeprom_write() - EEPROM write operation
611 * @pdev: Pointer to the driver data
612 * @memaddr: Start EEPROM memory address
613 * @len: Length of data to be written
614 * @data: Data to be written to EEPROM
616 static int idt_eeprom_write(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len,
619 struct device *dev = &pdev->client->dev;
620 struct idt_eeprom_seq eeseq;
621 struct idt_smb_seq smbseq;
625 /* Initialize SMBus sequence fields */
626 smbseq.ccode = pdev->iniccode | CCODE_EEPROM;
627 smbseq.data = (u8 *)&eeseq;
629 /* Send data byte-by-byte, checking if it is successfully written */
630 for (idx = 0; idx < len; idx++, memaddr++) {
631 /* Lock IDT SMBus device */
632 mutex_lock(&pdev->smb_mtx);
634 /* Perform write operation */
635 smbseq.bytecnt = EEPROM_WR_CNT;
636 eeseq.cmd = pdev->inieecmd | EEPROM_OP_WRITE;
637 eeseq.eeaddr = pdev->eeaddr;
638 eeseq.memaddr = cpu_to_le16(memaddr);
639 eeseq.data = data[idx];
640 ret = pdev->smb_write(pdev, &smbseq);
643 "Failed to write 0x%04hx:0x%02hhx to eeprom",
645 goto err_mutex_unlock;
649 * Check whether the data is successfully written by reading
650 * from the same EEPROM memory address.
652 eeseq.data = ~data[idx];
653 ret = idt_eeprom_read_byte(pdev, memaddr, &eeseq.data);
655 goto err_mutex_unlock;
657 /* Check whether the read byte is the same as written one */
658 if (eeseq.data != data[idx]) {
659 dev_err(dev, "Values don't match 0x%02hhx != 0x%02hhx",
660 eeseq.data, data[idx]);
662 goto err_mutex_unlock;
665 /* Unlock IDT SMBus device */
667 mutex_unlock(&pdev->smb_mtx);
676 * idt_eeprom_read() - EEPROM read operation
677 * @pdev: Pointer to the driver data
678 * @memaddr: Start EEPROM memory address
679 * @len: Length of data to read
680 * @buf: Buffer to read data to
682 static int idt_eeprom_read(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len,
688 /* Read data byte-by-byte, retrying if it wasn't successful */
689 for (idx = 0; idx < len; idx++, memaddr++) {
690 /* Lock IDT SMBus device */
691 mutex_lock(&pdev->smb_mtx);
693 /* Just read the byte to the buffer */
694 ret = idt_eeprom_read_byte(pdev, memaddr, &buf[idx]);
696 /* Unlock IDT SMBus device */
697 mutex_unlock(&pdev->smb_mtx);
699 /* Return error if read operation failed */
707 /*===========================================================================
709 *===========================================================================
713 * idt_csr_write() - CSR write operation
714 * @pdev: Pointer to the driver data
715 * @csraddr: CSR address (with no two LS bits)
716 * @data: Data to be written to CSR
718 static int idt_csr_write(struct idt_89hpesx_dev *pdev, u16 csraddr,
721 struct device *dev = &pdev->client->dev;
722 struct idt_csr_seq csrseq;
723 struct idt_smb_seq smbseq;
726 /* Initialize SMBus sequence fields */
727 smbseq.ccode = pdev->iniccode | CCODE_CSR;
728 smbseq.data = (u8 *)&csrseq;
730 /* Lock IDT SMBus device */
731 mutex_lock(&pdev->smb_mtx);
733 /* Perform write operation */
734 smbseq.bytecnt = CSR_WR_CNT;
735 csrseq.cmd = pdev->inicsrcmd | CSR_OP_WRITE;
736 csrseq.csraddr = cpu_to_le16(csraddr);
737 csrseq.data = cpu_to_le32(data);
738 ret = pdev->smb_write(pdev, &smbseq);
740 dev_err(dev, "Failed to write 0x%04x: 0x%04x to csr",
741 CSR_REAL_ADDR(csraddr), data);
742 goto err_mutex_unlock;
745 /* Send CSR address to read data from */
746 smbseq.bytecnt = CSR_WRRD_CNT;
747 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ;
748 ret = pdev->smb_write(pdev, &smbseq);
750 dev_err(dev, "Failed to init csr address 0x%04x",
751 CSR_REAL_ADDR(csraddr));
752 goto err_mutex_unlock;
755 /* Perform read operation */
756 smbseq.bytecnt = CSR_RD_CNT;
757 ret = pdev->smb_read(pdev, &smbseq);
759 dev_err(dev, "Failed to read csr 0x%04x",
760 CSR_REAL_ADDR(csraddr));
761 goto err_mutex_unlock;
764 /* Check whether IDT successfully retrieved CSR data */
765 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) {
766 dev_err(dev, "IDT failed to perform CSR r/w");
768 goto err_mutex_unlock;
771 /* Unlock IDT SMBus device */
773 mutex_unlock(&pdev->smb_mtx);
779 * idt_csr_read() - CSR read operation
780 * @pdev: Pointer to the driver data
781 * @csraddr: CSR address (with no two LS bits)
782 * @data: Data to be written to CSR
784 static int idt_csr_read(struct idt_89hpesx_dev *pdev, u16 csraddr, u32 *data)
786 struct device *dev = &pdev->client->dev;
787 struct idt_csr_seq csrseq;
788 struct idt_smb_seq smbseq;
791 /* Initialize SMBus sequence fields */
792 smbseq.ccode = pdev->iniccode | CCODE_CSR;
793 smbseq.data = (u8 *)&csrseq;
795 /* Lock IDT SMBus device */
796 mutex_lock(&pdev->smb_mtx);
798 /* Send CSR register address before reading it */
799 smbseq.bytecnt = CSR_WRRD_CNT;
800 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ;
801 csrseq.csraddr = cpu_to_le16(csraddr);
802 ret = pdev->smb_write(pdev, &smbseq);
804 dev_err(dev, "Failed to init csr address 0x%04x",
805 CSR_REAL_ADDR(csraddr));
806 goto err_mutex_unlock;
809 /* Perform read operation */
810 smbseq.bytecnt = CSR_RD_CNT;
811 ret = pdev->smb_read(pdev, &smbseq);
813 dev_err(dev, "Failed to read csr 0x%04hx",
814 CSR_REAL_ADDR(csraddr));
815 goto err_mutex_unlock;
818 /* Check whether IDT successfully retrieved CSR data */
819 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) {
820 dev_err(dev, "IDT failed to perform CSR r/w");
822 goto err_mutex_unlock;
825 /* Save data retrieved from IDT */
826 *data = le32_to_cpu(csrseq.data);
828 /* Unlock IDT SMBus device */
830 mutex_unlock(&pdev->smb_mtx);
835 /*===========================================================================
836 * Sysfs/debugfs-nodes IO-operations
837 *===========================================================================
841 * eeprom_write() - EEPROM sysfs-node write callback
842 * @filep: Pointer to the file system node
843 * @kobj: Pointer to the kernel object related to the sysfs-node
844 * @attr: Attributes of the file
845 * @buf: Buffer to write data to
846 * @off: Offset at which data should be written to
847 * @count: Number of bytes to write
849 static ssize_t eeprom_write(struct file *filp, struct kobject *kobj,
850 struct bin_attribute *attr,
851 char *buf, loff_t off, size_t count)
853 struct idt_89hpesx_dev *pdev;
856 /* Retrieve driver data */
857 pdev = dev_get_drvdata(kobj_to_dev(kobj));
859 /* Perform EEPROM write operation */
860 ret = idt_eeprom_write(pdev, (u16)off, (u16)count, (u8 *)buf);
861 return (ret != 0 ? ret : count);
865 * eeprom_read() - EEPROM sysfs-node read callback
866 * @filep: Pointer to the file system node
867 * @kobj: Pointer to the kernel object related to the sysfs-node
868 * @attr: Attributes of the file
869 * @buf: Buffer to write data to
870 * @off: Offset at which data should be written to
871 * @count: Number of bytes to write
873 static ssize_t eeprom_read(struct file *filp, struct kobject *kobj,
874 struct bin_attribute *attr,
875 char *buf, loff_t off, size_t count)
877 struct idt_89hpesx_dev *pdev;
880 /* Retrieve driver data */
881 pdev = dev_get_drvdata(kobj_to_dev(kobj));
883 /* Perform EEPROM read operation */
884 ret = idt_eeprom_read(pdev, (u16)off, (u16)count, (u8 *)buf);
885 return (ret != 0 ? ret : count);
889 * idt_dbgfs_csr_write() - CSR debugfs-node write callback
890 * @filep: Pointer to the file system file descriptor
891 * @buf: Buffer to read data from
892 * @count: Size of the buffer
893 * @offp: Offset within the file
895 * It accepts either "0x<reg addr>:0x<value>" for saving register address
896 * and writing value to specified DWORD register or "0x<reg addr>" for
897 * just saving register address in order to perform next read operation.
899 * WARNING No spaces are allowed. Incoming string must be strictly formated as:
900 * "<reg addr>:<value>". Register address must be aligned within 4 bytes
903 static ssize_t idt_dbgfs_csr_write(struct file *filep, const char __user *ubuf,
904 size_t count, loff_t *offp)
906 struct idt_89hpesx_dev *pdev = filep->private_data;
907 char *colon_ch, *csraddr_str, *csrval_str;
908 int ret, csraddr_len;
912 /* Copy data from User-space */
913 buf = kmalloc(count + 1, GFP_KERNEL);
917 ret = simple_write_to_buffer(buf, count, offp, ubuf, count);
922 /* Find position of colon in the buffer */
923 colon_ch = strnchr(buf, count, ':');
926 * If there is colon passed then new CSR value should be parsed as
927 * well, so allocate buffer for CSR address substring.
928 * If no colon is found, then string must have just one number with
931 if (colon_ch != NULL) {
932 csraddr_len = colon_ch - buf;
934 kmalloc(csraddr_len + 1, GFP_KERNEL);
935 if (csraddr_str == NULL) {
939 /* Copy the register address to the substring buffer */
940 strncpy(csraddr_str, buf, csraddr_len);
941 csraddr_str[csraddr_len] = '\0';
942 /* Register value must follow the colon */
943 csrval_str = colon_ch + 1;
944 } else /* if (str_colon == NULL) */ {
945 csraddr_str = (char *)buf; /* Just to shut warning up */
946 csraddr_len = strnlen(csraddr_str, count);
950 /* Convert CSR address to u32 value */
951 ret = kstrtou32(csraddr_str, 0, &csraddr);
953 goto free_csraddr_str;
955 /* Check whether passed register address is valid */
956 if (csraddr > CSR_MAX || !IS_ALIGNED(csraddr, SZ_4)) {
958 goto free_csraddr_str;
961 /* Shift register address to the right so to have u16 address */
962 pdev->csr = (csraddr >> 2);
964 /* Parse new CSR value and send it to IDT, if colon has been found */
965 if (colon_ch != NULL) {
966 ret = kstrtou32(csrval_str, 0, &csrval);
968 goto free_csraddr_str;
970 ret = idt_csr_write(pdev, pdev->csr, csrval);
972 goto free_csraddr_str;
975 /* Free memory only if colon has been found */
977 if (colon_ch != NULL)
980 /* Free buffer allocated for data retrieved from User-space */
984 return (ret != 0 ? ret : count);
988 * idt_dbgfs_csr_read() - CSR debugfs-node read callback
989 * @filep: Pointer to the file system file descriptor
990 * @buf: Buffer to write data to
991 * @count: Size of the buffer
992 * @offp: Offset within the file
994 * It just prints the pair "0x<reg addr>:0x<value>" to passed buffer.
996 #define CSRBUF_SIZE ((size_t)32)
997 static ssize_t idt_dbgfs_csr_read(struct file *filep, char __user *ubuf,
998 size_t count, loff_t *offp)
1000 struct idt_89hpesx_dev *pdev = filep->private_data;
1001 u32 csraddr, csrval;
1002 char buf[CSRBUF_SIZE];
1005 /* Perform CSR read operation */
1006 ret = idt_csr_read(pdev, pdev->csr, &csrval);
1010 /* Shift register address to the left so to have real address */
1011 csraddr = ((u32)pdev->csr << 2);
1013 /* Print the "0x<reg addr>:0x<value>" to buffer */
1014 size = snprintf(buf, CSRBUF_SIZE, "0x%05x:0x%08x\n",
1015 (unsigned int)csraddr, (unsigned int)csrval);
1017 /* Copy data to User-space */
1018 return simple_read_from_buffer(ubuf, count, offp, buf, size);
1022 * eeprom_attribute - EEPROM sysfs-node attributes
1024 * NOTE Size will be changed in compliance with OF node. EEPROM attribute will
1025 * be read-only as well if the corresponding flag is specified in OF node.
1027 static BIN_ATTR_RW(eeprom, EEPROM_DEF_SIZE);
1030 * csr_dbgfs_ops - CSR debugfs-node read/write operations
1032 static const struct file_operations csr_dbgfs_ops = {
1033 .owner = THIS_MODULE,
1034 .open = simple_open,
1035 .write = idt_dbgfs_csr_write,
1036 .read = idt_dbgfs_csr_read
1039 /*===========================================================================
1040 * Driver init/deinit methods
1041 *===========================================================================
1045 * idt_set_defval() - disable EEPROM access by default
1046 * @pdev: Pointer to the driver data
1048 static void idt_set_defval(struct idt_89hpesx_dev *pdev)
1050 /* If OF info is missing then use next values */
1057 static const struct i2c_device_id ee_ids[];
1060 * idt_ee_match_id() - check whether the node belongs to compatible EEPROMs
1062 static const struct i2c_device_id *idt_ee_match_id(struct fwnode_handle *fwnode)
1064 const struct i2c_device_id *id = ee_ids;
1065 const char *compatible, *p;
1066 char devname[I2C_NAME_SIZE];
1069 ret = fwnode_property_read_string(fwnode, "compatible", &compatible);
1073 p = strchr(compatible, ',');
1074 strlcpy(devname, p ? p + 1 : compatible, sizeof(devname));
1075 /* Search through the device name */
1076 while (id->name[0]) {
1077 if (strcmp(devname, id->name) == 0)
1085 * idt_get_fw_data() - get IDT i2c-device parameters from device tree
1086 * @pdev: Pointer to the driver data
1088 static void idt_get_fw_data(struct idt_89hpesx_dev *pdev)
1090 struct device *dev = &pdev->client->dev;
1091 struct fwnode_handle *fwnode;
1092 const struct i2c_device_id *ee_id = NULL;
1096 device_for_each_child_node(dev, fwnode) {
1097 ee_id = idt_ee_match_id(fwnode);
1101 dev_warn(dev, "Skip unsupported EEPROM device %pfw\n", fwnode);
1104 /* If there is no fwnode EEPROM device, then set zero size */
1106 dev_warn(dev, "No fwnode, EEPROM access disabled");
1107 idt_set_defval(pdev);
1111 /* Retrieve EEPROM size */
1112 pdev->eesize = (u32)ee_id->driver_data;
1114 /* Get custom EEPROM address from 'reg' attribute */
1115 ret = fwnode_property_read_u32(fwnode, "reg", &eeprom_addr);
1116 if (ret || (eeprom_addr == 0)) {
1117 dev_warn(dev, "No EEPROM reg found, use default address 0x%x",
1120 pdev->eeaddr = EEPROM_DEF_ADDR << 1;
1122 pdev->inieecmd = EEPROM_USA;
1123 pdev->eeaddr = eeprom_addr << 1;
1126 /* Check EEPROM 'read-only' flag */
1127 if (fwnode_property_read_bool(fwnode, "read-only"))
1129 else /* if (!fwnode_property_read_bool(node, "read-only")) */
1132 fwnode_handle_put(fwnode);
1133 dev_info(dev, "EEPROM of %d bytes found by 0x%x",
1134 pdev->eesize, pdev->eeaddr);
1138 * idt_create_pdev() - create and init data structure of the driver
1139 * @client: i2c client of IDT PCIe-switch device
1141 static struct idt_89hpesx_dev *idt_create_pdev(struct i2c_client *client)
1143 struct idt_89hpesx_dev *pdev;
1145 /* Allocate memory for driver data */
1146 pdev = devm_kmalloc(&client->dev, sizeof(struct idt_89hpesx_dev),
1149 return ERR_PTR(-ENOMEM);
1151 /* Initialize basic fields of the data */
1152 pdev->client = client;
1153 i2c_set_clientdata(client, pdev);
1155 /* Read firmware nodes information */
1156 idt_get_fw_data(pdev);
1158 /* Initialize basic CSR CMD field - use full DWORD-sized r/w ops */
1159 pdev->inicsrcmd = CSR_DWE;
1160 pdev->csr = CSR_DEF;
1162 /* Enable Packet Error Checking if it's supported by adapter */
1163 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_PEC)) {
1164 pdev->iniccode = CCODE_PEC;
1165 client->flags |= I2C_CLIENT_PEC;
1166 } else /* PEC is unsupported */ {
1174 * idt_free_pdev() - free data structure of the driver
1175 * @pdev: Pointer to the driver data
1177 static void idt_free_pdev(struct idt_89hpesx_dev *pdev)
1179 /* Clear driver data from device private field */
1180 i2c_set_clientdata(pdev->client, NULL);
1184 * idt_set_smbus_ops() - set supported SMBus operations
1185 * @pdev: Pointer to the driver data
1186 * Return status of smbus check operations
1188 static int idt_set_smbus_ops(struct idt_89hpesx_dev *pdev)
1190 struct i2c_adapter *adapter = pdev->client->adapter;
1191 struct device *dev = &pdev->client->dev;
1193 /* Check i2c adapter read functionality */
1194 if (i2c_check_functionality(adapter,
1195 I2C_FUNC_SMBUS_READ_BLOCK_DATA)) {
1196 pdev->smb_read = idt_smb_read_block;
1197 dev_dbg(dev, "SMBus block-read op chosen");
1198 } else if (i2c_check_functionality(adapter,
1199 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
1200 pdev->smb_read = idt_smb_read_i2c_block;
1201 dev_dbg(dev, "SMBus i2c-block-read op chosen");
1202 } else if (i2c_check_functionality(adapter,
1203 I2C_FUNC_SMBUS_READ_WORD_DATA) &&
1204 i2c_check_functionality(adapter,
1205 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
1206 pdev->smb_read = idt_smb_read_word;
1207 dev_warn(dev, "Use slow word/byte SMBus read ops");
1208 } else if (i2c_check_functionality(adapter,
1209 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
1210 pdev->smb_read = idt_smb_read_byte;
1211 dev_warn(dev, "Use slow byte SMBus read op");
1212 } else /* no supported smbus read operations */ {
1213 dev_err(dev, "No supported SMBus read op");
1214 return -EPFNOSUPPORT;
1217 /* Check i2c adapter write functionality */
1218 if (i2c_check_functionality(adapter,
1219 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)) {
1220 pdev->smb_write = idt_smb_write_block;
1221 dev_dbg(dev, "SMBus block-write op chosen");
1222 } else if (i2c_check_functionality(adapter,
1223 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
1224 pdev->smb_write = idt_smb_write_i2c_block;
1225 dev_dbg(dev, "SMBus i2c-block-write op chosen");
1226 } else if (i2c_check_functionality(adapter,
1227 I2C_FUNC_SMBUS_WRITE_WORD_DATA) &&
1228 i2c_check_functionality(adapter,
1229 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
1230 pdev->smb_write = idt_smb_write_word;
1231 dev_warn(dev, "Use slow word/byte SMBus write op");
1232 } else if (i2c_check_functionality(adapter,
1233 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
1234 pdev->smb_write = idt_smb_write_byte;
1235 dev_warn(dev, "Use slow byte SMBus write op");
1236 } else /* no supported smbus write operations */ {
1237 dev_err(dev, "No supported SMBus write op");
1238 return -EPFNOSUPPORT;
1241 /* Initialize IDT SMBus slave interface mutex */
1242 mutex_init(&pdev->smb_mtx);
1248 * idt_check_dev() - check whether it's really IDT 89HPESx device
1249 * @pdev: Pointer to the driver data
1250 * Return status of i2c adapter check operation
1252 static int idt_check_dev(struct idt_89hpesx_dev *pdev)
1254 struct device *dev = &pdev->client->dev;
1258 /* Read VID and DID directly from IDT memory space */
1259 ret = idt_csr_read(pdev, IDT_VIDDID_CSR, &viddid);
1261 dev_err(dev, "Failed to read VID/DID");
1265 /* Check whether it's IDT device */
1266 if ((viddid & IDT_VID_MASK) != PCI_VENDOR_ID_IDT) {
1267 dev_err(dev, "Got unsupported VID/DID: 0x%08x", viddid);
1271 dev_info(dev, "Found IDT 89HPES device VID:0x%04x, DID:0x%04x",
1272 (viddid & IDT_VID_MASK), (viddid >> 16));
1278 * idt_create_sysfs_files() - create sysfs attribute files
1279 * @pdev: Pointer to the driver data
1280 * Return status of operation
1282 static int idt_create_sysfs_files(struct idt_89hpesx_dev *pdev)
1284 struct device *dev = &pdev->client->dev;
1287 /* Don't do anything if EEPROM isn't accessible */
1288 if (pdev->eesize == 0) {
1289 dev_dbg(dev, "Skip creating sysfs-files");
1293 /* Allocate memory for attribute file */
1294 pdev->ee_file = devm_kmalloc(dev, sizeof(*pdev->ee_file), GFP_KERNEL);
1298 /* Copy the declared EEPROM attr structure to change some of fields */
1299 memcpy(pdev->ee_file, &bin_attr_eeprom, sizeof(*pdev->ee_file));
1301 /* In case of read-only EEPROM get rid of write ability */
1303 pdev->ee_file->attr.mode &= ~0200;
1304 pdev->ee_file->write = NULL;
1306 /* Create EEPROM sysfs file */
1307 pdev->ee_file->size = pdev->eesize;
1308 ret = sysfs_create_bin_file(&dev->kobj, pdev->ee_file);
1310 dev_err(dev, "Failed to create EEPROM sysfs-node");
1318 * idt_remove_sysfs_files() - remove sysfs attribute files
1319 * @pdev: Pointer to the driver data
1321 static void idt_remove_sysfs_files(struct idt_89hpesx_dev *pdev)
1323 struct device *dev = &pdev->client->dev;
1325 /* Don't do anything if EEPROM wasn't accessible */
1326 if (pdev->eesize == 0)
1329 /* Remove EEPROM sysfs file */
1330 sysfs_remove_bin_file(&dev->kobj, pdev->ee_file);
1334 * idt_create_dbgfs_files() - create debugfs files
1335 * @pdev: Pointer to the driver data
1337 #define CSRNAME_LEN ((size_t)32)
1338 static void idt_create_dbgfs_files(struct idt_89hpesx_dev *pdev)
1340 struct i2c_client *cli = pdev->client;
1341 char fname[CSRNAME_LEN];
1343 /* Create Debugfs directory for CSR file */
1344 snprintf(fname, CSRNAME_LEN, "%d-%04hx", cli->adapter->nr, cli->addr);
1345 pdev->csr_dir = debugfs_create_dir(fname, csr_dbgdir);
1347 /* Create Debugfs file for CSR read/write operations */
1348 debugfs_create_file(cli->name, 0600, pdev->csr_dir, pdev,
1353 * idt_remove_dbgfs_files() - remove debugfs files
1354 * @pdev: Pointer to the driver data
1356 static void idt_remove_dbgfs_files(struct idt_89hpesx_dev *pdev)
1358 /* Remove CSR directory and it sysfs-node */
1359 debugfs_remove_recursive(pdev->csr_dir);
1363 * idt_probe() - IDT 89HPESx driver probe() callback method
1365 static int idt_probe(struct i2c_client *client, const struct i2c_device_id *id)
1367 struct idt_89hpesx_dev *pdev;
1370 /* Create driver data */
1371 pdev = idt_create_pdev(client);
1373 return PTR_ERR(pdev);
1375 /* Set SMBus operations */
1376 ret = idt_set_smbus_ops(pdev);
1380 /* Check whether it is truly IDT 89HPESx device */
1381 ret = idt_check_dev(pdev);
1385 /* Create sysfs files */
1386 ret = idt_create_sysfs_files(pdev);
1390 /* Create debugfs files */
1391 idt_create_dbgfs_files(pdev);
1396 idt_free_pdev(pdev);
1402 * idt_remove() - IDT 89HPESx driver remove() callback method
1404 static int idt_remove(struct i2c_client *client)
1406 struct idt_89hpesx_dev *pdev = i2c_get_clientdata(client);
1408 /* Remove debugfs files first */
1409 idt_remove_dbgfs_files(pdev);
1411 /* Remove sysfs files */
1412 idt_remove_sysfs_files(pdev);
1414 /* Discard driver data structure */
1415 idt_free_pdev(pdev);
1421 * ee_ids - array of supported EEPROMs
1423 static const struct i2c_device_id ee_ids[] = {
1431 MODULE_DEVICE_TABLE(i2c, ee_ids);
1434 * idt_ids - supported IDT 89HPESx devices
1436 static const struct i2c_device_id idt_ids[] = {
1437 { "89hpes8nt2", 0 },
1438 { "89hpes12nt3", 0 },
1440 { "89hpes24nt6ag2", 0 },
1441 { "89hpes32nt8ag2", 0 },
1442 { "89hpes32nt8bg2", 0 },
1443 { "89hpes12nt12g2", 0 },
1444 { "89hpes16nt16g2", 0 },
1445 { "89hpes24nt24g2", 0 },
1446 { "89hpes32nt24ag2", 0 },
1447 { "89hpes32nt24bg2", 0 },
1449 { "89hpes12n3", 0 },
1450 { "89hpes12n3a", 0 },
1451 { "89hpes24n3", 0 },
1452 { "89hpes24n3a", 0 },
1454 { "89hpes32h8", 0 },
1455 { "89hpes32h8g2", 0 },
1456 { "89hpes48h12", 0 },
1457 { "89hpes48h12g2", 0 },
1458 { "89hpes48h12ag2", 0 },
1459 { "89hpes16h16", 0 },
1460 { "89hpes22h16", 0 },
1461 { "89hpes22h16g2", 0 },
1462 { "89hpes34h16", 0 },
1463 { "89hpes34h16g2", 0 },
1464 { "89hpes64h16", 0 },
1465 { "89hpes64h16g2", 0 },
1466 { "89hpes64h16ag2", 0 },
1468 /* { "89hpes3t3", 0 }, // No SMBus-slave iface */
1469 { "89hpes12t3g2", 0 },
1470 { "89hpes24t3g2", 0 },
1471 /* { "89hpes4t4", 0 }, // No SMBus-slave iface */
1472 { "89hpes16t4", 0 },
1473 { "89hpes4t4g2", 0 },
1474 { "89hpes10t4g2", 0 },
1475 { "89hpes16t4g2", 0 },
1476 { "89hpes16t4ag2", 0 },
1480 { "89hpes8t5a", 0 },
1481 { "89hpes24t6", 0 },
1482 { "89hpes6t6g2", 0 },
1483 { "89hpes24t6g2", 0 },
1484 { "89hpes16t7", 0 },
1485 { "89hpes32t8", 0 },
1486 { "89hpes32t8g2", 0 },
1487 { "89hpes48t12", 0 },
1488 { "89hpes48t12g2", 0 },
1489 { /* END OF LIST */ }
1491 MODULE_DEVICE_TABLE(i2c, idt_ids);
1493 static const struct of_device_id idt_of_match[] = {
1494 { .compatible = "idt,89hpes8nt2", },
1495 { .compatible = "idt,89hpes12nt3", },
1497 { .compatible = "idt,89hpes24nt6ag2", },
1498 { .compatible = "idt,89hpes32nt8ag2", },
1499 { .compatible = "idt,89hpes32nt8bg2", },
1500 { .compatible = "idt,89hpes12nt12g2", },
1501 { .compatible = "idt,89hpes16nt16g2", },
1502 { .compatible = "idt,89hpes24nt24g2", },
1503 { .compatible = "idt,89hpes32nt24ag2", },
1504 { .compatible = "idt,89hpes32nt24bg2", },
1506 { .compatible = "idt,89hpes12n3", },
1507 { .compatible = "idt,89hpes12n3a", },
1508 { .compatible = "idt,89hpes24n3", },
1509 { .compatible = "idt,89hpes24n3a", },
1511 { .compatible = "idt,89hpes32h8", },
1512 { .compatible = "idt,89hpes32h8g2", },
1513 { .compatible = "idt,89hpes48h12", },
1514 { .compatible = "idt,89hpes48h12g2", },
1515 { .compatible = "idt,89hpes48h12ag2", },
1516 { .compatible = "idt,89hpes16h16", },
1517 { .compatible = "idt,89hpes22h16", },
1518 { .compatible = "idt,89hpes22h16g2", },
1519 { .compatible = "idt,89hpes34h16", },
1520 { .compatible = "idt,89hpes34h16g2", },
1521 { .compatible = "idt,89hpes64h16", },
1522 { .compatible = "idt,89hpes64h16g2", },
1523 { .compatible = "idt,89hpes64h16ag2", },
1525 { .compatible = "idt,89hpes12t3g2", },
1526 { .compatible = "idt,89hpes24t3g2", },
1528 { .compatible = "idt,89hpes16t4", },
1529 { .compatible = "idt,89hpes4t4g2", },
1530 { .compatible = "idt,89hpes10t4g2", },
1531 { .compatible = "idt,89hpes16t4g2", },
1532 { .compatible = "idt,89hpes16t4ag2", },
1533 { .compatible = "idt,89hpes5t5", },
1534 { .compatible = "idt,89hpes6t5", },
1535 { .compatible = "idt,89hpes8t5", },
1536 { .compatible = "idt,89hpes8t5a", },
1537 { .compatible = "idt,89hpes24t6", },
1538 { .compatible = "idt,89hpes6t6g2", },
1539 { .compatible = "idt,89hpes24t6g2", },
1540 { .compatible = "idt,89hpes16t7", },
1541 { .compatible = "idt,89hpes32t8", },
1542 { .compatible = "idt,89hpes32t8g2", },
1543 { .compatible = "idt,89hpes48t12", },
1544 { .compatible = "idt,89hpes48t12g2", },
1547 MODULE_DEVICE_TABLE(of, idt_of_match);
1550 * idt_driver - IDT 89HPESx driver structure
1552 static struct i2c_driver idt_driver = {
1555 .of_match_table = idt_of_match,
1558 .remove = idt_remove,
1559 .id_table = idt_ids,
1563 * idt_init() - IDT 89HPESx driver init() callback method
1565 static int __init idt_init(void)
1567 /* Create Debugfs directory first */
1568 if (debugfs_initialized())
1569 csr_dbgdir = debugfs_create_dir("idt_csr", NULL);
1571 /* Add new i2c-device driver */
1572 return i2c_add_driver(&idt_driver);
1574 module_init(idt_init);
1577 * idt_exit() - IDT 89HPESx driver exit() callback method
1579 static void __exit idt_exit(void)
1581 /* Discard debugfs directory and all files if any */
1582 debugfs_remove_recursive(csr_dbgdir);
1584 /* Unregister i2c-device driver */
1585 i2c_del_driver(&idt_driver);
1587 module_exit(idt_exit);