drivers/misc/eeprom/eeprom_93xx46.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Driver for 93xx46 EEPROMs
   4  *
   5  * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
   6  */
   7
   8 #include <linux/delay.h>
   9 #include <linux/device.h>
  10 #include <linux/gpio/consumer.h>
  11 #include <linux/kernel.h>
  12 #include <linux/log2.h>
  13 #include <linux/module.h>
  14 #include <linux/mutex.h>
  15 #include <linux/of.h>
  16 #include <linux/of_device.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/slab.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/nvmem-provider.h>
  21 #include <linux/eeprom_93xx46.h>
  22
  23 #define OP_START        0x4
  24 #define OP_WRITE        (OP_START | 0x1)
  25 #define OP_READ         (OP_START | 0x2)
  26 #define ADDR_EWDS       0x00
  27 #define ADDR_ERAL       0x20
  28 #define ADDR_EWEN       0x30
  29
  30 struct eeprom_93xx46_devtype_data {
  31         unsigned int quirks;
  32         unsigned char flags;
  33 };
  34
  35 static const struct eeprom_93xx46_devtype_data at93c46_data = {
  36         .flags = EE_SIZE1K,
  37 };
  38
  39 static const struct eeprom_93xx46_devtype_data at93c56_data = {
  40         .flags = EE_SIZE2K,
  41 };
  42
  43 static const struct eeprom_93xx46_devtype_data at93c66_data = {
  44         .flags = EE_SIZE4K,
  45 };
  46
  47 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
  48         .flags = EE_SIZE1K,
  49         .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
  50                   EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
  51 };
  52
  53 static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
  54         .flags = EE_SIZE1K,
  55         .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
  56 };
  57
  58 struct eeprom_93xx46_dev {
  59         struct spi_device *spi;
  60         struct eeprom_93xx46_platform_data *pdata;
  61         struct mutex lock;
  62         struct nvmem_config nvmem_config;
  63         struct nvmem_device *nvmem;
  64         int addrlen;
  65         int size;
  66 };
  67
  68 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
  69 {
  70         return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
  71 }
  72
  73 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
  74 {
  75         return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
  76 }
  77
  78 static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
  79 {
  80         return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
  81 }
  82
  83 static int eeprom_93xx46_read(void *priv, unsigned int off,
  84                               void *val, size_t count)
  85 {
  86         struct eeprom_93xx46_dev *edev = priv;
  87         char *buf = val;
  88         int err = 0;
  89         int bits;
  90
  91         if (unlikely(off >= edev->size))
  92                 return 0;
  93         if ((off + count) > edev->size)
  94                 count = edev->size - off;
  95         if (unlikely(!count))
  96                 return count;
  97
  98         mutex_lock(&edev->lock);
  99
 100         if (edev->pdata->prepare)
 101                 edev->pdata->prepare(edev);
 102
 103         /* The opcode in front of the address is three bits. */
 104         bits = edev->addrlen + 3;
 105
 106         while (count) {
 107                 struct spi_message m;
 108                 struct spi_transfer t[2] = { { 0 } };
 109                 u16 cmd_addr = OP_READ << edev->addrlen;
 110                 size_t nbytes = count;
 111
 112                 if (edev->pdata->flags & EE_ADDR8) {
 113                         cmd_addr |= off;
 114                         if (has_quirk_single_word_read(edev))
 115                                 nbytes = 1;
 116                 } else {
 117                         cmd_addr |= (off >> 1);
 118                         if (has_quirk_single_word_read(edev))
 119                                 nbytes = 2;
 120                 }
 121
 122                 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
 123                         cmd_addr, edev->spi->max_speed_hz);
 124
 125                 if (has_quirk_extra_read_cycle(edev)) {
 126                         cmd_addr <<= 1;
 127                         bits += 1;
 128                 }
 129
 130                 spi_message_init(&m);
 131
 132                 t[0].tx_buf = (char *)&cmd_addr;
 133                 t[0].len = 2;
 134                 t[0].bits_per_word = bits;
 135                 spi_message_add_tail(&t[0], &m);
 136
 137                 t[1].rx_buf = buf;
 138                 t[1].len = count;
 139                 t[1].bits_per_word = 8;
 140                 spi_message_add_tail(&t[1], &m);
 141
 142                 err = spi_sync(edev->spi, &m);
 143                 /* have to wait at least Tcsl ns */
 144                 ndelay(250);
 145
 146                 if (err) {
 147                         dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
 148                                 nbytes, (int)off, err);
 149                         break;
 150                 }
 151
 152                 buf += nbytes;
 153                 off += nbytes;
 154                 count -= nbytes;
 155         }
 156
 157         if (edev->pdata->finish)
 158                 edev->pdata->finish(edev);
 159
 160         mutex_unlock(&edev->lock);
 161
 162         return err;
 163 }
 164
 165 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
 166 {
 167         struct spi_message m;
 168         struct spi_transfer t;
 169         int bits, ret;
 170         u16 cmd_addr;
 171
 172         /* The opcode in front of the address is three bits. */
 173         bits = edev->addrlen + 3;
 174
 175         cmd_addr = OP_START << edev->addrlen;
 176         if (edev->pdata->flags & EE_ADDR8)
 177                 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
 178         else
 179                 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
 180
 181         if (has_quirk_instruction_length(edev)) {
 182                 cmd_addr <<= 2;
 183                 bits += 2;
 184         }
 185
 186         dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
 187                         is_on ? "en" : "ds", cmd_addr, bits);
 188
 189         spi_message_init(&m);
 190         memset(&t, 0, sizeof(t));
 191
 192         t.tx_buf = &cmd_addr;
 193         t.len = 2;
 194         t.bits_per_word = bits;
 195         spi_message_add_tail(&t, &m);
 196
 197         mutex_lock(&edev->lock);
 198
 199         if (edev->pdata->prepare)
 200                 edev->pdata->prepare(edev);
 201
 202         ret = spi_sync(edev->spi, &m);
 203         /* have to wait at least Tcsl ns */
 204         ndelay(250);
 205         if (ret)
 206                 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
 207                         is_on ? "en" : "dis", ret);
 208
 209         if (edev->pdata->finish)
 210                 edev->pdata->finish(edev);
 211
 212         mutex_unlock(&edev->lock);
 213         return ret;
 214 }
 215
 216 static ssize_t
 217 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
 218                          const char *buf, unsigned off)
 219 {
 220         struct spi_message m;
 221         struct spi_transfer t[2];
 222         int bits, data_len, ret;
 223         u16 cmd_addr;
 224
 225         if (unlikely(off >= edev->size))
 226                 return -EINVAL;
 227
 228         /* The opcode in front of the address is three bits. */
 229         bits = edev->addrlen + 3;
 230
 231         cmd_addr = OP_WRITE << edev->addrlen;
 232
 233         if (edev->pdata->flags & EE_ADDR8) {
 234                 cmd_addr |= off;
 235                 data_len = 1;
 236         } else {
 237                 cmd_addr |= (off >> 1);
 238                 data_len = 2;
 239         }
 240
 241         dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
 242
 243         spi_message_init(&m);
 244         memset(t, 0, sizeof(t));
 245
 246         t[0].tx_buf = (char *)&cmd_addr;
 247         t[0].len = 2;
 248         t[0].bits_per_word = bits;
 249         spi_message_add_tail(&t[0], &m);
 250
 251         t[1].tx_buf = buf;
 252         t[1].len = data_len;
 253         t[1].bits_per_word = 8;
 254         spi_message_add_tail(&t[1], &m);
 255
 256         ret = spi_sync(edev->spi, &m);
 257         /* have to wait program cycle time Twc ms */
 258         mdelay(6);
 259         return ret;
 260 }
 261
 262 static int eeprom_93xx46_write(void *priv, unsigned int off,
 263                                    void *val, size_t count)
 264 {
 265         struct eeprom_93xx46_dev *edev = priv;
 266         char *buf = val;
 267         int i, ret, step = 1;
 268
 269         if (unlikely(off >= edev->size))
 270                 return -EFBIG;
 271         if ((off + count) > edev->size)
 272                 count = edev->size - off;
 273         if (unlikely(!count))
 274                 return count;
 275
 276         /* only write even number of bytes on 16-bit devices */
 277         if (edev->pdata->flags & EE_ADDR16) {
 278                 step = 2;
 279                 count &= ~1;
 280         }
 281
 282         /* erase/write enable */
 283         ret = eeprom_93xx46_ew(edev, 1);
 284         if (ret)
 285                 return ret;
 286
 287         mutex_lock(&edev->lock);
 288
 289         if (edev->pdata->prepare)
 290                 edev->pdata->prepare(edev);
 291
 292         for (i = 0; i < count; i += step) {
 293                 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
 294                 if (ret) {
 295                         dev_err(&edev->spi->dev, "write failed at %d: %d\n",
 296                                 (int)off + i, ret);
 297                         break;
 298                 }
 299         }
 300
 301         if (edev->pdata->finish)
 302                 edev->pdata->finish(edev);
 303
 304         mutex_unlock(&edev->lock);
 305
 306         /* erase/write disable */
 307         eeprom_93xx46_ew(edev, 0);
 308         return ret;
 309 }
 310
 311 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
 312 {
 313         struct eeprom_93xx46_platform_data *pd = edev->pdata;
 314         struct spi_message m;
 315         struct spi_transfer t;
 316         int bits, ret;
 317         u16 cmd_addr;
 318
 319         /* The opcode in front of the address is three bits. */
 320         bits = edev->addrlen + 3;
 321
 322         cmd_addr = OP_START << edev->addrlen;
 323         if (edev->pdata->flags & EE_ADDR8)
 324                 cmd_addr |= ADDR_ERAL << 1;
 325         else
 326                 cmd_addr |= ADDR_ERAL;
 327
 328         if (has_quirk_instruction_length(edev)) {
 329                 cmd_addr <<= 2;
 330                 bits += 2;
 331         }
 332
 333         dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
 334
 335         spi_message_init(&m);
 336         memset(&t, 0, sizeof(t));
 337
 338         t.tx_buf = &cmd_addr;
 339         t.len = 2;
 340         t.bits_per_word = bits;
 341         spi_message_add_tail(&t, &m);
 342
 343         mutex_lock(&edev->lock);
 344
 345         if (edev->pdata->prepare)
 346                 edev->pdata->prepare(edev);
 347
 348         ret = spi_sync(edev->spi, &m);
 349         if (ret)
 350                 dev_err(&edev->spi->dev, "erase error %d\n", ret);
 351         /* have to wait erase cycle time Tec ms */
 352         mdelay(6);
 353
 354         if (pd->finish)
 355                 pd->finish(edev);
 356
 357         mutex_unlock(&edev->lock);
 358         return ret;
 359 }
 360
 361 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
 362                                          struct device_attribute *attr,
 363                                          const char *buf, size_t count)
 364 {
 365         struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
 366         int erase = 0, ret;
 367
 368         sscanf(buf, "%d", &erase);
 369         if (erase) {
 370                 ret = eeprom_93xx46_ew(edev, 1);
 371                 if (ret)
 372                         return ret;
 373                 ret = eeprom_93xx46_eral(edev);
 374                 if (ret)
 375                         return ret;
 376                 ret = eeprom_93xx46_ew(edev, 0);
 377                 if (ret)
 378                         return ret;
 379         }
 380         return count;
 381 }
 382 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
 383
 384 static void select_assert(void *context)
 385 {
 386         struct eeprom_93xx46_dev *edev = context;
 387
 388         gpiod_set_value_cansleep(edev->pdata->select, 1);
 389 }
 390
 391 static void select_deassert(void *context)
 392 {
 393         struct eeprom_93xx46_dev *edev = context;
 394
 395         gpiod_set_value_cansleep(edev->pdata->select, 0);
 396 }
 397
 398 static const struct of_device_id eeprom_93xx46_of_table[] = {
 399         { .compatible = "eeprom-93xx46", .data = &at93c46_data, },
 400         { .compatible = "atmel,at93c46", .data = &at93c46_data, },
 401         { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
 402         { .compatible = "atmel,at93c56", .data = &at93c56_data, },
 403         { .compatible = "atmel,at93c66", .data = &at93c66_data, },
 404         { .compatible = "microchip,93lc46b", .data = &microchip_93lc46b_data, },
 405         {}
 406 };
 407 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
 408
 409 static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
 410         { .name = "eeprom-93xx46",
 411           .driver_data = (kernel_ulong_t)&at93c46_data, },
 412         { .name = "at93c46",
 413           .driver_data = (kernel_ulong_t)&at93c46_data, },
 414         { .name = "at93c46d",
 415           .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
 416         { .name = "at93c56",
 417           .driver_data = (kernel_ulong_t)&at93c56_data, },
 418         { .name = "at93c66",
 419           .driver_data = (kernel_ulong_t)&at93c66_data, },
 420         { .name = "93lc46b",
 421           .driver_data = (kernel_ulong_t)&microchip_93lc46b_data, },
 422         {}
 423 };
 424 MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
 425
 426 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
 427 {
 428         const struct of_device_id *of_id =
 429                 of_match_device(eeprom_93xx46_of_table, &spi->dev);
 430         struct device_node *np = spi->dev.of_node;
 431         struct eeprom_93xx46_platform_data *pd;
 432         u32 tmp;
 433         int ret;
 434
 435         pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
 436         if (!pd)
 437                 return -ENOMEM;
 438
 439         ret = of_property_read_u32(np, "data-size", &tmp);
 440         if (ret < 0) {
 441                 dev_err(&spi->dev, "data-size property not found\n");
 442                 return ret;
 443         }
 444
 445         if (tmp == 8) {
 446                 pd->flags |= EE_ADDR8;
 447         } else if (tmp == 16) {
 448                 pd->flags |= EE_ADDR16;
 449         } else {
 450                 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
 451                 return -EINVAL;
 452         }
 453
 454         if (of_property_read_bool(np, "read-only"))
 455                 pd->flags |= EE_READONLY;
 456
 457         pd->select = devm_gpiod_get_optional(&spi->dev, "select",
 458                                              GPIOD_OUT_LOW);
 459         if (IS_ERR(pd->select))
 460                 return PTR_ERR(pd->select);
 461
 462         pd->prepare = select_assert;
 463         pd->finish = select_deassert;
 464         gpiod_direction_output(pd->select, 0);
 465
 466         if (of_id->data) {
 467                 const struct eeprom_93xx46_devtype_data *data = of_id->data;
 468
 469                 pd->quirks = data->quirks;
 470                 pd->flags |= data->flags;
 471         }
 472
 473         spi->dev.platform_data = pd;
 474
 475         return 0;
 476 }
 477
 478 static int eeprom_93xx46_probe(struct spi_device *spi)
 479 {
 480         struct eeprom_93xx46_platform_data *pd;
 481         struct eeprom_93xx46_dev *edev;
 482         int err;
 483
 484         if (spi->dev.of_node) {
 485                 err = eeprom_93xx46_probe_dt(spi);
 486                 if (err < 0)
 487                         return err;
 488         }
 489
 490         pd = spi->dev.platform_data;
 491         if (!pd) {
 492                 dev_err(&spi->dev, "missing platform data\n");
 493                 return -ENODEV;
 494         }
 495
 496         edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
 497         if (!edev)
 498                 return -ENOMEM;
 499
 500         if (pd->flags & EE_SIZE1K)
 501                 edev->size = 128;
 502         else if (pd->flags & EE_SIZE2K)
 503                 edev->size = 256;
 504         else if (pd->flags & EE_SIZE4K)
 505                 edev->size = 512;
 506         else {
 507                 dev_err(&spi->dev, "unspecified size\n");
 508                 return -EINVAL;
 509         }
 510
 511         if (pd->flags & EE_ADDR8)
 512                 edev->addrlen = ilog2(edev->size);
 513         else if (pd->flags & EE_ADDR16)
 514                 edev->addrlen = ilog2(edev->size) - 1;
 515         else {
 516                 dev_err(&spi->dev, "unspecified address type\n");
 517                 return -EINVAL;
 518         }
 519
 520         mutex_init(&edev->lock);
 521
 522         edev->spi = spi;
 523         edev->pdata = pd;
 524
 525         edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
 526         edev->nvmem_config.name = dev_name(&spi->dev);
 527         edev->nvmem_config.dev = &spi->dev;
 528         edev->nvmem_config.read_only = pd->flags & EE_READONLY;
 529         edev->nvmem_config.root_only = true;
 530         edev->nvmem_config.owner = THIS_MODULE;
 531         edev->nvmem_config.compat = true;
 532         edev->nvmem_config.base_dev = &spi->dev;
 533         edev->nvmem_config.reg_read = eeprom_93xx46_read;
 534         edev->nvmem_config.reg_write = eeprom_93xx46_write;
 535         edev->nvmem_config.priv = edev;
 536         edev->nvmem_config.stride = 4;
 537         edev->nvmem_config.word_size = 1;
 538         edev->nvmem_config.size = edev->size;
 539
 540         edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
 541         if (IS_ERR(edev->nvmem))
 542                 return PTR_ERR(edev->nvmem);
 543
 544         dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
 545                 (pd->flags & EE_ADDR8) ? 8 : 16,
 546                 edev->size,
 547                 (pd->flags & EE_READONLY) ? "(readonly)" : "");
 548
 549         if (!(pd->flags & EE_READONLY)) {
 550                 if (device_create_file(&spi->dev, &dev_attr_erase))
 551                         dev_err(&spi->dev, "can't create erase interface\n");
 552         }
 553
 554         spi_set_drvdata(spi, edev);
 555         return 0;
 556 }
 557
 558 static void eeprom_93xx46_remove(struct spi_device *spi)
 559 {
 560         struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
 561
 562         if (!(edev->pdata->flags & EE_READONLY))
 563                 device_remove_file(&spi->dev, &dev_attr_erase);
 564 }
 565
 566 static struct spi_driver eeprom_93xx46_driver = {
 567         .driver = {
 568                 .name   = "93xx46",
 569                 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
 570         },
 571         .probe          = eeprom_93xx46_probe,
 572         .remove         = eeprom_93xx46_remove,
 573         .id_table       = eeprom_93xx46_spi_ids,
 574 };
 575
 576 module_spi_driver(eeprom_93xx46_driver);
 577
 578 MODULE_LICENSE("GPL");
 579 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
 580 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
 581 MODULE_ALIAS("spi:93xx46");
 582 MODULE_ALIAS("spi:eeprom-93xx46");
 583 MODULE_ALIAS("spi:93lc46b");