2 * at24.c - handle most I2C EEPROMs
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/mutex.h>
18 #include <linux/mod_devicetable.h>
19 #include <linux/log2.h>
20 #include <linux/bitops.h>
21 #include <linux/jiffies.h>
23 #include <linux/acpi.h>
24 #include <linux/i2c.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/platform_data/at24.h>
29 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
30 * Differences between different vendor product lines (like Atmel AT24C or
31 * MicroChip 24LC, etc) won't much matter for typical read/write access.
32 * There are also I2C RAM chips, likewise interchangeable. One example
33 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
35 * However, misconfiguration can lose data. "Set 16-bit memory address"
36 * to a part with 8-bit addressing will overwrite data. Writing with too
37 * big a page size also loses data. And it's not safe to assume that the
38 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
39 * uses 0x51, for just one example.
41 * Accordingly, explicit board-specific configuration data should be used
42 * in almost all cases. (One partial exception is an SMBus used to access
43 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
45 * So this driver uses "new style" I2C driver binding, expecting to be
46 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
47 * similar kernel-resident tables; or, configuration data coming from
50 * Other than binding model, current differences from "eeprom" driver are
51 * that this one handles write access and isn't restricted to 24c02 devices.
52 * It also handles larger devices (32 kbit and up) with two-byte addresses,
53 * which won't work on pure SMBus systems.
57 struct at24_platform_data chip;
61 ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
62 ssize_t (*write_func)(struct at24_data *,
63 const char *, unsigned int, size_t);
66 * Lock protects against activities from other Linux tasks,
67 * but not from changes by other I2C masters.
73 unsigned num_addresses;
75 struct nvmem_config nvmem_config;
76 struct nvmem_device *nvmem;
79 * Some chips tie up multiple I2C addresses; dummy devices reserve
80 * them for us, and we'll use them with SMBus calls.
82 struct i2c_client *client[];
86 * This parameter is to help this driver avoid blocking other drivers out
87 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
88 * clock, one 256 byte read takes about 1/43 second which is excessive;
89 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
90 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
92 * This value is forced to be a power of two so that writes align on pages.
94 static unsigned io_limit = 128;
95 module_param(io_limit, uint, 0);
96 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
99 * Specs often allow 5 msec for a page write, sometimes 20 msec;
100 * it's important to recover from write timeouts.
102 static unsigned write_timeout = 25;
103 module_param(write_timeout, uint, 0);
104 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
106 #define AT24_SIZE_BYTELEN 5
107 #define AT24_SIZE_FLAGS 8
109 #define AT24_BITMASK(x) (BIT(x) - 1)
111 /* create non-zero magic value for given eeprom parameters */
112 #define AT24_DEVICE_MAGIC(_len, _flags) \
113 ((1 << AT24_SIZE_FLAGS | (_flags)) \
114 << AT24_SIZE_BYTELEN | ilog2(_len))
117 * Both reads and writes fail if the previous write didn't complete yet. This
118 * macro loops a few times waiting at least long enough for one entire page
119 * write to work while making sure that at least one iteration is run before
120 * checking the break condition.
122 * It takes two parameters: a variable in which the future timeout in jiffies
123 * will be stored and a temporary variable holding the time of the last
124 * iteration of processing the request. Both should be unsigned integers
125 * holding at least 32 bits.
127 #define loop_until_timeout(tout, op_time) \
128 for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \
129 op_time ? time_before(op_time, tout) : true; \
130 usleep_range(1000, 1500), op_time = jiffies)
132 static const struct i2c_device_id at24_ids[] = {
133 /* needs 8 addresses as A0-A2 are ignored */
134 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
135 /* old variants can't be handled with this generic entry! */
136 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
137 { "24cs01", AT24_DEVICE_MAGIC(16,
138 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
139 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
140 { "24cs02", AT24_DEVICE_MAGIC(16,
141 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
142 { "24mac402", AT24_DEVICE_MAGIC(48 / 8,
143 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
144 { "24mac602", AT24_DEVICE_MAGIC(64 / 8,
145 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
146 /* spd is a 24c02 in memory DIMMs */
147 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
148 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
149 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
150 { "24cs04", AT24_DEVICE_MAGIC(16,
151 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
152 /* 24rf08 quirk is handled at i2c-core */
153 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
154 { "24cs08", AT24_DEVICE_MAGIC(16,
155 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
156 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
157 { "24cs16", AT24_DEVICE_MAGIC(16,
158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
159 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
160 { "24cs32", AT24_DEVICE_MAGIC(16,
163 AT24_FLAG_READONLY) },
164 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
165 { "24cs64", AT24_DEVICE_MAGIC(16,
168 AT24_FLAG_READONLY) },
169 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
170 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
171 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
172 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
173 { "24c2048", AT24_DEVICE_MAGIC(2097152 / 8, AT24_FLAG_ADDR16) },
175 { /* END OF LIST */ }
177 MODULE_DEVICE_TABLE(i2c, at24_ids);
179 static const struct acpi_device_id at24_acpi_ids[] = {
180 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
183 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
185 /*-------------------------------------------------------------------------*/
188 * This routine supports chips which consume multiple I2C addresses. It
189 * computes the addressing information to be used for a given r/w request.
190 * Assumes that sanity checks for offset happened at sysfs-layer.
192 * Slave address and byte offset derive from the offset. Always
193 * set the byte address; on a multi-master board, another master
194 * may have changed the chip's "current" address pointer.
196 * REVISIT some multi-address chips don't rollover page reads to
197 * the next slave address, so we may need to truncate the count.
198 * Those chips might need another quirk flag.
200 * If the real hardware used four adjacent 24c02 chips and that
201 * were misconfigured as one 24c08, that would be a similar effect:
202 * one "eeprom" file not four, but larger reads would fail when
203 * they crossed certain pages.
205 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
206 unsigned int *offset)
210 if (at24->chip.flags & AT24_FLAG_ADDR16) {
218 return at24->client[i];
221 static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
222 unsigned int offset, size_t count)
224 unsigned long timeout, read_time;
225 struct i2c_client *client;
228 client = at24_translate_offset(at24, &offset);
230 if (count > io_limit)
233 /* Smaller eeproms can work given some SMBus extension calls */
234 if (count > I2C_SMBUS_BLOCK_MAX)
235 count = I2C_SMBUS_BLOCK_MAX;
237 loop_until_timeout(timeout, read_time) {
238 status = i2c_smbus_read_i2c_block_data_or_emulated(client,
242 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
243 count, offset, status, jiffies);
252 static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
253 unsigned int offset, size_t count)
255 unsigned long timeout, read_time;
256 struct i2c_client *client;
257 struct i2c_msg msg[2];
261 memset(msg, 0, sizeof(msg));
262 client = at24_translate_offset(at24, &offset);
264 if (count > io_limit)
268 * When we have a better choice than SMBus calls, use a combined I2C
269 * message. Write address; then read up to io_limit data bytes. Note
270 * that read page rollover helps us here (unlike writes). msgbuf is
271 * u8 and will cast to our needs.
274 if (at24->chip.flags & AT24_FLAG_ADDR16)
275 msgbuf[i++] = offset >> 8;
276 msgbuf[i++] = offset;
278 msg[0].addr = client->addr;
282 msg[1].addr = client->addr;
283 msg[1].flags = I2C_M_RD;
287 loop_until_timeout(timeout, read_time) {
288 status = i2c_transfer(client->adapter, msg, 2);
292 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
293 count, offset, status, jiffies);
302 static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
303 unsigned int offset, size_t count)
305 unsigned long timeout, read_time;
306 struct i2c_client *client;
307 struct i2c_msg msg[2];
311 client = at24_translate_offset(at24, &offset);
313 memset(msg, 0, sizeof(msg));
314 msg[0].addr = client->addr;
315 msg[0].buf = addrbuf;
318 * The address pointer of the device is shared between the regular
319 * EEPROM array and the serial number block. The dummy write (part of
320 * the sequential read protocol) ensures the address pointer is reset
321 * to the desired position.
323 if (at24->chip.flags & AT24_FLAG_ADDR16) {
325 * For 16 bit address pointers, the word address must contain
326 * a '10' sequence in bits 11 and 10 regardless of the
327 * intended position of the address pointer.
334 * Otherwise the word address must begin with a '10' sequence,
335 * regardless of the intended address.
337 addrbuf[0] = 0x80 + offset;
341 msg[1].addr = client->addr;
342 msg[1].flags = I2C_M_RD;
346 loop_until_timeout(timeout, read_time) {
347 status = i2c_transfer(client->adapter, msg, 2);
355 static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
356 unsigned int offset, size_t count)
358 unsigned long timeout, read_time;
359 struct i2c_client *client;
360 struct i2c_msg msg[2];
364 client = at24_translate_offset(at24, &offset);
366 memset(msg, 0, sizeof(msg));
367 msg[0].addr = client->addr;
368 msg[0].buf = addrbuf;
369 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
370 addrbuf[0] = 0xa0 - at24->chip.byte_len + offset;
372 msg[1].addr = client->addr;
373 msg[1].flags = I2C_M_RD;
377 loop_until_timeout(timeout, read_time) {
378 status = i2c_transfer(client->adapter, msg, 2);
387 * Note that if the hardware write-protect pin is pulled high, the whole
388 * chip is normally write protected. But there are plenty of product
389 * variants here, including OTP fuses and partial chip protect.
391 * We only use page mode writes; the alternative is sloooow. These routines
392 * write at most one page.
395 static size_t at24_adjust_write_count(struct at24_data *at24,
396 unsigned int offset, size_t count)
400 /* write_max is at most a page */
401 if (count > at24->write_max)
402 count = at24->write_max;
404 /* Never roll over backwards, to the start of this page */
405 next_page = roundup(offset + 1, at24->chip.page_size);
406 if (offset + count > next_page)
407 count = next_page - offset;
412 static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
414 unsigned int offset, size_t count)
416 unsigned long timeout, write_time;
417 struct i2c_client *client;
420 client = at24_translate_offset(at24, &offset);
421 count = at24_adjust_write_count(at24, offset, count);
423 loop_until_timeout(timeout, write_time) {
424 status = i2c_smbus_write_i2c_block_data(client,
429 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
430 count, offset, status, jiffies);
439 static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
441 unsigned int offset, size_t count)
443 unsigned long timeout, write_time;
444 struct i2c_client *client;
447 client = at24_translate_offset(at24, &offset);
449 loop_until_timeout(timeout, write_time) {
450 status = i2c_smbus_write_byte_data(client, offset, buf[0]);
454 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
455 count, offset, status, jiffies);
464 static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
465 unsigned int offset, size_t count)
467 unsigned long timeout, write_time;
468 struct i2c_client *client;
473 client = at24_translate_offset(at24, &offset);
474 count = at24_adjust_write_count(at24, offset, count);
476 msg.addr = client->addr;
479 /* msg.buf is u8 and casts will mask the values */
480 msg.buf = at24->writebuf;
481 if (at24->chip.flags & AT24_FLAG_ADDR16)
482 msg.buf[i++] = offset >> 8;
484 msg.buf[i++] = offset;
485 memcpy(&msg.buf[i], buf, count);
488 loop_until_timeout(timeout, write_time) {
489 status = i2c_transfer(client->adapter, &msg, 1);
493 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
494 count, offset, status, jiffies);
503 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
505 struct at24_data *at24 = priv;
508 if (unlikely(!count))
511 if (off + count > at24->chip.byte_len)
515 * Read data from chip, protecting against concurrent updates
516 * from this host, but not from other I2C masters.
518 mutex_lock(&at24->lock);
523 status = at24->read_func(at24, buf, off, count);
525 mutex_unlock(&at24->lock);
533 mutex_unlock(&at24->lock);
538 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
540 struct at24_data *at24 = priv;
543 if (unlikely(!count))
546 if (off + count > at24->chip.byte_len)
550 * Write data to chip, protecting against concurrent updates
551 * from this host, but not from other I2C masters.
553 mutex_lock(&at24->lock);
558 status = at24->write_func(at24, buf, off, count);
560 mutex_unlock(&at24->lock);
568 mutex_unlock(&at24->lock);
574 static void at24_get_ofdata(struct i2c_client *client,
575 struct at24_platform_data *chip)
578 struct device_node *node = client->dev.of_node;
581 if (of_get_property(node, "read-only", NULL))
582 chip->flags |= AT24_FLAG_READONLY;
583 val = of_get_property(node, "pagesize", NULL);
585 chip->page_size = be32_to_cpup(val);
589 static void at24_get_ofdata(struct i2c_client *client,
590 struct at24_platform_data *chip)
592 #endif /* CONFIG_OF */
594 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
596 struct at24_platform_data chip;
597 kernel_ulong_t magic = 0;
600 int use_smbus_write = 0;
601 struct at24_data *at24;
603 unsigned i, num_addresses;
606 if (client->dev.platform_data) {
607 chip = *(struct at24_platform_data *)client->dev.platform_data;
610 magic = id->driver_data;
612 const struct acpi_device_id *aid;
614 aid = acpi_match_device(at24_acpi_ids, &client->dev);
616 magic = aid->driver_data;
621 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
622 magic >>= AT24_SIZE_BYTELEN;
623 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
625 * This is slow, but we can't know all eeproms, so we better
626 * play safe. Specifying custom eeprom-types via platform_data
627 * is recommended anyhow.
631 /* update chipdata if OF is present */
632 at24_get_ofdata(client, &chip);
638 if (!is_power_of_2(chip.byte_len))
639 dev_warn(&client->dev,
640 "byte_len looks suspicious (no power of 2)!\n");
641 if (!chip.page_size) {
642 dev_err(&client->dev, "page_size must not be 0!\n");
645 if (!is_power_of_2(chip.page_size))
646 dev_warn(&client->dev,
647 "page_size looks suspicious (no power of 2)!\n");
650 * REVISIT: the size of the EUI-48 byte array is 6 in at24mac402, while
651 * the call to ilog2() in AT24_DEVICE_MAGIC() rounds it down to 4.
653 * Eventually we'll get rid of the magic values altoghether in favor of
654 * real structs, but for now just manually set the right size.
656 if (chip.flags & AT24_FLAG_MAC && chip.byte_len == 4)
659 /* Use I2C operations unless we're stuck with SMBus extensions. */
660 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
661 if (chip.flags & AT24_FLAG_ADDR16)
662 return -EPFNOSUPPORT;
664 if (i2c_check_functionality(client->adapter,
665 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
666 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
667 } else if (i2c_check_functionality(client->adapter,
668 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
669 use_smbus = I2C_SMBUS_WORD_DATA;
670 } else if (i2c_check_functionality(client->adapter,
671 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
672 use_smbus = I2C_SMBUS_BYTE_DATA;
674 return -EPFNOSUPPORT;
677 if (i2c_check_functionality(client->adapter,
678 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
679 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
680 } else if (i2c_check_functionality(client->adapter,
681 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
682 use_smbus_write = I2C_SMBUS_BYTE_DATA;
687 if (chip.flags & AT24_FLAG_TAKE8ADDR)
690 num_addresses = DIV_ROUND_UP(chip.byte_len,
691 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
693 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
694 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
698 mutex_init(&at24->lock);
699 at24->use_smbus = use_smbus;
700 at24->use_smbus_write = use_smbus_write;
702 at24->num_addresses = num_addresses;
704 if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
705 dev_err(&client->dev,
706 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
710 if (chip.flags & AT24_FLAG_SERIAL) {
711 at24->read_func = at24_eeprom_read_serial;
712 } else if (chip.flags & AT24_FLAG_MAC) {
713 at24->read_func = at24_eeprom_read_mac;
715 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
716 : at24_eeprom_read_i2c;
719 if (at24->use_smbus) {
720 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
721 at24->write_func = at24_eeprom_write_smbus_block;
723 at24->write_func = at24_eeprom_write_smbus_byte;
725 at24->write_func = at24_eeprom_write_i2c;
728 writable = !(chip.flags & AT24_FLAG_READONLY);
730 if (!use_smbus || use_smbus_write) {
732 unsigned write_max = chip.page_size;
734 if (write_max > io_limit)
735 write_max = io_limit;
736 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
737 write_max = I2C_SMBUS_BLOCK_MAX;
738 at24->write_max = write_max;
740 /* buffer (data + address at the beginning) */
741 at24->writebuf = devm_kzalloc(&client->dev,
742 write_max + 2, GFP_KERNEL);
746 dev_warn(&client->dev,
747 "cannot write due to controller restrictions.");
751 at24->client[0] = client;
753 /* use dummy devices for multiple-address chips */
754 for (i = 1; i < num_addresses; i++) {
755 at24->client[i] = i2c_new_dummy(client->adapter,
757 if (!at24->client[i]) {
758 dev_err(&client->dev, "address 0x%02x unavailable\n",
765 i2c_set_clientdata(client, at24);
768 * Perform a one-byte test read to verify that the
769 * chip is functional.
771 err = at24_read(at24, 0, &test_byte, 1);
777 at24->nvmem_config.name = dev_name(&client->dev);
778 at24->nvmem_config.dev = &client->dev;
779 at24->nvmem_config.read_only = !writable;
780 at24->nvmem_config.root_only = !(chip.flags & AT24_FLAG_IRUGO);
781 at24->nvmem_config.owner = THIS_MODULE;
782 at24->nvmem_config.compat = true;
783 at24->nvmem_config.base_dev = &client->dev;
784 at24->nvmem_config.reg_read = at24_read;
785 at24->nvmem_config.reg_write = at24_write;
786 at24->nvmem_config.priv = at24;
787 at24->nvmem_config.stride = 1;
788 at24->nvmem_config.word_size = 1;
789 at24->nvmem_config.size = chip.byte_len;
791 at24->nvmem = nvmem_register(&at24->nvmem_config);
793 if (IS_ERR(at24->nvmem)) {
794 err = PTR_ERR(at24->nvmem);
798 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
799 chip.byte_len, client->name,
800 writable ? "writable" : "read-only", at24->write_max);
801 if (use_smbus == I2C_SMBUS_WORD_DATA ||
802 use_smbus == I2C_SMBUS_BYTE_DATA) {
803 dev_notice(&client->dev, "Falling back to %s reads, "
804 "performance will suffer\n", use_smbus ==
805 I2C_SMBUS_WORD_DATA ? "word" : "byte");
808 /* export data to kernel code */
810 chip.setup(at24->nvmem, chip.context);
815 for (i = 1; i < num_addresses; i++)
817 i2c_unregister_device(at24->client[i]);
822 static int at24_remove(struct i2c_client *client)
824 struct at24_data *at24;
827 at24 = i2c_get_clientdata(client);
829 nvmem_unregister(at24->nvmem);
831 for (i = 1; i < at24->num_addresses; i++)
832 i2c_unregister_device(at24->client[i]);
837 /*-------------------------------------------------------------------------*/
839 static struct i2c_driver at24_driver = {
842 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
845 .remove = at24_remove,
846 .id_table = at24_ids,
849 static int __init at24_init(void)
852 pr_err("at24: io_limit must not be 0!\n");
856 io_limit = rounddown_pow_of_two(io_limit);
857 return i2c_add_driver(&at24_driver);
859 module_init(at24_init);
861 static void __exit at24_exit(void)
863 i2c_del_driver(&at24_driver);
865 module_exit(at24_exit);
867 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
868 MODULE_AUTHOR("David Brownell and Wolfram Sang");
869 MODULE_LICENSE("GPL");