2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI PCI chip/adapter(s)
6 * running LSI Fusion MPT (Message Passing Technology) firmware.
8 * Copyright (c) 1999-2008 LSI Corporation
9 * (mailto:DL-MPTFusionLinux@lsi.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/seq_file.h>
54 #include <linux/slab.h>
55 #include <linux/types.h>
56 #include <linux/pci.h>
57 #include <linux/kdev_t.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h>
61 #include <linux/dma-mapping.h>
62 #include <linux/kthread.h>
63 #include <scsi/scsi_host.h>
66 #include "lsi/mpi_log_fc.h"
68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
69 #define my_NAME "Fusion MPT base driver"
70 #define my_VERSION MPT_LINUX_VERSION_COMMON
71 #define MYNAM "mptbase"
73 MODULE_AUTHOR(MODULEAUTHOR);
74 MODULE_DESCRIPTION(my_NAME);
75 MODULE_LICENSE("GPL");
76 MODULE_VERSION(my_VERSION);
82 static int mpt_msi_enable_spi;
83 module_param(mpt_msi_enable_spi, int, 0);
84 MODULE_PARM_DESC(mpt_msi_enable_spi,
85 " Enable MSI Support for SPI controllers (default=0)");
87 static int mpt_msi_enable_fc;
88 module_param(mpt_msi_enable_fc, int, 0);
89 MODULE_PARM_DESC(mpt_msi_enable_fc,
90 " Enable MSI Support for FC controllers (default=0)");
92 static int mpt_msi_enable_sas;
93 module_param(mpt_msi_enable_sas, int, 0);
94 MODULE_PARM_DESC(mpt_msi_enable_sas,
95 " Enable MSI Support for SAS controllers (default=0)");
97 static int mpt_channel_mapping;
98 module_param(mpt_channel_mapping, int, 0);
99 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
101 static int mpt_debug_level;
102 static int mpt_set_debug_level(const char *val, const struct kernel_param *kp);
103 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
104 &mpt_debug_level, 0600);
105 MODULE_PARM_DESC(mpt_debug_level,
106 " debug level - refer to mptdebug.h - (default=0)");
108 int mpt_fwfault_debug;
109 EXPORT_SYMBOL(mpt_fwfault_debug);
110 module_param(mpt_fwfault_debug, int, 0600);
111 MODULE_PARM_DESC(mpt_fwfault_debug,
112 "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
114 static char MptCallbacksName[MPT_MAX_PROTOCOL_DRIVERS]
115 [MPT_MAX_CALLBACKNAME_LEN+1];
118 static int mfcounter = 0;
119 #define PRINT_MF_COUNT 20000
122 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
127 #define WHOINIT_UNKNOWN 0xAA
129 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
133 /* Adapter link list */
135 /* Callback lookup table */
136 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
137 /* Protocol driver class lookup table */
138 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
139 /* Event handler lookup table */
140 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
141 /* Reset handler lookup table */
142 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
143 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
145 #ifdef CONFIG_PROC_FS
146 static struct proc_dir_entry *mpt_proc_root_dir;
150 * Driver Callback Index's
152 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
153 static u8 last_drv_idx;
155 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
159 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
160 static int mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
161 MPT_FRAME_HDR *reply);
162 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
163 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
165 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
166 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
167 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
168 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
170 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
171 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
172 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
173 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
174 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
175 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
176 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
177 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
178 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
179 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
180 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
181 static int PrimeIocFifos(MPT_ADAPTER *ioc);
182 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
183 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
184 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
185 static int GetLanConfigPages(MPT_ADAPTER *ioc);
186 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
187 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
188 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
189 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
190 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
191 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
192 static void mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
193 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
195 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
196 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
197 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
199 #ifdef CONFIG_PROC_FS
200 static int mpt_summary_proc_show(struct seq_file *m, void *v);
201 static int mpt_version_proc_show(struct seq_file *m, void *v);
202 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v);
204 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
206 static int ProcessEventNotification(MPT_ADAPTER *ioc,
207 EventNotificationReply_t *evReply, int *evHandlers);
208 static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
209 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
210 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
211 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
212 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
213 static void mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
215 /* module entry point */
216 static int __init fusion_init (void);
217 static void __exit fusion_exit (void);
219 #define CHIPREG_READ32(addr) readl_relaxed(addr)
220 #define CHIPREG_READ32_dmasync(addr) readl(addr)
221 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
222 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
223 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
226 pci_disable_io_access(struct pci_dev *pdev)
230 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
232 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
236 pci_enable_io_access(struct pci_dev *pdev)
240 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
242 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
245 static int mpt_set_debug_level(const char *val, const struct kernel_param *kp)
247 int ret = param_set_int(val, kp);
253 list_for_each_entry(ioc, &ioc_list, list)
254 ioc->debug_level = mpt_debug_level;
259 * mpt_get_cb_idx - obtain cb_idx for registered driver
260 * @dclass: class driver enum
262 * Returns cb_idx, or zero means it wasn't found
265 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
269 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
270 if (MptDriverClass[cb_idx] == dclass)
276 * mpt_is_discovery_complete - determine if discovery has completed
277 * @ioc: per adatper instance
279 * Returns 1 when discovery completed, else zero.
282 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
284 ConfigExtendedPageHeader_t hdr;
286 SasIOUnitPage0_t *buffer;
287 dma_addr_t dma_handle;
290 memset(&hdr, 0, sizeof(ConfigExtendedPageHeader_t));
291 memset(&cfg, 0, sizeof(CONFIGPARMS));
292 hdr.PageVersion = MPI_SASIOUNITPAGE0_PAGEVERSION;
293 hdr.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
294 hdr.ExtPageType = MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
295 cfg.cfghdr.ehdr = &hdr;
296 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
298 if ((mpt_config(ioc, &cfg)))
300 if (!hdr.ExtPageLength)
303 buffer = dma_alloc_coherent(&ioc->pcidev->dev, hdr.ExtPageLength * 4,
304 &dma_handle, GFP_KERNEL);
308 cfg.physAddr = dma_handle;
309 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
311 if ((mpt_config(ioc, &cfg)))
312 goto out_free_consistent;
314 if (!(buffer->PhyData[0].PortFlags &
315 MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS))
319 dma_free_coherent(&ioc->pcidev->dev, hdr.ExtPageLength * 4, buffer,
327 * mpt_remove_dead_ioc_func - kthread context to remove dead ioc
328 * @arg: input argument, used to derive ioc
330 * Return 0 if controller is removed from pci subsystem.
331 * Return -1 for other case.
333 static int mpt_remove_dead_ioc_func(void *arg)
335 MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
336 struct pci_dev *pdev;
345 pci_stop_and_remove_bus_device_locked(pdev);
352 * mpt_fault_reset_work - work performed on workq after ioc fault
353 * @work: input argument, used to derive ioc
357 mpt_fault_reset_work(struct work_struct *work)
360 container_of(work, MPT_ADAPTER, fault_reset_work.work);
365 struct task_struct *p;
367 if (ioc->ioc_reset_in_progress || !ioc->active)
371 ioc_raw_state = mpt_GetIocState(ioc, 0);
372 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_MASK) {
373 printk(MYIOC_s_INFO_FMT "%s: IOC is non-operational !!!!\n",
374 ioc->name, __func__);
377 * Call mptscsih_flush_pending_cmds callback so that we
378 * flush all pending commands back to OS.
379 * This call is required to aovid deadlock at block layer.
380 * Dead IOC will fail to do diag reset,and this call is safe
381 * since dead ioc will never return any command back from HW.
383 hd = shost_priv(ioc->sh);
384 ioc->schedule_dead_ioc_flush_running_cmds(hd);
386 /*Remove the Dead Host */
387 p = kthread_run(mpt_remove_dead_ioc_func, ioc,
388 "mpt_dead_ioc_%d", ioc->id);
390 printk(MYIOC_s_ERR_FMT
391 "%s: Running mpt_dead_ioc thread failed !\n",
392 ioc->name, __func__);
394 printk(MYIOC_s_WARN_FMT
395 "%s: Running mpt_dead_ioc thread success !\n",
396 ioc->name, __func__);
398 return; /* don't rearm timer */
401 if ((ioc_raw_state & MPI_IOC_STATE_MASK)
402 == MPI_IOC_STATE_FAULT) {
403 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
404 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
405 printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
406 ioc->name, __func__);
407 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
408 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
409 __func__, (rc == 0) ? "success" : "failed");
410 ioc_raw_state = mpt_GetIocState(ioc, 0);
411 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
412 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
413 "reset (%04xh)\n", ioc->name, ioc_raw_state &
414 MPI_DOORBELL_DATA_MASK);
415 } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
416 if ((mpt_is_discovery_complete(ioc))) {
417 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
418 "discovery_quiesce_io flag\n", ioc->name));
419 ioc->sas_discovery_quiesce_io = 0;
425 * Take turns polling alternate controller
430 /* rearm the timer */
431 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
432 if (ioc->reset_work_q)
433 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
434 msecs_to_jiffies(MPT_POLLING_INTERVAL));
435 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
440 * Process turbo (context) reply...
443 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
445 MPT_FRAME_HDR *mf = NULL;
446 MPT_FRAME_HDR *mr = NULL;
450 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
453 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
454 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
455 req_idx = pa & 0x0000FFFF;
456 cb_idx = (pa & 0x00FF0000) >> 16;
457 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
459 case MPI_CONTEXT_REPLY_TYPE_LAN:
460 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
462 * Blind set of mf to NULL here was fatal
463 * after lan_reply says "freeme"
464 * Fix sort of combined with an optimization here;
465 * added explicit check for case where lan_reply
466 * was just returning 1 and doing nothing else.
467 * For this case skip the callback, but set up
468 * proper mf value first here:-)
470 if ((pa & 0x58000000) == 0x58000000) {
471 req_idx = pa & 0x0000FFFF;
472 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
473 mpt_free_msg_frame(ioc, mf);
477 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
479 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
480 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
481 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
488 /* Check for (valid) IO callback! */
489 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
490 MptCallbacks[cb_idx] == NULL) {
491 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
492 __func__, ioc->name, cb_idx);
496 if (MptCallbacks[cb_idx](ioc, mf, mr))
497 mpt_free_msg_frame(ioc, mf);
503 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
514 /* non-TURBO reply! Hmmm, something may be up...
515 * Newest turbo reply mechanism; get address
516 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
519 /* Map DMA address of reply header to cpu address.
520 * pa is 32 bits - but the dma address may be 32 or 64 bits
521 * get offset based only only the low addresses
524 reply_dma_low = (pa <<= 1);
525 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
526 (reply_dma_low - ioc->reply_frames_low_dma));
528 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
529 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
530 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
532 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
533 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
534 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
536 /* Check/log IOC log info
538 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
539 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
540 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
541 if (ioc->bus_type == FC)
542 mpt_fc_log_info(ioc, log_info);
543 else if (ioc->bus_type == SPI)
544 mpt_spi_log_info(ioc, log_info);
545 else if (ioc->bus_type == SAS)
546 mpt_sas_log_info(ioc, log_info, cb_idx);
549 if (ioc_stat & MPI_IOCSTATUS_MASK)
550 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
552 /* Check for (valid) IO callback! */
553 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
554 MptCallbacks[cb_idx] == NULL) {
555 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
556 __func__, ioc->name, cb_idx);
561 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
564 /* Flush (non-TURBO) reply with a WRITE! */
565 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
568 mpt_free_msg_frame(ioc, mf);
572 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
574 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
575 * @irq: irq number (not used)
576 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
578 * This routine is registered via the request_irq() kernel API call,
579 * and handles all interrupts generated from a specific MPT adapter
580 * (also referred to as a IO Controller or IOC).
581 * This routine must clear the interrupt from the adapter and does
582 * so by reading the reply FIFO. Multiple replies may be processed
583 * per single call to this routine.
585 * This routine handles register-level access of the adapter but
586 * dispatches (calls) a protocol-specific callback routine to handle
587 * the protocol-specific details of the MPT request completion.
590 mpt_interrupt(int irq, void *bus_id)
592 MPT_ADAPTER *ioc = bus_id;
593 u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
595 if (pa == 0xFFFFFFFF)
599 * Drain the reply FIFO!
602 if (pa & MPI_ADDRESS_REPLY_A_BIT)
605 mpt_turbo_reply(ioc, pa);
606 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
607 } while (pa != 0xFFFFFFFF);
612 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
614 * mptbase_reply - MPT base driver's callback routine
615 * @ioc: Pointer to MPT_ADAPTER structure
616 * @req: Pointer to original MPT request frame
617 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
619 * MPT base driver's callback routine; all base driver
620 * "internal" request/reply processing is routed here.
621 * Currently used for EventNotification and EventAck handling.
623 * Returns 1 indicating original alloc'd request frame ptr
624 * should be freed, or 0 if it shouldn't.
627 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
629 EventNotificationReply_t *pEventReply;
634 switch (reply->u.hdr.Function) {
635 case MPI_FUNCTION_EVENT_NOTIFICATION:
636 pEventReply = (EventNotificationReply_t *)reply;
638 ProcessEventNotification(ioc, pEventReply, &evHandlers);
639 event = le32_to_cpu(pEventReply->Event) & 0xFF;
640 if (pEventReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)
642 if (event != MPI_EVENT_EVENT_CHANGE)
645 case MPI_FUNCTION_CONFIG:
646 case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
647 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
648 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
649 memcpy(ioc->mptbase_cmds.reply, reply,
650 min(MPT_DEFAULT_FRAME_SIZE,
651 4 * reply->u.reply.MsgLength));
652 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
653 ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
654 complete(&ioc->mptbase_cmds.done);
657 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
660 case MPI_FUNCTION_EVENT_ACK:
661 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
662 "EventAck reply received\n", ioc->name));
665 printk(MYIOC_s_ERR_FMT
666 "Unexpected msg function (=%02Xh) reply received!\n",
667 ioc->name, reply->u.hdr.Function);
672 * Conditionally tell caller to free the original
673 * EventNotification/EventAck/unexpected request frame!
678 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
680 * mpt_register - Register protocol-specific main callback handler.
681 * @cbfunc: callback function pointer
682 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
683 * @func_name: call function's name
685 * This routine is called by a protocol-specific driver (SCSI host,
686 * LAN, SCSI target) to register its reply callback routine. Each
687 * protocol-specific driver must do this before it will be able to
688 * use any IOC resources, such as obtaining request frames.
690 * NOTES: The SCSI protocol driver currently calls this routine thrice
691 * in order to register separate callbacks; one for "normal" SCSI IO;
692 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
694 * Returns u8 valued "handle" in the range (and S.O.D. order)
695 * {N,...,7,6,5,...,1} if successful.
696 * A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
697 * considered an error by the caller.
700 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass, char *func_name)
703 last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
706 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
707 * (slot/handle 0 is reserved!)
709 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
710 if (MptCallbacks[cb_idx] == NULL) {
711 MptCallbacks[cb_idx] = cbfunc;
712 MptDriverClass[cb_idx] = dclass;
713 MptEvHandlers[cb_idx] = NULL;
714 last_drv_idx = cb_idx;
715 strscpy(MptCallbacksName[cb_idx], func_name,
716 MPT_MAX_CALLBACKNAME_LEN+1);
724 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
726 * mpt_deregister - Deregister a protocol drivers resources.
727 * @cb_idx: previously registered callback handle
729 * Each protocol-specific driver should call this routine when its
730 * module is unloaded.
733 mpt_deregister(u8 cb_idx)
735 if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
736 MptCallbacks[cb_idx] = NULL;
737 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
738 MptEvHandlers[cb_idx] = NULL;
744 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
746 * mpt_event_register - Register protocol-specific event callback handler.
747 * @cb_idx: previously registered (via mpt_register) callback handle
748 * @ev_cbfunc: callback function
750 * This routine can be called by one or more protocol-specific drivers
751 * if/when they choose to be notified of MPT events.
753 * Returns 0 for success.
756 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
758 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
761 MptEvHandlers[cb_idx] = ev_cbfunc;
765 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
767 * mpt_event_deregister - Deregister protocol-specific event callback handler
768 * @cb_idx: previously registered callback handle
770 * Each protocol-specific driver should call this routine
771 * when it does not (or can no longer) handle events,
772 * or when its module is unloaded.
775 mpt_event_deregister(u8 cb_idx)
777 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
780 MptEvHandlers[cb_idx] = NULL;
783 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
785 * mpt_reset_register - Register protocol-specific IOC reset handler.
786 * @cb_idx: previously registered (via mpt_register) callback handle
787 * @reset_func: reset function
789 * This routine can be called by one or more protocol-specific drivers
790 * if/when they choose to be notified of IOC resets.
792 * Returns 0 for success.
795 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
797 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
800 MptResetHandlers[cb_idx] = reset_func;
804 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
806 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
807 * @cb_idx: previously registered callback handle
809 * Each protocol-specific driver should call this routine
810 * when it does not (or can no longer) handle IOC reset handling,
811 * or when its module is unloaded.
814 mpt_reset_deregister(u8 cb_idx)
816 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
819 MptResetHandlers[cb_idx] = NULL;
822 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
824 * mpt_device_driver_register - Register device driver hooks
825 * @dd_cbfunc: driver callbacks struct
826 * @cb_idx: MPT protocol driver index
829 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
833 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
836 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
838 /* call per pci device probe entry point */
839 list_for_each_entry(ioc, &ioc_list, list) {
840 if (dd_cbfunc->probe)
841 dd_cbfunc->probe(ioc->pcidev);
847 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
849 * mpt_device_driver_deregister - DeRegister device driver hooks
850 * @cb_idx: MPT protocol driver index
853 mpt_device_driver_deregister(u8 cb_idx)
855 struct mpt_pci_driver *dd_cbfunc;
858 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
861 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
863 list_for_each_entry(ioc, &ioc_list, list) {
864 if (dd_cbfunc->remove)
865 dd_cbfunc->remove(ioc->pcidev);
868 MptDeviceDriverHandlers[cb_idx] = NULL;
872 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
874 * mpt_get_msg_frame - Obtain an MPT request frame from the pool
875 * @cb_idx: Handle of registered MPT protocol driver
876 * @ioc: Pointer to MPT adapter structure
878 * Obtain an MPT request frame from the pool (of 1024) that are
879 * allocated per MPT adapter.
881 * Returns pointer to a MPT request frame or %NULL if none are available
882 * or IOC is not active.
885 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
889 u16 req_idx; /* Request index */
891 /* validate handle and ioc identifier */
895 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
896 "returning NULL!\n", ioc->name);
899 /* If interrupts are not attached, do not return a request frame */
903 spin_lock_irqsave(&ioc->FreeQlock, flags);
904 if (!list_empty(&ioc->FreeQ)) {
907 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
908 u.frame.linkage.list);
909 list_del(&mf->u.frame.linkage.list);
910 mf->u.frame.linkage.arg1 = 0;
911 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
912 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
914 req_idx = req_offset / ioc->req_sz;
915 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
916 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
917 /* Default, will be changed if necessary in SG generation */
918 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
925 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
929 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
930 "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
933 if (mfcounter == PRINT_MF_COUNT)
934 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
935 ioc->mfcnt, ioc->req_depth);
938 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
939 ioc->name, cb_idx, ioc->id, mf));
943 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
945 * mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
946 * @cb_idx: Handle of registered MPT protocol driver
947 * @ioc: Pointer to MPT adapter structure
948 * @mf: Pointer to MPT request frame
950 * This routine posts an MPT request frame to the request post FIFO of a
951 * specific MPT adapter.
954 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
958 u16 req_idx; /* Request index */
960 /* ensure values are reset properly! */
961 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
962 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
964 req_idx = req_offset / ioc->req_sz;
965 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
966 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
968 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
970 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
971 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
972 "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
973 ioc->RequestNB[req_idx]));
974 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
978 * mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
979 * @cb_idx: Handle of registered MPT protocol driver
980 * @ioc: Pointer to MPT adapter structure
981 * @mf: Pointer to MPT request frame
983 * Send a protocol-specific MPT request frame to an IOC using
984 * hi-priority request queue.
986 * This routine posts an MPT request frame to the request post FIFO of a
987 * specific MPT adapter.
990 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
994 u16 req_idx; /* Request index */
996 /* ensure values are reset properly! */
997 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
998 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
999 req_idx = req_offset / ioc->req_sz;
1000 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
1001 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
1003 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
1005 mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
1006 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
1007 ioc->name, mf_dma_addr, req_idx));
1008 CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
1011 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1013 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
1014 * @ioc: Pointer to MPT adapter structure
1015 * @mf: Pointer to MPT request frame
1017 * This routine places a MPT request frame back on the MPT adapter's
1021 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1023 unsigned long flags;
1025 /* Put Request back on FreeQ! */
1026 spin_lock_irqsave(&ioc->FreeQlock, flags);
1027 if (cpu_to_le32(mf->u.frame.linkage.arg1) == 0xdeadbeaf)
1029 /* signature to know if this mf is freed */
1030 mf->u.frame.linkage.arg1 = cpu_to_le32(0xdeadbeaf);
1031 list_add(&mf->u.frame.linkage.list, &ioc->FreeQ);
1036 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1039 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1041 * mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
1042 * @pAddr: virtual address for SGE
1043 * @flagslength: SGE flags and data transfer length
1044 * @dma_addr: Physical address
1046 * This routine places a MPT request frame back on the MPT adapter's
1050 mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1052 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
1053 pSge->FlagsLength = cpu_to_le32(flagslength);
1054 pSge->Address = cpu_to_le32(dma_addr);
1058 * mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
1059 * @pAddr: virtual address for SGE
1060 * @flagslength: SGE flags and data transfer length
1061 * @dma_addr: Physical address
1063 * This routine places a MPT request frame back on the MPT adapter's
1067 mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1069 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1070 pSge->Address.Low = cpu_to_le32
1071 (lower_32_bits(dma_addr));
1072 pSge->Address.High = cpu_to_le32
1073 (upper_32_bits(dma_addr));
1074 pSge->FlagsLength = cpu_to_le32
1075 ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1079 * mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr (1078 workaround).
1080 * @pAddr: virtual address for SGE
1081 * @flagslength: SGE flags and data transfer length
1082 * @dma_addr: Physical address
1084 * This routine places a MPT request frame back on the MPT adapter's
1088 mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
1090 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
1093 pSge->Address.Low = cpu_to_le32
1094 (lower_32_bits(dma_addr));
1095 tmp = (u32)(upper_32_bits(dma_addr));
1098 * 1078 errata workaround for the 36GB limitation
1100 if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32) == 9) {
1102 MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
1104 if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
1105 printk(KERN_DEBUG "1078 P0M2 addressing for "
1106 "addr = 0x%llx len = %d\n",
1107 (unsigned long long)dma_addr,
1108 MPI_SGE_LENGTH(flagslength));
1111 pSge->Address.High = cpu_to_le32(tmp);
1112 pSge->FlagsLength = cpu_to_le32(
1113 (flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING));
1116 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1118 * mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
1119 * @pAddr: virtual address for SGE
1120 * @next: nextChainOffset value (u32's)
1121 * @length: length of next SGL segment
1122 * @dma_addr: Physical address
1126 mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1128 SGEChain32_t *pChain = (SGEChain32_t *) pAddr;
1130 pChain->Length = cpu_to_le16(length);
1131 pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
1132 pChain->NextChainOffset = next;
1133 pChain->Address = cpu_to_le32(dma_addr);
1136 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1138 * mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
1139 * @pAddr: virtual address for SGE
1140 * @next: nextChainOffset value (u32's)
1141 * @length: length of next SGL segment
1142 * @dma_addr: Physical address
1146 mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
1148 SGEChain64_t *pChain = (SGEChain64_t *) pAddr;
1149 u32 tmp = dma_addr & 0xFFFFFFFF;
1151 pChain->Length = cpu_to_le16(length);
1152 pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT |
1153 MPI_SGE_FLAGS_64_BIT_ADDRESSING);
1155 pChain->NextChainOffset = next;
1157 pChain->Address.Low = cpu_to_le32(tmp);
1158 tmp = (u32)(upper_32_bits(dma_addr));
1159 pChain->Address.High = cpu_to_le32(tmp);
1162 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1164 * mpt_send_handshake_request - Send MPT request via doorbell handshake method.
1165 * @cb_idx: Handle of registered MPT protocol driver
1166 * @ioc: Pointer to MPT adapter structure
1167 * @reqBytes: Size of the request in bytes
1168 * @req: Pointer to MPT request frame
1169 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1171 * This routine is used exclusively to send MptScsiTaskMgmt
1172 * requests since they are required to be sent via doorbell handshake.
1174 * NOTE: It is the callers responsibility to byte-swap fields in the
1175 * request which are greater than 1 byte in size.
1177 * Returns 0 for success, non-zero for failure.
1180 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1186 /* State is known to be good upon entering
1187 * this function so issue the bus reset
1192 * Emulate what mpt_put_msg_frame() does /wrt to sanity
1193 * setting cb_idx/req_idx. But ONLY if this request
1194 * is in proper (pre-alloc'd) request buffer range...
1196 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1197 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1198 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
1199 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
1200 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
1203 /* Make sure there are no doorbells */
1204 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1206 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1207 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1208 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1210 /* Wait for IOC doorbell int */
1211 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1215 /* Read doorbell and check for active bit */
1216 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1219 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1222 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1224 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1228 /* Send request via doorbell handshake */
1229 req_as_bytes = (u8 *) req;
1230 for (ii = 0; ii < reqBytes/4; ii++) {
1233 word = ((req_as_bytes[(ii*4) + 0] << 0) |
1234 (req_as_bytes[(ii*4) + 1] << 8) |
1235 (req_as_bytes[(ii*4) + 2] << 16) |
1236 (req_as_bytes[(ii*4) + 3] << 24));
1237 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1238 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1244 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1249 /* Make sure there are no doorbells */
1250 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1255 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1257 * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1258 * @ioc: Pointer to MPT adapter structure
1259 * @access_control_value: define bits below
1260 * @sleepFlag: Specifies whether the process can sleep
1262 * Provides mechanism for the host driver to control the IOC's
1263 * Host Page Buffer access.
1265 * Access Control Value - bits[15:12]
1267 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1268 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1269 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1271 * Returns 0 for success, non-zero for failure.
1275 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1277 /* return if in use */
1278 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1279 & MPI_DOORBELL_ACTIVE)
1282 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1284 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1285 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1286 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1287 (access_control_value<<12)));
1289 /* Wait for IOC to clear Doorbell Status bit */
1290 if (WaitForDoorbellAck(ioc, 5, sleepFlag) < 0)
1296 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1298 * mpt_host_page_alloc - allocate system memory for the fw
1299 * @ioc: Pointer to pointer to IOC adapter
1300 * @ioc_init: Pointer to ioc init config page
1302 * If we already allocated memory in past, then resend the same pointer.
1303 * Returns 0 for success, non-zero for failure.
1306 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1310 u32 host_page_buffer_sz=0;
1312 if(!ioc->HostPageBuffer) {
1314 host_page_buffer_sz =
1315 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1317 if(!host_page_buffer_sz)
1318 return 0; /* fw doesn't need any host buffers */
1320 /* spin till we get enough memory */
1321 while (host_page_buffer_sz > 0) {
1322 ioc->HostPageBuffer =
1323 dma_alloc_coherent(&ioc->pcidev->dev,
1324 host_page_buffer_sz,
1325 &ioc->HostPageBuffer_dma,
1327 if (ioc->HostPageBuffer) {
1328 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1329 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1330 ioc->name, ioc->HostPageBuffer,
1331 (u32)ioc->HostPageBuffer_dma,
1332 host_page_buffer_sz));
1333 ioc->alloc_total += host_page_buffer_sz;
1334 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1338 host_page_buffer_sz -= (4*1024);
1342 if(!ioc->HostPageBuffer) {
1343 printk(MYIOC_s_ERR_FMT
1344 "Failed to alloc memory for host_page_buffer!\n",
1349 psge = (char *)&ioc_init->HostPageBufferSGE;
1350 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1351 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1352 MPI_SGE_FLAGS_HOST_TO_IOC |
1353 MPI_SGE_FLAGS_END_OF_BUFFER;
1354 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1355 flags_length |= ioc->HostPageBuffer_sz;
1356 ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1357 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1362 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1364 * mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1365 * @iocid: IOC unique identifier (integer)
1366 * @iocpp: Pointer to pointer to IOC adapter
1368 * Given a unique IOC identifier, set pointer to the associated MPT
1369 * adapter structure.
1371 * Returns iocid and sets iocpp if iocid is found.
1372 * Returns -1 if iocid is not found.
1375 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1379 list_for_each_entry(ioc,&ioc_list,list) {
1380 if (ioc->id == iocid) {
1391 * mpt_get_product_name - returns product string
1392 * @vendor: pci vendor id
1393 * @device: pci device id
1394 * @revision: pci revision id
1396 * Returns product string displayed when driver loads,
1397 * in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1401 mpt_get_product_name(u16 vendor, u16 device, u8 revision)
1403 char *product_str = NULL;
1405 if (vendor == PCI_VENDOR_ID_BROCADE) {
1408 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1412 product_str = "BRE040 A0";
1415 product_str = "BRE040 A1";
1418 product_str = "BRE040";
1428 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1429 product_str = "LSIFC909 B1";
1431 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1432 product_str = "LSIFC919 B0";
1434 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1435 product_str = "LSIFC929 B0";
1437 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1438 if (revision < 0x80)
1439 product_str = "LSIFC919X A0";
1441 product_str = "LSIFC919XL A1";
1443 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1444 if (revision < 0x80)
1445 product_str = "LSIFC929X A0";
1447 product_str = "LSIFC929XL A1";
1449 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1450 product_str = "LSIFC939X A1";
1452 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1453 product_str = "LSIFC949X A1";
1455 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1459 product_str = "LSIFC949E A0";
1462 product_str = "LSIFC949E A1";
1465 product_str = "LSIFC949E";
1469 case MPI_MANUFACTPAGE_DEVID_53C1030:
1473 product_str = "LSI53C1030 A0";
1476 product_str = "LSI53C1030 B0";
1479 product_str = "LSI53C1030 B1";
1482 product_str = "LSI53C1030 B2";
1485 product_str = "LSI53C1030 C0";
1488 product_str = "LSI53C1030T A0";
1491 product_str = "LSI53C1030T A2";
1494 product_str = "LSI53C1030T A3";
1497 product_str = "LSI53C1020A A1";
1500 product_str = "LSI53C1030";
1504 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1508 product_str = "LSI53C1035 A2";
1511 product_str = "LSI53C1035 B0";
1514 product_str = "LSI53C1035";
1518 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1522 product_str = "LSISAS1064 A1";
1525 product_str = "LSISAS1064 A2";
1528 product_str = "LSISAS1064 A3";
1531 product_str = "LSISAS1064 A4";
1534 product_str = "LSISAS1064";
1538 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1542 product_str = "LSISAS1064E A0";
1545 product_str = "LSISAS1064E B0";
1548 product_str = "LSISAS1064E B1";
1551 product_str = "LSISAS1064E B2";
1554 product_str = "LSISAS1064E B3";
1557 product_str = "LSISAS1064E";
1561 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1565 product_str = "LSISAS1068 A0";
1568 product_str = "LSISAS1068 B0";
1571 product_str = "LSISAS1068 B1";
1574 product_str = "LSISAS1068";
1578 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1582 product_str = "LSISAS1068E A0";
1585 product_str = "LSISAS1068E B0";
1588 product_str = "LSISAS1068E B1";
1591 product_str = "LSISAS1068E B2";
1594 product_str = "LSISAS1068E B3";
1597 product_str = "LSISAS1068E";
1601 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1605 product_str = "LSISAS1078 A0";
1608 product_str = "LSISAS1078 B0";
1611 product_str = "LSISAS1078 C0";
1614 product_str = "LSISAS1078 C1";
1617 product_str = "LSISAS1078 C2";
1620 product_str = "LSISAS1078";
1631 * mpt_mapresources - map in memory mapped io
1632 * @ioc: Pointer to pointer to IOC adapter
1636 mpt_mapresources(MPT_ADAPTER *ioc)
1640 resource_size_t mem_phys;
1645 struct pci_dev *pdev;
1648 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1649 if (pci_enable_device_mem(pdev)) {
1650 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1651 "failed\n", ioc->name);
1654 if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1655 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1656 "MEM failed\n", ioc->name);
1657 goto out_pci_disable_device;
1660 if (sizeof(dma_addr_t) > 4) {
1661 const uint64_t required_mask = dma_get_required_mask
1663 if (required_mask > DMA_BIT_MASK(32)
1664 && !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))
1665 && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1666 ioc->dma_mask = DMA_BIT_MASK(64);
1667 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1668 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1670 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))
1671 && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1672 ioc->dma_mask = DMA_BIT_MASK(32);
1673 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1674 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1677 printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1678 ioc->name, pci_name(pdev));
1679 goto out_pci_release_region;
1682 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))
1683 && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1684 ioc->dma_mask = DMA_BIT_MASK(32);
1685 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1686 ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
1689 printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
1690 ioc->name, pci_name(pdev));
1691 goto out_pci_release_region;
1695 mem_phys = msize = 0;
1697 for (ii = 0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1698 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1701 /* Get I/O space! */
1702 port = pci_resource_start(pdev, ii);
1703 psize = pci_resource_len(pdev, ii);
1708 mem_phys = pci_resource_start(pdev, ii);
1709 msize = pci_resource_len(pdev, ii);
1712 ioc->mem_size = msize;
1715 /* Get logical ptr for PciMem0 space */
1716 /*mem = ioremap(mem_phys, msize);*/
1717 mem = ioremap(mem_phys, msize);
1719 printk(MYIOC_s_ERR_FMT ": ERROR - Unable to map adapter"
1720 " memory!\n", ioc->name);
1722 goto out_pci_release_region;
1725 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1726 ioc->name, mem, (unsigned long long)mem_phys));
1728 ioc->mem_phys = mem_phys;
1729 ioc->chip = (SYSIF_REGS __iomem *)mem;
1731 /* Save Port IO values in case we need to do downloadboot */
1732 ioc->pio_mem_phys = port;
1733 ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1737 out_pci_release_region:
1738 pci_release_selected_regions(pdev, ioc->bars);
1739 out_pci_disable_device:
1740 pci_disable_device(pdev);
1744 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1746 * mpt_attach - Install a PCI intelligent MPT adapter.
1747 * @pdev: Pointer to pci_dev structure
1748 * @id: PCI device ID information
1750 * This routine performs all the steps necessary to bring the IOC of
1751 * a MPT adapter to a OPERATIONAL state. This includes registering
1752 * memory regions, registering the interrupt, and allocating request
1753 * and reply memory pools.
1755 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1758 * Returns 0 for success, non-zero for failure.
1760 * TODO: Add support for polled controllers
1763 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1769 static int mpt_ids = 0;
1770 #ifdef CONFIG_PROC_FS
1771 struct proc_dir_entry *dent;
1774 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_KERNEL);
1776 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1780 ioc->id = mpt_ids++;
1781 sprintf(ioc->name, "ioc%d", ioc->id);
1782 dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1785 * set initial debug level
1786 * (refer to mptdebug.h)
1789 ioc->debug_level = mpt_debug_level;
1790 if (mpt_debug_level)
1791 printk(KERN_INFO "mpt_debug_level=%xh\n", mpt_debug_level);
1793 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1796 if (mpt_mapresources(ioc)) {
1801 * Setting up proper handlers for scatter gather handling
1803 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1804 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
1805 ioc->add_sge = &mpt_add_sge_64bit_1078;
1807 ioc->add_sge = &mpt_add_sge_64bit;
1808 ioc->add_chain = &mpt_add_chain_64bit;
1809 ioc->sg_addr_size = 8;
1811 ioc->add_sge = &mpt_add_sge;
1812 ioc->add_chain = &mpt_add_chain;
1813 ioc->sg_addr_size = 4;
1815 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1817 ioc->alloc_total = sizeof(MPT_ADAPTER);
1818 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1819 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1822 spin_lock_init(&ioc->taskmgmt_lock);
1823 mutex_init(&ioc->internal_cmds.mutex);
1824 init_completion(&ioc->internal_cmds.done);
1825 mutex_init(&ioc->mptbase_cmds.mutex);
1826 init_completion(&ioc->mptbase_cmds.done);
1827 mutex_init(&ioc->taskmgmt_cmds.mutex);
1828 init_completion(&ioc->taskmgmt_cmds.done);
1830 /* Initialize the event logging.
1832 ioc->eventTypes = 0; /* None */
1833 ioc->eventContext = 0;
1834 ioc->eventLogSize = 0;
1842 ioc->cached_fw = NULL;
1844 /* Initialize SCSI Config Data structure
1846 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1848 /* Initialize the fc rport list head.
1850 INIT_LIST_HEAD(&ioc->fc_rports);
1852 /* Find lookup slot. */
1853 INIT_LIST_HEAD(&ioc->list);
1856 /* Initialize workqueue */
1857 INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1859 snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1860 "mpt_poll_%d", ioc->id);
1861 ioc->reset_work_q = alloc_workqueue(ioc->reset_work_q_name,
1863 if (!ioc->reset_work_q) {
1864 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1867 goto out_unmap_resources;
1870 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1871 ioc->name, &ioc->facts, &ioc->pfacts[0]));
1873 ioc->prod_name = mpt_get_product_name(pdev->vendor, pdev->device,
1876 switch (pdev->device)
1878 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1879 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1880 ioc->errata_flag_1064 = 1;
1882 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1883 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1884 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1885 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1889 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1890 if (pdev->revision < XL_929) {
1891 /* 929X Chip Fix. Set Split transactions level
1892 * for PCIX. Set MOST bits to zero.
1894 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1896 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1898 /* 929XL Chip Fix. Set MMRBC to 0x08.
1900 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1902 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1907 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1908 /* 919X Chip Fix. Set Split transactions level
1909 * for PCIX. Set MOST bits to zero.
1911 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1913 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1917 case MPI_MANUFACTPAGE_DEVID_53C1030:
1918 /* 1030 Chip Fix. Disable Split transactions
1919 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1921 if (pdev->revision < C0_1030) {
1922 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1924 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1928 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1929 ioc->bus_type = SPI;
1932 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1933 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1934 ioc->errata_flag_1064 = 1;
1935 ioc->bus_type = SAS;
1938 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1939 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1940 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1941 ioc->bus_type = SAS;
1946 switch (ioc->bus_type) {
1949 ioc->msi_enable = mpt_msi_enable_sas;
1953 ioc->msi_enable = mpt_msi_enable_spi;
1957 ioc->msi_enable = mpt_msi_enable_fc;
1961 ioc->msi_enable = 0;
1965 ioc->fw_events_off = 1;
1967 if (ioc->errata_flag_1064)
1968 pci_disable_io_access(pdev);
1970 spin_lock_init(&ioc->FreeQlock);
1973 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1975 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1977 /* Set IOC ptr in the pcidev's driver data. */
1978 pci_set_drvdata(ioc->pcidev, ioc);
1980 /* Set lookup ptr. */
1981 list_add_tail(&ioc->list, &ioc_list);
1983 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1985 mpt_detect_bound_ports(ioc, pdev);
1987 INIT_LIST_HEAD(&ioc->fw_event_list);
1988 spin_lock_init(&ioc->fw_event_lock);
1989 snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
1990 ioc->fw_event_q = alloc_workqueue(ioc->fw_event_q_name,
1992 if (!ioc->fw_event_q) {
1993 printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
1996 goto out_remove_ioc;
1999 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2001 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
2004 destroy_workqueue(ioc->fw_event_q);
2005 ioc->fw_event_q = NULL;
2007 list_del(&ioc->list);
2009 ioc->alt_ioc->alt_ioc = NULL;
2010 iounmap(ioc->memmap);
2011 if (pci_is_enabled(pdev))
2012 pci_disable_device(pdev);
2014 pci_release_selected_regions(pdev, ioc->bars);
2016 destroy_workqueue(ioc->reset_work_q);
2017 ioc->reset_work_q = NULL;
2023 /* call per device driver probe entry point */
2024 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2025 if(MptDeviceDriverHandlers[cb_idx] &&
2026 MptDeviceDriverHandlers[cb_idx]->probe) {
2027 MptDeviceDriverHandlers[cb_idx]->probe(pdev);
2031 #ifdef CONFIG_PROC_FS
2033 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
2035 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
2037 proc_create_single_data("info", S_IRUGO, dent,
2038 mpt_iocinfo_proc_show, ioc);
2039 proc_create_single_data("summary", S_IRUGO, dent,
2040 mpt_summary_proc_show, ioc);
2045 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
2046 msecs_to_jiffies(MPT_POLLING_INTERVAL));
2051 list_del(&ioc->list);
2053 ioc->alt_ioc->alt_ioc = NULL;
2055 destroy_workqueue(ioc->reset_work_q);
2056 ioc->reset_work_q = NULL;
2058 out_unmap_resources:
2059 iounmap(ioc->memmap);
2060 pci_disable_device(pdev);
2061 pci_release_selected_regions(pdev, ioc->bars);
2069 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2071 * mpt_detach - Remove a PCI intelligent MPT adapter.
2072 * @pdev: Pointer to pci_dev structure
2076 mpt_detach(struct pci_dev *pdev)
2078 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2081 unsigned long flags;
2082 struct workqueue_struct *wq;
2085 * Stop polling ioc for fault condition
2087 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2088 wq = ioc->reset_work_q;
2089 ioc->reset_work_q = NULL;
2090 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2091 cancel_delayed_work(&ioc->fault_reset_work);
2092 destroy_workqueue(wq);
2094 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2095 wq = ioc->fw_event_q;
2096 ioc->fw_event_q = NULL;
2097 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2098 destroy_workqueue(wq);
2100 snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2101 remove_proc_entry(pname, NULL);
2102 snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2103 remove_proc_entry(pname, NULL);
2104 snprintf(pname, sizeof(pname), MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2105 remove_proc_entry(pname, NULL);
2107 /* call per device driver remove entry point */
2108 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
2109 if(MptDeviceDriverHandlers[cb_idx] &&
2110 MptDeviceDriverHandlers[cb_idx]->remove) {
2111 MptDeviceDriverHandlers[cb_idx]->remove(pdev);
2115 /* Disable interrupts! */
2116 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2119 synchronize_irq(pdev->irq);
2121 /* Clear any lingering interrupt */
2122 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2124 CHIPREG_READ32(&ioc->chip->IntStatus);
2126 mpt_adapter_dispose(ioc);
2130 /**************************************************************************
2134 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2136 * mpt_suspend - Fusion MPT base driver suspend routine.
2137 * @pdev: Pointer to pci_dev structure
2138 * @state: new state to enter
2141 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
2144 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2146 device_state = pci_choose_state(pdev, state);
2147 printk(MYIOC_s_INFO_FMT "pci-suspend: pdev=0x%p, slot=%s, Entering "
2148 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2151 /* put ioc into READY_STATE */
2152 if (SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2153 printk(MYIOC_s_ERR_FMT
2154 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
2157 /* disable interrupts */
2158 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2161 /* Clear any lingering interrupt */
2162 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2164 free_irq(ioc->pci_irq, ioc);
2165 if (ioc->msi_enable)
2166 pci_disable_msi(ioc->pcidev);
2168 pci_save_state(pdev);
2169 pci_disable_device(pdev);
2170 pci_release_selected_regions(pdev, ioc->bars);
2171 pci_set_power_state(pdev, device_state);
2175 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2177 * mpt_resume - Fusion MPT base driver resume routine.
2178 * @pdev: Pointer to pci_dev structure
2181 mpt_resume(struct pci_dev *pdev)
2183 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2184 u32 device_state = pdev->current_state;
2188 printk(MYIOC_s_INFO_FMT "pci-resume: pdev=0x%p, slot=%s, Previous "
2189 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2192 pci_set_power_state(pdev, PCI_D0);
2193 pci_enable_wake(pdev, PCI_D0, 0);
2194 pci_restore_state(pdev);
2196 err = mpt_mapresources(ioc);
2200 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2201 if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
2202 ioc->add_sge = &mpt_add_sge_64bit_1078;
2204 ioc->add_sge = &mpt_add_sge_64bit;
2205 ioc->add_chain = &mpt_add_chain_64bit;
2206 ioc->sg_addr_size = 8;
2209 ioc->add_sge = &mpt_add_sge;
2210 ioc->add_chain = &mpt_add_chain;
2211 ioc->sg_addr_size = 4;
2213 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2215 printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2216 ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2217 CHIPREG_READ32(&ioc->chip->Doorbell));
2220 * Errata workaround for SAS pci express:
2221 * Upon returning to the D0 state, the contents of the doorbell will be
2222 * stale data, and this will incorrectly signal to the host driver that
2223 * the firmware is ready to process mpt commands. The workaround is
2224 * to issue a diagnostic reset.
2226 if (ioc->bus_type == SAS && (pdev->device ==
2227 MPI_MANUFACTPAGE_DEVID_SAS1068E || pdev->device ==
2228 MPI_MANUFACTPAGE_DEVID_SAS1064E)) {
2229 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2230 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover\n",
2236 /* bring ioc to operational state */
2237 printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2238 recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2240 if (recovery_state != 0)
2241 printk(MYIOC_s_WARN_FMT "pci-resume: Cannot recover, "
2242 "error:[%x]\n", ioc->name, recovery_state);
2244 printk(MYIOC_s_INFO_FMT
2245 "pci-resume: success\n", ioc->name);
2253 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2255 if ((MptDriverClass[index] == MPTSPI_DRIVER &&
2256 ioc->bus_type != SPI) ||
2257 (MptDriverClass[index] == MPTFC_DRIVER &&
2258 ioc->bus_type != FC) ||
2259 (MptDriverClass[index] == MPTSAS_DRIVER &&
2260 ioc->bus_type != SAS))
2261 /* make sure we only call the relevant reset handler
2264 return (MptResetHandlers[index])(ioc, reset_phase);
2267 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2269 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
2270 * @ioc: Pointer to MPT adapter structure
2271 * @reason: Event word / reason
2272 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
2274 * This routine performs all the steps necessary to bring the IOC
2275 * to a OPERATIONAL state.
2277 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
2282 * -1 if failed to get board READY
2283 * -2 if READY but IOCFacts Failed
2284 * -3 if READY but PrimeIOCFifos Failed
2285 * -4 if READY but IOCInit Failed
2286 * -5 if failed to enable_device and/or request_selected_regions
2287 * -6 if failed to upload firmware
2290 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2292 int hard_reset_done = 0;
2293 int alt_ioc_ready = 0;
2298 int reset_alt_ioc_active = 0;
2299 int irq_allocated = 0;
2302 printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2303 reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
2305 /* Disable reply interrupts (also blocks FreeQ) */
2306 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2310 if (ioc->alt_ioc->active ||
2311 reason == MPT_HOSTEVENT_IOC_RECOVER) {
2312 reset_alt_ioc_active = 1;
2313 /* Disable alt-IOC's reply interrupts
2314 * (and FreeQ) for a bit
2316 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2318 ioc->alt_ioc->active = 0;
2323 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
2326 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2327 if (hard_reset_done == -4) {
2328 printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
2331 if (reset_alt_ioc_active && ioc->alt_ioc) {
2332 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
2333 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2334 "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2335 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2336 ioc->alt_ioc->active = 1;
2340 printk(MYIOC_s_WARN_FMT
2341 "NOT READY WARNING!\n", ioc->name);
2347 /* hard_reset_done = 0 if a soft reset was performed
2348 * and 1 if a hard reset was performed.
2350 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2351 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2354 printk(MYIOC_s_WARN_FMT
2355 ": alt-ioc Not ready WARNING!\n",
2356 ioc->alt_ioc->name);
2359 for (ii=0; ii<5; ii++) {
2360 /* Get IOC facts! Allow 5 retries */
2361 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2367 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2368 "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2370 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2371 MptDisplayIocCapabilities(ioc);
2374 if (alt_ioc_ready) {
2375 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2376 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2377 "Initial Alt IocFacts failed rc=%x\n",
2379 /* Retry - alt IOC was initialized once
2381 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2384 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2385 "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2387 reset_alt_ioc_active = 0;
2388 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2389 MptDisplayIocCapabilities(ioc->alt_ioc);
2393 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2394 (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2395 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2396 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2398 if (pci_enable_device(ioc->pcidev))
2400 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2406 * Device is reset now. It must have de-asserted the interrupt line
2407 * (if it was asserted) and it should be safe to register for the
2410 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2412 if (ioc->pcidev->irq) {
2413 if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2414 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2417 ioc->msi_enable = 0;
2418 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2419 IRQF_SHARED, ioc->name, ioc);
2421 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2423 ioc->name, ioc->pcidev->irq);
2424 if (ioc->msi_enable)
2425 pci_disable_msi(ioc->pcidev);
2430 ioc->pci_irq = ioc->pcidev->irq;
2431 pci_set_master(ioc->pcidev); /* ?? */
2432 pci_set_drvdata(ioc->pcidev, ioc);
2433 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2434 "installed at interrupt %d\n", ioc->name,
2439 /* Prime reply & request queues!
2440 * (mucho alloc's) Must be done prior to
2441 * init as upper addresses are needed for init.
2442 * If fails, continue with alt-ioc processing
2444 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2446 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2449 /* May need to check/upload firmware & data here!
2450 * If fails, continue with alt-ioc processing
2452 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2454 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2457 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2458 printk(MYIOC_s_WARN_FMT
2459 ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2460 ioc->alt_ioc->name, rc);
2462 reset_alt_ioc_active = 0;
2465 if (alt_ioc_ready) {
2466 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2468 reset_alt_ioc_active = 0;
2469 printk(MYIOC_s_WARN_FMT
2470 ": alt-ioc: (%d) init failure WARNING!\n",
2471 ioc->alt_ioc->name, rc);
2475 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2476 if (ioc->upload_fw) {
2477 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2478 "firmware upload required!\n", ioc->name));
2480 /* Controller is not operational, cannot do upload
2483 rc = mpt_do_upload(ioc, sleepFlag);
2485 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2487 * Maintain only one pointer to FW memory
2488 * so there will not be two attempt to
2489 * downloadboot onboard dual function
2490 * chips (mpt_adapter_disable,
2493 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2494 "mpt_upload: alt_%s has cached_fw=%p \n",
2495 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2496 ioc->cached_fw = NULL;
2499 printk(MYIOC_s_WARN_FMT
2500 "firmware upload failure!\n", ioc->name);
2507 /* Enable MPT base driver management of EventNotification
2508 * and EventAck handling.
2510 if ((ret == 0) && (!ioc->facts.EventState)) {
2511 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2512 "SendEventNotification\n",
2514 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2517 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2518 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2521 /* Enable! (reply interrupt) */
2522 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2525 if (rc == 0) { /* alt ioc */
2526 if (reset_alt_ioc_active && ioc->alt_ioc) {
2527 /* (re)Enable alt-IOC! (reply interrupt) */
2528 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2529 "reply irq re-enabled\n",
2530 ioc->alt_ioc->name));
2531 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2533 ioc->alt_ioc->active = 1;
2538 /* Add additional "reason" check before call to GetLanConfigPages
2539 * (combined with GetIoUnitPage2 call). This prevents a somewhat
2540 * recursive scenario; GetLanConfigPages times out, timer expired
2541 * routine calls HardResetHandler, which calls into here again,
2542 * and we try GetLanConfigPages again...
2544 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2547 * Initialize link list for inactive raid volumes.
2549 mutex_init(&ioc->raid_data.inactive_list_mutex);
2550 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2552 switch (ioc->bus_type) {
2555 /* clear persistency table */
2556 if(ioc->facts.IOCExceptions &
2557 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2558 ret = mptbase_sas_persist_operation(ioc,
2559 MPI_SAS_OP_CLEAR_NOT_PRESENT);
2566 mpt_findImVolumes(ioc);
2568 /* Check, and possibly reset, the coalescing value
2570 mpt_read_ioc_pg_1(ioc);
2575 if ((ioc->pfacts[0].ProtocolFlags &
2576 MPI_PORTFACTS_PROTOCOL_LAN) &&
2577 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2579 * Pre-fetch the ports LAN MAC address!
2580 * (LANPage1_t stuff)
2582 (void) GetLanConfigPages(ioc);
2583 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2584 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2585 "LanAddr = %pMR\n", ioc->name, a));
2590 /* Get NVRAM and adapter maximums from SPP 0 and 2
2592 mpt_GetScsiPortSettings(ioc, 0);
2594 /* Get version and length of SDP 1
2596 mpt_readScsiDevicePageHeaders(ioc, 0);
2600 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2601 mpt_findImVolumes(ioc);
2603 /* Check, and possibly reset, the coalescing value
2605 mpt_read_ioc_pg_1(ioc);
2607 mpt_read_ioc_pg_4(ioc);
2612 GetIoUnitPage2(ioc);
2613 mpt_get_manufacturing_pg_0(ioc);
2617 if ((ret != 0) && irq_allocated) {
2618 free_irq(ioc->pci_irq, ioc);
2619 if (ioc->msi_enable)
2620 pci_disable_msi(ioc->pcidev);
2625 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2627 * mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2628 * @ioc: Pointer to MPT adapter structure
2629 * @pdev: Pointer to (struct pci_dev) structure
2631 * Search for PCI bus/dev_function which matches
2632 * PCI bus/dev_function (+/-1) for newly discovered 929,
2633 * 929X, 1030 or 1035.
2635 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2636 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2639 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2641 struct pci_dev *peer=NULL;
2642 unsigned int slot = PCI_SLOT(pdev->devfn);
2643 unsigned int func = PCI_FUNC(pdev->devfn);
2644 MPT_ADAPTER *ioc_srch;
2646 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2647 " searching for devfn match on %x or %x\n",
2648 ioc->name, pci_name(pdev), pdev->bus->number,
2649 pdev->devfn, func-1, func+1));
2651 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2653 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2658 list_for_each_entry(ioc_srch, &ioc_list, list) {
2659 struct pci_dev *_pcidev = ioc_srch->pcidev;
2660 if (_pcidev == peer) {
2661 /* Paranoia checks */
2662 if (ioc->alt_ioc != NULL) {
2663 printk(MYIOC_s_WARN_FMT
2664 "Oops, already bound (%s <==> %s)!\n",
2665 ioc->name, ioc->name, ioc->alt_ioc->name);
2667 } else if (ioc_srch->alt_ioc != NULL) {
2668 printk(MYIOC_s_WARN_FMT
2669 "Oops, already bound (%s <==> %s)!\n",
2670 ioc_srch->name, ioc_srch->name,
2671 ioc_srch->alt_ioc->name);
2674 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2675 "FOUND! binding %s <==> %s\n",
2676 ioc->name, ioc->name, ioc_srch->name));
2677 ioc_srch->alt_ioc = ioc;
2678 ioc->alt_ioc = ioc_srch;
2684 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2686 * mpt_adapter_disable - Disable misbehaving MPT adapter.
2687 * @ioc: Pointer to MPT adapter structure
2690 mpt_adapter_disable(MPT_ADAPTER *ioc)
2695 if (ioc->cached_fw != NULL) {
2696 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2697 "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2698 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2699 ioc->cached_fw, CAN_SLEEP)) < 0) {
2700 printk(MYIOC_s_WARN_FMT
2701 ": firmware downloadboot failure (%d)!\n",
2707 * Put the controller into ready state (if its not already)
2709 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2710 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2712 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2713 printk(MYIOC_s_ERR_FMT "%s: IOC msg unit "
2714 "reset failed to put ioc in ready state!\n",
2715 ioc->name, __func__);
2717 printk(MYIOC_s_ERR_FMT "%s: IOC msg unit reset "
2718 "failed!\n", ioc->name, __func__);
2722 /* Disable adapter interrupts! */
2723 synchronize_irq(ioc->pcidev->irq);
2724 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2727 /* Clear any lingering interrupt */
2728 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2729 CHIPREG_READ32(&ioc->chip->IntStatus);
2731 if (ioc->alloc != NULL) {
2733 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n",
2734 ioc->name, ioc->alloc, ioc->alloc_sz));
2735 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc,
2737 ioc->reply_frames = NULL;
2738 ioc->req_frames = NULL;
2740 ioc->alloc_total -= sz;
2743 if (ioc->sense_buf_pool != NULL) {
2744 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2745 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool,
2746 ioc->sense_buf_pool_dma);
2747 ioc->sense_buf_pool = NULL;
2748 ioc->alloc_total -= sz;
2751 if (ioc->events != NULL){
2752 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2755 ioc->alloc_total -= sz;
2758 mpt_free_fw_memory(ioc);
2760 kfree(ioc->spi_data.nvram);
2761 mpt_inactive_raid_list_free(ioc);
2762 kfree(ioc->raid_data.pIocPg2);
2763 kfree(ioc->raid_data.pIocPg3);
2764 ioc->spi_data.nvram = NULL;
2765 ioc->raid_data.pIocPg3 = NULL;
2767 if (ioc->spi_data.pIocPg4 != NULL) {
2768 sz = ioc->spi_data.IocPg4Sz;
2769 dma_free_coherent(&ioc->pcidev->dev, sz,
2770 ioc->spi_data.pIocPg4,
2771 ioc->spi_data.IocPg4_dma);
2772 ioc->spi_data.pIocPg4 = NULL;
2773 ioc->alloc_total -= sz;
2776 if (ioc->ReqToChain != NULL) {
2777 kfree(ioc->ReqToChain);
2778 kfree(ioc->RequestNB);
2779 ioc->ReqToChain = NULL;
2782 kfree(ioc->ChainToChain);
2783 ioc->ChainToChain = NULL;
2785 if (ioc->HostPageBuffer != NULL) {
2786 if((ret = mpt_host_page_access_control(ioc,
2787 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2788 printk(MYIOC_s_ERR_FMT
2789 ": %s: host page buffers free failed (%d)!\n",
2790 ioc->name, __func__, ret);
2792 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2793 "HostPageBuffer free @ %p, sz=%d bytes\n",
2794 ioc->name, ioc->HostPageBuffer,
2795 ioc->HostPageBuffer_sz));
2796 dma_free_coherent(&ioc->pcidev->dev, ioc->HostPageBuffer_sz,
2797 ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2798 ioc->HostPageBuffer = NULL;
2799 ioc->HostPageBuffer_sz = 0;
2800 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2803 pci_set_drvdata(ioc->pcidev, NULL);
2805 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2807 * mpt_adapter_dispose - Free all resources associated with an MPT adapter
2808 * @ioc: Pointer to MPT adapter structure
2810 * This routine unregisters h/w resources and frees all alloc'd memory
2811 * associated with a MPT adapter structure.
2814 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2816 int sz_first, sz_last;
2821 sz_first = ioc->alloc_total;
2823 mpt_adapter_disable(ioc);
2825 if (ioc->pci_irq != -1) {
2826 free_irq(ioc->pci_irq, ioc);
2827 if (ioc->msi_enable)
2828 pci_disable_msi(ioc->pcidev);
2832 if (ioc->memmap != NULL) {
2833 iounmap(ioc->memmap);
2837 pci_disable_device(ioc->pcidev);
2838 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2840 /* Zap the adapter lookup ptr! */
2841 list_del(&ioc->list);
2843 sz_last = ioc->alloc_total;
2844 dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2845 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2848 ioc->alt_ioc->alt_ioc = NULL;
2853 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2855 * MptDisplayIocCapabilities - Disply IOC's capabilities.
2856 * @ioc: Pointer to MPT adapter structure
2859 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2863 printk(KERN_INFO "%s: ", ioc->name);
2865 pr_cont("%s: ", ioc->prod_name);
2866 pr_cont("Capabilities={");
2868 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2869 pr_cont("Initiator");
2873 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2874 pr_cont("%sTarget", i ? "," : "");
2878 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2879 pr_cont("%sLAN", i ? "," : "");
2885 * This would probably evoke more questions than it's worth
2887 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2888 pr_cont("%sLogBusAddr", i ? "," : "");
2896 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2898 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2899 * @ioc: Pointer to MPT_ADAPTER structure
2900 * @force: Force hard KickStart of IOC
2901 * @sleepFlag: Specifies whether the process can sleep
2904 * 1 - DIAG reset and READY
2905 * 0 - READY initially OR soft reset and READY
2906 * -1 - Any failure on KickStart
2907 * -2 - Msg Unit Reset Failed
2908 * -3 - IO Unit Reset Failed
2909 * -4 - IOC owned by a PEER
2912 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2917 int hard_reset_done = 0;
2922 /* Get current [raw] IOC state */
2923 ioc_state = mpt_GetIocState(ioc, 0);
2924 dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2927 * Check to see if IOC got left/stuck in doorbell handshake
2928 * grip of death. If so, hard reset the IOC.
2930 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2932 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2936 /* Is it already READY? */
2938 ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)) {
2939 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2940 "IOC is in READY state\n", ioc->name));
2945 * Check to see if IOC is in FAULT state.
2947 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2949 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2951 printk(MYIOC_s_WARN_FMT " FAULT code = %04xh\n",
2952 ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2956 * Hmmm... Did it get left operational?
2958 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2959 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2963 * If PCI Peer, exit.
2964 * Else, if no fault conditions are present, issue a MessageUnitReset
2965 * Else, fall through to KickStart case
2967 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2968 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2969 "whoinit 0x%x statefault %d force %d\n",
2970 ioc->name, whoinit, statefault, force));
2971 if (whoinit == MPI_WHOINIT_PCI_PEER)
2974 if ((statefault == 0 ) && (force == 0)) {
2975 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2982 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2983 if (hard_reset_done < 0)
2987 * Loop here waiting for IOC to come READY.
2990 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2992 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2993 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2995 * BIOS or previous driver load left IOC in OP state.
2996 * Reset messaging FIFOs.
2998 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2999 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
3002 } else if (ioc_state == MPI_IOC_STATE_RESET) {
3004 * Something is wrong. Try to get IOC back
3007 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
3008 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
3015 printk(MYIOC_s_ERR_FMT
3016 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
3017 ioc->name, ioc_state, (int)((ii+5)/HZ));
3021 if (sleepFlag == CAN_SLEEP) {
3024 mdelay (1); /* 1 msec delay */
3029 if (statefault < 3) {
3030 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
3031 statefault == 1 ? "stuck handshake" : "IOC FAULT");
3034 return hard_reset_done;
3037 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3039 * mpt_GetIocState - Get the current state of a MPT adapter.
3040 * @ioc: Pointer to MPT_ADAPTER structure
3041 * @cooked: Request raw or cooked IOC state
3043 * Returns all IOC Doorbell register bits if cooked==0, else just the
3044 * Doorbell bits in MPI_IOC_STATE_MASK.
3047 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
3052 s = CHIPREG_READ32(&ioc->chip->Doorbell);
3053 sc = s & MPI_IOC_STATE_MASK;
3056 ioc->last_state = sc;
3058 return cooked ? sc : s;
3061 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3063 * GetIocFacts - Send IOCFacts request to MPT adapter.
3064 * @ioc: Pointer to MPT_ADAPTER structure
3065 * @sleepFlag: Specifies whether the process can sleep
3066 * @reason: If recovery, only update facts.
3068 * Returns 0 for success, non-zero for failure.
3071 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3073 IOCFacts_t get_facts;
3074 IOCFactsReply_t *facts;
3082 /* IOC *must* NOT be in RESET state! */
3083 if (ioc->last_state == MPI_IOC_STATE_RESET) {
3084 printk(KERN_ERR MYNAM
3085 ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
3086 ioc->name, ioc->last_state);
3090 facts = &ioc->facts;
3092 /* Destination (reply area)... */
3093 reply_sz = sizeof(*facts);
3094 memset(facts, 0, reply_sz);
3096 /* Request area (get_facts on the stack right now!) */
3097 req_sz = sizeof(get_facts);
3098 memset(&get_facts, 0, req_sz);
3100 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
3101 /* Assert: All other get_facts fields are zero! */
3103 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3104 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
3105 ioc->name, req_sz, reply_sz));
3107 /* No non-zero fields in the get_facts request are greater than
3108 * 1 byte in size, so we can just fire it off as is.
3110 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3111 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
3116 * Now byte swap (GRRR) the necessary fields before any further
3117 * inspection of reply contents.
3119 * But need to do some sanity checks on MsgLength (byte) field
3120 * to make sure we don't zero IOC's req_sz!
3122 /* Did we get a valid reply? */
3123 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
3124 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3126 * If not been here, done that, save off first WhoInit value
3128 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3129 ioc->FirstWhoInit = facts->WhoInit;
3132 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
3133 facts->MsgContext = le32_to_cpu(facts->MsgContext);
3134 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
3135 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
3136 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
3137 /* CHECKME! IOCStatus, IOCLogInfo */
3139 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
3140 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
3143 * FC f/w version changed between 1.1 and 1.2
3144 * Old: u16{Major(4),Minor(4),SubMinor(8)}
3145 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
3147 if (facts->MsgVersion < MPI_VERSION_01_02) {
3149 * Handle old FC f/w style, convert to new...
3151 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
3152 facts->FWVersion.Word =
3153 ((oldv<<12) & 0xFF000000) |
3154 ((oldv<<8) & 0x000FFF00);
3156 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
3158 facts->ProductID = le16_to_cpu(facts->ProductID);
3160 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3161 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
3162 ioc->ir_firmware = 1;
3164 facts->CurrentHostMfaHighAddr =
3165 le32_to_cpu(facts->CurrentHostMfaHighAddr);
3166 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
3167 facts->CurrentSenseBufferHighAddr =
3168 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
3169 facts->CurReplyFrameSize =
3170 le16_to_cpu(facts->CurReplyFrameSize);
3171 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
3174 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
3175 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
3176 * to 14 in MPI-1.01.0x.
3178 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
3179 facts->MsgVersion > MPI_VERSION_01_00) {
3180 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
3183 facts->FWImageSize = ALIGN(facts->FWImageSize, 4);
3185 if (!facts->RequestFrameSize) {
3186 /* Something is wrong! */
3187 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
3192 r = sz = facts->BlockSize;
3193 vv = ((63 / (sz * 4)) + 1) & 0x03;
3194 ioc->NB_for_64_byte_frame = vv;
3200 ioc->NBShiftFactor = shiftFactor;
3201 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3202 "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
3203 ioc->name, vv, shiftFactor, r));
3205 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
3207 * Set values for this IOC's request & reply frame sizes,
3208 * and request & reply queue depths...
3210 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3211 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3212 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3213 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3215 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3216 ioc->name, ioc->reply_sz, ioc->reply_depth));
3217 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz =%3d, req_depth =%4d\n",
3218 ioc->name, ioc->req_sz, ioc->req_depth));
3220 /* Get port facts! */
3221 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3225 printk(MYIOC_s_ERR_FMT
3226 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
3227 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3228 RequestFrameSize)/sizeof(u32)));
3235 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3237 * GetPortFacts - Send PortFacts request to MPT adapter.
3238 * @ioc: Pointer to MPT_ADAPTER structure
3239 * @portnum: Port number
3240 * @sleepFlag: Specifies whether the process can sleep
3242 * Returns 0 for success, non-zero for failure.
3245 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3247 PortFacts_t get_pfacts;
3248 PortFactsReply_t *pfacts;
3254 /* IOC *must* NOT be in RESET state! */
3255 if (ioc->last_state == MPI_IOC_STATE_RESET) {
3256 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
3257 ioc->name, ioc->last_state );
3261 pfacts = &ioc->pfacts[portnum];
3263 /* Destination (reply area)... */
3264 reply_sz = sizeof(*pfacts);
3265 memset(pfacts, 0, reply_sz);
3267 /* Request area (get_pfacts on the stack right now!) */
3268 req_sz = sizeof(get_pfacts);
3269 memset(&get_pfacts, 0, req_sz);
3271 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
3272 get_pfacts.PortNumber = portnum;
3273 /* Assert: All other get_pfacts fields are zero! */
3275 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3276 ioc->name, portnum));
3278 /* No non-zero fields in the get_pfacts request are greater than
3279 * 1 byte in size, so we can just fire it off as is.
3281 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3282 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
3286 /* Did we get a valid reply? */
3288 /* Now byte swap the necessary fields in the response. */
3289 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
3290 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
3291 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
3292 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
3293 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
3294 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
3295 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
3296 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
3297 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
3299 max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3301 ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3302 ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3305 * Place all the devices on channels
3309 if (mpt_channel_mapping) {
3310 ioc->devices_per_bus = 1;
3311 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3317 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3319 * SendIocInit - Send IOCInit request to MPT adapter.
3320 * @ioc: Pointer to MPT_ADAPTER structure
3321 * @sleepFlag: Specifies whether the process can sleep
3323 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
3325 * Returns 0 for success, non-zero for failure.
3328 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3331 MPIDefaultReply_t init_reply;
3337 memset(&ioc_init, 0, sizeof(ioc_init));
3338 memset(&init_reply, 0, sizeof(init_reply));
3340 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
3341 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
3343 /* If we are in a recovery mode and we uploaded the FW image,
3344 * then this pointer is not NULL. Skip the upload a second time.
3345 * Set this flag if cached_fw set for either IOC.
3347 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3351 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3352 ioc->name, ioc->upload_fw, ioc->facts.Flags));
3354 ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3355 ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3357 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3358 ioc->name, ioc->facts.MsgVersion));
3359 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3360 // set MsgVersion and HeaderVersion host driver was built with
3361 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
3362 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
3364 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3365 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3366 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3369 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
3371 if (ioc->sg_addr_size == sizeof(u64)) {
3372 /* Save the upper 32-bits of the request
3373 * (reply) and sense buffers.
3375 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3376 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3378 /* Force 32-bit addressing */
3379 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
3380 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
3383 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3384 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3385 ioc->facts.MaxDevices = ioc_init.MaxDevices;
3386 ioc->facts.MaxBuses = ioc_init.MaxBuses;
3388 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3389 ioc->name, &ioc_init));
3391 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3392 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
3394 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3398 /* No need to byte swap the multibyte fields in the reply
3399 * since we don't even look at its contents.
3402 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3403 ioc->name, &ioc_init));
3405 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3406 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3410 /* YIKES! SUPER IMPORTANT!!!
3411 * Poll IocState until _OPERATIONAL while IOC is doing
3412 * LoopInit and TargetDiscovery!
3415 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
3416 state = mpt_GetIocState(ioc, 1);
3417 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3418 if (sleepFlag == CAN_SLEEP) {
3425 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3426 ioc->name, (int)((count+5)/HZ));
3430 state = mpt_GetIocState(ioc, 1);
3433 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3436 ioc->aen_event_read_flag=0;
3440 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3442 * SendPortEnable - Send PortEnable request to MPT adapter port.
3443 * @ioc: Pointer to MPT_ADAPTER structure
3444 * @portnum: Port number to enable
3445 * @sleepFlag: Specifies whether the process can sleep
3447 * Send PortEnable to bring IOC to OPERATIONAL state.
3449 * Returns 0 for success, non-zero for failure.
3452 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3454 PortEnable_t port_enable;
3455 MPIDefaultReply_t reply_buf;
3460 /* Destination... */
3461 reply_sz = sizeof(MPIDefaultReply_t);
3462 memset(&reply_buf, 0, reply_sz);
3464 req_sz = sizeof(PortEnable_t);
3465 memset(&port_enable, 0, req_sz);
3467 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3468 port_enable.PortNumber = portnum;
3469 /* port_enable.ChainOffset = 0; */
3470 /* port_enable.MsgFlags = 0; */
3471 /* port_enable.MsgContext = 0; */
3473 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3474 ioc->name, portnum, &port_enable));
3476 /* RAID FW may take a long time to enable
3478 if (ioc->ir_firmware || ioc->bus_type == SAS) {
3479 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3480 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3481 300 /*seconds*/, sleepFlag);
3483 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3484 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3485 30 /*seconds*/, sleepFlag);
3491 * mpt_alloc_fw_memory - allocate firmware memory
3492 * @ioc: Pointer to MPT_ADAPTER structure
3493 * @size: total FW bytes
3495 * If memory has already been allocated, the same (cached) value
3498 * Return 0 if successful, or non-zero for failure
3501 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3505 if (ioc->cached_fw) {
3506 rc = 0; /* use already allocated memory */
3509 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3510 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
3511 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3515 ioc->cached_fw = dma_alloc_coherent(&ioc->pcidev->dev, size,
3516 &ioc->cached_fw_dma, GFP_ATOMIC);
3517 if (!ioc->cached_fw) {
3518 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3522 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image @ %p[%p], sz=%d[%x] bytes\n",
3523 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3524 ioc->alloc_total += size;
3532 * mpt_free_fw_memory - free firmware memory
3533 * @ioc: Pointer to MPT_ADAPTER structure
3535 * If alt_img is NULL, delete from ioc structure.
3536 * Else, delete a secondary image in same format.
3539 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3543 if (!ioc->cached_fw)
3546 sz = ioc->facts.FWImageSize;
3547 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
3548 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3549 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->cached_fw,
3550 ioc->cached_fw_dma);
3551 ioc->alloc_total -= sz;
3552 ioc->cached_fw = NULL;
3555 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3557 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3558 * @ioc: Pointer to MPT_ADAPTER structure
3559 * @sleepFlag: Specifies whether the process can sleep
3561 * Returns 0 for success, >0 for handshake failure
3562 * <0 for fw upload failure.
3564 * Remark: If bound IOC and a successful FWUpload was performed
3565 * on the bound IOC, the second image is discarded
3566 * and memory is free'd. Both channels must upload to prevent
3567 * IOC from running in degraded mode.
3570 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3572 u8 reply[sizeof(FWUploadReply_t)];
3573 FWUpload_t *prequest;
3574 FWUploadReply_t *preply;
3575 FWUploadTCSGE_t *ptcsge;
3577 int ii, sz, reply_sz;
3580 /* If the image size is 0, we are done.
3582 if ((sz = ioc->facts.FWImageSize) == 0)
3585 if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3588 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
3589 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3591 prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3592 kzalloc(ioc->req_sz, GFP_KERNEL);
3594 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3595 "while allocating memory \n", ioc->name));
3596 mpt_free_fw_memory(ioc);
3600 preply = (FWUploadReply_t *)&reply;
3602 reply_sz = sizeof(reply);
3603 memset(preply, 0, reply_sz);
3605 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3606 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3608 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3609 ptcsge->DetailsLength = 12;
3610 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3611 ptcsge->ImageSize = cpu_to_le32(sz);
3614 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3615 ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3616 request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
3618 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3619 " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3620 ioc->facts.FWImageSize, request_size));
3621 DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3623 ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3624 reply_sz, (u16 *)preply, 65 /*seconds*/, sleepFlag);
3626 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3627 "rc=%x \n", ioc->name, ii));
3629 cmdStatus = -EFAULT;
3631 /* Handshake transfer was complete and successful.
3632 * Check the Reply Frame.
3635 status = le16_to_cpu(preply->IOCStatus) &
3637 if (status == MPI_IOCSTATUS_SUCCESS &&
3638 ioc->facts.FWImageSize ==
3639 le32_to_cpu(preply->ActualImageSize))
3642 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3643 ioc->name, cmdStatus));
3647 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3648 "freeing image \n", ioc->name));
3649 mpt_free_fw_memory(ioc);
3656 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3658 * mpt_downloadboot - DownloadBoot code
3659 * @ioc: Pointer to MPT_ADAPTER structure
3660 * @pFwHeader: Pointer to firmware header info
3661 * @sleepFlag: Specifies whether the process can sleep
3663 * FwDownloadBoot requires Programmed IO access.
3665 * Returns 0 for success
3666 * -1 FW Image size is 0
3667 * -2 No valid cached_fw Pointer
3668 * <0 for fw upload failure.
3671 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3673 MpiExtImageHeader_t *pExtImage;
3683 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3684 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3686 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3687 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3688 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3689 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3690 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3691 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3693 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3696 if (sleepFlag == CAN_SLEEP) {
3702 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3703 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3705 for (count = 0; count < 30; count ++) {
3706 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3707 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3708 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3713 if (sleepFlag == CAN_SLEEP) {
3720 if ( count == 30 ) {
3721 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3722 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3723 ioc->name, diag0val));
3727 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3728 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3729 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3730 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3731 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3732 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3734 /* Set the DiagRwEn and Disable ARM bits */
3735 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3737 fwSize = (pFwHeader->ImageSize + 3)/4;
3738 ptrFw = (u32 *) pFwHeader;
3740 /* Write the LoadStartAddress to the DiagRw Address Register
3741 * using Programmed IO
3743 if (ioc->errata_flag_1064)
3744 pci_enable_io_access(ioc->pcidev);
3746 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3747 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3748 ioc->name, pFwHeader->LoadStartAddress));
3750 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3751 ioc->name, fwSize*4, ptrFw));
3753 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3756 nextImage = pFwHeader->NextImageHeaderOffset;
3758 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3760 load_addr = pExtImage->LoadStartAddress;
3762 fwSize = (pExtImage->ImageSize + 3) >> 2;
3763 ptrFw = (u32 *)pExtImage;
3765 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3766 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3767 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3770 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3772 nextImage = pExtImage->NextImageHeaderOffset;
3775 /* Write the IopResetVectorRegAddr */
3776 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
3777 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3779 /* Write the IopResetVectorValue */
3780 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3781 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3783 /* Clear the internal flash bad bit - autoincrementing register,
3784 * so must do two writes.
3786 if (ioc->bus_type == SPI) {
3788 * 1030 and 1035 H/W errata, workaround to access
3789 * the ClearFlashBadSignatureBit
3791 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3792 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3793 diagRwData |= 0x40000000;
3794 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3795 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3797 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3798 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3799 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3800 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3803 if (sleepFlag == CAN_SLEEP) {
3810 if (ioc->errata_flag_1064)
3811 pci_disable_io_access(ioc->pcidev);
3813 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3814 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3815 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3816 ioc->name, diag0val));
3817 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3818 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3819 ioc->name, diag0val));
3820 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3822 /* Write 0xFF to reset the sequencer */
3823 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3825 if (ioc->bus_type == SAS) {
3826 ioc_state = mpt_GetIocState(ioc, 0);
3827 if ( (GetIocFacts(ioc, sleepFlag,
3828 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3829 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3830 ioc->name, ioc_state));
3835 for (count=0; count<HZ*20; count++) {
3836 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3837 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3838 "downloadboot successful! (count=%d) IocState=%x\n",
3839 ioc->name, count, ioc_state));
3840 if (ioc->bus_type == SAS) {
3843 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3844 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3845 "downloadboot: SendIocInit failed\n",
3849 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3850 "downloadboot: SendIocInit successful\n",
3854 if (sleepFlag == CAN_SLEEP) {
3860 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3861 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3865 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3867 * KickStart - Perform hard reset of MPT adapter.
3868 * @ioc: Pointer to MPT_ADAPTER structure
3869 * @force: Force hard reset
3870 * @sleepFlag: Specifies whether the process can sleep
3872 * This routine places MPT adapter in diagnostic mode via the
3873 * WriteSequence register, and then performs a hard reset of adapter
3874 * via the Diagnostic register.
3876 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3877 * or NO_SLEEP (interrupt thread, use mdelay)
3878 * force - 1 if doorbell active, board fault state
3879 * board operational, IOC_RECOVERY or
3880 * IOC_BRINGUP and there is an alt_ioc.
3884 * 1 - hard reset, READY
3885 * 0 - no reset due to History bit, READY
3886 * -1 - no reset due to History bit but not READY
3887 * OR reset but failed to come READY
3888 * -2 - no reset, could not enter DIAG mode
3889 * -3 - reset but bad FW bit
3892 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3894 int hard_reset_done = 0;
3898 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3899 if (ioc->bus_type == SPI) {
3900 /* Always issue a Msg Unit Reset first. This will clear some
3901 * SCSI bus hang conditions.
3903 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3905 if (sleepFlag == CAN_SLEEP) {
3912 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3913 if (hard_reset_done < 0)
3914 return hard_reset_done;
3916 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3919 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
3920 for (cnt=0; cnt<cntdn; cnt++) {
3921 ioc_state = mpt_GetIocState(ioc, 1);
3922 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3923 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3925 return hard_reset_done;
3927 if (sleepFlag == CAN_SLEEP) {
3934 dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3935 ioc->name, mpt_GetIocState(ioc, 0)));
3939 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3941 * mpt_diag_reset - Perform hard reset of the adapter.
3942 * @ioc: Pointer to MPT_ADAPTER structure
3943 * @ignore: Set if to honor and clear to ignore
3944 * the reset history bit
3945 * @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3946 * else set to NO_SLEEP (use mdelay instead)
3948 * This routine places the adapter in diagnostic mode via the
3949 * WriteSequence register and then performs a hard reset of adapter
3950 * via the Diagnostic register. Adapter should be in ready state
3951 * upon successful completion.
3953 * Returns: 1 hard reset successful
3954 * 0 no reset performed because reset history bit set
3955 * -2 enabling diagnostic mode failed
3956 * -3 diagnostic reset failed
3959 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3963 int hard_reset_done = 0;
3966 MpiFwHeader_t *cached_fw; /* Pointer to FW */
3969 /* Clear any existing interrupts */
3970 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3972 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3977 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3978 "address=%p\n", ioc->name, __func__,
3979 &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3980 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3981 if (sleepFlag == CAN_SLEEP)
3987 * Call each currently registered protocol IOC reset handler
3988 * with pre-reset indication.
3989 * NOTE: If we're doing _IOC_BRINGUP, there can be no
3990 * MptResetHandlers[] registered yet.
3992 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
3993 if (MptResetHandlers[cb_idx])
3994 (*(MptResetHandlers[cb_idx]))(ioc,
3998 for (count = 0; count < 60; count ++) {
3999 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4000 doorbell &= MPI_IOC_STATE_MASK;
4002 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4003 "looking for READY STATE: doorbell=%x"
4005 ioc->name, doorbell, count));
4007 if (doorbell == MPI_IOC_STATE_READY) {
4012 if (sleepFlag == CAN_SLEEP)
4020 /* Use "Diagnostic reset" method! (only thing available!) */
4021 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4023 if (ioc->debug_level & MPT_DEBUG) {
4025 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4026 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
4027 ioc->name, diag0val, diag1val));
4030 /* Do the reset if we are told to ignore the reset history
4031 * or if the reset history is 0
4033 if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
4034 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4035 /* Write magic sequence to WriteSequence register
4036 * Loop until in diagnostic mode
4038 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4039 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4040 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4041 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4042 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4043 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4046 if (sleepFlag == CAN_SLEEP) {
4054 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4055 ioc->name, diag0val);
4060 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4062 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
4063 ioc->name, diag0val));
4066 if (ioc->debug_level & MPT_DEBUG) {
4068 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4069 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4070 ioc->name, diag0val, diag1val));
4073 * Disable the ARM (Bug fix)
4076 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4080 * Now hit the reset bit in the Diagnostic register
4081 * (THE BIG HAMMER!) (Clears DRWE bit).
4083 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4084 hard_reset_done = 1;
4085 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4089 * Call each currently registered protocol IOC reset handler
4090 * with pre-reset indication.
4091 * NOTE: If we're doing _IOC_BRINGUP, there can be no
4092 * MptResetHandlers[] registered yet.
4094 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
4095 if (MptResetHandlers[cb_idx]) {
4096 mpt_signal_reset(cb_idx,
4097 ioc, MPT_IOC_PRE_RESET);
4099 mpt_signal_reset(cb_idx,
4100 ioc->alt_ioc, MPT_IOC_PRE_RESET);
4106 cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4107 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4108 cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4112 /* If the DownloadBoot operation fails, the
4113 * IOC will be left unusable. This is a fatal error
4114 * case. _diag_reset will return < 0
4116 for (count = 0; count < 30; count ++) {
4117 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4118 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
4122 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4123 ioc->name, diag0val, count));
4125 if (sleepFlag == CAN_SLEEP) {
4131 if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4132 printk(MYIOC_s_WARN_FMT
4133 "firmware downloadboot failure (%d)!\n", ioc->name, count);
4137 /* Wait for FW to reload and for board
4138 * to go to the READY state.
4139 * Maximum wait is 60 seconds.
4140 * If fail, no error will check again
4141 * with calling program.
4143 for (count = 0; count < 60; count ++) {
4144 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4145 doorbell &= MPI_IOC_STATE_MASK;
4147 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4148 "looking for READY STATE: doorbell=%x"
4149 " count=%d\n", ioc->name, doorbell, count));
4151 if (doorbell == MPI_IOC_STATE_READY) {
4156 if (sleepFlag == CAN_SLEEP) {
4163 if (doorbell != MPI_IOC_STATE_READY)
4164 printk(MYIOC_s_ERR_FMT "Failed to come READY "
4165 "after reset! IocState=%x", ioc->name,
4170 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4171 if (ioc->debug_level & MPT_DEBUG) {
4173 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4174 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4175 ioc->name, diag0val, diag1val));
4178 /* Clear RESET_HISTORY bit! Place board in the
4179 * diagnostic mode to update the diag register.
4181 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4183 while ((diag0val & MPI_DIAG_DRWE) == 0) {
4184 /* Write magic sequence to WriteSequence register
4185 * Loop until in diagnostic mode
4187 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4188 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4189 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4190 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4191 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4192 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4195 if (sleepFlag == CAN_SLEEP) {
4203 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
4204 ioc->name, diag0val);
4207 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4209 diag0val &= ~MPI_DIAG_RESET_HISTORY;
4210 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4211 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4212 if (diag0val & MPI_DIAG_RESET_HISTORY) {
4213 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
4217 /* Disable Diagnostic Mode
4219 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4221 /* Check FW reload status flags.
4223 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4224 if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
4225 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
4226 ioc->name, diag0val);
4230 if (ioc->debug_level & MPT_DEBUG) {
4232 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4233 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4234 ioc->name, diag0val, diag1val));
4238 * Reset flag that says we've enabled event notification
4240 ioc->facts.EventState = 0;
4243 ioc->alt_ioc->facts.EventState = 0;
4245 return hard_reset_done;
4248 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4250 * SendIocReset - Send IOCReset request to MPT adapter.
4251 * @ioc: Pointer to MPT_ADAPTER structure
4252 * @reset_type: reset type, expected values are
4253 * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
4254 * @sleepFlag: Specifies whether the process can sleep
4256 * Send IOCReset request to the MPT adapter.
4258 * Returns 0 for success, non-zero for failure.
4261 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4267 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4268 ioc->name, reset_type));
4269 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4270 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4273 /* FW ACK'd request, wait for READY state
4276 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
4278 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4282 if (sleepFlag != CAN_SLEEP)
4285 printk(MYIOC_s_ERR_FMT
4286 "Wait IOC_READY state (0x%x) timeout(%d)!\n",
4287 ioc->name, state, (int)((count+5)/HZ));
4291 if (sleepFlag == CAN_SLEEP) {
4294 mdelay (1); /* 1 msec delay */
4299 * Cleanup all event stuff for this IOC; re-issue EventNotification
4300 * request if needed.
4302 if (ioc->facts.Function)
4303 ioc->facts.EventState = 0;
4308 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4310 * initChainBuffers - Allocate memory for and initialize chain buffers
4311 * @ioc: Pointer to MPT_ADAPTER structure
4313 * Allocates memory for and initializes chain buffers,
4314 * chain buffer control arrays and spinlock.
4317 initChainBuffers(MPT_ADAPTER *ioc)
4320 int sz, ii, num_chain;
4321 int scale, num_sge, numSGE;
4323 /* ReqToChain size must equal the req_depth
4326 if (ioc->ReqToChain == NULL) {
4327 sz = ioc->req_depth * sizeof(int);
4328 mem = kmalloc(sz, GFP_ATOMIC);
4332 ioc->ReqToChain = (int *) mem;
4333 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc @ %p, sz=%d bytes\n",
4334 ioc->name, mem, sz));
4335 mem = kmalloc(sz, GFP_ATOMIC);
4339 ioc->RequestNB = (int *) mem;
4340 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc @ %p, sz=%d bytes\n",
4341 ioc->name, mem, sz));
4343 for (ii = 0; ii < ioc->req_depth; ii++) {
4344 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4347 /* ChainToChain size must equal the total number
4348 * of chain buffers to be allocated.
4351 * Calculate the number of chain buffers needed(plus 1) per I/O
4352 * then multiply the maximum number of simultaneous cmds
4354 * num_sge = num sge in request frame + last chain buffer
4355 * scale = num sge per chain buffer if no chain element
4357 scale = ioc->req_sz / ioc->SGE_size;
4358 if (ioc->sg_addr_size == sizeof(u64))
4359 num_sge = scale + (ioc->req_sz - 60) / ioc->SGE_size;
4361 num_sge = 1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4363 if (ioc->sg_addr_size == sizeof(u64)) {
4364 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4365 (ioc->req_sz - 60) / ioc->SGE_size;
4367 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4368 scale + (ioc->req_sz - 64) / ioc->SGE_size;
4370 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4371 ioc->name, num_sge, numSGE));
4373 if (ioc->bus_type == FC) {
4374 if (numSGE > MPT_SCSI_FC_SG_DEPTH)
4375 numSGE = MPT_SCSI_FC_SG_DEPTH;
4377 if (numSGE > MPT_SCSI_SG_DEPTH)
4378 numSGE = MPT_SCSI_SG_DEPTH;
4382 while (numSGE - num_sge > 0) {
4384 num_sge += (scale - 1);
4388 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4389 ioc->name, numSGE, num_sge, num_chain));
4391 if (ioc->bus_type == SPI)
4392 num_chain *= MPT_SCSI_CAN_QUEUE;
4393 else if (ioc->bus_type == SAS)
4394 num_chain *= MPT_SAS_CAN_QUEUE;
4396 num_chain *= MPT_FC_CAN_QUEUE;
4398 ioc->num_chain = num_chain;
4400 sz = num_chain * sizeof(int);
4401 if (ioc->ChainToChain == NULL) {
4402 mem = kmalloc(sz, GFP_ATOMIC);
4406 ioc->ChainToChain = (int *) mem;
4407 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4408 ioc->name, mem, sz));
4410 mem = (u8 *) ioc->ChainToChain;
4412 memset(mem, 0xFF, sz);
4416 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4418 * PrimeIocFifos - Initialize IOC request and reply FIFOs.
4419 * @ioc: Pointer to MPT_ADAPTER structure
4421 * This routine allocates memory for the MPT reply and request frame
4422 * pools (if necessary), and primes the IOC reply FIFO with
4425 * Returns 0 for success, non-zero for failure.
4428 PrimeIocFifos(MPT_ADAPTER *ioc)
4431 unsigned long flags;
4432 dma_addr_t alloc_dma;
4434 int i, reply_sz, sz, total_size, num_chain;
4439 /* Prime reply FIFO... */
4441 if (ioc->reply_frames == NULL) {
4442 if ( (num_chain = initChainBuffers(ioc)) < 0)
4445 * 1078 errata workaround for the 36GB limitation
4447 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4448 ioc->dma_mask > DMA_BIT_MASK(35)) {
4449 if (!dma_set_mask(&ioc->pcidev->dev, DMA_BIT_MASK(32))
4450 && !dma_set_coherent_mask(&ioc->pcidev->dev, DMA_BIT_MASK(32))) {
4451 dma_mask = DMA_BIT_MASK(35);
4452 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4453 "setting 35 bit addressing for "
4454 "Request/Reply/Chain and Sense Buffers\n",
4457 /*Reseting DMA mask to 64 bit*/
4458 dma_set_mask(&ioc->pcidev->dev,
4460 dma_set_coherent_mask(&ioc->pcidev->dev,
4463 printk(MYIOC_s_ERR_FMT
4464 "failed setting 35 bit addressing for "
4465 "Request/Reply/Chain and Sense Buffers\n",
4471 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4472 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4473 ioc->name, ioc->reply_sz, ioc->reply_depth));
4474 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4475 ioc->name, reply_sz, reply_sz));
4477 sz = (ioc->req_sz * ioc->req_depth);
4478 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4479 ioc->name, ioc->req_sz, ioc->req_depth));
4480 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4481 ioc->name, sz, sz));
4484 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4485 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4486 ioc->name, ioc->req_sz, num_chain));
4487 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4488 ioc->name, sz, sz, num_chain));
4491 mem = dma_alloc_coherent(&ioc->pcidev->dev, total_size,
4492 &alloc_dma, GFP_KERNEL);
4494 printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4499 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4500 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4502 memset(mem, 0, total_size);
4503 ioc->alloc_total += total_size;
4505 ioc->alloc_dma = alloc_dma;
4506 ioc->alloc_sz = total_size;
4507 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4508 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4510 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4511 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4513 alloc_dma += reply_sz;
4516 /* Request FIFO - WE manage this! */
4518 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4519 ioc->req_frames_dma = alloc_dma;
4521 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4522 ioc->name, mem, (void *)(ulong)alloc_dma));
4524 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4526 for (i = 0; i < ioc->req_depth; i++) {
4527 alloc_dma += ioc->req_sz;
4531 ioc->ChainBuffer = mem;
4532 ioc->ChainBufferDMA = alloc_dma;
4534 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4535 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4537 /* Initialize the free chain Q.
4540 INIT_LIST_HEAD(&ioc->FreeChainQ);
4542 /* Post the chain buffers to the FreeChainQ.
4544 mem = (u8 *)ioc->ChainBuffer;
4545 for (i=0; i < num_chain; i++) {
4546 mf = (MPT_FRAME_HDR *) mem;
4547 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4551 /* Initialize Request frames linked list
4553 alloc_dma = ioc->req_frames_dma;
4554 mem = (u8 *) ioc->req_frames;
4556 spin_lock_irqsave(&ioc->FreeQlock, flags);
4557 INIT_LIST_HEAD(&ioc->FreeQ);
4558 for (i = 0; i < ioc->req_depth; i++) {
4559 mf = (MPT_FRAME_HDR *) mem;
4561 /* Queue REQUESTs *internally*! */
4562 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4566 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4568 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4569 ioc->sense_buf_pool = dma_alloc_coherent(&ioc->pcidev->dev, sz,
4570 &ioc->sense_buf_pool_dma, GFP_KERNEL);
4571 if (ioc->sense_buf_pool == NULL) {
4572 printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4577 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4578 ioc->alloc_total += sz;
4579 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4580 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4584 /* Post Reply frames to FIFO
4586 alloc_dma = ioc->alloc_dma;
4587 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4588 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4590 for (i = 0; i < ioc->reply_depth; i++) {
4591 /* Write each address to the IOC! */
4592 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4593 alloc_dma += ioc->reply_sz;
4596 if (dma_mask == DMA_BIT_MASK(35) && !dma_set_mask(&ioc->pcidev->dev,
4597 ioc->dma_mask) && !dma_set_coherent_mask(&ioc->pcidev->dev,
4599 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4600 "restoring 64 bit addressing\n", ioc->name));
4606 if (ioc->alloc != NULL) {
4608 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc,
4610 ioc->reply_frames = NULL;
4611 ioc->req_frames = NULL;
4612 ioc->alloc_total -= sz;
4614 if (ioc->sense_buf_pool != NULL) {
4615 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4616 dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool,
4617 ioc->sense_buf_pool_dma);
4618 ioc->sense_buf_pool = NULL;
4621 if (dma_mask == DMA_BIT_MASK(35) && !dma_set_mask(&ioc->pcidev->dev,
4622 DMA_BIT_MASK(64)) && !dma_set_coherent_mask(&ioc->pcidev->dev,
4624 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4625 "restoring 64 bit addressing\n", ioc->name));
4630 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4632 * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4633 * from IOC via doorbell handshake method.
4634 * @ioc: Pointer to MPT_ADAPTER structure
4635 * @reqBytes: Size of the request in bytes
4636 * @req: Pointer to MPT request frame
4637 * @replyBytes: Expected size of the reply in bytes
4638 * @u16reply: Pointer to area where reply should be written
4639 * @maxwait: Max wait time for a reply (in seconds)
4640 * @sleepFlag: Specifies whether the process can sleep
4642 * NOTES: It is the callers responsibility to byte-swap fields in the
4643 * request which are greater than 1 byte in size. It is also the
4644 * callers responsibility to byte-swap response fields which are
4645 * greater than 1 byte in size.
4647 * Returns 0 for success, non-zero for failure.
4650 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4651 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4653 MPIDefaultReply_t *mptReply;
4658 * Get ready to cache a handshake reply
4660 ioc->hs_reply_idx = 0;
4661 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4662 mptReply->MsgLength = 0;
4665 * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4666 * then tell IOC that we want to handshake a request of N words.
4667 * (WRITE u32val to Doorbell reg).
4669 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4670 CHIPREG_WRITE32(&ioc->chip->Doorbell,
4671 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4672 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4675 * Wait for IOC's doorbell handshake int
4677 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4680 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4681 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4683 /* Read doorbell and check for active bit */
4684 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4688 * Clear doorbell int (WRITE 0 to IntStatus reg),
4689 * then wait for IOC to ACKnowledge that it's ready for
4690 * our handshake request.
4692 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4693 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4698 u8 *req_as_bytes = (u8 *) req;
4701 * Stuff request words via doorbell handshake,
4702 * with ACK from IOC for each.
4704 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4705 u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
4706 (req_as_bytes[(ii*4) + 1] << 8) |
4707 (req_as_bytes[(ii*4) + 2] << 16) |
4708 (req_as_bytes[(ii*4) + 3] << 24));
4710 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4711 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4715 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4716 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4718 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4719 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4722 * Wait for completion of doorbell handshake reply from the IOC
4724 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4727 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4728 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4731 * Copy out the cached reply...
4733 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4734 u16reply[ii] = ioc->hs_reply[ii];
4742 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4744 * WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4745 * @ioc: Pointer to MPT_ADAPTER structure
4746 * @howlong: How long to wait (in seconds)
4747 * @sleepFlag: Specifies whether the process can sleep
4749 * This routine waits (up to ~2 seconds max) for IOC doorbell
4750 * handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4751 * bit in its IntStatus register being clear.
4753 * Returns a negative value on failure, else wait loop count.
4756 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4762 cntdn = 1000 * howlong;
4764 if (sleepFlag == CAN_SLEEP) {
4767 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4768 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4775 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4776 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4783 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4788 printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4789 ioc->name, count, intstat);
4793 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4795 * WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4796 * @ioc: Pointer to MPT_ADAPTER structure
4797 * @howlong: How long to wait (in seconds)
4798 * @sleepFlag: Specifies whether the process can sleep
4800 * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4801 * (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4803 * Returns a negative value on failure, else wait loop count.
4806 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4812 cntdn = 1000 * howlong;
4813 if (sleepFlag == CAN_SLEEP) {
4815 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4816 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4823 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4824 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4832 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4833 ioc->name, count, howlong));
4837 printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4838 ioc->name, count, intstat);
4842 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4844 * WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4845 * @ioc: Pointer to MPT_ADAPTER structure
4846 * @howlong: How long to wait (in seconds)
4847 * @sleepFlag: Specifies whether the process can sleep
4849 * This routine polls the IOC for a handshake reply, 16 bits at a time.
4850 * Reply is cached to IOC private area large enough to hold a maximum
4851 * of 128 bytes of reply data.
4853 * Returns a negative value on failure, else size of reply in WORDS.
4856 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4861 u16 *hs_reply = ioc->hs_reply;
4862 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4865 hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4868 * Get first two u16's so we can look at IOC's intended reply MsgLength
4871 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4874 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4875 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4876 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4879 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4880 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4884 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4885 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4886 failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4889 * If no error (and IOC said MsgLength is > 0), piece together
4890 * reply 16 bits at a time.
4892 for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4893 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4895 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4896 /* don't overflow our IOC hs_reply[] buffer! */
4897 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4898 hs_reply[u16cnt] = hword;
4899 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4902 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4904 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4907 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4912 else if (u16cnt != (2 * mptReply->MsgLength)) {
4915 else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4920 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4921 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4923 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4924 ioc->name, t, u16cnt/2));
4928 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4930 * GetLanConfigPages - Fetch LANConfig pages.
4931 * @ioc: Pointer to MPT_ADAPTER structure
4933 * Return: 0 for success
4934 * -ENOMEM if no memory available
4935 * -EPERM if not allowed due to ISR context
4936 * -EAGAIN if no msg frames currently available
4937 * -EFAULT for non-successful reply or no reply (timeout)
4940 GetLanConfigPages(MPT_ADAPTER *ioc)
4942 ConfigPageHeader_t hdr;
4944 LANPage0_t *ppage0_alloc;
4945 dma_addr_t page0_dma;
4946 LANPage1_t *ppage1_alloc;
4947 dma_addr_t page1_dma;
4952 /* Get LAN Page 0 header */
4953 hdr.PageVersion = 0;
4956 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4957 cfg.cfghdr.hdr = &hdr;
4959 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4964 if ((rc = mpt_config(ioc, &cfg)) != 0)
4967 if (hdr.PageLength > 0) {
4968 data_sz = hdr.PageLength * 4;
4969 ppage0_alloc = dma_alloc_coherent(&ioc->pcidev->dev, data_sz,
4970 &page0_dma, GFP_KERNEL);
4973 memset((u8 *)ppage0_alloc, 0, data_sz);
4974 cfg.physAddr = page0_dma;
4975 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4977 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4979 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4980 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4984 dma_free_coherent(&ioc->pcidev->dev, data_sz,
4985 (u8 *)ppage0_alloc, page0_dma);
4988 * Normalize endianness of structure data,
4989 * by byte-swapping all > 1 byte fields!
4998 /* Get LAN Page 1 header */
4999 hdr.PageVersion = 0;
5002 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
5003 cfg.cfghdr.hdr = &hdr;
5005 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5009 if ((rc = mpt_config(ioc, &cfg)) != 0)
5012 if (hdr.PageLength == 0)
5015 data_sz = hdr.PageLength * 4;
5017 ppage1_alloc = dma_alloc_coherent(&ioc->pcidev->dev, data_sz,
5018 &page1_dma, GFP_KERNEL);
5020 memset((u8 *)ppage1_alloc, 0, data_sz);
5021 cfg.physAddr = page1_dma;
5022 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5024 if ((rc = mpt_config(ioc, &cfg)) == 0) {
5026 copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
5027 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
5030 dma_free_coherent(&ioc->pcidev->dev, data_sz,
5031 (u8 *)ppage1_alloc, page1_dma);
5034 * Normalize endianness of structure data,
5035 * by byte-swapping all > 1 byte fields!
5043 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5045 * mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
5046 * @ioc: Pointer to MPT_ADAPTER structure
5047 * @persist_opcode: see below
5049 * =============================== ======================================
5050 * MPI_SAS_OP_CLEAR_NOT_PRESENT Free all persist TargetID mappings for
5051 * devices not currently present.
5052 * MPI_SAS_OP_CLEAR_ALL_PERSISTENT Clear al persist TargetID mappings
5053 * =============================== ======================================
5055 * NOTE: Don't use not this function during interrupt time.
5057 * Returns 0 for success, non-zero error
5060 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5062 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5064 SasIoUnitControlRequest_t *sasIoUnitCntrReq;
5065 SasIoUnitControlReply_t *sasIoUnitCntrReply;
5066 MPT_FRAME_HDR *mf = NULL;
5067 MPIHeader_t *mpi_hdr;
5069 unsigned long timeleft;
5071 mutex_lock(&ioc->mptbase_cmds.mutex);
5073 /* init the internal cmd struct */
5074 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5075 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5077 /* insure garbage is not sent to fw */
5078 switch(persist_opcode) {
5080 case MPI_SAS_OP_CLEAR_NOT_PRESENT:
5081 case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
5089 printk(KERN_DEBUG "%s: persist_opcode=%x\n",
5090 __func__, persist_opcode);
5092 /* Get a MF for this command.
5094 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5095 printk(KERN_DEBUG "%s: no msg frames!\n", __func__);
5100 mpi_hdr = (MPIHeader_t *) mf;
5101 sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
5102 memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
5103 sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
5104 sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
5105 sasIoUnitCntrReq->Operation = persist_opcode;
5107 mpt_put_msg_frame(mpt_base_index, ioc, mf);
5108 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5109 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5111 printk(KERN_DEBUG "%s: failed\n", __func__);
5112 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5115 printk(MYIOC_s_WARN_FMT
5116 "Issuing Reset from %s!!, doorbell=0x%08x\n",
5117 ioc->name, __func__, mpt_GetIocState(ioc, 0));
5118 mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5119 mpt_free_msg_frame(ioc, mf);
5124 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5129 sasIoUnitCntrReply =
5130 (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5131 if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
5132 printk(KERN_DEBUG "%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
5133 __func__, sasIoUnitCntrReply->IOCStatus,
5134 sasIoUnitCntrReply->IOCLogInfo);
5135 printk(KERN_DEBUG "%s: failed\n", __func__);
5138 printk(KERN_DEBUG "%s: success\n", __func__);
5141 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5142 mutex_unlock(&ioc->mptbase_cmds.mutex);
5146 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5149 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5150 MpiEventDataRaid_t * pRaidEventData)
5159 volume = pRaidEventData->VolumeID;
5160 reason = pRaidEventData->ReasonCode;
5161 disk = pRaidEventData->PhysDiskNum;
5162 status = le32_to_cpu(pRaidEventData->SettingsStatus);
5163 flags = (status >> 0) & 0xff;
5164 state = (status >> 8) & 0xff;
5166 if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
5170 if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
5171 reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
5172 (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
5173 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
5174 ioc->name, disk, volume);
5176 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
5181 case MPI_EVENT_RAID_RC_VOLUME_CREATED:
5182 printk(MYIOC_s_INFO_FMT " volume has been created\n",
5186 case MPI_EVENT_RAID_RC_VOLUME_DELETED:
5188 printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
5192 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
5193 printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
5197 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
5198 printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
5200 state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
5202 : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
5204 : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
5207 flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
5209 flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
5210 ? ", quiesced" : "",
5211 flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
5212 ? ", resync in progress" : "" );
5215 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
5216 printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
5220 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
5221 printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
5225 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
5226 printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
5230 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
5231 printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
5235 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
5236 printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
5238 state == MPI_PHYSDISK0_STATUS_ONLINE
5240 : state == MPI_PHYSDISK0_STATUS_MISSING
5242 : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
5244 : state == MPI_PHYSDISK0_STATUS_FAILED
5246 : state == MPI_PHYSDISK0_STATUS_INITIALIZING
5248 : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
5249 ? "offline requested"
5250 : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
5251 ? "failed requested"
5252 : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
5255 flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
5256 ? ", out of sync" : "",
5257 flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
5258 ? ", quiesced" : "" );
5261 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
5262 printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
5266 case MPI_EVENT_RAID_RC_SMART_DATA:
5267 printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
5268 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5271 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
5272 printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
5278 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5280 * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
5281 * @ioc: Pointer to MPT_ADAPTER structure
5283 * Returns: 0 for success
5284 * -ENOMEM if no memory available
5285 * -EPERM if not allowed due to ISR context
5286 * -EAGAIN if no msg frames currently available
5287 * -EFAULT for non-successful reply or no reply (timeout)
5290 GetIoUnitPage2(MPT_ADAPTER *ioc)
5292 ConfigPageHeader_t hdr;
5294 IOUnitPage2_t *ppage_alloc;
5295 dma_addr_t page_dma;
5299 /* Get the page header */
5300 hdr.PageVersion = 0;
5303 hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
5304 cfg.cfghdr.hdr = &hdr;
5306 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5311 if ((rc = mpt_config(ioc, &cfg)) != 0)
5314 if (hdr.PageLength == 0)
5317 /* Read the config page */
5318 data_sz = hdr.PageLength * 4;
5320 ppage_alloc = dma_alloc_coherent(&ioc->pcidev->dev, data_sz,
5321 &page_dma, GFP_KERNEL);
5323 memset((u8 *)ppage_alloc, 0, data_sz);
5324 cfg.physAddr = page_dma;
5325 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5327 /* If Good, save data */
5328 if ((rc = mpt_config(ioc, &cfg)) == 0)
5329 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5331 dma_free_coherent(&ioc->pcidev->dev, data_sz,
5332 (u8 *)ppage_alloc, page_dma);
5338 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5340 * mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
5341 * @ioc: Pointer to a Adapter Strucutre
5342 * @portnum: IOC port number
5344 * Return: -EFAULT if read of config page header fails
5346 * If read of SCSI Port Page 0 fails,
5347 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
5348 * Adapter settings: async, narrow
5350 * If read of SCSI Port Page 2 fails,
5351 * Adapter settings valid
5352 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
5357 * CHECK - what type of locking mechanisms should be used????
5360 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5365 ConfigPageHeader_t header;
5371 if (!ioc->spi_data.nvram) {
5374 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
5375 mem = kmalloc(sz, GFP_ATOMIC);
5379 ioc->spi_data.nvram = (int *) mem;
5381 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5382 ioc->name, ioc->spi_data.nvram, sz));
5385 /* Invalidate NVRAM information
5387 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5388 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5391 /* Read SPP0 header, allocate memory, then read page.
5393 header.PageVersion = 0;
5394 header.PageLength = 0;
5395 header.PageNumber = 0;
5396 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5397 cfg.cfghdr.hdr = &header;
5399 cfg.pageAddr = portnum;
5400 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5402 cfg.timeout = 0; /* use default */
5403 if (mpt_config(ioc, &cfg) != 0)
5406 if (header.PageLength > 0) {
5407 pbuf = dma_alloc_coherent(&ioc->pcidev->dev,
5408 header.PageLength * 4, &buf_dma,
5411 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5412 cfg.physAddr = buf_dma;
5413 if (mpt_config(ioc, &cfg) != 0) {
5414 ioc->spi_data.maxBusWidth = MPT_NARROW;
5415 ioc->spi_data.maxSyncOffset = 0;
5416 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5417 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5419 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5420 "Unable to read PortPage0 minSyncFactor=%x\n",
5421 ioc->name, ioc->spi_data.minSyncFactor));
5423 /* Save the Port Page 0 data
5425 SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
5426 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
5427 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
5429 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
5430 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5431 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5432 "noQas due to Capabilities=%x\n",
5433 ioc->name, pPP0->Capabilities));
5435 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5436 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
5438 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5439 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
5440 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5441 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5442 "PortPage0 minSyncFactor=%x\n",
5443 ioc->name, ioc->spi_data.minSyncFactor));
5445 ioc->spi_data.maxSyncOffset = 0;
5446 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5449 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5451 /* Update the minSyncFactor based on bus type.
5453 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5454 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
5456 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5457 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5458 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5459 "HVD or SE detected, minSyncFactor=%x\n",
5460 ioc->name, ioc->spi_data.minSyncFactor));
5465 dma_free_coherent(&ioc->pcidev->dev,
5466 header.PageLength * 4, pbuf,
5472 /* SCSI Port Page 2 - Read the header then the page.
5474 header.PageVersion = 0;
5475 header.PageLength = 0;
5476 header.PageNumber = 2;
5477 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
5478 cfg.cfghdr.hdr = &header;
5480 cfg.pageAddr = portnum;
5481 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5483 if (mpt_config(ioc, &cfg) != 0)
5486 if (header.PageLength > 0) {
5487 /* Allocate memory and read SCSI Port Page 2
5489 pbuf = dma_alloc_coherent(&ioc->pcidev->dev,
5490 header.PageLength * 4, &buf_dma,
5493 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
5494 cfg.physAddr = buf_dma;
5495 if (mpt_config(ioc, &cfg) != 0) {
5496 /* Nvram data is left with INVALID mark
5499 } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5501 /* This is an ATTO adapter, read Page2 accordingly
5503 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t *) pbuf;
5504 ATTODeviceInfo_t *pdevice = NULL;
5507 /* Save the Port Page 2 data
5508 * (reformat into a 32bit quantity)
5510 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5511 pdevice = &pPP2->DeviceSettings[ii];
5512 ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5515 /* Translate ATTO device flags to LSI format
5517 if (ATTOFlags & ATTOFLAG_DISC)
5518 data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5519 if (ATTOFlags & ATTOFLAG_ID_ENB)
5520 data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5521 if (ATTOFlags & ATTOFLAG_LUN_ENB)
5522 data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5523 if (ATTOFlags & ATTOFLAG_TAGGED)
5524 data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5525 if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5526 data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5528 data = (data << 16) | (pdevice->Period << 8) | 10;
5529 ioc->spi_data.nvram[ii] = data;
5532 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
5533 MpiDeviceInfo_t *pdevice = NULL;
5536 * Save "Set to Avoid SCSI Bus Resets" flag
5538 ioc->spi_data.bus_reset =
5539 (le32_to_cpu(pPP2->PortFlags) &
5540 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5543 /* Save the Port Page 2 data
5544 * (reformat into a 32bit quantity)
5546 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5547 ioc->spi_data.PortFlags = data;
5548 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5549 pdevice = &pPP2->DeviceSettings[ii];
5550 data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5551 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5552 ioc->spi_data.nvram[ii] = data;
5556 dma_free_coherent(&ioc->pcidev->dev,
5557 header.PageLength * 4, pbuf,
5562 /* Update Adapter limits with those from NVRAM
5563 * Comment: Don't need to do this. Target performance
5564 * parameters will never exceed the adapters limits.
5570 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5572 * mpt_readScsiDevicePageHeaders - save version and length of SDP1
5573 * @ioc: Pointer to a Adapter Strucutre
5574 * @portnum: IOC port number
5576 * Return: -EFAULT if read of config page header fails
5580 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5583 ConfigPageHeader_t header;
5585 /* Read the SCSI Device Page 1 header
5587 header.PageVersion = 0;
5588 header.PageLength = 0;
5589 header.PageNumber = 1;
5590 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5591 cfg.cfghdr.hdr = &header;
5593 cfg.pageAddr = portnum;
5594 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5597 if (mpt_config(ioc, &cfg) != 0)
5600 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5601 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5603 header.PageVersion = 0;
5604 header.PageLength = 0;
5605 header.PageNumber = 0;
5606 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5607 if (mpt_config(ioc, &cfg) != 0)
5610 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5611 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5613 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5614 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5616 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5617 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5622 * mpt_inactive_raid_list_free - This clears this link list.
5623 * @ioc : pointer to per adapter structure
5626 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5628 struct inactive_raid_component_info *component_info, *pNext;
5630 if (list_empty(&ioc->raid_data.inactive_list))
5633 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5634 list_for_each_entry_safe(component_info, pNext,
5635 &ioc->raid_data.inactive_list, list) {
5636 list_del(&component_info->list);
5637 kfree(component_info);
5639 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5643 * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5645 * @ioc : pointer to per adapter structure
5646 * @channel : volume channel
5647 * @id : volume target id
5650 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5653 ConfigPageHeader_t hdr;
5654 dma_addr_t dma_handle;
5655 pRaidVolumePage0_t buffer = NULL;
5657 RaidPhysDiskPage0_t phys_disk;
5658 struct inactive_raid_component_info *component_info;
5659 int handle_inactive_volumes;
5661 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5662 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5663 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5664 cfg.pageAddr = (channel << 8) + id;
5665 cfg.cfghdr.hdr = &hdr;
5666 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5668 if (mpt_config(ioc, &cfg) != 0)
5671 if (!hdr.PageLength)
5674 buffer = dma_alloc_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5675 &dma_handle, GFP_KERNEL);
5680 cfg.physAddr = dma_handle;
5681 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5683 if (mpt_config(ioc, &cfg) != 0)
5686 if (!buffer->NumPhysDisks)
5689 handle_inactive_volumes =
5690 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5691 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5692 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5693 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5695 if (!handle_inactive_volumes)
5698 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5699 for (i = 0; i < buffer->NumPhysDisks; i++) {
5700 if(mpt_raid_phys_disk_pg0(ioc,
5701 buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5704 if ((component_info = kmalloc(sizeof (*component_info),
5705 GFP_KERNEL)) == NULL)
5708 component_info->volumeID = id;
5709 component_info->volumeBus = channel;
5710 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5711 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5712 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5713 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5715 list_add_tail(&component_info->list,
5716 &ioc->raid_data.inactive_list);
5718 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5722 dma_free_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5723 buffer, dma_handle);
5727 * mpt_raid_phys_disk_pg0 - returns phys disk page zero
5728 * @ioc: Pointer to a Adapter Structure
5729 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5730 * @phys_disk: requested payload data returned
5734 * -EFAULT if read of config page header fails or data pointer not NULL
5735 * -ENOMEM if pci_alloc failed
5738 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5739 RaidPhysDiskPage0_t *phys_disk)
5742 ConfigPageHeader_t hdr;
5743 dma_addr_t dma_handle;
5744 pRaidPhysDiskPage0_t buffer = NULL;
5747 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5748 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5749 memset(phys_disk, 0, sizeof(RaidPhysDiskPage0_t));
5751 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE0_PAGEVERSION;
5752 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5753 cfg.cfghdr.hdr = &hdr;
5755 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5757 if (mpt_config(ioc, &cfg) != 0) {
5762 if (!hdr.PageLength) {
5767 buffer = dma_alloc_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5768 &dma_handle, GFP_KERNEL);
5775 cfg.physAddr = dma_handle;
5776 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5777 cfg.pageAddr = phys_disk_num;
5779 if (mpt_config(ioc, &cfg) != 0) {
5785 memcpy(phys_disk, buffer, sizeof(*buffer));
5786 phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
5791 dma_free_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5792 buffer, dma_handle);
5798 * mpt_raid_phys_disk_get_num_paths - returns number paths associated to this phys_num
5799 * @ioc: Pointer to a Adapter Structure
5800 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5803 * returns number paths
5806 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5809 ConfigPageHeader_t hdr;
5810 dma_addr_t dma_handle;
5811 pRaidPhysDiskPage1_t buffer = NULL;
5814 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5815 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5817 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5818 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5820 cfg.cfghdr.hdr = &hdr;
5822 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5824 if (mpt_config(ioc, &cfg) != 0) {
5829 if (!hdr.PageLength) {
5834 buffer = dma_alloc_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5835 &dma_handle, GFP_KERNEL);
5842 cfg.physAddr = dma_handle;
5843 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5844 cfg.pageAddr = phys_disk_num;
5846 if (mpt_config(ioc, &cfg) != 0) {
5851 rc = buffer->NumPhysDiskPaths;
5855 dma_free_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5856 buffer, dma_handle);
5860 EXPORT_SYMBOL(mpt_raid_phys_disk_get_num_paths);
5863 * mpt_raid_phys_disk_pg1 - returns phys disk page 1
5864 * @ioc: Pointer to a Adapter Structure
5865 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5866 * @phys_disk: requested payload data returned
5870 * -EFAULT if read of config page header fails or data pointer not NULL
5871 * -ENOMEM if pci_alloc failed
5874 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5875 RaidPhysDiskPage1_t *phys_disk)
5878 ConfigPageHeader_t hdr;
5879 dma_addr_t dma_handle;
5880 pRaidPhysDiskPage1_t buffer = NULL;
5885 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5886 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5889 hdr.PageVersion = MPI_RAIDPHYSDISKPAGE1_PAGEVERSION;
5890 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5892 cfg.cfghdr.hdr = &hdr;
5894 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5896 if (mpt_config(ioc, &cfg) != 0) {
5901 if (!hdr.PageLength) {
5906 buffer = dma_alloc_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5907 &dma_handle, GFP_KERNEL);
5914 cfg.physAddr = dma_handle;
5915 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5916 cfg.pageAddr = phys_disk_num;
5918 if (mpt_config(ioc, &cfg) != 0) {
5923 phys_disk->NumPhysDiskPaths = buffer->NumPhysDiskPaths;
5924 phys_disk->PhysDiskNum = phys_disk_num;
5925 for (i = 0; i < phys_disk->NumPhysDiskPaths; i++) {
5926 phys_disk->Path[i].PhysDiskID = buffer->Path[i].PhysDiskID;
5927 phys_disk->Path[i].PhysDiskBus = buffer->Path[i].PhysDiskBus;
5928 phys_disk->Path[i].OwnerIdentifier =
5929 buffer->Path[i].OwnerIdentifier;
5930 phys_disk->Path[i].Flags = le16_to_cpu(buffer->Path[i].Flags);
5931 memcpy(&sas_address, &buffer->Path[i].WWID, sizeof(__le64));
5932 sas_address = le64_to_cpu(sas_address);
5933 memcpy(&phys_disk->Path[i].WWID, &sas_address, sizeof(__le64));
5934 memcpy(&sas_address,
5935 &buffer->Path[i].OwnerWWID, sizeof(__le64));
5936 sas_address = le64_to_cpu(sas_address);
5937 memcpy(&phys_disk->Path[i].OwnerWWID,
5938 &sas_address, sizeof(__le64));
5944 dma_free_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
5945 buffer, dma_handle);
5949 EXPORT_SYMBOL(mpt_raid_phys_disk_pg1);
5953 * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
5954 * @ioc: Pointer to a Adapter Strucutre
5958 * -EFAULT if read of config page header fails or data pointer not NULL
5959 * -ENOMEM if pci_alloc failed
5962 mpt_findImVolumes(MPT_ADAPTER *ioc)
5966 dma_addr_t ioc2_dma;
5968 ConfigPageHeader_t header;
5973 if (!ioc->ir_firmware)
5976 /* Free the old page
5978 kfree(ioc->raid_data.pIocPg2);
5979 ioc->raid_data.pIocPg2 = NULL;
5980 mpt_inactive_raid_list_free(ioc);
5982 /* Read IOCP2 header then the page.
5984 header.PageVersion = 0;
5985 header.PageLength = 0;
5986 header.PageNumber = 2;
5987 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5988 cfg.cfghdr.hdr = &header;
5991 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5994 if (mpt_config(ioc, &cfg) != 0)
5997 if (header.PageLength == 0)
6000 iocpage2sz = header.PageLength * 4;
6001 pIoc2 = dma_alloc_coherent(&ioc->pcidev->dev, iocpage2sz, &ioc2_dma,
6006 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6007 cfg.physAddr = ioc2_dma;
6008 if (mpt_config(ioc, &cfg) != 0)
6011 mem = kmemdup(pIoc2, iocpage2sz, GFP_KERNEL);
6017 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
6019 mpt_read_ioc_pg_3(ioc);
6021 for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
6022 mpt_inactive_raid_volumes(ioc,
6023 pIoc2->RaidVolume[i].VolumeBus,
6024 pIoc2->RaidVolume[i].VolumeID);
6027 dma_free_coherent(&ioc->pcidev->dev, iocpage2sz, pIoc2, ioc2_dma);
6033 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
6038 ConfigPageHeader_t header;
6039 dma_addr_t ioc3_dma;
6042 /* Free the old page
6044 kfree(ioc->raid_data.pIocPg3);
6045 ioc->raid_data.pIocPg3 = NULL;
6047 /* There is at least one physical disk.
6048 * Read and save IOC Page 3
6050 header.PageVersion = 0;
6051 header.PageLength = 0;
6052 header.PageNumber = 3;
6053 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6054 cfg.cfghdr.hdr = &header;
6057 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6060 if (mpt_config(ioc, &cfg) != 0)
6063 if (header.PageLength == 0)
6066 /* Read Header good, alloc memory
6068 iocpage3sz = header.PageLength * 4;
6069 pIoc3 = dma_alloc_coherent(&ioc->pcidev->dev, iocpage3sz, &ioc3_dma,
6074 /* Read the Page and save the data
6075 * into malloc'd memory.
6077 cfg.physAddr = ioc3_dma;
6078 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6079 if (mpt_config(ioc, &cfg) == 0) {
6080 mem = kmalloc(iocpage3sz, GFP_KERNEL);
6082 memcpy(mem, (u8 *)pIoc3, iocpage3sz);
6083 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
6087 dma_free_coherent(&ioc->pcidev->dev, iocpage3sz, pIoc3, ioc3_dma);
6093 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
6097 ConfigPageHeader_t header;
6098 dma_addr_t ioc4_dma;
6101 /* Read and save IOC Page 4
6103 header.PageVersion = 0;
6104 header.PageLength = 0;
6105 header.PageNumber = 4;
6106 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6107 cfg.cfghdr.hdr = &header;
6110 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6113 if (mpt_config(ioc, &cfg) != 0)
6116 if (header.PageLength == 0)
6119 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
6120 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
6121 pIoc4 = dma_alloc_coherent(&ioc->pcidev->dev, iocpage4sz,
6122 &ioc4_dma, GFP_KERNEL);
6125 ioc->alloc_total += iocpage4sz;
6127 ioc4_dma = ioc->spi_data.IocPg4_dma;
6128 iocpage4sz = ioc->spi_data.IocPg4Sz;
6131 /* Read the Page into dma memory.
6133 cfg.physAddr = ioc4_dma;
6134 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6135 if (mpt_config(ioc, &cfg) == 0) {
6136 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6137 ioc->spi_data.IocPg4_dma = ioc4_dma;
6138 ioc->spi_data.IocPg4Sz = iocpage4sz;
6140 dma_free_coherent(&ioc->pcidev->dev, iocpage4sz, pIoc4,
6142 ioc->spi_data.pIocPg4 = NULL;
6143 ioc->alloc_total -= iocpage4sz;
6148 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6152 ConfigPageHeader_t header;
6153 dma_addr_t ioc1_dma;
6157 /* Check the Coalescing Timeout in IOC Page 1
6159 header.PageVersion = 0;
6160 header.PageLength = 0;
6161 header.PageNumber = 1;
6162 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
6163 cfg.cfghdr.hdr = &header;
6166 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6169 if (mpt_config(ioc, &cfg) != 0)
6172 if (header.PageLength == 0)
6175 /* Read Header good, alloc memory
6177 iocpage1sz = header.PageLength * 4;
6178 pIoc1 = dma_alloc_coherent(&ioc->pcidev->dev, iocpage1sz, &ioc1_dma,
6183 /* Read the Page and check coalescing timeout
6185 cfg.physAddr = ioc1_dma;
6186 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6187 if (mpt_config(ioc, &cfg) == 0) {
6189 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
6190 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
6191 tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
6193 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6196 if (tmp > MPT_COALESCING_TIMEOUT) {
6197 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
6199 /* Write NVRAM and current
6202 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
6203 if (mpt_config(ioc, &cfg) == 0) {
6204 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6205 ioc->name, MPT_COALESCING_TIMEOUT));
6207 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
6208 if (mpt_config(ioc, &cfg) == 0) {
6209 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6210 "Reset NVRAM Coalescing Timeout to = %d\n",
6211 ioc->name, MPT_COALESCING_TIMEOUT));
6213 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6214 "Reset NVRAM Coalescing Timeout Failed\n",
6219 dprintk(ioc, printk(MYIOC_s_WARN_FMT
6220 "Reset of Current Coalescing Timeout Failed!\n",
6226 dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6230 dma_free_coherent(&ioc->pcidev->dev, iocpage1sz, pIoc1, ioc1_dma);
6236 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6239 ConfigPageHeader_t hdr;
6241 ManufacturingPage0_t *pbuf = NULL;
6243 memset(&cfg, 0 , sizeof(CONFIGPARMS));
6244 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
6246 hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING;
6247 cfg.cfghdr.hdr = &hdr;
6249 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
6252 if (mpt_config(ioc, &cfg) != 0)
6255 if (!cfg.cfghdr.hdr->PageLength)
6258 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
6259 pbuf = dma_alloc_coherent(&ioc->pcidev->dev, hdr.PageLength * 4,
6260 &buf_dma, GFP_KERNEL);
6264 cfg.physAddr = buf_dma;
6266 if (mpt_config(ioc, &cfg) != 0)
6269 memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6270 memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6271 memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6276 dma_free_coherent(&ioc->pcidev->dev, hdr.PageLength * 4, pbuf,
6280 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6282 * SendEventNotification - Send EventNotification (on or off) request to adapter
6283 * @ioc: Pointer to MPT_ADAPTER structure
6284 * @EvSwitch: Event switch flags
6285 * @sleepFlag: Specifies whether the process can sleep
6288 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6290 EventNotification_t evn;
6291 MPIDefaultReply_t reply_buf;
6293 memset(&evn, 0, sizeof(EventNotification_t));
6294 memset(&reply_buf, 0, sizeof(MPIDefaultReply_t));
6296 evn.Function = MPI_FUNCTION_EVENT_NOTIFICATION;
6297 evn.Switch = EvSwitch;
6298 evn.MsgContext = cpu_to_le32(mpt_base_index << 16);
6300 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6301 "Sending EventNotification (%d) request %p\n",
6302 ioc->name, EvSwitch, &evn));
6304 return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6305 (u32 *)&evn, sizeof(MPIDefaultReply_t), (u16 *)&reply_buf, 30,
6309 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6311 * SendEventAck - Send EventAck request to MPT adapter.
6312 * @ioc: Pointer to MPT_ADAPTER structure
6313 * @evnp: Pointer to original EventNotification request
6316 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6320 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6321 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6322 ioc->name, __func__));
6326 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6328 pAck->Function = MPI_FUNCTION_EVENT_ACK;
6329 pAck->ChainOffset = 0;
6330 pAck->Reserved[0] = pAck->Reserved[1] = 0;
6332 pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
6333 pAck->Event = evnp->Event;
6334 pAck->EventContext = evnp->EventContext;
6336 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6341 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6343 * mpt_config - Generic function to issue config message
6344 * @ioc: Pointer to an adapter structure
6345 * @pCfg: Pointer to a configuration structure. Struct contains
6346 * action, page address, direction, physical address
6347 * and pointer to a configuration page header
6348 * Page header is updated.
6350 * Returns 0 for success
6351 * -EAGAIN if no msg frames currently available
6352 * -EFAULT for non-successful reply or no reply (timeout)
6355 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6358 ConfigReply_t *pReply;
6359 ConfigExtendedPageHeader_t *pExtHdr = NULL;
6365 u8 page_type = 0, extend_page;
6366 unsigned long timeleft;
6367 unsigned long flags;
6368 u8 issue_hard_reset = 0;
6373 /* don't send a config page during diag reset */
6374 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6375 if (ioc->ioc_reset_in_progress) {
6376 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6377 "%s: busy with host reset\n", ioc->name, __func__));
6378 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6381 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6383 /* don't send if no chance of success */
6385 mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6386 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6387 "%s: ioc not operational, %d, %xh\n",
6388 ioc->name, __func__, ioc->active,
6389 mpt_GetIocState(ioc, 0)));
6394 mutex_lock(&ioc->mptbase_cmds.mutex);
6395 /* init the internal cmd struct */
6396 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6397 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6399 /* Get and Populate a free Frame
6401 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6402 dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6403 "mpt_config: no msg frames!\n", ioc->name));
6408 pReq = (Config_t *)mf;
6409 pReq->Action = pCfg->action;
6411 pReq->ChainOffset = 0;
6412 pReq->Function = MPI_FUNCTION_CONFIG;
6414 /* Assume page type is not extended and clear "reserved" fields. */
6415 pReq->ExtPageLength = 0;
6416 pReq->ExtPageType = 0;
6419 for (ii=0; ii < 8; ii++)
6420 pReq->Reserved2[ii] = 0;
6422 pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
6423 pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
6424 pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
6425 pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
6427 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
6428 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
6429 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
6430 pReq->ExtPageType = pExtHdr->ExtPageType;
6431 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
6433 /* Page Length must be treated as a reserved field for the
6436 pReq->Header.PageLength = 0;
6439 pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
6441 /* Add a SGE to the config request.
6444 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
6446 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
6448 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) ==
6449 MPI_CONFIG_PAGETYPE_EXTENDED) {
6450 flagsLength |= pExtHdr->ExtPageLength * 4;
6451 page_type = pReq->ExtPageType;
6454 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
6455 page_type = pReq->Header.PageType;
6459 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6460 "Sending Config request type 0x%x, page 0x%x and action %d\n",
6461 ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6463 ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6464 timeout = (pCfg->timeout < 15) ? HZ*15 : HZ*pCfg->timeout;
6465 mpt_put_msg_frame(mpt_base_index, ioc, mf);
6466 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6468 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6470 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6471 "Failed Sending Config request type 0x%x, page 0x%x,"
6472 " action %d, status %xh, time left %ld\n\n",
6473 ioc->name, page_type, pReq->Header.PageNumber,
6474 pReq->Action, ioc->mptbase_cmds.status, timeleft));
6475 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6478 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6479 if (ioc->ioc_reset_in_progress) {
6480 spin_unlock_irqrestore(&ioc->taskmgmt_lock,
6482 printk(MYIOC_s_INFO_FMT "%s: host reset in"
6483 " progress mpt_config timed out.!!\n",
6484 __func__, ioc->name);
6485 mutex_unlock(&ioc->mptbase_cmds.mutex);
6488 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6489 issue_hard_reset = 1;
6494 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6498 pReply = (ConfigReply_t *)ioc->mptbase_cmds.reply;
6499 ret = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
6500 if (ret == MPI_IOCSTATUS_SUCCESS) {
6502 pCfg->cfghdr.ehdr->ExtPageLength =
6503 le16_to_cpu(pReply->ExtPageLength);
6504 pCfg->cfghdr.ehdr->ExtPageType =
6505 pReply->ExtPageType;
6507 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
6508 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
6509 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
6510 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
6515 printk(MYIOC_s_INFO_FMT "Retry completed "
6516 "ret=0x%x timeleft=%ld\n",
6517 ioc->name, ret, timeleft);
6519 dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6520 ret, le32_to_cpu(pReply->IOCLogInfo)));
6524 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6525 mutex_unlock(&ioc->mptbase_cmds.mutex);
6526 if (issue_hard_reset) {
6527 issue_hard_reset = 0;
6528 printk(MYIOC_s_WARN_FMT
6529 "Issuing Reset from %s!!, doorbell=0x%08x\n",
6530 ioc->name, __func__, mpt_GetIocState(ioc, 0));
6531 if (retry_count == 0) {
6532 if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6535 mpt_HardResetHandler(ioc, CAN_SLEEP);
6537 mpt_free_msg_frame(ioc, mf);
6538 /* attempt one retry for a timed out command */
6539 if (retry_count < 2) {
6540 printk(MYIOC_s_INFO_FMT
6541 "Attempting Retry Config request"
6542 " type 0x%x, page 0x%x,"
6543 " action %d\n", ioc->name, page_type,
6544 pCfg->cfghdr.hdr->PageNumber, pCfg->action);
6553 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6555 * mpt_ioc_reset - Base cleanup for hard reset
6556 * @ioc: Pointer to the adapter structure
6557 * @reset_phase: Indicates pre- or post-reset functionality
6559 * Remark: Frees resources with internally generated commands.
6562 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6564 switch (reset_phase) {
6565 case MPT_IOC_SETUP_RESET:
6566 ioc->taskmgmt_quiesce_io = 1;
6567 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6568 "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6570 case MPT_IOC_PRE_RESET:
6571 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6572 "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6574 case MPT_IOC_POST_RESET:
6575 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6576 "%s: MPT_IOC_POST_RESET\n", ioc->name, __func__));
6577 /* wake up mptbase_cmds */
6578 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6579 ioc->mptbase_cmds.status |=
6580 MPT_MGMT_STATUS_DID_IOCRESET;
6581 complete(&ioc->mptbase_cmds.done);
6583 /* wake up taskmgmt_cmds */
6584 if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6585 ioc->taskmgmt_cmds.status |=
6586 MPT_MGMT_STATUS_DID_IOCRESET;
6587 complete(&ioc->taskmgmt_cmds.done);
6594 return 1; /* currently means nothing really */
6598 #ifdef CONFIG_PROC_FS /* { */
6599 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6601 * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
6603 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6605 * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
6607 * Returns 0 for success, non-zero for failure.
6610 procmpt_create(void)
6612 mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
6613 if (mpt_proc_root_dir == NULL)
6616 proc_create_single("summary", S_IRUGO, mpt_proc_root_dir,
6617 mpt_summary_proc_show);
6618 proc_create_single("version", S_IRUGO, mpt_proc_root_dir,
6619 mpt_version_proc_show);
6623 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6625 * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
6627 * Returns 0 for success, non-zero for failure.
6630 procmpt_destroy(void)
6632 remove_proc_entry("version", mpt_proc_root_dir);
6633 remove_proc_entry("summary", mpt_proc_root_dir);
6634 remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
6637 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6639 * Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
6641 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6643 static int mpt_summary_proc_show(struct seq_file *m, void *v)
6645 MPT_ADAPTER *ioc = m->private;
6648 seq_mpt_print_ioc_summary(ioc, m, 1);
6650 list_for_each_entry(ioc, &ioc_list, list) {
6651 seq_mpt_print_ioc_summary(ioc, m, 1);
6658 static int mpt_version_proc_show(struct seq_file *m, void *v)
6661 int scsi, fc, sas, lan, ctl, targ;
6664 seq_printf(m, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
6665 seq_printf(m, " Fusion MPT base driver\n");
6667 scsi = fc = sas = lan = ctl = targ = 0;
6668 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6670 if (MptCallbacks[cb_idx]) {
6671 switch (MptDriverClass[cb_idx]) {
6673 if (!scsi++) drvname = "SPI host";
6676 if (!fc++) drvname = "FC host";
6679 if (!sas++) drvname = "SAS host";
6682 if (!lan++) drvname = "LAN";
6685 if (!targ++) drvname = "SCSI target";
6688 if (!ctl++) drvname = "ioctl";
6693 seq_printf(m, " Fusion MPT %s driver\n", drvname);
6700 static int mpt_iocinfo_proc_show(struct seq_file *m, void *v)
6702 MPT_ADAPTER *ioc = m->private;
6707 mpt_get_fw_exp_ver(expVer, ioc);
6709 seq_printf(m, "%s:", ioc->name);
6710 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6711 seq_printf(m, " (f/w download boot flag set)");
6712 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6713 // seq_printf(m, " CONFIG_CHECKSUM_FAIL!");
6715 seq_printf(m, "\n ProductID = 0x%04x (%s)\n",
6716 ioc->facts.ProductID,
6718 seq_printf(m, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6719 if (ioc->facts.FWImageSize)
6720 seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6721 seq_printf(m, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6722 seq_printf(m, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6723 seq_printf(m, " EventState = 0x%02x\n", ioc->facts.EventState);
6725 seq_printf(m, " CurrentHostMfaHighAddr = 0x%08x\n",
6726 ioc->facts.CurrentHostMfaHighAddr);
6727 seq_printf(m, " CurrentSenseBufferHighAddr = 0x%08x\n",
6728 ioc->facts.CurrentSenseBufferHighAddr);
6730 seq_printf(m, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6731 seq_printf(m, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6733 seq_printf(m, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
6734 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6736 * Rounding UP to nearest 4-kB boundary here...
6738 sz = (ioc->req_sz * ioc->req_depth) + 128;
6739 sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
6740 seq_printf(m, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
6741 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6742 seq_printf(m, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
6743 4*ioc->facts.RequestFrameSize,
6744 ioc->facts.GlobalCredits);
6746 seq_printf(m, " Frames @ 0x%p (Dma @ 0x%p)\n",
6747 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6748 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6749 seq_printf(m, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
6750 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6751 seq_printf(m, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
6752 ioc->facts.CurReplyFrameSize,
6753 ioc->facts.ReplyQueueDepth);
6755 seq_printf(m, " MaxDevices = %d\n",
6756 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6757 seq_printf(m, " MaxBuses = %d\n", ioc->facts.MaxBuses);
6760 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6761 seq_printf(m, " PortNumber = %d (of %d)\n",
6763 ioc->facts.NumberOfPorts);
6764 if (ioc->bus_type == FC) {
6765 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6766 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6767 seq_printf(m, " LanAddr = %pMR\n", a);
6769 seq_printf(m, " WWN = %08X%08X:%08X%08X\n",
6770 ioc->fc_port_page0[p].WWNN.High,
6771 ioc->fc_port_page0[p].WWNN.Low,
6772 ioc->fc_port_page0[p].WWPN.High,
6773 ioc->fc_port_page0[p].WWPN.Low);
6779 #endif /* CONFIG_PROC_FS } */
6781 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6783 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6786 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6787 sprintf(buf, " (Exp %02d%02d)",
6788 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
6789 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
6792 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6793 strcat(buf, " [MDBG]");
6797 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6799 * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
6800 * @ioc: Pointer to MPT_ADAPTER structure
6801 * @buffer: Pointer to buffer where IOC summary info should be written
6802 * @size: Pointer to number of bytes we wrote (set by this routine)
6803 * @len: Offset at which to start writing in buffer
6804 * @showlan: Display LAN stuff?
6806 * This routine writes (english readable) ASCII text, which represents
6807 * a summary of IOC information, to a buffer.
6810 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6815 mpt_get_fw_exp_ver(expVer, ioc);
6818 * Shorter summary of attached ioc's...
6820 y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6823 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
6824 ioc->facts.FWVersion.Word,
6826 ioc->facts.NumberOfPorts,
6829 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6830 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6831 y += sprintf(buffer+len+y, ", LanAddr=%pMR", a);
6834 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6837 y += sprintf(buffer+len+y, " (disabled)");
6839 y += sprintf(buffer+len+y, "\n");
6844 #ifdef CONFIG_PROC_FS
6845 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6849 mpt_get_fw_exp_ver(expVer, ioc);
6852 * Shorter summary of attached ioc's...
6854 seq_printf(m, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6857 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
6858 ioc->facts.FWVersion.Word,
6860 ioc->facts.NumberOfPorts,
6863 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6864 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6865 seq_printf(m, ", LanAddr=%pMR", a);
6868 seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6871 seq_printf(m, " (disabled)");
6878 * mpt_set_taskmgmt_in_progress_flag - set flags associated with task management
6879 * @ioc: Pointer to MPT_ADAPTER structure
6881 * Returns 0 for SUCCESS or -1 if FAILED.
6883 * If -1 is return, then it was not possible to set the flags
6886 mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6888 unsigned long flags;
6891 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6892 if (ioc->ioc_reset_in_progress || ioc->taskmgmt_in_progress ||
6893 (ioc->alt_ioc && ioc->alt_ioc->taskmgmt_in_progress)) {
6898 ioc->taskmgmt_in_progress = 1;
6899 ioc->taskmgmt_quiesce_io = 1;
6901 ioc->alt_ioc->taskmgmt_in_progress = 1;
6902 ioc->alt_ioc->taskmgmt_quiesce_io = 1;
6905 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6908 EXPORT_SYMBOL(mpt_set_taskmgmt_in_progress_flag);
6911 * mpt_clear_taskmgmt_in_progress_flag - clear flags associated with task management
6912 * @ioc: Pointer to MPT_ADAPTER structure
6916 mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6918 unsigned long flags;
6920 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6921 ioc->taskmgmt_in_progress = 0;
6922 ioc->taskmgmt_quiesce_io = 0;
6924 ioc->alt_ioc->taskmgmt_in_progress = 0;
6925 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
6927 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6929 EXPORT_SYMBOL(mpt_clear_taskmgmt_in_progress_flag);
6933 * mpt_halt_firmware - Halts the firmware if it is operational and panic
6935 * @ioc: Pointer to MPT_ADAPTER structure
6939 mpt_halt_firmware(MPT_ADAPTER *ioc)
6943 ioc_raw_state = mpt_GetIocState(ioc, 0);
6945 if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
6946 printk(MYIOC_s_ERR_FMT "IOC is in FAULT state (%04xh)!!!\n",
6947 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6948 panic("%s: IOC Fault (%04xh)!!!\n", ioc->name,
6949 ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6951 CHIPREG_WRITE32(&ioc->chip->Doorbell, 0xC0FFEE00);
6952 panic("%s: Firmware is halted due to command timeout\n",
6956 EXPORT_SYMBOL(mpt_halt_firmware);
6959 * mpt_SoftResetHandler - Issues a less expensive reset
6960 * @ioc: Pointer to MPT_ADAPTER structure
6961 * @sleepFlag: Indicates if sleep or schedule must be called.
6963 * Returns 0 for SUCCESS or -1 if FAILED.
6965 * Message Unit Reset - instructs the IOC to reset the Reply Post and
6966 * Free FIFO's. All the Message Frames on Reply Free FIFO are discarded.
6967 * All posted buffers are freed, and event notification is turned off.
6968 * IOC doesn't reply to any outstanding request. This will transfer IOC
6972 mpt_SoftResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
6977 unsigned long flags;
6979 unsigned long time_count;
6981 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SoftResetHandler Entered!\n",
6984 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
6986 if (mpt_fwfault_debug)
6987 mpt_halt_firmware(ioc);
6989 if (ioc_state == MPI_IOC_STATE_FAULT ||
6990 ioc_state == MPI_IOC_STATE_RESET) {
6991 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6992 "skipping, either in FAULT or RESET state!\n", ioc->name));
6996 if (ioc->bus_type == FC) {
6997 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6998 "skipping, because the bus type is FC!\n", ioc->name));
7002 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7003 if (ioc->ioc_reset_in_progress) {
7004 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7007 ioc->ioc_reset_in_progress = 1;
7008 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7010 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7011 if (MptResetHandlers[cb_idx])
7012 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7015 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7016 if (ioc->taskmgmt_in_progress) {
7017 ioc->ioc_reset_in_progress = 0;
7018 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7021 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7022 /* Disable reply interrupts (also blocks FreeQ) */
7023 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
7025 time_count = jiffies;
7027 rc = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
7029 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7030 if (MptResetHandlers[cb_idx])
7031 mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
7037 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7038 if (ioc_state != MPI_IOC_STATE_READY)
7041 for (ii = 0; ii < 5; ii++) {
7042 /* Get IOC facts! Allow 5 retries */
7043 rc = GetIocFacts(ioc, sleepFlag,
7044 MPT_HOSTEVENT_IOC_RECOVER);
7047 if (sleepFlag == CAN_SLEEP)
7055 rc = PrimeIocFifos(ioc);
7059 rc = SendIocInit(ioc, sleepFlag);
7063 rc = SendEventNotification(ioc, 1, sleepFlag);
7067 if (ioc->hard_resets < -1)
7071 * At this point, we know soft reset succeeded.
7075 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
7078 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7079 ioc->ioc_reset_in_progress = 0;
7080 ioc->taskmgmt_quiesce_io = 0;
7081 ioc->taskmgmt_in_progress = 0;
7082 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7084 if (ioc->active) { /* otherwise, hard reset coming */
7085 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7086 if (MptResetHandlers[cb_idx])
7087 mpt_signal_reset(cb_idx, ioc,
7088 MPT_IOC_POST_RESET);
7092 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7093 "SoftResetHandler: completed (%d seconds): %s\n",
7094 ioc->name, jiffies_to_msecs(jiffies - time_count)/1000,
7095 ((rc == 0) ? "SUCCESS" : "FAILED")));
7101 * mpt_Soft_Hard_ResetHandler - Try less expensive reset
7102 * @ioc: Pointer to MPT_ADAPTER structure
7103 * @sleepFlag: Indicates if sleep or schedule must be called.
7105 * Returns 0 for SUCCESS or -1 if FAILED.
7106 * Try for softreset first, only if it fails go for expensive
7110 mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag) {
7113 ret = mpt_SoftResetHandler(ioc, sleepFlag);
7116 ret = mpt_HardResetHandler(ioc, sleepFlag);
7119 EXPORT_SYMBOL(mpt_Soft_Hard_ResetHandler);
7121 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7125 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7127 * mpt_HardResetHandler - Generic reset handler
7128 * @ioc: Pointer to MPT_ADAPTER structure
7129 * @sleepFlag: Indicates if sleep or schedule must be called.
7131 * Issues SCSI Task Management call based on input arg values.
7132 * If TaskMgmt fails, returns associated SCSI request.
7134 * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
7135 * or a non-interrupt thread. In the former, must not call schedule().
7137 * Note: A return of -1 is a FATAL error case, as it means a
7138 * FW reload/initialization failed.
7140 * Returns 0 for SUCCESS or -1 if FAILED.
7143 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7147 unsigned long flags;
7148 unsigned long time_count;
7150 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
7152 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
7153 printk("MF count 0x%x !\n", ioc->mfcnt);
7155 if (mpt_fwfault_debug)
7156 mpt_halt_firmware(ioc);
7158 /* Reset the adapter. Prevent more than 1 call to
7159 * mpt_do_ioc_recovery at any instant in time.
7161 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7162 if (ioc->ioc_reset_in_progress) {
7163 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7164 ioc->wait_on_reset_completion = 1;
7167 } while (ioc->ioc_reset_in_progress == 1);
7168 ioc->wait_on_reset_completion = 0;
7169 return ioc->reset_status;
7171 if (ioc->wait_on_reset_completion) {
7172 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7174 time_count = jiffies;
7177 ioc->ioc_reset_in_progress = 1;
7179 ioc->alt_ioc->ioc_reset_in_progress = 1;
7180 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7183 /* The SCSI driver needs to adjust timeouts on all current
7184 * commands prior to the diagnostic reset being issued.
7185 * Prevents timeouts occurring during a diagnostic reset...very bad.
7186 * For all other protocol drivers, this is a no-op.
7188 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7189 if (MptResetHandlers[cb_idx]) {
7190 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7192 mpt_signal_reset(cb_idx, ioc->alt_ioc,
7193 MPT_IOC_SETUP_RESET);
7197 time_count = jiffies;
7198 rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag);
7200 printk(KERN_WARNING MYNAM
7201 ": WARNING - (%d) Cannot recover %s, doorbell=0x%08x\n",
7202 rc, ioc->name, mpt_GetIocState(ioc, 0));
7204 if (ioc->hard_resets < -1)
7208 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7209 ioc->ioc_reset_in_progress = 0;
7210 ioc->taskmgmt_quiesce_io = 0;
7211 ioc->taskmgmt_in_progress = 0;
7212 ioc->reset_status = rc;
7214 ioc->alt_ioc->ioc_reset_in_progress = 0;
7215 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
7216 ioc->alt_ioc->taskmgmt_in_progress = 0;
7218 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7220 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7221 if (MptResetHandlers[cb_idx]) {
7222 mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
7224 mpt_signal_reset(cb_idx,
7225 ioc->alt_ioc, MPT_IOC_POST_RESET);
7230 printk(MYIOC_s_DEBUG_FMT
7231 "HardResetHandler: completed (%d seconds): %s\n", ioc->name,
7232 jiffies_to_msecs(jiffies - time_count)/1000, ((rc == 0) ?
7233 "SUCCESS" : "FAILED")));
7238 #ifdef CONFIG_FUSION_LOGGING
7240 mpt_display_event_info(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply)
7246 char *evStr = ioc->evStr;
7248 event = le32_to_cpu(pEventReply->Event) & 0xFF;
7249 evData0 = le32_to_cpu(pEventReply->Data[0]);
7252 case MPI_EVENT_NONE:
7255 case MPI_EVENT_LOG_DATA:
7258 case MPI_EVENT_STATE_CHANGE:
7259 ds = "State Change";
7261 case MPI_EVENT_UNIT_ATTENTION:
7262 ds = "Unit Attention";
7264 case MPI_EVENT_IOC_BUS_RESET:
7265 ds = "IOC Bus Reset";
7267 case MPI_EVENT_EXT_BUS_RESET:
7268 ds = "External Bus Reset";
7270 case MPI_EVENT_RESCAN:
7271 ds = "Bus Rescan Event";
7273 case MPI_EVENT_LINK_STATUS_CHANGE:
7274 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
7275 ds = "Link Status(FAILURE) Change";
7277 ds = "Link Status(ACTIVE) Change";
7279 case MPI_EVENT_LOOP_STATE_CHANGE:
7280 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
7281 ds = "Loop State(LIP) Change";
7282 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
7283 ds = "Loop State(LPE) Change";
7285 ds = "Loop State(LPB) Change";
7287 case MPI_EVENT_LOGOUT:
7290 case MPI_EVENT_EVENT_CHANGE:
7296 case MPI_EVENT_INTEGRATED_RAID:
7298 u8 ReasonCode = (u8)(evData0 >> 16);
7299 switch (ReasonCode) {
7300 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
7301 ds = "Integrated Raid: Volume Created";
7303 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
7304 ds = "Integrated Raid: Volume Deleted";
7306 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
7307 ds = "Integrated Raid: Volume Settings Changed";
7309 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
7310 ds = "Integrated Raid: Volume Status Changed";
7312 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
7313 ds = "Integrated Raid: Volume Physdisk Changed";
7315 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
7316 ds = "Integrated Raid: Physdisk Created";
7318 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
7319 ds = "Integrated Raid: Physdisk Deleted";
7321 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
7322 ds = "Integrated Raid: Physdisk Settings Changed";
7324 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
7325 ds = "Integrated Raid: Physdisk Status Changed";
7327 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
7328 ds = "Integrated Raid: Domain Validation Needed";
7330 case MPI_EVENT_RAID_RC_SMART_DATA :
7331 ds = "Integrated Raid; Smart Data";
7333 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
7334 ds = "Integrated Raid: Replace Action Started";
7337 ds = "Integrated Raid";
7342 case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
7343 ds = "SCSI Device Status Change";
7345 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
7347 u8 id = (u8)(evData0);
7348 u8 channel = (u8)(evData0 >> 8);
7349 u8 ReasonCode = (u8)(evData0 >> 16);
7350 switch (ReasonCode) {
7351 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
7352 snprintf(evStr, EVENT_DESCR_STR_SZ,
7353 "SAS Device Status Change: Added: "
7354 "id=%d channel=%d", id, channel);
7356 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
7357 snprintf(evStr, EVENT_DESCR_STR_SZ,
7358 "SAS Device Status Change: Deleted: "
7359 "id=%d channel=%d", id, channel);
7361 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
7362 snprintf(evStr, EVENT_DESCR_STR_SZ,
7363 "SAS Device Status Change: SMART Data: "
7364 "id=%d channel=%d", id, channel);
7366 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
7367 snprintf(evStr, EVENT_DESCR_STR_SZ,
7368 "SAS Device Status Change: No Persistency: "
7369 "id=%d channel=%d", id, channel);
7371 case MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
7372 snprintf(evStr, EVENT_DESCR_STR_SZ,
7373 "SAS Device Status Change: Unsupported Device "
7374 "Discovered : id=%d channel=%d", id, channel);
7376 case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
7377 snprintf(evStr, EVENT_DESCR_STR_SZ,
7378 "SAS Device Status Change: Internal Device "
7379 "Reset : id=%d channel=%d", id, channel);
7381 case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
7382 snprintf(evStr, EVENT_DESCR_STR_SZ,
7383 "SAS Device Status Change: Internal Task "
7384 "Abort : id=%d channel=%d", id, channel);
7386 case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
7387 snprintf(evStr, EVENT_DESCR_STR_SZ,
7388 "SAS Device Status Change: Internal Abort "
7389 "Task Set : id=%d channel=%d", id, channel);
7391 case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
7392 snprintf(evStr, EVENT_DESCR_STR_SZ,
7393 "SAS Device Status Change: Internal Clear "
7394 "Task Set : id=%d channel=%d", id, channel);
7396 case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
7397 snprintf(evStr, EVENT_DESCR_STR_SZ,
7398 "SAS Device Status Change: Internal Query "
7399 "Task : id=%d channel=%d", id, channel);
7402 snprintf(evStr, EVENT_DESCR_STR_SZ,
7403 "SAS Device Status Change: Unknown: "
7404 "id=%d channel=%d", id, channel);
7409 case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
7410 ds = "Bus Timer Expired";
7412 case MPI_EVENT_QUEUE_FULL:
7414 u16 curr_depth = (u16)(evData0 >> 16);
7415 u8 channel = (u8)(evData0 >> 8);
7416 u8 id = (u8)(evData0);
7418 snprintf(evStr, EVENT_DESCR_STR_SZ,
7419 "Queue Full: channel=%d id=%d depth=%d",
7420 channel, id, curr_depth);
7423 case MPI_EVENT_SAS_SES:
7424 ds = "SAS SES Event";
7426 case MPI_EVENT_PERSISTENT_TABLE_FULL:
7427 ds = "Persistent Table Full";
7429 case MPI_EVENT_SAS_PHY_LINK_STATUS:
7431 u8 LinkRates = (u8)(evData0 >> 8);
7432 u8 PhyNumber = (u8)(evData0);
7433 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
7434 MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
7435 switch (LinkRates) {
7436 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
7437 snprintf(evStr, EVENT_DESCR_STR_SZ,
7438 "SAS PHY Link Status: Phy=%d:"
7439 " Rate Unknown",PhyNumber);
7441 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
7442 snprintf(evStr, EVENT_DESCR_STR_SZ,
7443 "SAS PHY Link Status: Phy=%d:"
7444 " Phy Disabled",PhyNumber);
7446 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
7447 snprintf(evStr, EVENT_DESCR_STR_SZ,
7448 "SAS PHY Link Status: Phy=%d:"
7449 " Failed Speed Nego",PhyNumber);
7451 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
7452 snprintf(evStr, EVENT_DESCR_STR_SZ,
7453 "SAS PHY Link Status: Phy=%d:"
7454 " Sata OOB Completed",PhyNumber);
7456 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
7457 snprintf(evStr, EVENT_DESCR_STR_SZ,
7458 "SAS PHY Link Status: Phy=%d:"
7459 " Rate 1.5 Gbps",PhyNumber);
7461 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
7462 snprintf(evStr, EVENT_DESCR_STR_SZ,
7463 "SAS PHY Link Status: Phy=%d:"
7464 " Rate 3.0 Gbps", PhyNumber);
7466 case MPI_EVENT_SAS_PLS_LR_RATE_6_0:
7467 snprintf(evStr, EVENT_DESCR_STR_SZ,
7468 "SAS PHY Link Status: Phy=%d:"
7469 " Rate 6.0 Gbps", PhyNumber);
7472 snprintf(evStr, EVENT_DESCR_STR_SZ,
7473 "SAS PHY Link Status: Phy=%d", PhyNumber);
7478 case MPI_EVENT_SAS_DISCOVERY_ERROR:
7479 ds = "SAS Discovery Error";
7481 case MPI_EVENT_IR_RESYNC_UPDATE:
7483 u8 resync_complete = (u8)(evData0 >> 16);
7484 snprintf(evStr, EVENT_DESCR_STR_SZ,
7485 "IR Resync Update: Complete = %d:",resync_complete);
7490 u8 id = (u8)(evData0);
7491 u8 channel = (u8)(evData0 >> 8);
7492 u8 phys_num = (u8)(evData0 >> 24);
7493 u8 ReasonCode = (u8)(evData0 >> 16);
7495 switch (ReasonCode) {
7496 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
7497 snprintf(evStr, EVENT_DESCR_STR_SZ,
7498 "IR2: LD State Changed: "
7499 "id=%d channel=%d phys_num=%d",
7500 id, channel, phys_num);
7502 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
7503 snprintf(evStr, EVENT_DESCR_STR_SZ,
7504 "IR2: PD State Changed "
7505 "id=%d channel=%d phys_num=%d",
7506 id, channel, phys_num);
7508 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
7509 snprintf(evStr, EVENT_DESCR_STR_SZ,
7510 "IR2: Bad Block Table Full: "
7511 "id=%d channel=%d phys_num=%d",
7512 id, channel, phys_num);
7514 case MPI_EVENT_IR2_RC_PD_INSERTED:
7515 snprintf(evStr, EVENT_DESCR_STR_SZ,
7516 "IR2: PD Inserted: "
7517 "id=%d channel=%d phys_num=%d",
7518 id, channel, phys_num);
7520 case MPI_EVENT_IR2_RC_PD_REMOVED:
7521 snprintf(evStr, EVENT_DESCR_STR_SZ,
7523 "id=%d channel=%d phys_num=%d",
7524 id, channel, phys_num);
7526 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
7527 snprintf(evStr, EVENT_DESCR_STR_SZ,
7528 "IR2: Foreign CFG Detected: "
7529 "id=%d channel=%d phys_num=%d",
7530 id, channel, phys_num);
7532 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
7533 snprintf(evStr, EVENT_DESCR_STR_SZ,
7534 "IR2: Rebuild Medium Error: "
7535 "id=%d channel=%d phys_num=%d",
7536 id, channel, phys_num);
7538 case MPI_EVENT_IR2_RC_DUAL_PORT_ADDED:
7539 snprintf(evStr, EVENT_DESCR_STR_SZ,
7540 "IR2: Dual Port Added: "
7541 "id=%d channel=%d phys_num=%d",
7542 id, channel, phys_num);
7544 case MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED:
7545 snprintf(evStr, EVENT_DESCR_STR_SZ,
7546 "IR2: Dual Port Removed: "
7547 "id=%d channel=%d phys_num=%d",
7548 id, channel, phys_num);
7556 case MPI_EVENT_SAS_DISCOVERY:
7559 ds = "SAS Discovery: Start";
7561 ds = "SAS Discovery: Stop";
7564 case MPI_EVENT_LOG_ENTRY_ADDED:
7565 ds = "SAS Log Entry Added";
7568 case MPI_EVENT_SAS_BROADCAST_PRIMITIVE:
7570 u8 phy_num = (u8)(evData0);
7571 u8 port_num = (u8)(evData0 >> 8);
7572 u8 port_width = (u8)(evData0 >> 16);
7573 u8 primitive = (u8)(evData0 >> 24);
7574 snprintf(evStr, EVENT_DESCR_STR_SZ,
7575 "SAS Broadcast Primitive: phy=%d port=%d "
7576 "width=%d primitive=0x%02x",
7577 phy_num, port_num, port_width, primitive);
7581 case MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
7583 u8 reason = (u8)(evData0);
7586 case MPI_EVENT_SAS_INIT_RC_ADDED:
7587 ds = "SAS Initiator Status Change: Added";
7589 case MPI_EVENT_SAS_INIT_RC_REMOVED:
7590 ds = "SAS Initiator Status Change: Deleted";
7593 ds = "SAS Initiator Status Change";
7599 case MPI_EVENT_SAS_INIT_TABLE_OVERFLOW:
7601 u8 max_init = (u8)(evData0);
7602 u8 current_init = (u8)(evData0 >> 8);
7604 snprintf(evStr, EVENT_DESCR_STR_SZ,
7605 "SAS Initiator Device Table Overflow: max initiators=%02d "
7606 "current initiators=%02d",
7607 max_init, current_init);
7610 case MPI_EVENT_SAS_SMP_ERROR:
7612 u8 status = (u8)(evData0);
7613 u8 port_num = (u8)(evData0 >> 8);
7614 u8 result = (u8)(evData0 >> 16);
7616 if (status == MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID)
7617 snprintf(evStr, EVENT_DESCR_STR_SZ,
7618 "SAS SMP Error: port=%d result=0x%02x",
7620 else if (status == MPI_EVENT_SAS_SMP_CRC_ERROR)
7621 snprintf(evStr, EVENT_DESCR_STR_SZ,
7622 "SAS SMP Error: port=%d : CRC Error",
7624 else if (status == MPI_EVENT_SAS_SMP_TIMEOUT)
7625 snprintf(evStr, EVENT_DESCR_STR_SZ,
7626 "SAS SMP Error: port=%d : Timeout",
7628 else if (status == MPI_EVENT_SAS_SMP_NO_DESTINATION)
7629 snprintf(evStr, EVENT_DESCR_STR_SZ,
7630 "SAS SMP Error: port=%d : No Destination",
7632 else if (status == MPI_EVENT_SAS_SMP_BAD_DESTINATION)
7633 snprintf(evStr, EVENT_DESCR_STR_SZ,
7634 "SAS SMP Error: port=%d : Bad Destination",
7637 snprintf(evStr, EVENT_DESCR_STR_SZ,
7638 "SAS SMP Error: port=%d : status=0x%02x",
7643 case MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE:
7645 u8 reason = (u8)(evData0);
7648 case MPI_EVENT_SAS_EXP_RC_ADDED:
7649 ds = "Expander Status Change: Added";
7651 case MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING:
7652 ds = "Expander Status Change: Deleted";
7655 ds = "Expander Status Change";
7662 * MPT base "custom" events may be added here...
7669 strscpy(evStr, ds, EVENT_DESCR_STR_SZ);
7672 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7673 "MPT event:(%02Xh) : %s\n",
7674 ioc->name, event, evStr));
7676 devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM
7677 ": Event data:\n"));
7678 for (ii = 0; ii < le16_to_cpu(pEventReply->EventDataLength); ii++)
7679 devtverboseprintk(ioc, printk(" %08x",
7680 le32_to_cpu(pEventReply->Data[ii])));
7681 devtverboseprintk(ioc, printk(KERN_DEBUG "\n"));
7684 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7686 * ProcessEventNotification - Route EventNotificationReply to all event handlers
7687 * @ioc: Pointer to MPT_ADAPTER structure
7688 * @pEventReply: Pointer to EventNotification reply frame
7689 * @evHandlers: Pointer to integer, number of event handlers
7691 * Routes a received EventNotificationReply to all currently registered
7693 * Returns sum of event handlers return values.
7696 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
7707 * Do platform normalization of values
7709 event = le32_to_cpu(pEventReply->Event) & 0xFF;
7710 evDataLen = le16_to_cpu(pEventReply->EventDataLength);
7712 evData0 = le32_to_cpu(pEventReply->Data[0]);
7715 #ifdef CONFIG_FUSION_LOGGING
7717 mpt_display_event_info(ioc, pEventReply);
7721 * Do general / base driver event processing
7724 case MPI_EVENT_EVENT_CHANGE: /* 0A */
7726 u8 evState = evData0 & 0xFF;
7728 /* CHECKME! What if evState unexpectedly says OFF (0)? */
7730 /* Update EventState field in cached IocFacts */
7731 if (ioc->facts.Function) {
7732 ioc->facts.EventState = evState;
7736 case MPI_EVENT_INTEGRATED_RAID:
7737 mptbase_raid_process_event_data(ioc,
7738 (MpiEventDataRaid_t *)pEventReply->Data);
7745 * Should this event be logged? Events are written sequentially.
7746 * When buffer is full, start again at the top.
7748 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
7751 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
7753 ioc->events[idx].event = event;
7754 ioc->events[idx].eventContext = ioc->eventContext;
7756 for (ii = 0; ii < 2; ii++) {
7758 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
7760 ioc->events[idx].data[ii] = 0;
7763 ioc->eventContext++;
7768 * Call each currently registered protocol event handler.
7770 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
7771 if (MptEvHandlers[cb_idx]) {
7772 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7773 "Routing Event to event handler #%d\n",
7774 ioc->name, cb_idx));
7775 r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
7779 /* FIXME? Examine results here? */
7782 * If needed, send (a single) EventAck.
7784 if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
7785 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7786 "EventAck required\n",ioc->name));
7787 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
7788 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
7793 *evHandlers = handlers;
7797 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7799 * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
7800 * @ioc: Pointer to MPT_ADAPTER structure
7801 * @log_info: U32 LogInfo reply word from the IOC
7803 * Refer to lsi/mpi_log_fc.h.
7806 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
7808 char *desc = "unknown";
7810 switch (log_info & 0xFF000000) {
7811 case MPI_IOCLOGINFO_FC_INIT_BASE:
7812 desc = "FCP Initiator";
7814 case MPI_IOCLOGINFO_FC_TARGET_BASE:
7815 desc = "FCP Target";
7817 case MPI_IOCLOGINFO_FC_LAN_BASE:
7820 case MPI_IOCLOGINFO_FC_MSG_BASE:
7821 desc = "MPI Message Layer";
7823 case MPI_IOCLOGINFO_FC_LINK_BASE:
7826 case MPI_IOCLOGINFO_FC_CTX_BASE:
7827 desc = "Context Manager";
7829 case MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET:
7830 desc = "Invalid Field Offset";
7832 case MPI_IOCLOGINFO_FC_STATE_CHANGE:
7833 desc = "State Change Info";
7837 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubClass={%s}, Value=(0x%06x)\n",
7838 ioc->name, log_info, desc, (log_info & 0xFFFFFF));
7841 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7843 * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
7844 * @ioc: Pointer to MPT_ADAPTER structure
7845 * @log_info: U32 LogInfo word from the IOC
7847 * Refer to lsi/sp_log.h.
7850 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
7852 u32 info = log_info & 0x00FF0000;
7853 char *desc = "unknown";
7857 desc = "bug! MID not found";
7861 desc = "Parity Error";
7865 desc = "ASYNC Outbound Overrun";
7869 desc = "SYNC Offset Error";
7877 desc = "Msg In Overflow";
7885 desc = "Outbound DMA Overrun";
7889 desc = "Task Management";
7893 desc = "Device Problem";
7897 desc = "Invalid Phase Change";
7901 desc = "Untagged Table Size";
7906 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
7909 /* strings for sas loginfo */
7910 static char *originator_str[] = {
7915 static char *iop_code_str[] = {
7917 "Invalid SAS Address", /* 01h */
7919 "Invalid Page", /* 03h */
7920 "Diag Message Error", /* 04h */
7921 "Task Terminated", /* 05h */
7922 "Enclosure Management", /* 06h */
7923 "Target Mode" /* 07h */
7925 static char *pl_code_str[] = {
7927 "Open Failure", /* 01h */
7928 "Invalid Scatter Gather List", /* 02h */
7929 "Wrong Relative Offset or Frame Length", /* 03h */
7930 "Frame Transfer Error", /* 04h */
7931 "Transmit Frame Connected Low", /* 05h */
7932 "SATA Non-NCQ RW Error Bit Set", /* 06h */
7933 "SATA Read Log Receive Data Error", /* 07h */
7934 "SATA NCQ Fail All Commands After Error", /* 08h */
7935 "SATA Error in Receive Set Device Bit FIS", /* 09h */
7936 "Receive Frame Invalid Message", /* 0Ah */
7937 "Receive Context Message Valid Error", /* 0Bh */
7938 "Receive Frame Current Frame Error", /* 0Ch */
7939 "SATA Link Down", /* 0Dh */
7940 "Discovery SATA Init W IOS", /* 0Eh */
7941 "Config Invalid Page", /* 0Fh */
7942 "Discovery SATA Init Timeout", /* 10h */
7945 "IO Not Yet Executed", /* 13h */
7946 "IO Executed", /* 14h */
7947 "Persistent Reservation Out Not Affiliation "
7949 "Open Transmit DMA Abort", /* 16h */
7950 "IO Device Missing Delay Retry", /* 17h */
7951 "IO Cancelled Due to Receive Error", /* 18h */
7959 "Enclosure Management" /* 20h */
7961 static char *ir_code_str[] = {
7962 "Raid Action Error", /* 00h */
7972 static char *raid_sub_code_str[] = {
7974 "Volume Creation Failed: Data Passed too "
7976 "Volume Creation Failed: Duplicate Volumes "
7977 "Attempted", /* 02h */
7978 "Volume Creation Failed: Max Number "
7979 "Supported Volumes Exceeded", /* 03h */
7980 "Volume Creation Failed: DMA Error", /* 04h */
7981 "Volume Creation Failed: Invalid Volume Type", /* 05h */
7982 "Volume Creation Failed: Error Reading "
7983 "MFG Page 4", /* 06h */
7984 "Volume Creation Failed: Creating Internal "
7985 "Structures", /* 07h */
7994 "Activation failed: Already Active Volume", /* 10h */
7995 "Activation failed: Unsupported Volume Type", /* 11h */
7996 "Activation failed: Too Many Active Volumes", /* 12h */
7997 "Activation failed: Volume ID in Use", /* 13h */
7998 "Activation failed: Reported Failure", /* 14h */
7999 "Activation failed: Importing a Volume", /* 15h */
8010 "Phys Disk failed: Too Many Phys Disks", /* 20h */
8011 "Phys Disk failed: Data Passed too Large", /* 21h */
8012 "Phys Disk failed: DMA Error", /* 22h */
8013 "Phys Disk failed: Invalid <channel:id>", /* 23h */
8014 "Phys Disk failed: Creating Phys Disk Config "
8027 "Compatibility Error: IR Disabled", /* 30h */
8028 "Compatibility Error: Inquiry Command Failed", /* 31h */
8029 "Compatibility Error: Device not Direct Access "
8030 "Device ", /* 32h */
8031 "Compatibility Error: Removable Device Found", /* 33h */
8032 "Compatibility Error: Device SCSI Version not "
8033 "2 or Higher", /* 34h */
8034 "Compatibility Error: SATA Device, 48 BIT LBA "
8035 "not Supported", /* 35h */
8036 "Compatibility Error: Device doesn't have "
8037 "512 Byte Block Sizes", /* 36h */
8038 "Compatibility Error: Volume Type Check Failed", /* 37h */
8039 "Compatibility Error: Volume Type is "
8040 "Unsupported by FW", /* 38h */
8041 "Compatibility Error: Disk Drive too Small for "
8042 "use in Volume", /* 39h */
8043 "Compatibility Error: Phys Disk for Create "
8044 "Volume not Found", /* 3Ah */
8045 "Compatibility Error: Too Many or too Few "
8046 "Disks for Volume Type", /* 3Bh */
8047 "Compatibility Error: Disk stripe Sizes "
8048 "Must be 64KB", /* 3Ch */
8049 "Compatibility Error: IME Size Limited to < 2TB", /* 3Dh */
8052 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8054 * mpt_sas_log_info - Log information returned from SAS IOC.
8055 * @ioc: Pointer to MPT_ADAPTER structure
8056 * @log_info: U32 LogInfo reply word from the IOC
8057 * @cb_idx: callback function's handle
8059 * Refer to lsi/mpi_log_sas.h.
8062 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info, u8 cb_idx)
8064 union loginfo_type {
8073 union loginfo_type sas_loginfo;
8074 char *originator_desc = NULL;
8075 char *code_desc = NULL;
8076 char *sub_code_desc = NULL;
8078 sas_loginfo.loginfo = log_info;
8079 if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
8080 (sas_loginfo.dw.originator < ARRAY_SIZE(originator_str)))
8083 originator_desc = originator_str[sas_loginfo.dw.originator];
8085 switch (sas_loginfo.dw.originator) {
8088 if (sas_loginfo.dw.code <
8089 ARRAY_SIZE(iop_code_str))
8090 code_desc = iop_code_str[sas_loginfo.dw.code];
8093 if (sas_loginfo.dw.code <
8094 ARRAY_SIZE(pl_code_str))
8095 code_desc = pl_code_str[sas_loginfo.dw.code];
8098 if (sas_loginfo.dw.code >=
8099 ARRAY_SIZE(ir_code_str))
8101 code_desc = ir_code_str[sas_loginfo.dw.code];
8102 if (sas_loginfo.dw.subcode >=
8103 ARRAY_SIZE(raid_sub_code_str))
8105 if (sas_loginfo.dw.code == 0)
8107 raid_sub_code_str[sas_loginfo.dw.subcode];
8113 if (sub_code_desc != NULL)
8114 printk(MYIOC_s_INFO_FMT
8115 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8116 " SubCode={%s} cb_idx %s\n",
8117 ioc->name, log_info, originator_desc, code_desc,
8118 sub_code_desc, MptCallbacksName[cb_idx]);
8119 else if (code_desc != NULL)
8120 printk(MYIOC_s_INFO_FMT
8121 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
8122 " SubCode(0x%04x) cb_idx %s\n",
8123 ioc->name, log_info, originator_desc, code_desc,
8124 sas_loginfo.dw.subcode, MptCallbacksName[cb_idx]);
8126 printk(MYIOC_s_INFO_FMT
8127 "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
8128 " SubCode(0x%04x) cb_idx %s\n",
8129 ioc->name, log_info, originator_desc,
8130 sas_loginfo.dw.code, sas_loginfo.dw.subcode,
8131 MptCallbacksName[cb_idx]);
8134 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8136 * mpt_iocstatus_info_config - IOCSTATUS information for config pages
8137 * @ioc: Pointer to MPT_ADAPTER structure
8138 * @ioc_status: U32 IOCStatus word from IOC
8139 * @mf: Pointer to MPT request frame
8141 * Refer to lsi/mpi.h.
8144 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8146 Config_t *pReq = (Config_t *)mf;
8147 char extend_desc[EVENT_DESCR_STR_SZ];
8152 if (pReq->Header.PageType == MPI_CONFIG_PAGETYPE_EXTENDED)
8153 page_type = pReq->ExtPageType;
8155 page_type = pReq->Header.PageType;
8158 * ignore invalid page messages for GET_NEXT_HANDLE
8160 form = le32_to_cpu(pReq->PageAddress);
8161 if (ioc_status == MPI_IOCSTATUS_CONFIG_INVALID_PAGE) {
8162 if (page_type == MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE ||
8163 page_type == MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER ||
8164 page_type == MPI_CONFIG_EXTPAGETYPE_ENCLOSURE) {
8165 if ((form >> MPI_SAS_DEVICE_PGAD_FORM_SHIFT) ==
8166 MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE)
8169 if (page_type == MPI_CONFIG_PAGETYPE_FC_DEVICE)
8170 if ((form & MPI_FC_DEVICE_PGAD_FORM_MASK) ==
8171 MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
8175 snprintf(extend_desc, EVENT_DESCR_STR_SZ,
8176 "type=%02Xh, page=%02Xh, action=%02Xh, form=%08Xh",
8177 page_type, pReq->Header.PageNumber, pReq->Action, form);
8179 switch (ioc_status) {
8181 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8182 desc = "Config Page Invalid Action";
8185 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
8186 desc = "Config Page Invalid Type";
8189 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
8190 desc = "Config Page Invalid Page";
8193 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
8194 desc = "Config Page Invalid Data";
8197 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
8198 desc = "Config Page No Defaults";
8201 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
8202 desc = "Config Page Can't Commit";
8209 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
8210 ioc->name, ioc_status, desc, extend_desc));
8214 * mpt_iocstatus_info - IOCSTATUS information returned from IOC.
8215 * @ioc: Pointer to MPT_ADAPTER structure
8216 * @ioc_status: U32 IOCStatus word from IOC
8217 * @mf: Pointer to MPT request frame
8219 * Refer to lsi/mpi.h.
8222 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8224 u32 status = ioc_status & MPI_IOCSTATUS_MASK;
8229 /****************************************************************************/
8230 /* Common IOCStatus values for all replies */
8231 /****************************************************************************/
8233 case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
8234 desc = "Invalid Function";
8237 case MPI_IOCSTATUS_BUSY: /* 0x0002 */
8241 case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
8242 desc = "Invalid SGL";
8245 case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
8246 desc = "Internal Error";
8249 case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
8253 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
8254 desc = "Insufficient Resources";
8257 case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
8258 desc = "Invalid Field";
8261 case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
8262 desc = "Invalid State";
8265 /****************************************************************************/
8266 /* Config IOCStatus values */
8267 /****************************************************************************/
8269 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
8270 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
8271 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
8272 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
8273 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
8274 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
8275 mpt_iocstatus_info_config(ioc, status, mf);
8278 /****************************************************************************/
8279 /* SCSIIO Reply (SPI, FCP, SAS) initiator values */
8281 /* Look at mptscsih_iocstatus_info_scsiio in mptscsih.c */
8283 /****************************************************************************/
8285 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
8286 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
8287 case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
8288 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
8289 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
8290 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
8291 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
8292 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
8293 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
8294 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
8295 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
8296 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
8297 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
8300 /****************************************************************************/
8301 /* SCSI Target values */
8302 /****************************************************************************/
8304 case MPI_IOCSTATUS_TARGET_PRIORITY_IO: /* 0x0060 */
8305 desc = "Target: Priority IO";
8308 case MPI_IOCSTATUS_TARGET_INVALID_PORT: /* 0x0061 */
8309 desc = "Target: Invalid Port";
8312 case MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX: /* 0x0062 */
8313 desc = "Target Invalid IO Index:";
8316 case MPI_IOCSTATUS_TARGET_ABORTED: /* 0x0063 */
8317 desc = "Target: Aborted";
8320 case MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: /* 0x0064 */
8321 desc = "Target: No Conn Retryable";
8324 case MPI_IOCSTATUS_TARGET_NO_CONNECTION: /* 0x0065 */
8325 desc = "Target: No Connection";
8328 case MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: /* 0x006A */
8329 desc = "Target: Transfer Count Mismatch";
8332 case MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT: /* 0x006B */
8333 desc = "Target: STS Data not Sent";
8336 case MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: /* 0x006D */
8337 desc = "Target: Data Offset Error";
8340 case MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: /* 0x006E */
8341 desc = "Target: Too Much Write Data";
8344 case MPI_IOCSTATUS_TARGET_IU_TOO_SHORT: /* 0x006F */
8345 desc = "Target: IU Too Short";
8348 case MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: /* 0x0070 */
8349 desc = "Target: ACK NAK Timeout";
8352 case MPI_IOCSTATUS_TARGET_NAK_RECEIVED: /* 0x0071 */
8353 desc = "Target: Nak Received";
8356 /****************************************************************************/
8357 /* Fibre Channel Direct Access values */
8358 /****************************************************************************/
8360 case MPI_IOCSTATUS_FC_ABORTED: /* 0x0066 */
8361 desc = "FC: Aborted";
8364 case MPI_IOCSTATUS_FC_RX_ID_INVALID: /* 0x0067 */
8365 desc = "FC: RX ID Invalid";
8368 case MPI_IOCSTATUS_FC_DID_INVALID: /* 0x0068 */
8369 desc = "FC: DID Invalid";
8372 case MPI_IOCSTATUS_FC_NODE_LOGGED_OUT: /* 0x0069 */
8373 desc = "FC: Node Logged Out";
8376 case MPI_IOCSTATUS_FC_EXCHANGE_CANCELED: /* 0x006C */
8377 desc = "FC: Exchange Canceled";
8380 /****************************************************************************/
8382 /****************************************************************************/
8384 case MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND: /* 0x0080 */
8385 desc = "LAN: Device not Found";
8388 case MPI_IOCSTATUS_LAN_DEVICE_FAILURE: /* 0x0081 */
8389 desc = "LAN: Device Failure";
8392 case MPI_IOCSTATUS_LAN_TRANSMIT_ERROR: /* 0x0082 */
8393 desc = "LAN: Transmit Error";
8396 case MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED: /* 0x0083 */
8397 desc = "LAN: Transmit Aborted";
8400 case MPI_IOCSTATUS_LAN_RECEIVE_ERROR: /* 0x0084 */
8401 desc = "LAN: Receive Error";
8404 case MPI_IOCSTATUS_LAN_RECEIVE_ABORTED: /* 0x0085 */
8405 desc = "LAN: Receive Aborted";
8408 case MPI_IOCSTATUS_LAN_PARTIAL_PACKET: /* 0x0086 */
8409 desc = "LAN: Partial Packet";
8412 case MPI_IOCSTATUS_LAN_CANCELED: /* 0x0087 */
8413 desc = "LAN: Canceled";
8416 /****************************************************************************/
8417 /* Serial Attached SCSI values */
8418 /****************************************************************************/
8420 case MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED: /* 0x0090 */
8421 desc = "SAS: SMP Request Failed";
8424 case MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN: /* 0x0090 */
8425 desc = "SAS: SMP Data Overrun";
8436 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
8437 ioc->name, status, desc));
8440 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8441 EXPORT_SYMBOL(mpt_attach);
8442 EXPORT_SYMBOL(mpt_detach);
8444 EXPORT_SYMBOL(mpt_resume);
8445 EXPORT_SYMBOL(mpt_suspend);
8447 EXPORT_SYMBOL(ioc_list);
8448 EXPORT_SYMBOL(mpt_register);
8449 EXPORT_SYMBOL(mpt_deregister);
8450 EXPORT_SYMBOL(mpt_event_register);
8451 EXPORT_SYMBOL(mpt_event_deregister);
8452 EXPORT_SYMBOL(mpt_reset_register);
8453 EXPORT_SYMBOL(mpt_reset_deregister);
8454 EXPORT_SYMBOL(mpt_device_driver_register);
8455 EXPORT_SYMBOL(mpt_device_driver_deregister);
8456 EXPORT_SYMBOL(mpt_get_msg_frame);
8457 EXPORT_SYMBOL(mpt_put_msg_frame);
8458 EXPORT_SYMBOL(mpt_put_msg_frame_hi_pri);
8459 EXPORT_SYMBOL(mpt_free_msg_frame);
8460 EXPORT_SYMBOL(mpt_send_handshake_request);
8461 EXPORT_SYMBOL(mpt_verify_adapter);
8462 EXPORT_SYMBOL(mpt_GetIocState);
8463 EXPORT_SYMBOL(mpt_print_ioc_summary);
8464 EXPORT_SYMBOL(mpt_HardResetHandler);
8465 EXPORT_SYMBOL(mpt_config);
8466 EXPORT_SYMBOL(mpt_findImVolumes);
8467 EXPORT_SYMBOL(mpt_alloc_fw_memory);
8468 EXPORT_SYMBOL(mpt_free_fw_memory);
8469 EXPORT_SYMBOL(mptbase_sas_persist_operation);
8470 EXPORT_SYMBOL(mpt_raid_phys_disk_pg0);
8472 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8474 * fusion_init - Fusion MPT base driver initialization routine.
8476 * Returns 0 for success, non-zero for failure.
8483 show_mptmod_ver(my_NAME, my_VERSION);
8484 printk(KERN_INFO COPYRIGHT "\n");
8486 for (cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
8487 MptCallbacks[cb_idx] = NULL;
8488 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
8489 MptEvHandlers[cb_idx] = NULL;
8490 MptResetHandlers[cb_idx] = NULL;
8493 /* Register ourselves (mptbase) in order to facilitate
8494 * EventNotification handling.
8496 mpt_base_index = mpt_register(mptbase_reply, MPTBASE_DRIVER,
8499 /* Register for hard reset handling callbacks.
8501 mpt_reset_register(mpt_base_index, mpt_ioc_reset);
8503 #ifdef CONFIG_PROC_FS
8504 (void) procmpt_create();
8509 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
8511 * fusion_exit - Perform driver unload cleanup.
8513 * This routine frees all resources associated with each MPT adapter
8514 * and removes all %MPT_PROCFS_MPTBASEDIR entries.
8520 mpt_reset_deregister(mpt_base_index);
8522 #ifdef CONFIG_PROC_FS
8527 module_init(fusion_init);
8528 module_exit(fusion_exit);