1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2010 - Maxim Levitsky
4 * driver for Ricoh memstick readers
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/freezer.h>
10 #include <linux/jiffies.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/pci_ids.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/kthread.h>
17 #include <linux/sched.h>
18 #include <linux/highmem.h>
19 #include <asm/byteorder.h>
20 #include <linux/swab.h>
23 static bool r592_enable_dma = 1;
26 static const char *tpc_names[] = {
27 "MS_TPC_READ_MG_STATUS",
28 "MS_TPC_READ_LONG_DATA",
29 "MS_TPC_READ_SHORT_DATA",
31 "MS_TPC_READ_QUAD_DATA",
34 "MS_TPC_SET_RW_REG_ADRS",
36 "MS_TPC_WRITE_QUAD_DATA",
38 "MS_TPC_WRITE_SHORT_DATA",
39 "MS_TPC_WRITE_LONG_DATA",
44 * memstick_debug_get_tpc_name - debug helper that returns string for
47 static __maybe_unused const char *memstick_debug_get_tpc_name(int tpc)
49 return tpc_names[tpc-1];
53 static inline u32 r592_read_reg(struct r592_device *dev, int address)
55 u32 value = readl(dev->mmio + address);
56 dbg_reg("reg #%02d == 0x%08x", address, value);
60 /* Write a register */
61 static inline void r592_write_reg(struct r592_device *dev,
62 int address, u32 value)
64 dbg_reg("reg #%02d <- 0x%08x", address, value);
65 writel(value, dev->mmio + address);
68 /* Reads a big endian DWORD register */
69 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
71 u32 value = __raw_readl(dev->mmio + address);
72 dbg_reg("reg #%02d == 0x%08x", address, value);
73 return be32_to_cpu(value);
76 /* Writes a big endian DWORD register */
77 static inline void r592_write_reg_raw_be(struct r592_device *dev,
78 int address, u32 value)
80 dbg_reg("reg #%02d <- 0x%08x", address, value);
81 __raw_writel(cpu_to_be32(value), dev->mmio + address);
84 /* Set specific bits in a register (little endian) */
85 static inline void r592_set_reg_mask(struct r592_device *dev,
86 int address, u32 mask)
88 u32 reg = readl(dev->mmio + address);
89 dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
90 writel(reg | mask , dev->mmio + address);
93 /* Clear specific bits in a register (little endian) */
94 static inline void r592_clear_reg_mask(struct r592_device *dev,
95 int address, u32 mask)
97 u32 reg = readl(dev->mmio + address);
98 dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
99 address, ~mask, reg, mask);
100 writel(reg & ~mask, dev->mmio + address);
104 /* Wait for status bits while checking for errors */
105 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
107 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
108 u32 reg = r592_read_reg(dev, R592_STATUS);
110 if ((reg & mask) == wanted_mask)
113 while (time_before(jiffies, timeout)) {
115 reg = r592_read_reg(dev, R592_STATUS);
117 if ((reg & mask) == wanted_mask)
120 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
129 /* Enable/disable device */
130 static int r592_enable_device(struct r592_device *dev, bool enable)
132 dbg("%sabling the device", enable ? "en" : "dis");
136 /* Power up the card */
137 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
139 /* Perform a reset */
140 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
144 /* Power down the card */
145 r592_write_reg(dev, R592_POWER, 0);
150 /* Set serial/parallel mode */
151 static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
153 if (!parallel_mode) {
154 dbg("switching to serial mode");
156 /* Set serial mode */
157 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
159 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
162 dbg("switching to parallel mode");
164 /* This setting should be set _before_ switch TPC */
165 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
167 r592_clear_reg_mask(dev, R592_IO,
168 R592_IO_SERIAL1 | R592_IO_SERIAL2);
170 /* Set the parallel mode now */
171 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
174 dev->parallel_mode = parallel_mode;
178 /* Perform a controller reset without powering down the card */
179 static void r592_host_reset(struct r592_device *dev)
181 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
183 r592_set_mode(dev, dev->parallel_mode);
186 #ifdef CONFIG_PM_SLEEP
187 /* Disable all hardware interrupts */
188 static void r592_clear_interrupts(struct r592_device *dev)
190 /* Disable & ACK all interrupts */
191 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
192 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
196 /* Tests if there is an CRC error */
197 static int r592_test_io_error(struct r592_device *dev)
199 if (!(r592_read_reg(dev, R592_STATUS) &
200 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
206 /* Ensure that FIFO is ready for use */
207 static int r592_test_fifo_empty(struct r592_device *dev)
209 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
212 dbg("FIFO not ready, trying to reset the device");
213 r592_host_reset(dev);
215 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
218 message("FIFO still not ready, giving up");
222 /* Activates the DMA transfer from to FIFO */
223 static void r592_start_dma(struct r592_device *dev, bool is_write)
227 spin_lock_irqsave(&dev->irq_lock, flags);
229 /* Ack interrupts (just in case) + enable them */
230 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
231 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
233 /* Set DMA address */
234 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
237 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
238 reg |= R592_FIFO_DMA_SETTINGS_EN;
241 reg |= R592_FIFO_DMA_SETTINGS_DIR;
243 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
244 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
246 spin_unlock_irqrestore(&dev->irq_lock, flags);
249 /* Cleanups DMA related settings */
250 static void r592_stop_dma(struct r592_device *dev, int error)
252 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
253 R592_FIFO_DMA_SETTINGS_EN);
255 /* This is only a precation */
256 r592_write_reg(dev, R592_FIFO_DMA,
257 dev->dummy_dma_page_physical_address);
259 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
260 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
261 dev->dma_error = error;
264 /* Test if hardware supports DMA */
265 static void r592_check_dma(struct r592_device *dev)
267 dev->dma_capable = r592_enable_dma &&
268 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
269 R592_FIFO_DMA_SETTINGS_CAP);
272 /* Transfers fifo contents in/out using DMA */
273 static int r592_transfer_fifo_dma(struct r592_device *dev)
278 if (!dev->dma_capable || !dev->req->long_data)
281 len = dev->req->sg.length;
282 is_write = dev->req->data_dir == WRITE;
284 if (len != R592_LFIFO_SIZE)
287 dbg_verbose("doing dma transfer");
290 reinit_completion(&dev->dma_done);
292 /* TODO: hidden assumption about nenth beeing always 1 */
293 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
294 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
296 if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) {
297 message("problem in dma_map_sg");
301 r592_start_dma(dev, is_write);
303 /* Wait for DMA completion */
304 if (!wait_for_completion_timeout(
305 &dev->dma_done, msecs_to_jiffies(1000))) {
306 message("DMA timeout");
307 r592_stop_dma(dev, -ETIMEDOUT);
310 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
311 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
314 return dev->dma_error;
318 * Writes the FIFO in 4 byte chunks.
319 * If length isn't 4 byte aligned, rest of the data if put to a fifo
320 * to be written later
321 * Use r592_flush_fifo_write to flush that fifo when writing for the
324 static void r592_write_fifo_pio(struct r592_device *dev,
325 unsigned char *buffer, int len)
327 /* flush spill from former write */
328 if (!kfifo_is_empty(&dev->pio_fifo)) {
331 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
333 if (!kfifo_is_full(&dev->pio_fifo))
338 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
339 WARN_ON(copy_len != 4);
340 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
343 WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
345 /* write full dwords */
347 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
352 /* put remaining bytes to the spill */
354 kfifo_in(&dev->pio_fifo, buffer, len);
357 /* Flushes the temporary FIFO used to make aligned DWORD writes */
358 static void r592_flush_fifo_write(struct r592_device *dev)
360 u8 buffer[4] = { 0 };
363 if (kfifo_is_empty(&dev->pio_fifo))
366 len = kfifo_out(&dev->pio_fifo, buffer, 4);
367 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
371 * Read a fifo in 4 bytes chunks.
372 * If input doesn't fit the buffer, it places bytes of last dword in spill
373 * buffer, so that they don't get lost on last read, just throw these away.
375 static void r592_read_fifo_pio(struct r592_device *dev,
376 unsigned char *buffer, int len)
380 /* Read from last spill */
381 if (!kfifo_is_empty(&dev->pio_fifo)) {
383 kfifo_out(&dev->pio_fifo, buffer, min(4, len));
384 buffer += bytes_copied;
387 if (!kfifo_is_empty(&dev->pio_fifo))
391 /* Reads dwords from FIFO */
393 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
399 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
400 kfifo_in(&dev->pio_fifo, tmp, 4);
401 len -= kfifo_out(&dev->pio_fifo, buffer, len);
408 /* Transfers actual data using PIO. */
409 static int r592_transfer_fifo_pio(struct r592_device *dev)
413 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
414 struct sg_mapping_iter miter;
416 kfifo_reset(&dev->pio_fifo);
418 if (!dev->req->long_data) {
420 r592_write_fifo_pio(dev, dev->req->data,
422 r592_flush_fifo_write(dev);
424 r592_read_fifo_pio(dev, dev->req->data,
429 local_irq_save(flags);
430 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
431 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
433 /* Do the transfer fifo<->memory*/
434 while (sg_miter_next(&miter))
436 r592_write_fifo_pio(dev, miter.addr, miter.length);
438 r592_read_fifo_pio(dev, miter.addr, miter.length);
441 /* Write last few non aligned bytes*/
443 r592_flush_fifo_write(dev);
445 sg_miter_stop(&miter);
446 local_irq_restore(flags);
450 /* Executes one TPC (data is read/written from small or large fifo) */
451 static void r592_execute_tpc(struct r592_device *dev)
458 message("BUG: tpc execution without request!");
462 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
463 len = dev->req->long_data ?
464 dev->req->sg.length : dev->req->data_len;
466 /* Ensure that FIFO can hold the input data */
467 if (len > R592_LFIFO_SIZE) {
468 message("IO: hardware doesn't support TPCs longer that 512");
473 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
474 dbg("IO: refusing to send TPC because card is absent");
479 dbg("IO: executing %s LEN=%d",
480 memstick_debug_get_tpc_name(dev->req->tpc), len);
482 /* Set IO direction */
484 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
486 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
489 error = r592_test_fifo_empty(dev);
493 /* Transfer write data */
495 error = r592_transfer_fifo_dma(dev);
496 if (error == -EINVAL)
497 error = r592_transfer_fifo_pio(dev);
503 /* Trigger the TPC */
504 reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
505 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
506 R592_TPC_EXEC_BIG_FIFO;
508 r592_write_reg(dev, R592_TPC_EXEC, reg);
510 /* Wait for TPC completion */
511 status = R592_STATUS_RDY;
512 if (dev->req->need_card_int)
513 status |= R592_STATUS_CED;
515 error = r592_wait_status(dev, status, status);
517 message("card didn't respond");
522 error = r592_test_io_error(dev);
528 /* Read data from FIFO */
530 error = r592_transfer_fifo_dma(dev);
531 if (error == -EINVAL)
532 error = r592_transfer_fifo_pio(dev);
535 /* read INT reg. This can be shortened with shifts, but that way
537 if (dev->parallel_mode && dev->req->need_card_int) {
539 dev->req->int_reg = 0;
540 status = r592_read_reg(dev, R592_STATUS);
542 if (status & R592_STATUS_P_CMDNACK)
543 dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
544 if (status & R592_STATUS_P_BREQ)
545 dev->req->int_reg |= MEMSTICK_INT_BREQ;
546 if (status & R592_STATUS_P_INTERR)
547 dev->req->int_reg |= MEMSTICK_INT_ERR;
548 if (status & R592_STATUS_P_CED)
549 dev->req->int_reg |= MEMSTICK_INT_CED;
553 dbg("FIFO read error");
555 dev->req->error = error;
556 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
560 /* Main request processing thread */
561 static int r592_process_thread(void *data)
564 struct r592_device *dev = (struct r592_device *)data;
567 while (!kthread_should_stop()) {
568 spin_lock_irqsave(&dev->io_thread_lock, flags);
569 set_current_state(TASK_INTERRUPTIBLE);
570 error = memstick_next_req(dev->host, &dev->req);
571 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
574 if (error == -ENXIO || error == -EAGAIN) {
575 dbg_verbose("IO: done IO, sleeping");
577 dbg("IO: unknown error from "
578 "memstick_next_req %d", error);
581 if (kthread_should_stop())
582 set_current_state(TASK_RUNNING);
586 set_current_state(TASK_RUNNING);
587 r592_execute_tpc(dev);
593 /* Reprogram chip to detect change in card state */
594 /* eg, if card is detected, arm it to detect removal, and vice versa */
595 static void r592_update_card_detect(struct r592_device *dev)
597 u32 reg = r592_read_reg(dev, R592_REG_MSC);
598 bool card_detected = reg & R592_REG_MSC_PRSNT;
600 dbg("update card detect. card state: %s", card_detected ?
601 "present" : "absent");
603 reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
606 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
608 reg |= (R592_REG_MSC_IRQ_INSERT << 16);
610 r592_write_reg(dev, R592_REG_MSC, reg);
613 /* Timer routine that fires 1 second after last card detection event, */
614 static void r592_detect_timer(struct timer_list *t)
616 struct r592_device *dev = from_timer(dev, t, detect_timer);
617 r592_update_card_detect(dev);
618 memstick_detect_change(dev->host);
621 /* Interrupt handler */
622 static irqreturn_t r592_irq(int irq, void *data)
624 struct r592_device *dev = (struct r592_device *)data;
625 irqreturn_t ret = IRQ_NONE;
627 u16 irq_enable, irq_status;
631 spin_lock_irqsave(&dev->irq_lock, flags);
633 reg = r592_read_reg(dev, R592_REG_MSC);
634 irq_enable = reg >> 16;
635 irq_status = reg & 0xFFFF;
637 /* Ack the interrupts */
639 r592_write_reg(dev, R592_REG_MSC, reg);
641 /* Get the IRQ status minus bits that aren't enabled */
642 irq_status &= (irq_enable);
644 /* Due to limitation of memstick core, we don't look at bits that
645 indicate that card was removed/inserted and/or present */
646 if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
648 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
651 message("IRQ: card %s", card_was_added ? "added" : "removed");
653 mod_timer(&dev->detect_timer,
654 jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
658 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
661 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
662 message("IRQ: DMA error");
665 dbg_verbose("IRQ: dma done");
669 r592_stop_dma(dev, error);
670 complete(&dev->dma_done);
673 spin_unlock_irqrestore(&dev->irq_lock, flags);
677 /* External inteface: set settings */
678 static int r592_set_param(struct memstick_host *host,
679 enum memstick_param param, int value)
681 struct r592_device *dev = memstick_priv(host);
686 case MEMSTICK_POWER_ON:
687 return r592_enable_device(dev, true);
688 case MEMSTICK_POWER_OFF:
689 return r592_enable_device(dev, false);
693 case MEMSTICK_INTERFACE:
695 case MEMSTICK_SERIAL:
696 return r592_set_mode(dev, 0);
698 return r592_set_mode(dev, 1);
707 /* External interface: submit requests */
708 static void r592_submit_req(struct memstick_host *host)
710 struct r592_device *dev = memstick_priv(host);
716 spin_lock_irqsave(&dev->io_thread_lock, flags);
717 if (wake_up_process(dev->io_thread))
718 dbg_verbose("IO thread woken to process requests");
719 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
722 static const struct pci_device_id r592_pci_id_tbl[] = {
724 { PCI_VDEVICE(RICOH, 0x0592), },
729 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
732 struct memstick_host *host;
733 struct r592_device *dev;
735 /* Allocate memory */
736 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
740 dev = memstick_priv(host);
743 pci_set_drvdata(pdev, dev);
745 /* pci initialization */
746 error = pci_enable_device(pdev);
750 pci_set_master(pdev);
751 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
755 error = pci_request_regions(pdev, DRV_NAME);
759 dev->mmio = pci_ioremap_bar(pdev, 0);
765 dev->irq = pdev->irq;
766 spin_lock_init(&dev->irq_lock);
767 spin_lock_init(&dev->io_thread_lock);
768 init_completion(&dev->dma_done);
769 INIT_KFIFO(dev->pio_fifo);
770 timer_setup(&dev->detect_timer, r592_detect_timer, 0);
772 /* Host initialization */
773 host->caps = MEMSTICK_CAP_PAR4;
774 host->request = r592_submit_req;
775 host->set_param = r592_set_param;
778 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
779 if (IS_ERR(dev->io_thread)) {
780 error = PTR_ERR(dev->io_thread);
784 /* This is just a precation, so don't fail */
785 dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
786 &dev->dummy_dma_page_physical_address, GFP_KERNEL);
787 r592_stop_dma(dev , 0);
789 error = request_irq(dev->irq, &r592_irq, IRQF_SHARED,
794 r592_update_card_detect(dev);
795 error = memstick_add_host(host);
799 message("driver successfully loaded");
802 free_irq(dev->irq, dev);
804 if (dev->dummy_dma_page)
805 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
806 dev->dummy_dma_page_physical_address);
808 kthread_stop(dev->io_thread);
812 pci_release_regions(pdev);
814 pci_disable_device(pdev);
816 memstick_free_host(host);
821 static void r592_remove(struct pci_dev *pdev)
824 struct r592_device *dev = pci_get_drvdata(pdev);
826 /* Stop the processing thread.
827 That ensures that we won't take any more requests */
828 kthread_stop(dev->io_thread);
829 del_timer_sync(&dev->detect_timer);
830 r592_enable_device(dev, false);
832 while (!error && dev->req) {
833 dev->req->error = -ETIME;
834 error = memstick_next_req(dev->host, &dev->req);
836 memstick_remove_host(dev->host);
838 if (dev->dummy_dma_page)
839 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
840 dev->dummy_dma_page_physical_address);
842 free_irq(dev->irq, dev);
844 pci_release_regions(pdev);
845 pci_disable_device(pdev);
846 memstick_free_host(dev->host);
849 #ifdef CONFIG_PM_SLEEP
850 static int r592_suspend(struct device *core_dev)
852 struct r592_device *dev = dev_get_drvdata(core_dev);
854 r592_clear_interrupts(dev);
855 memstick_suspend_host(dev->host);
856 del_timer_sync(&dev->detect_timer);
860 static int r592_resume(struct device *core_dev)
862 struct r592_device *dev = dev_get_drvdata(core_dev);
864 r592_clear_interrupts(dev);
865 r592_enable_device(dev, false);
866 memstick_resume_host(dev->host);
867 r592_update_card_detect(dev);
872 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
874 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
876 static struct pci_driver r852_pci_driver = {
878 .id_table = r592_pci_id_tbl,
880 .remove = r592_remove,
881 .driver.pm = &r592_pm_ops,
884 module_pci_driver(r852_pci_driver);
886 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
887 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
888 module_param(debug, int, S_IRUGO | S_IWUSR);
889 MODULE_PARM_DESC(debug, "Debug level (0-3)");
891 MODULE_LICENSE("GPL");
892 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
893 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");