GNU Linux-libre 5.10.215-gnu1
[releases.git] / drivers / memstick / host / r592.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2010 - Maxim Levitsky
4  * driver for Ricoh memstick readers
5  */
6
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/freezer.h>
10 #include <linux/jiffies.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/pci_ids.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/kthread.h>
17 #include <linux/sched.h>
18 #include <linux/highmem.h>
19 #include <asm/byteorder.h>
20 #include <linux/swab.h>
21 #include "r592.h"
22
23 static bool r592_enable_dma = 1;
24 static int debug;
25
26 static const char *tpc_names[] = {
27         "MS_TPC_READ_MG_STATUS",
28         "MS_TPC_READ_LONG_DATA",
29         "MS_TPC_READ_SHORT_DATA",
30         "MS_TPC_READ_REG",
31         "MS_TPC_READ_QUAD_DATA",
32         "INVALID",
33         "MS_TPC_GET_INT",
34         "MS_TPC_SET_RW_REG_ADRS",
35         "MS_TPC_EX_SET_CMD",
36         "MS_TPC_WRITE_QUAD_DATA",
37         "MS_TPC_WRITE_REG",
38         "MS_TPC_WRITE_SHORT_DATA",
39         "MS_TPC_WRITE_LONG_DATA",
40         "MS_TPC_SET_CMD",
41 };
42
43 /**
44  * memstick_debug_get_tpc_name - debug helper that returns string for
45  * a TPC number
46  */
47 static __maybe_unused const char *memstick_debug_get_tpc_name(int tpc)
48 {
49         return tpc_names[tpc-1];
50 }
51
52 /* Read a register*/
53 static inline u32 r592_read_reg(struct r592_device *dev, int address)
54 {
55         u32 value = readl(dev->mmio + address);
56         dbg_reg("reg #%02d == 0x%08x", address, value);
57         return value;
58 }
59
60 /* Write a register */
61 static inline void r592_write_reg(struct r592_device *dev,
62                                                         int address, u32 value)
63 {
64         dbg_reg("reg #%02d <- 0x%08x", address, value);
65         writel(value, dev->mmio + address);
66 }
67
68 /* Reads a big endian DWORD register */
69 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
70 {
71         u32 value = __raw_readl(dev->mmio + address);
72         dbg_reg("reg #%02d == 0x%08x", address, value);
73         return be32_to_cpu(value);
74 }
75
76 /* Writes a big endian DWORD register */
77 static inline void r592_write_reg_raw_be(struct r592_device *dev,
78                                                         int address, u32 value)
79 {
80         dbg_reg("reg #%02d <- 0x%08x", address, value);
81         __raw_writel(cpu_to_be32(value), dev->mmio + address);
82 }
83
84 /* Set specific bits in a register (little endian) */
85 static inline void r592_set_reg_mask(struct r592_device *dev,
86                                                         int address, u32 mask)
87 {
88         u32 reg = readl(dev->mmio + address);
89         dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
90         writel(reg | mask , dev->mmio + address);
91 }
92
93 /* Clear specific bits in a register (little endian) */
94 static inline void r592_clear_reg_mask(struct r592_device *dev,
95                                                 int address, u32 mask)
96 {
97         u32 reg = readl(dev->mmio + address);
98         dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
99                                                 address, ~mask, reg, mask);
100         writel(reg & ~mask, dev->mmio + address);
101 }
102
103
104 /* Wait for status bits while checking for errors */
105 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
106 {
107         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
108         u32 reg = r592_read_reg(dev, R592_STATUS);
109
110         if ((reg & mask) == wanted_mask)
111                 return 0;
112
113         while (time_before(jiffies, timeout)) {
114
115                 reg = r592_read_reg(dev, R592_STATUS);
116
117                 if ((reg & mask) == wanted_mask)
118                         return 0;
119
120                 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
121                         return -EIO;
122
123                 cpu_relax();
124         }
125         return -ETIME;
126 }
127
128
129 /* Enable/disable device */
130 static int r592_enable_device(struct r592_device *dev, bool enable)
131 {
132         dbg("%sabling the device", enable ? "en" : "dis");
133
134         if (enable) {
135
136                 /* Power up the card */
137                 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
138
139                 /* Perform a reset */
140                 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
141
142                 msleep(100);
143         } else
144                 /* Power down the card */
145                 r592_write_reg(dev, R592_POWER, 0);
146
147         return 0;
148 }
149
150 /* Set serial/parallel mode */
151 static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
152 {
153         if (!parallel_mode) {
154                 dbg("switching to serial mode");
155
156                 /* Set serial mode */
157                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
158
159                 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
160
161         } else {
162                 dbg("switching to parallel mode");
163
164                 /* This setting should be set _before_ switch TPC */
165                 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
166
167                 r592_clear_reg_mask(dev, R592_IO,
168                         R592_IO_SERIAL1 | R592_IO_SERIAL2);
169
170                 /* Set the parallel mode now */
171                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
172         }
173
174         dev->parallel_mode = parallel_mode;
175         return 0;
176 }
177
178 /* Perform a controller reset without powering down the card */
179 static void r592_host_reset(struct r592_device *dev)
180 {
181         r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
182         msleep(100);
183         r592_set_mode(dev, dev->parallel_mode);
184 }
185
186 #ifdef CONFIG_PM_SLEEP
187 /* Disable all hardware interrupts */
188 static void r592_clear_interrupts(struct r592_device *dev)
189 {
190         /* Disable & ACK all interrupts */
191         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
192         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
193 }
194 #endif
195
196 /* Tests if there is an CRC error */
197 static int r592_test_io_error(struct r592_device *dev)
198 {
199         if (!(r592_read_reg(dev, R592_STATUS) &
200                 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
201                 return 0;
202
203         return -EIO;
204 }
205
206 /* Ensure that FIFO is ready for use */
207 static int r592_test_fifo_empty(struct r592_device *dev)
208 {
209         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
210                 return 0;
211
212         dbg("FIFO not ready, trying to reset the device");
213         r592_host_reset(dev);
214
215         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
216                 return 0;
217
218         message("FIFO still not ready, giving up");
219         return -EIO;
220 }
221
222 /* Activates the DMA transfer from to FIFO */
223 static void r592_start_dma(struct r592_device *dev, bool is_write)
224 {
225         unsigned long flags;
226         u32 reg;
227         spin_lock_irqsave(&dev->irq_lock, flags);
228
229         /* Ack interrupts (just in case) + enable them */
230         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
231         r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
232
233         /* Set DMA address */
234         r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
235
236         /* Enable the DMA */
237         reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
238         reg |= R592_FIFO_DMA_SETTINGS_EN;
239
240         if (!is_write)
241                 reg |= R592_FIFO_DMA_SETTINGS_DIR;
242         else
243                 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
244         r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
245
246         spin_unlock_irqrestore(&dev->irq_lock, flags);
247 }
248
249 /* Cleanups DMA related settings */
250 static void r592_stop_dma(struct r592_device *dev, int error)
251 {
252         r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
253                 R592_FIFO_DMA_SETTINGS_EN);
254
255         /* This is only a precation */
256         r592_write_reg(dev, R592_FIFO_DMA,
257                         dev->dummy_dma_page_physical_address);
258
259         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
260         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
261         dev->dma_error = error;
262 }
263
264 /* Test if hardware supports DMA */
265 static void r592_check_dma(struct r592_device *dev)
266 {
267         dev->dma_capable = r592_enable_dma &&
268                 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
269                         R592_FIFO_DMA_SETTINGS_CAP);
270 }
271
272 /* Transfers fifo contents in/out using DMA */
273 static int r592_transfer_fifo_dma(struct r592_device *dev)
274 {
275         int len, sg_count;
276         bool is_write;
277
278         if (!dev->dma_capable || !dev->req->long_data)
279                 return -EINVAL;
280
281         len = dev->req->sg.length;
282         is_write = dev->req->data_dir == WRITE;
283
284         if (len != R592_LFIFO_SIZE)
285                 return -EINVAL;
286
287         dbg_verbose("doing dma transfer");
288
289         dev->dma_error = 0;
290         reinit_completion(&dev->dma_done);
291
292         /* TODO: hidden assumption about nenth beeing always 1 */
293         sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
294                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
295
296         if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) {
297                 message("problem in dma_map_sg");
298                 return -EIO;
299         }
300
301         r592_start_dma(dev, is_write);
302
303         /* Wait for DMA completion */
304         if (!wait_for_completion_timeout(
305                         &dev->dma_done, msecs_to_jiffies(1000))) {
306                 message("DMA timeout");
307                 r592_stop_dma(dev, -ETIMEDOUT);
308         }
309
310         dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
311                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
312
313
314         return dev->dma_error;
315 }
316
317 /*
318  * Writes the FIFO in 4 byte chunks.
319  * If length isn't 4 byte aligned, rest of the data if put to a fifo
320  * to be written later
321  * Use r592_flush_fifo_write to flush that fifo when writing for the
322  * last time
323  */
324 static void r592_write_fifo_pio(struct r592_device *dev,
325                                         unsigned char *buffer, int len)
326 {
327         /* flush spill from former write */
328         if (!kfifo_is_empty(&dev->pio_fifo)) {
329
330                 u8 tmp[4] = {0};
331                 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
332
333                 if (!kfifo_is_full(&dev->pio_fifo))
334                         return;
335                 len -= copy_len;
336                 buffer += copy_len;
337
338                 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
339                 WARN_ON(copy_len != 4);
340                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
341         }
342
343         WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
344
345         /* write full dwords */
346         while (len >= 4) {
347                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
348                 buffer += 4;
349                 len -= 4;
350         }
351
352         /* put remaining bytes to the spill */
353         if (len)
354                 kfifo_in(&dev->pio_fifo, buffer, len);
355 }
356
357 /* Flushes the temporary FIFO used to make aligned DWORD writes */
358 static void r592_flush_fifo_write(struct r592_device *dev)
359 {
360         u8 buffer[4] = { 0 };
361         int len;
362
363         if (kfifo_is_empty(&dev->pio_fifo))
364                 return;
365
366         len = kfifo_out(&dev->pio_fifo, buffer, 4);
367         r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
368 }
369
370 /*
371  * Read a fifo in 4 bytes chunks.
372  * If input doesn't fit the buffer, it places bytes of last dword in spill
373  * buffer, so that they don't get lost on last read, just throw these away.
374  */
375 static void r592_read_fifo_pio(struct r592_device *dev,
376                                                 unsigned char *buffer, int len)
377 {
378         u8 tmp[4];
379
380         /* Read from last spill */
381         if (!kfifo_is_empty(&dev->pio_fifo)) {
382                 int bytes_copied =
383                         kfifo_out(&dev->pio_fifo, buffer, min(4, len));
384                 buffer += bytes_copied;
385                 len -= bytes_copied;
386
387                 if (!kfifo_is_empty(&dev->pio_fifo))
388                         return;
389         }
390
391         /* Reads dwords from FIFO */
392         while (len >= 4) {
393                 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
394                 buffer += 4;
395                 len -= 4;
396         }
397
398         if (len) {
399                 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
400                 kfifo_in(&dev->pio_fifo, tmp, 4);
401                 len -= kfifo_out(&dev->pio_fifo, buffer, len);
402         }
403
404         WARN_ON(len);
405         return;
406 }
407
408 /* Transfers actual data using PIO. */
409 static int r592_transfer_fifo_pio(struct r592_device *dev)
410 {
411         unsigned long flags;
412
413         bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
414         struct sg_mapping_iter miter;
415
416         kfifo_reset(&dev->pio_fifo);
417
418         if (!dev->req->long_data) {
419                 if (is_write) {
420                         r592_write_fifo_pio(dev, dev->req->data,
421                                                         dev->req->data_len);
422                         r592_flush_fifo_write(dev);
423                 } else
424                         r592_read_fifo_pio(dev, dev->req->data,
425                                                         dev->req->data_len);
426                 return 0;
427         }
428
429         local_irq_save(flags);
430         sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
431                 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
432
433         /* Do the transfer fifo<->memory*/
434         while (sg_miter_next(&miter))
435                 if (is_write)
436                         r592_write_fifo_pio(dev, miter.addr, miter.length);
437                 else
438                         r592_read_fifo_pio(dev, miter.addr, miter.length);
439
440
441         /* Write last few non aligned bytes*/
442         if (is_write)
443                 r592_flush_fifo_write(dev);
444
445         sg_miter_stop(&miter);
446         local_irq_restore(flags);
447         return 0;
448 }
449
450 /* Executes one TPC (data is read/written from small or large fifo) */
451 static void r592_execute_tpc(struct r592_device *dev)
452 {
453         bool is_write;
454         int len, error;
455         u32 status, reg;
456
457         if (!dev->req) {
458                 message("BUG: tpc execution without request!");
459                 return;
460         }
461
462         is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
463         len = dev->req->long_data ?
464                 dev->req->sg.length : dev->req->data_len;
465
466         /* Ensure that FIFO can hold the input data */
467         if (len > R592_LFIFO_SIZE) {
468                 message("IO: hardware doesn't support TPCs longer that 512");
469                 error = -ENOSYS;
470                 goto out;
471         }
472
473         if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
474                 dbg("IO: refusing to send TPC because card is absent");
475                 error = -ENODEV;
476                 goto out;
477         }
478
479         dbg("IO: executing %s LEN=%d",
480                         memstick_debug_get_tpc_name(dev->req->tpc), len);
481
482         /* Set IO direction */
483         if (is_write)
484                 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
485         else
486                 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
487
488
489         error = r592_test_fifo_empty(dev);
490         if (error)
491                 goto out;
492
493         /* Transfer write data */
494         if (is_write) {
495                 error = r592_transfer_fifo_dma(dev);
496                 if (error == -EINVAL)
497                         error = r592_transfer_fifo_pio(dev);
498         }
499
500         if (error)
501                 goto out;
502
503         /* Trigger the TPC */
504         reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
505                 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
506                         R592_TPC_EXEC_BIG_FIFO;
507
508         r592_write_reg(dev, R592_TPC_EXEC, reg);
509
510         /* Wait for TPC completion */
511         status = R592_STATUS_RDY;
512         if (dev->req->need_card_int)
513                 status |= R592_STATUS_CED;
514
515         error = r592_wait_status(dev, status, status);
516         if (error) {
517                 message("card didn't respond");
518                 goto out;
519         }
520
521         /* Test IO errors */
522         error = r592_test_io_error(dev);
523         if (error) {
524                 dbg("IO error");
525                 goto out;
526         }
527
528         /* Read data from FIFO */
529         if (!is_write) {
530                 error = r592_transfer_fifo_dma(dev);
531                 if (error == -EINVAL)
532                         error = r592_transfer_fifo_pio(dev);
533         }
534
535         /* read INT reg. This can be shortened with shifts, but that way
536                 its more readable */
537         if (dev->parallel_mode && dev->req->need_card_int) {
538
539                 dev->req->int_reg = 0;
540                 status = r592_read_reg(dev, R592_STATUS);
541
542                 if (status & R592_STATUS_P_CMDNACK)
543                         dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
544                 if (status & R592_STATUS_P_BREQ)
545                         dev->req->int_reg |= MEMSTICK_INT_BREQ;
546                 if (status & R592_STATUS_P_INTERR)
547                         dev->req->int_reg |= MEMSTICK_INT_ERR;
548                 if (status & R592_STATUS_P_CED)
549                         dev->req->int_reg |= MEMSTICK_INT_CED;
550         }
551
552         if (error)
553                 dbg("FIFO read error");
554 out:
555         dev->req->error = error;
556         r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
557         return;
558 }
559
560 /* Main request processing thread */
561 static int r592_process_thread(void *data)
562 {
563         int error;
564         struct r592_device *dev = (struct r592_device *)data;
565         unsigned long flags;
566
567         while (!kthread_should_stop()) {
568                 spin_lock_irqsave(&dev->io_thread_lock, flags);
569                 set_current_state(TASK_INTERRUPTIBLE);
570                 error = memstick_next_req(dev->host, &dev->req);
571                 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
572
573                 if (error) {
574                         if (error == -ENXIO || error == -EAGAIN) {
575                                 dbg_verbose("IO: done IO, sleeping");
576                         } else {
577                                 dbg("IO: unknown error from "
578                                         "memstick_next_req %d", error);
579                         }
580
581                         if (kthread_should_stop())
582                                 set_current_state(TASK_RUNNING);
583
584                         schedule();
585                 } else {
586                         set_current_state(TASK_RUNNING);
587                         r592_execute_tpc(dev);
588                 }
589         }
590         return 0;
591 }
592
593 /* Reprogram chip to detect change in card state */
594 /* eg, if card is detected, arm it to detect removal, and vice versa */
595 static void r592_update_card_detect(struct r592_device *dev)
596 {
597         u32 reg = r592_read_reg(dev, R592_REG_MSC);
598         bool card_detected = reg & R592_REG_MSC_PRSNT;
599
600         dbg("update card detect. card state: %s", card_detected ?
601                 "present" : "absent");
602
603         reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
604
605         if (card_detected)
606                 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
607         else
608                 reg |= (R592_REG_MSC_IRQ_INSERT << 16);
609
610         r592_write_reg(dev, R592_REG_MSC, reg);
611 }
612
613 /* Timer routine that fires 1 second after last card detection event, */
614 static void r592_detect_timer(struct timer_list *t)
615 {
616         struct r592_device *dev = from_timer(dev, t, detect_timer);
617         r592_update_card_detect(dev);
618         memstick_detect_change(dev->host);
619 }
620
621 /* Interrupt handler */
622 static irqreturn_t r592_irq(int irq, void *data)
623 {
624         struct r592_device *dev = (struct r592_device *)data;
625         irqreturn_t ret = IRQ_NONE;
626         u32 reg;
627         u16 irq_enable, irq_status;
628         unsigned long flags;
629         int error;
630
631         spin_lock_irqsave(&dev->irq_lock, flags);
632
633         reg = r592_read_reg(dev, R592_REG_MSC);
634         irq_enable = reg >> 16;
635         irq_status = reg & 0xFFFF;
636
637         /* Ack the interrupts */
638         reg &= ~irq_status;
639         r592_write_reg(dev, R592_REG_MSC, reg);
640
641         /* Get the IRQ status minus bits that aren't enabled */
642         irq_status &= (irq_enable);
643
644         /* Due to limitation of memstick core, we don't look at bits that
645                 indicate that card was removed/inserted and/or present */
646         if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
647
648                 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
649                 ret = IRQ_HANDLED;
650
651                 message("IRQ: card %s", card_was_added ? "added" : "removed");
652
653                 mod_timer(&dev->detect_timer,
654                         jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
655         }
656
657         if (irq_status &
658                 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
659                 ret = IRQ_HANDLED;
660
661                 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
662                         message("IRQ: DMA error");
663                         error = -EIO;
664                 } else {
665                         dbg_verbose("IRQ: dma done");
666                         error = 0;
667                 }
668
669                 r592_stop_dma(dev, error);
670                 complete(&dev->dma_done);
671         }
672
673         spin_unlock_irqrestore(&dev->irq_lock, flags);
674         return ret;
675 }
676
677 /* External inteface: set settings */
678 static int r592_set_param(struct memstick_host *host,
679                         enum memstick_param param, int value)
680 {
681         struct r592_device *dev = memstick_priv(host);
682
683         switch (param) {
684         case MEMSTICK_POWER:
685                 switch (value) {
686                 case MEMSTICK_POWER_ON:
687                         return r592_enable_device(dev, true);
688                 case MEMSTICK_POWER_OFF:
689                         return r592_enable_device(dev, false);
690                 default:
691                         return -EINVAL;
692                 }
693         case MEMSTICK_INTERFACE:
694                 switch (value) {
695                 case MEMSTICK_SERIAL:
696                         return r592_set_mode(dev, 0);
697                 case MEMSTICK_PAR4:
698                         return r592_set_mode(dev, 1);
699                 default:
700                         return -EINVAL;
701                 }
702         default:
703                 return -EINVAL;
704         }
705 }
706
707 /* External interface: submit requests */
708 static void r592_submit_req(struct memstick_host *host)
709 {
710         struct r592_device *dev = memstick_priv(host);
711         unsigned long flags;
712
713         if (dev->req)
714                 return;
715
716         spin_lock_irqsave(&dev->io_thread_lock, flags);
717         if (wake_up_process(dev->io_thread))
718                 dbg_verbose("IO thread woken to process requests");
719         spin_unlock_irqrestore(&dev->io_thread_lock, flags);
720 }
721
722 static const struct pci_device_id r592_pci_id_tbl[] = {
723
724         { PCI_VDEVICE(RICOH, 0x0592), },
725         { },
726 };
727
728 /* Main entry */
729 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
730 {
731         int error = -ENOMEM;
732         struct memstick_host *host;
733         struct r592_device *dev;
734
735         /* Allocate memory */
736         host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
737         if (!host)
738                 goto error1;
739
740         dev = memstick_priv(host);
741         dev->host = host;
742         dev->pci_dev = pdev;
743         pci_set_drvdata(pdev, dev);
744
745         /* pci initialization */
746         error = pci_enable_device(pdev);
747         if (error)
748                 goto error2;
749
750         pci_set_master(pdev);
751         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
752         if (error)
753                 goto error3;
754
755         error = pci_request_regions(pdev, DRV_NAME);
756         if (error)
757                 goto error3;
758
759         dev->mmio = pci_ioremap_bar(pdev, 0);
760         if (!dev->mmio) {
761                 error = -ENOMEM;
762                 goto error4;
763         }
764
765         dev->irq = pdev->irq;
766         spin_lock_init(&dev->irq_lock);
767         spin_lock_init(&dev->io_thread_lock);
768         init_completion(&dev->dma_done);
769         INIT_KFIFO(dev->pio_fifo);
770         timer_setup(&dev->detect_timer, r592_detect_timer, 0);
771
772         /* Host initialization */
773         host->caps = MEMSTICK_CAP_PAR4;
774         host->request = r592_submit_req;
775         host->set_param = r592_set_param;
776         r592_check_dma(dev);
777
778         dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
779         if (IS_ERR(dev->io_thread)) {
780                 error = PTR_ERR(dev->io_thread);
781                 goto error5;
782         }
783
784         /* This is just a precation, so don't fail */
785         dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
786                 &dev->dummy_dma_page_physical_address, GFP_KERNEL);
787         r592_stop_dma(dev , 0);
788
789         error = request_irq(dev->irq, &r592_irq, IRQF_SHARED,
790                           DRV_NAME, dev);
791         if (error)
792                 goto error6;
793
794         r592_update_card_detect(dev);
795         error = memstick_add_host(host);
796         if (error)
797                 goto error7;
798
799         message("driver successfully loaded");
800         return 0;
801 error7:
802         free_irq(dev->irq, dev);
803 error6:
804         if (dev->dummy_dma_page)
805                 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
806                         dev->dummy_dma_page_physical_address);
807
808         kthread_stop(dev->io_thread);
809 error5:
810         iounmap(dev->mmio);
811 error4:
812         pci_release_regions(pdev);
813 error3:
814         pci_disable_device(pdev);
815 error2:
816         memstick_free_host(host);
817 error1:
818         return error;
819 }
820
821 static void r592_remove(struct pci_dev *pdev)
822 {
823         int error = 0;
824         struct r592_device *dev = pci_get_drvdata(pdev);
825
826         /* Stop the processing thread.
827         That ensures that we won't take any more requests */
828         kthread_stop(dev->io_thread);
829         del_timer_sync(&dev->detect_timer);
830         r592_enable_device(dev, false);
831
832         while (!error && dev->req) {
833                 dev->req->error = -ETIME;
834                 error = memstick_next_req(dev->host, &dev->req);
835         }
836         memstick_remove_host(dev->host);
837
838         if (dev->dummy_dma_page)
839                 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
840                         dev->dummy_dma_page_physical_address);
841
842         free_irq(dev->irq, dev);
843         iounmap(dev->mmio);
844         pci_release_regions(pdev);
845         pci_disable_device(pdev);
846         memstick_free_host(dev->host);
847 }
848
849 #ifdef CONFIG_PM_SLEEP
850 static int r592_suspend(struct device *core_dev)
851 {
852         struct r592_device *dev = dev_get_drvdata(core_dev);
853
854         r592_clear_interrupts(dev);
855         memstick_suspend_host(dev->host);
856         del_timer_sync(&dev->detect_timer);
857         return 0;
858 }
859
860 static int r592_resume(struct device *core_dev)
861 {
862         struct r592_device *dev = dev_get_drvdata(core_dev);
863
864         r592_clear_interrupts(dev);
865         r592_enable_device(dev, false);
866         memstick_resume_host(dev->host);
867         r592_update_card_detect(dev);
868         return 0;
869 }
870 #endif
871
872 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
873
874 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
875
876 static struct pci_driver r852_pci_driver = {
877         .name           = DRV_NAME,
878         .id_table       = r592_pci_id_tbl,
879         .probe          = r592_probe,
880         .remove         = r592_remove,
881         .driver.pm      = &r592_pm_ops,
882 };
883
884 module_pci_driver(r852_pci_driver);
885
886 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
887 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
888 module_param(debug, int, S_IRUGO | S_IWUSR);
889 MODULE_PARM_DESC(debug, "Debug level (0-3)");
890
891 MODULE_LICENSE("GPL");
892 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
893 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");