drivers/memory/tegra/tegra234.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2021-2022, NVIDIA CORPORATION.  All rights reserved.
   4  */
   5
   6 #include <soc/tegra/mc.h>
   7
   8 #include <dt-bindings/memory/tegra234-mc.h>
   9
  10 #include "mc.h"
  11
  12 static const struct tegra_mc_client tegra234_mc_clients[] = {
  13         {
  14                 .id = TEGRA234_MEMORY_CLIENT_SDMMCRAB,
  15                 .name = "sdmmcrab",
  16                 .sid = TEGRA234_SID_SDMMC4,
  17                 .regs = {
  18                         .sid = {
  19                                 .override = 0x318,
  20                                 .security = 0x31c,
  21                         },
  22                 },
  23         }, {
  24                 .id = TEGRA234_MEMORY_CLIENT_SDMMCWAB,
  25                 .name = "sdmmcwab",
  26                 .sid = TEGRA234_SID_SDMMC4,
  27                 .regs = {
  28                         .sid = {
  29                                 .override = 0x338,
  30                                 .security = 0x33c,
  31                         },
  32                 },
  33         }, {
  34                 .id = TEGRA234_MEMORY_CLIENT_BPMPR,
  35                 .name = "bpmpr",
  36                 .sid = TEGRA234_SID_BPMP,
  37                 .regs = {
  38                         .sid = {
  39                                 .override = 0x498,
  40                                 .security = 0x49c,
  41                         },
  42                 },
  43         }, {
  44                 .id = TEGRA234_MEMORY_CLIENT_BPMPW,
  45                 .name = "bpmpw",
  46                 .sid = TEGRA234_SID_BPMP,
  47                 .regs = {
  48                         .sid = {
  49                                 .override = 0x4a0,
  50                                 .security = 0x4a4,
  51                         },
  52                 },
  53         }, {
  54                 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAR,
  55                 .name = "bpmpdmar",
  56                 .sid = TEGRA234_SID_BPMP,
  57                 .regs = {
  58                         .sid = {
  59                                 .override = 0x4a8,
  60                                 .security = 0x4ac,
  61                         },
  62                 },
  63         }, {
  64                 .id = TEGRA234_MEMORY_CLIENT_BPMPDMAW,
  65                 .name = "bpmpdmaw",
  66                 .sid = TEGRA234_SID_BPMP,
  67                 .regs = {
  68                         .sid = {
  69                                 .override = 0x4b0,
  70                                 .security = 0x4b4,
  71                         },
  72                 },
  73         }, {
  74                 .id = TEGRA234_MEMORY_CLIENT_APEDMAR,
  75                 .name = "apedmar",
  76                 .sid = TEGRA234_SID_APE,
  77                 .regs = {
  78                         .sid = {
  79                                 .override = 0x4f8,
  80                                 .security = 0x4fc,
  81                         },
  82                 },
  83         }, {
  84                 .id = TEGRA234_MEMORY_CLIENT_APEDMAW,
  85                 .name = "apedmaw",
  86                 .sid = TEGRA234_SID_APE,
  87                 .regs = {
  88                         .sid = {
  89                                 .override = 0x500,
  90                                 .security = 0x504,
  91                         },
  92                 },
  93         },
  94 };
  95
  96 const struct tegra_mc_soc tegra234_mc_soc = {
  97         .num_clients = ARRAY_SIZE(tegra234_mc_clients),
  98         .clients = tegra234_mc_clients,
  99         .num_address_bits = 40,
 100         .num_channels = 16,
 101         .client_id_mask = 0x1ff,
 102         .intmask = MC_INT_DECERR_ROUTE_SANITY |
 103                    MC_INT_DECERR_GENERALIZED_CARVEOUT | MC_INT_DECERR_MTS |
 104                    MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
 105                    MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
 106         .has_addr_hi_reg = true,
 107         .ops = &tegra186_mc_ops,
 108         .ch_intmask = 0x0000ff00,
 109         .global_intstatus_channel_shift = 8,
 110 };