drivers/media/usb/gspca/tv8532.c

   1 /*
   2  * Quickcam cameras initialization data
   3  *
   4  * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17 #define MODULE_NAME "tv8532"
  18
  19 #include "gspca.h"
  20
  21 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
  22 MODULE_DESCRIPTION("TV8532 USB Camera Driver");
  23 MODULE_LICENSE("GPL");
  24
  25 /* specific webcam descriptor */
  26 struct sd {
  27         struct gspca_dev gspca_dev;     /* !! must be the first item */
  28
  29         __u8 packet;
  30 };
  31
  32 static const struct v4l2_pix_format sif_mode[] = {
  33         {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  34                 .bytesperline = 176,
  35                 .sizeimage = 176 * 144,
  36                 .colorspace = V4L2_COLORSPACE_SRGB,
  37                 .priv = 1},
  38         {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  39                 .bytesperline = 352,
  40                 .sizeimage = 352 * 288,
  41                 .colorspace = V4L2_COLORSPACE_SRGB,
  42                 .priv = 0},
  43 };
  44
  45 /* TV-8532A (ICM532A) registers (LE) */
  46 #define R00_PART_CONTROL 0x00
  47 #define         LATENT_CHANGE   0x80
  48 #define         EXPO_CHANGE     0x04
  49 #define R01_TIMING_CONTROL_LOW 0x01
  50 #define         CMD_EEprom_Open 0x30
  51 #define         CMD_EEprom_Close 0x29
  52 #define R03_TABLE_ADDR 0x03
  53 #define R04_WTRAM_DATA_L 0x04
  54 #define R05_WTRAM_DATA_M 0x05
  55 #define R06_WTRAM_DATA_H 0x06
  56 #define R07_TABLE_LEN   0x07
  57 #define R08_RAM_WRITE_ACTION 0x08
  58 #define R0C_AD_WIDTHL   0x0c
  59 #define R0D_AD_WIDTHH   0x0d
  60 #define R0E_AD_HEIGHTL  0x0e
  61 #define R0F_AD_HEIGHTH  0x0f
  62 #define R10_AD_COL_BEGINL 0x10
  63 #define R11_AD_COL_BEGINH 0x11
  64 #define         MIRROR          0x04    /* [10] */
  65 #define R14_AD_ROW_BEGINL 0x14
  66 #define R15_AD_ROWBEGINH  0x15
  67 #define R1C_AD_EXPOSE_TIMEL 0x1c
  68 #define R20_GAIN_G1L    0x20
  69 #define R21_GAIN_G1H    0x21
  70 #define R22_GAIN_RL     0x22
  71 #define R23_GAIN_RH     0x23
  72 #define R24_GAIN_BL     0x24
  73 #define R25_GAIN_BH     0x25
  74 #define R26_GAIN_G2L    0x26
  75 #define R27_GAIN_G2H    0x27
  76 #define R28_QUANT       0x28
  77 #define R29_LINE        0x29
  78 #define R2C_POLARITY    0x2c
  79 #define R2D_POINT       0x2d
  80 #define R2E_POINTH      0x2e
  81 #define R2F_POINTB      0x2f
  82 #define R30_POINTBH     0x30
  83 #define R31_UPD         0x31
  84 #define R2A_HIGH_BUDGET 0x2a
  85 #define R2B_LOW_BUDGET  0x2b
  86 #define R34_VID         0x34
  87 #define R35_VIDH        0x35
  88 #define R36_PID         0x36
  89 #define R37_PIDH        0x37
  90 #define R39_Test1       0x39            /* GPIO */
  91 #define R3B_Test3       0x3b            /* GPIO */
  92 #define R83_AD_IDH      0x83
  93 #define R91_AD_SLOPEREG 0x91
  94 #define R94_AD_BITCONTROL 0x94
  95
  96 static const u8 eeprom_data[][3] = {
  97 /*      dataH dataM dataL */
  98         {0x01, 0x00, 0x01},
  99         {0x01, 0x80, 0x11},
 100         {0x05, 0x00, 0x14},
 101         {0x05, 0x00, 0x1c},
 102         {0x0d, 0x00, 0x1e},
 103         {0x05, 0x00, 0x1f},
 104         {0x05, 0x05, 0x19},
 105         {0x05, 0x01, 0x1b},
 106         {0x05, 0x09, 0x1e},
 107         {0x0d, 0x89, 0x2e},
 108         {0x05, 0x89, 0x2f},
 109         {0x05, 0x0d, 0xd9},
 110         {0x05, 0x09, 0xf1},
 111 };
 112
 113
 114 /* write 1 byte */
 115 static void reg_w1(struct gspca_dev *gspca_dev,
 116                   __u16 index, __u8 value)
 117 {
 118         gspca_dev->usb_buf[0] = value;
 119         usb_control_msg(gspca_dev->dev,
 120                         usb_sndctrlpipe(gspca_dev->dev, 0),
 121                         0x02,
 122                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 123                         0,      /* value */
 124                         index, gspca_dev->usb_buf, 1, 500);
 125 }
 126
 127 /* write 2 bytes */
 128 static void reg_w2(struct gspca_dev *gspca_dev,
 129                   u16 index, u16 value)
 130 {
 131         gspca_dev->usb_buf[0] = value;
 132         gspca_dev->usb_buf[1] = value >> 8;
 133         usb_control_msg(gspca_dev->dev,
 134                         usb_sndctrlpipe(gspca_dev->dev, 0),
 135                         0x02,
 136                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 137                         0,      /* value */
 138                         index, gspca_dev->usb_buf, 2, 500);
 139 }
 140
 141 static void tv_8532WriteEEprom(struct gspca_dev *gspca_dev)
 142 {
 143         int i;
 144
 145         reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Open);
 146         for (i = 0; i < ARRAY_SIZE(eeprom_data); i++) {
 147                 reg_w1(gspca_dev, R03_TABLE_ADDR, i);
 148                 reg_w1(gspca_dev, R04_WTRAM_DATA_L, eeprom_data[i][2]);
 149                 reg_w1(gspca_dev, R05_WTRAM_DATA_M, eeprom_data[i][1]);
 150                 reg_w1(gspca_dev, R06_WTRAM_DATA_H, eeprom_data[i][0]);
 151                 reg_w1(gspca_dev, R08_RAM_WRITE_ACTION, 0);
 152         }
 153         reg_w1(gspca_dev, R07_TABLE_LEN, i);
 154         reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Close);
 155 }
 156
 157 /* this function is called at probe time */
 158 static int sd_config(struct gspca_dev *gspca_dev,
 159                      const struct usb_device_id *id)
 160 {
 161         struct cam *cam;
 162
 163         cam = &gspca_dev->cam;
 164         cam->cam_mode = sif_mode;
 165         cam->nmodes = ARRAY_SIZE(sif_mode);
 166
 167         return 0;
 168 }
 169
 170 static void tv_8532_setReg(struct gspca_dev *gspca_dev)
 171 {
 172         reg_w1(gspca_dev, R3B_Test3, 0x0a);     /* Test0Sel = 10 */
 173         /******************************************************/
 174         reg_w1(gspca_dev, R0E_AD_HEIGHTL, 0x90);
 175         reg_w1(gspca_dev, R0F_AD_HEIGHTH, 0x01);
 176         reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, 0x018f);
 177         reg_w1(gspca_dev, R10_AD_COL_BEGINL, 0x44);
 178                                                 /* begin active line */
 179         reg_w1(gspca_dev, R11_AD_COL_BEGINH, 0x00);
 180                                                 /* mirror and digital gain */
 181         reg_w1(gspca_dev, R14_AD_ROW_BEGINL, 0x0a);
 182
 183         reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x02);
 184         reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x00);
 185         reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
 186                                                 /* = 0x84 */
 187 }
 188
 189 /* this function is called at probe and resume time */
 190 static int sd_init(struct gspca_dev *gspca_dev)
 191 {
 192         tv_8532WriteEEprom(gspca_dev);
 193
 194         return 0;
 195 }
 196
 197 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
 198 {
 199         reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, val);
 200         reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
 201                                                 /* 0x84 */
 202 }
 203
 204 static void setgain(struct gspca_dev *gspca_dev, s32 val)
 205 {
 206         reg_w2(gspca_dev, R20_GAIN_G1L, val);
 207         reg_w2(gspca_dev, R22_GAIN_RL, val);
 208         reg_w2(gspca_dev, R24_GAIN_BL, val);
 209         reg_w2(gspca_dev, R26_GAIN_G2L, val);
 210 }
 211
 212 /* -- start the camera -- */
 213 static int sd_start(struct gspca_dev *gspca_dev)
 214 {
 215         struct sd *sd = (struct sd *) gspca_dev;
 216
 217         reg_w1(gspca_dev, R0C_AD_WIDTHL, 0xe8);         /* 0x20; 0x0c */
 218         reg_w1(gspca_dev, R0D_AD_WIDTHH, 0x03);
 219
 220         /************************************************/
 221         reg_w1(gspca_dev, R28_QUANT, 0x90);
 222                                         /* 0x72 compressed mode 0x28 */
 223         if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
 224                 /* 176x144 */
 225                 reg_w1(gspca_dev, R29_LINE, 0x41);
 226                                         /* CIF - 2 lines/packet */
 227         } else {
 228                 /* 352x288 */
 229                 reg_w1(gspca_dev, R29_LINE, 0x81);
 230                                         /* CIF - 2 lines/packet */
 231         }
 232         /************************************************/
 233         reg_w1(gspca_dev, R2C_POLARITY, 0x10);          /* slow clock */
 234         reg_w1(gspca_dev, R2D_POINT, 0x14);
 235         reg_w1(gspca_dev, R2E_POINTH, 0x01);
 236         reg_w1(gspca_dev, R2F_POINTB, 0x12);
 237         reg_w1(gspca_dev, R30_POINTBH, 0x01);
 238
 239         tv_8532_setReg(gspca_dev);
 240
 241         /************************************************/
 242         reg_w1(gspca_dev, R31_UPD, 0x01);       /* update registers */
 243         msleep(200);
 244         reg_w1(gspca_dev, R31_UPD, 0x00);       /* end update */
 245
 246         gspca_dev->empty_packet = 0;            /* check the empty packets */
 247         sd->packet = 0;                         /* ignore the first packets */
 248
 249         return 0;
 250 }
 251
 252 static void sd_stopN(struct gspca_dev *gspca_dev)
 253 {
 254         reg_w1(gspca_dev, R3B_Test3, 0x0b);     /* Test0Sel = 11 = GPIO */
 255 }
 256
 257 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
 258                         u8 *data,                       /* isoc packet */
 259                         int len)                        /* iso packet length */
 260 {
 261         struct sd *sd = (struct sd *) gspca_dev;
 262         int packet_type0, packet_type1;
 263
 264         packet_type0 = packet_type1 = INTER_PACKET;
 265         if (gspca_dev->empty_packet) {
 266                 gspca_dev->empty_packet = 0;
 267                 sd->packet = gspca_dev->pixfmt.height / 2;
 268                 packet_type0 = FIRST_PACKET;
 269         } else if (sd->packet == 0)
 270                 return;                 /* 2 more lines in 352x288 ! */
 271         sd->packet--;
 272         if (sd->packet == 0)
 273                 packet_type1 = LAST_PACKET;
 274
 275         /* each packet contains:
 276          * - header 2 bytes
 277          * - RGRG line
 278          * - 4 bytes
 279          * - GBGB line
 280          * - 4 bytes
 281          */
 282         gspca_frame_add(gspca_dev, packet_type0,
 283                         data + 2, gspca_dev->pixfmt.width);
 284         gspca_frame_add(gspca_dev, packet_type1,
 285                         data + gspca_dev->pixfmt.width + 5,
 286                         gspca_dev->pixfmt.width);
 287 }
 288
 289 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
 290 {
 291         struct gspca_dev *gspca_dev =
 292                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
 293
 294         gspca_dev->usb_err = 0;
 295
 296         if (!gspca_dev->streaming)
 297                 return 0;
 298
 299         switch (ctrl->id) {
 300         case V4L2_CID_EXPOSURE:
 301                 setexposure(gspca_dev, ctrl->val);
 302                 break;
 303         case V4L2_CID_GAIN:
 304                 setgain(gspca_dev, ctrl->val);
 305                 break;
 306         }
 307         return gspca_dev->usb_err;
 308 }
 309
 310 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
 311         .s_ctrl = sd_s_ctrl,
 312 };
 313
 314 static int sd_init_controls(struct gspca_dev *gspca_dev)
 315 {
 316         struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
 317
 318         gspca_dev->vdev.ctrl_handler = hdl;
 319         v4l2_ctrl_handler_init(hdl, 2);
 320         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
 321                         V4L2_CID_EXPOSURE, 0, 0x18f, 1, 0x18f);
 322         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
 323                         V4L2_CID_GAIN, 0, 0x7ff, 1, 0x100);
 324
 325         if (hdl->error) {
 326                 pr_err("Could not initialize controls\n");
 327                 return hdl->error;
 328         }
 329         return 0;
 330 }
 331
 332 /* sub-driver description */
 333 static const struct sd_desc sd_desc = {
 334         .name = MODULE_NAME,
 335         .config = sd_config,
 336         .init = sd_init,
 337         .init_controls = sd_init_controls,
 338         .start = sd_start,
 339         .stopN = sd_stopN,
 340         .pkt_scan = sd_pkt_scan,
 341 };
 342
 343 /* -- module initialisation -- */
 344 static const struct usb_device_id device_table[] = {
 345         {USB_DEVICE(0x046d, 0x0920)},
 346         {USB_DEVICE(0x046d, 0x0921)},
 347         {USB_DEVICE(0x0545, 0x808b)},
 348         {USB_DEVICE(0x0545, 0x8333)},
 349         {USB_DEVICE(0x0923, 0x010f)},
 350         {}
 351 };
 352
 353 MODULE_DEVICE_TABLE(usb, device_table);
 354
 355 /* -- device connect -- */
 356 static int sd_probe(struct usb_interface *intf,
 357                     const struct usb_device_id *id)
 358 {
 359         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
 360                                THIS_MODULE);
 361 }
 362
 363 static struct usb_driver sd_driver = {
 364         .name = MODULE_NAME,
 365         .id_table = device_table,
 366         .probe = sd_probe,
 367         .disconnect = gspca_disconnect,
 368 #ifdef CONFIG_PM
 369         .suspend = gspca_suspend,
 370         .resume = gspca_resume,
 371         .reset_resume = gspca_resume,
 372 #endif
 373 };
 374
 375 module_usb_driver(sd_driver);