drivers/media/usb/gspca/ov519.c

   1 /**
   2  * OV519 driver
   3  *
   4  * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
   5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * This module is adapted from the ov51x-jpeg package, which itself
   8  * was adapted from the ov511 driver.
   9  *
  10  * Original copyright for the ov511 driver is:
  11  *
  12  * Copyright (c) 1999-2006 Mark W. McClelland
  13  * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14  * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15  * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16  * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17  * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18  *
  19  * ov51x-jpeg original copyright is:
  20  *
  21  * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22  * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23  *
  24  * This program is free software; you can redistribute it and/or modify
  25  * it under the terms of the GNU General Public License as published by
  26  * the Free Software Foundation; either version 2 of the License, or
  27  * any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32  * GNU General Public License for more details.
  33  *
  34  */
  35
  36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  37
  38 #define MODULE_NAME "ov519"
  39
  40 #include <linux/input.h>
  41 #include "gspca.h"
  42
  43 /* The jpeg_hdr is used by w996Xcf only */
  44 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  45 #define CONEX_CAM
  46 #include "jpeg.h"
  47
  48 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  49 MODULE_DESCRIPTION("OV519 USB Camera Driver");
  50 MODULE_LICENSE("GPL");
  51
  52 /* global parameters */
  53 static int frame_rate;
  54
  55 /* Number of times to retry a failed I2C transaction. Increase this if you
  56  * are getting "Failed to read sensor ID..." */
  57 static int i2c_detect_tries = 10;
  58
  59 /* ov519 device descriptor */
  60 struct sd {
  61         struct gspca_dev gspca_dev;             /* !! must be the first item */
  62
  63         struct v4l2_ctrl *jpegqual;
  64         struct v4l2_ctrl *freq;
  65         struct { /* h/vflip control cluster */
  66                 struct v4l2_ctrl *hflip;
  67                 struct v4l2_ctrl *vflip;
  68         };
  69         struct { /* autobrightness/brightness control cluster */
  70                 struct v4l2_ctrl *autobright;
  71                 struct v4l2_ctrl *brightness;
  72         };
  73
  74         u8 revision;
  75
  76         u8 packet_nr;
  77
  78         char bridge;
  79 #define BRIDGE_OV511            0
  80 #define BRIDGE_OV511PLUS        1
  81 #define BRIDGE_OV518            2
  82 #define BRIDGE_OV518PLUS        3
  83 #define BRIDGE_OV519            4               /* = ov530 */
  84 #define BRIDGE_OVFX2            5
  85 #define BRIDGE_W9968CF          6
  86 #define BRIDGE_MASK             7
  87
  88         char invert_led;
  89 #define BRIDGE_INVERT_LED       8
  90
  91         char snapshot_pressed;
  92         char snapshot_needs_reset;
  93
  94         /* Determined by sensor type */
  95         u8 sif;
  96
  97 #define QUALITY_MIN 50
  98 #define QUALITY_MAX 70
  99 #define QUALITY_DEF 50
 100
 101         u8 stopped;             /* Streaming is temporarily paused */
 102         u8 first_frame;
 103
 104         u8 frame_rate;          /* current Framerate */
 105         u8 clockdiv;            /* clockdiv override */
 106
 107         s8 sensor;              /* Type of image sensor chip (SEN_*) */
 108
 109         u8 sensor_addr;
 110         u16 sensor_width;
 111         u16 sensor_height;
 112         s16 sensor_reg_cache[256];
 113
 114         u8 jpeg_hdr[JPEG_HDR_SZ];
 115 };
 116 enum sensors {
 117         SEN_OV2610,
 118         SEN_OV2610AE,
 119         SEN_OV3610,
 120         SEN_OV6620,
 121         SEN_OV6630,
 122         SEN_OV66308AF,
 123         SEN_OV7610,
 124         SEN_OV7620,
 125         SEN_OV7620AE,
 126         SEN_OV7640,
 127         SEN_OV7648,
 128         SEN_OV7660,
 129         SEN_OV7670,
 130         SEN_OV76BE,
 131         SEN_OV8610,
 132         SEN_OV9600,
 133 };
 134
 135 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 136    the ov sensors which is already present here. When we have the time we
 137    really should move the sensor drivers to v4l2 sub drivers. */
 138 #include "w996Xcf.c"
 139
 140 /* table of the disabled controls */
 141 struct ctrl_valid {
 142         unsigned int has_brightness:1;
 143         unsigned int has_contrast:1;
 144         unsigned int has_exposure:1;
 145         unsigned int has_autogain:1;
 146         unsigned int has_sat:1;
 147         unsigned int has_hvflip:1;
 148         unsigned int has_autobright:1;
 149         unsigned int has_freq:1;
 150 };
 151
 152 static const struct ctrl_valid valid_controls[] = {
 153         [SEN_OV2610] = {
 154                 .has_exposure = 1,
 155                 .has_autogain = 1,
 156         },
 157         [SEN_OV2610AE] = {
 158                 .has_exposure = 1,
 159                 .has_autogain = 1,
 160         },
 161         [SEN_OV3610] = {
 162                 /* No controls */
 163         },
 164         [SEN_OV6620] = {
 165                 .has_brightness = 1,
 166                 .has_contrast = 1,
 167                 .has_sat = 1,
 168                 .has_autobright = 1,
 169                 .has_freq = 1,
 170         },
 171         [SEN_OV6630] = {
 172                 .has_brightness = 1,
 173                 .has_contrast = 1,
 174                 .has_sat = 1,
 175                 .has_autobright = 1,
 176                 .has_freq = 1,
 177         },
 178         [SEN_OV66308AF] = {
 179                 .has_brightness = 1,
 180                 .has_contrast = 1,
 181                 .has_sat = 1,
 182                 .has_autobright = 1,
 183                 .has_freq = 1,
 184         },
 185         [SEN_OV7610] = {
 186                 .has_brightness = 1,
 187                 .has_contrast = 1,
 188                 .has_sat = 1,
 189                 .has_autobright = 1,
 190                 .has_freq = 1,
 191         },
 192         [SEN_OV7620] = {
 193                 .has_brightness = 1,
 194                 .has_contrast = 1,
 195                 .has_sat = 1,
 196                 .has_autobright = 1,
 197                 .has_freq = 1,
 198         },
 199         [SEN_OV7620AE] = {
 200                 .has_brightness = 1,
 201                 .has_contrast = 1,
 202                 .has_sat = 1,
 203                 .has_autobright = 1,
 204                 .has_freq = 1,
 205         },
 206         [SEN_OV7640] = {
 207                 .has_brightness = 1,
 208                 .has_sat = 1,
 209                 .has_freq = 1,
 210         },
 211         [SEN_OV7648] = {
 212                 .has_brightness = 1,
 213                 .has_sat = 1,
 214                 .has_freq = 1,
 215         },
 216         [SEN_OV7660] = {
 217                 .has_brightness = 1,
 218                 .has_contrast = 1,
 219                 .has_sat = 1,
 220                 .has_hvflip = 1,
 221                 .has_freq = 1,
 222         },
 223         [SEN_OV7670] = {
 224                 .has_brightness = 1,
 225                 .has_contrast = 1,
 226                 .has_hvflip = 1,
 227                 .has_freq = 1,
 228         },
 229         [SEN_OV76BE] = {
 230                 .has_brightness = 1,
 231                 .has_contrast = 1,
 232                 .has_sat = 1,
 233                 .has_autobright = 1,
 234                 .has_freq = 1,
 235         },
 236         [SEN_OV8610] = {
 237                 .has_brightness = 1,
 238                 .has_contrast = 1,
 239                 .has_sat = 1,
 240                 .has_autobright = 1,
 241         },
 242         [SEN_OV9600] = {
 243                 .has_exposure = 1,
 244                 .has_autogain = 1,
 245         },
 246 };
 247
 248 static const struct v4l2_pix_format ov519_vga_mode[] = {
 249         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 250                 .bytesperline = 320,
 251                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 252                 .colorspace = V4L2_COLORSPACE_JPEG,
 253                 .priv = 1},
 254         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 255                 .bytesperline = 640,
 256                 .sizeimage = 640 * 480 * 3 / 8 + 590,
 257                 .colorspace = V4L2_COLORSPACE_JPEG,
 258                 .priv = 0},
 259 };
 260 static const struct v4l2_pix_format ov519_sif_mode[] = {
 261         {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 262                 .bytesperline = 160,
 263                 .sizeimage = 160 * 120 * 3 / 8 + 590,
 264                 .colorspace = V4L2_COLORSPACE_JPEG,
 265                 .priv = 3},
 266         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 267                 .bytesperline = 176,
 268                 .sizeimage = 176 * 144 * 3 / 8 + 590,
 269                 .colorspace = V4L2_COLORSPACE_JPEG,
 270                 .priv = 1},
 271         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 272                 .bytesperline = 320,
 273                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 274                 .colorspace = V4L2_COLORSPACE_JPEG,
 275                 .priv = 2},
 276         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 277                 .bytesperline = 352,
 278                 .sizeimage = 352 * 288 * 3 / 8 + 590,
 279                 .colorspace = V4L2_COLORSPACE_JPEG,
 280                 .priv = 0},
 281 };
 282
 283 /* Note some of the sizeimage values for the ov511 / ov518 may seem
 284    larger then necessary, however they need to be this big as the ov511 /
 285    ov518 always fills the entire isoc frame, using 0 padding bytes when
 286    it doesn't have any data. So with low framerates the amount of data
 287    transferred can become quite large (libv4l will remove all the 0 padding
 288    in userspace). */
 289 static const struct v4l2_pix_format ov518_vga_mode[] = {
 290         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 291                 .bytesperline = 320,
 292                 .sizeimage = 320 * 240 * 3,
 293                 .colorspace = V4L2_COLORSPACE_JPEG,
 294                 .priv = 1},
 295         {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 296                 .bytesperline = 640,
 297                 .sizeimage = 640 * 480 * 2,
 298                 .colorspace = V4L2_COLORSPACE_JPEG,
 299                 .priv = 0},
 300 };
 301 static const struct v4l2_pix_format ov518_sif_mode[] = {
 302         {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 303                 .bytesperline = 160,
 304                 .sizeimage = 70000,
 305                 .colorspace = V4L2_COLORSPACE_JPEG,
 306                 .priv = 3},
 307         {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 308                 .bytesperline = 176,
 309                 .sizeimage = 70000,
 310                 .colorspace = V4L2_COLORSPACE_JPEG,
 311                 .priv = 1},
 312         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 313                 .bytesperline = 320,
 314                 .sizeimage = 320 * 240 * 3,
 315                 .colorspace = V4L2_COLORSPACE_JPEG,
 316                 .priv = 2},
 317         {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 318                 .bytesperline = 352,
 319                 .sizeimage = 352 * 288 * 3,
 320                 .colorspace = V4L2_COLORSPACE_JPEG,
 321                 .priv = 0},
 322 };
 323
 324 static const struct v4l2_pix_format ov511_vga_mode[] = {
 325         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 326                 .bytesperline = 320,
 327                 .sizeimage = 320 * 240 * 3,
 328                 .colorspace = V4L2_COLORSPACE_JPEG,
 329                 .priv = 1},
 330         {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 331                 .bytesperline = 640,
 332                 .sizeimage = 640 * 480 * 2,
 333                 .colorspace = V4L2_COLORSPACE_JPEG,
 334                 .priv = 0},
 335 };
 336 static const struct v4l2_pix_format ov511_sif_mode[] = {
 337         {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 338                 .bytesperline = 160,
 339                 .sizeimage = 70000,
 340                 .colorspace = V4L2_COLORSPACE_JPEG,
 341                 .priv = 3},
 342         {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 343                 .bytesperline = 176,
 344                 .sizeimage = 70000,
 345                 .colorspace = V4L2_COLORSPACE_JPEG,
 346                 .priv = 1},
 347         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 348                 .bytesperline = 320,
 349                 .sizeimage = 320 * 240 * 3,
 350                 .colorspace = V4L2_COLORSPACE_JPEG,
 351                 .priv = 2},
 352         {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 353                 .bytesperline = 352,
 354                 .sizeimage = 352 * 288 * 3,
 355                 .colorspace = V4L2_COLORSPACE_JPEG,
 356                 .priv = 0},
 357 };
 358
 359 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 360         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 361                 .bytesperline = 800,
 362                 .sizeimage = 800 * 600,
 363                 .colorspace = V4L2_COLORSPACE_SRGB,
 364                 .priv = 1},
 365         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 366                 .bytesperline = 1600,
 367                 .sizeimage = 1600 * 1200,
 368                 .colorspace = V4L2_COLORSPACE_SRGB},
 369 };
 370 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 371         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 372                 .bytesperline = 640,
 373                 .sizeimage = 640 * 480,
 374                 .colorspace = V4L2_COLORSPACE_SRGB,
 375                 .priv = 1},
 376         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 377                 .bytesperline = 800,
 378                 .sizeimage = 800 * 600,
 379                 .colorspace = V4L2_COLORSPACE_SRGB,
 380                 .priv = 1},
 381         {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 382                 .bytesperline = 1024,
 383                 .sizeimage = 1024 * 768,
 384                 .colorspace = V4L2_COLORSPACE_SRGB,
 385                 .priv = 1},
 386         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 387                 .bytesperline = 1600,
 388                 .sizeimage = 1600 * 1200,
 389                 .colorspace = V4L2_COLORSPACE_SRGB,
 390                 .priv = 0},
 391         {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 392                 .bytesperline = 2048,
 393                 .sizeimage = 2048 * 1536,
 394                 .colorspace = V4L2_COLORSPACE_SRGB,
 395                 .priv = 0},
 396 };
 397 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
 398         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 399                 .bytesperline = 640,
 400                 .sizeimage = 640 * 480,
 401                 .colorspace = V4L2_COLORSPACE_SRGB,
 402                 .priv = 1},
 403         {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 404                 .bytesperline = 1280,
 405                 .sizeimage = 1280 * 1024,
 406                 .colorspace = V4L2_COLORSPACE_SRGB},
 407 };
 408
 409 /* Registers common to OV511 / OV518 */
 410 #define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 411 #define R51x_SYS_RESET                  0x50
 412         /* Reset type flags */
 413         #define OV511_RESET_OMNICE      0x08
 414 #define R51x_SYS_INIT                   0x53
 415 #define R51x_SYS_SNAP                   0x52
 416 #define R51x_SYS_CUST_ID                0x5f
 417 #define R51x_COMP_LUT_BEGIN             0x80
 418
 419 /* OV511 Camera interface register numbers */
 420 #define R511_CAM_DELAY                  0x10
 421 #define R511_CAM_EDGE                   0x11
 422 #define R511_CAM_PXCNT                  0x12
 423 #define R511_CAM_LNCNT                  0x13
 424 #define R511_CAM_PXDIV                  0x14
 425 #define R511_CAM_LNDIV                  0x15
 426 #define R511_CAM_UV_EN                  0x16
 427 #define R511_CAM_LINE_MODE              0x17
 428 #define R511_CAM_OPTS                   0x18
 429
 430 #define R511_SNAP_FRAME                 0x19
 431 #define R511_SNAP_PXCNT                 0x1a
 432 #define R511_SNAP_LNCNT                 0x1b
 433 #define R511_SNAP_PXDIV                 0x1c
 434 #define R511_SNAP_LNDIV                 0x1d
 435 #define R511_SNAP_UV_EN                 0x1e
 436 #define R511_SNAP_OPTS                  0x1f
 437
 438 #define R511_DRAM_FLOW_CTL              0x20
 439 #define R511_FIFO_OPTS                  0x31
 440 #define R511_I2C_CTL                    0x40
 441 #define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 442 #define R511_COMP_EN                    0x78
 443 #define R511_COMP_LUT_EN                0x79
 444
 445 /* OV518 Camera interface register numbers */
 446 #define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 447 #define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 448
 449 /* OV519 Camera interface register numbers */
 450 #define OV519_R10_H_SIZE                0x10
 451 #define OV519_R11_V_SIZE                0x11
 452 #define OV519_R12_X_OFFSETL             0x12
 453 #define OV519_R13_X_OFFSETH             0x13
 454 #define OV519_R14_Y_OFFSETL             0x14
 455 #define OV519_R15_Y_OFFSETH             0x15
 456 #define OV519_R16_DIVIDER               0x16
 457 #define OV519_R20_DFR                   0x20
 458 #define OV519_R25_FORMAT                0x25
 459
 460 /* OV519 System Controller register numbers */
 461 #define OV519_R51_RESET1                0x51
 462 #define OV519_R54_EN_CLK1               0x54
 463 #define OV519_R57_SNAPSHOT              0x57
 464
 465 #define OV519_GPIO_DATA_OUT0            0x71
 466 #define OV519_GPIO_IO_CTRL0             0x72
 467
 468 /*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 469
 470 /*
 471  * The FX2 chip does not give us a zero length read at end of frame.
 472  * It does, however, give a short read at the end of a frame, if
 473  * necessary, rather than run two frames together.
 474  *
 475  * By choosing the right bulk transfer size, we are guaranteed to always
 476  * get a short read for the last read of each frame.  Frame sizes are
 477  * always a composite number (width * height, or a multiple) so if we
 478  * choose a prime number, we are guaranteed that the last read of a
 479  * frame will be short.
 480  *
 481  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 482  * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 483  * to figure out why.  [PMiller]
 484  *
 485  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 486  *
 487  * It isn't enough to know the number of bytes per frame, in case we
 488  * have data dropouts or buffer overruns (even though the FX2 double
 489  * buffers, there are some pretty strict real time constraints for
 490  * isochronous transfer for larger frame sizes).
 491  */
 492 /*jfm: this value does not work for 800x600 - see isoc_init */
 493 #define OVFX2_BULK_SIZE (13 * 4096)
 494
 495 /* I2C registers */
 496 #define R51x_I2C_W_SID          0x41
 497 #define R51x_I2C_SADDR_3        0x42
 498 #define R51x_I2C_SADDR_2        0x43
 499 #define R51x_I2C_R_SID          0x44
 500 #define R51x_I2C_DATA           0x45
 501 #define R518_I2C_CTL            0x47    /* OV518(+) only */
 502 #define OVFX2_I2C_ADDR          0x00
 503
 504 /* I2C ADDRESSES */
 505 #define OV7xx0_SID   0x42
 506 #define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 507 #define OV8xx0_SID   0xa0
 508 #define OV6xx0_SID   0xc0
 509
 510 /* OV7610 registers */
 511 #define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 512 #define OV7610_REG_BLUE         0x01    /* blue channel balance */
 513 #define OV7610_REG_RED          0x02    /* red channel balance */
 514 #define OV7610_REG_SAT          0x03    /* saturation */
 515 #define OV8610_REG_HUE          0x04    /* 04 reserved */
 516 #define OV7610_REG_CNT          0x05    /* Y contrast */
 517 #define OV7610_REG_BRT          0x06    /* Y brightness */
 518 #define OV7610_REG_COM_C        0x14    /* misc common regs */
 519 #define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 520 #define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 521 #define OV7610_REG_COM_I        0x29    /* misc settings */
 522
 523 /* OV7660 and OV7670 registers */
 524 #define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 525 #define OV7670_R01_BLUE         0x01    /* blue gain */
 526 #define OV7670_R02_RED          0x02    /* red gain */
 527 #define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 528 #define OV7670_R04_COM1         0x04    /* Control 1 */
 529 /*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 530 #define OV7670_R0C_COM3         0x0c    /* Control 3 */
 531 #define OV7670_R0D_COM4         0x0d    /* Control 4 */
 532 #define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 533 #define OV7670_R0F_COM6         0x0f    /* Control 6 */
 534 #define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 535 #define OV7670_R11_CLKRC        0x11    /* Clock control */
 536 #define OV7670_R12_COM7         0x12    /* Control 7 */
 537 #define   OV7670_COM7_FMT_VGA    0x00
 538 /*#define   OV7670_COM7_YUV      0x00    * YUV */
 539 #define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 540 #define   OV7670_COM7_FMT_MASK   0x38
 541 #define   OV7670_COM7_RESET      0x80   /* Register reset */
 542 #define OV7670_R13_COM8         0x13    /* Control 8 */
 543 #define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 544 #define   OV7670_COM8_AWB        0x02   /* White balance enable */
 545 #define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 546 #define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 547 #define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 548 #define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 549 #define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 550 #define OV7670_R15_COM10        0x15    /* Control 10 */
 551 #define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 552 #define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 553 #define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 554 #define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 555 #define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 556 #define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 557 #define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 558 #define OV7670_R24_AEW          0x24    /* AGC upper limit */
 559 #define OV7670_R25_AEB          0x25    /* AGC lower limit */
 560 #define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 561 #define OV7670_R32_HREF         0x32    /* HREF pieces */
 562 #define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 563 #define OV7670_R3B_COM11        0x3b    /* Control 11 */
 564 #define   OV7670_COM11_EXP       0x02
 565 #define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 566 #define OV7670_R3C_COM12        0x3c    /* Control 12 */
 567 #define OV7670_R3D_COM13        0x3d    /* Control 13 */
 568 #define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 569 #define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 570 #define OV7670_R3E_COM14        0x3e    /* Control 14 */
 571 #define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 572 #define OV7670_R40_COM15        0x40    /* Control 15 */
 573 /*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 574 #define OV7670_R41_COM16        0x41    /* Control 16 */
 575 #define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 576 /* end of ov7660 common registers */
 577 #define OV7670_R55_BRIGHT       0x55    /* Brightness */
 578 #define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 579 #define OV7670_R69_GFIX         0x69    /* Fix gain control */
 580 /*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 581 #define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 582 #define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 583 #define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 584 #define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 585 #define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 586 #define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 587 #define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 588 #define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 589 #define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 590
 591 struct ov_regvals {
 592         u8 reg;
 593         u8 val;
 594 };
 595 struct ov_i2c_regvals {
 596         u8 reg;
 597         u8 val;
 598 };
 599
 600 /* Settings for OV2610 camera chip */
 601 static const struct ov_i2c_regvals norm_2610[] = {
 602         { 0x12, 0x80 }, /* reset */
 603 };
 604
 605 static const struct ov_i2c_regvals norm_2610ae[] = {
 606         {0x12, 0x80},   /* reset */
 607         {0x13, 0xcd},
 608         {0x09, 0x01},
 609         {0x0d, 0x00},
 610         {0x11, 0x80},
 611         {0x12, 0x20},   /* 1600x1200 */
 612         {0x33, 0x0c},
 613         {0x35, 0x90},
 614         {0x36, 0x37},
 615 /* ms-win traces */
 616         {0x11, 0x83},   /* clock / 3 ? */
 617         {0x2d, 0x00},   /* 60 Hz filter */
 618         {0x24, 0xb0},   /* normal colors */
 619         {0x25, 0x90},
 620         {0x10, 0x43},
 621 };
 622
 623 static const struct ov_i2c_regvals norm_3620b[] = {
 624         /*
 625          * From the datasheet: "Note that after writing to register COMH
 626          * (0x12) to change the sensor mode, registers related to the
 627          * sensor’s cropping window will be reset back to their default
 628          * values."
 629          *
 630          * "wait 4096 external clock ... to make sure the sensor is
 631          * stable and ready to access registers" i.e. 160us at 24MHz
 632          */
 633         { 0x12, 0x80 }, /* COMH reset */
 634         { 0x12, 0x00 }, /* QXGA, master */
 635
 636         /*
 637          * 11 CLKRC "Clock Rate Control"
 638          * [7] internal frequency doublers: on
 639          * [6] video port mode: master
 640          * [5:0] clock divider: 1
 641          */
 642         { 0x11, 0x80 },
 643
 644         /*
 645          * 13 COMI "Common Control I"
 646          *                  = 192 (0xC0) 11000000
 647          *    COMI[7] "AEC speed selection"
 648          *                  =   1 (0x01) 1....... "Faster AEC correction"
 649          *    COMI[6] "AEC speed step selection"
 650          *                  =   1 (0x01) .1...... "Big steps, fast"
 651          *    COMI[5] "Banding filter on off"
 652          *                  =   0 (0x00) ..0..... "Off"
 653          *    COMI[4] "Banding filter option"
 654          *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 655          *                                         the PLL is ON"
 656          *    COMI[3] "Reserved"
 657          *                  =   0 (0x00) ....0...
 658          *    COMI[2] "AGC auto manual control selection"
 659          *                  =   0 (0x00) .....0.. "Manual"
 660          *    COMI[1] "AWB auto manual control selection"
 661          *                  =   0 (0x00) ......0. "Manual"
 662          *    COMI[0] "Exposure control"
 663          *                  =   0 (0x00) .......0 "Manual"
 664          */
 665         { 0x13, 0xc0 },
 666
 667         /*
 668          * 09 COMC "Common Control C"
 669          *                  =   8 (0x08) 00001000
 670          *    COMC[7:5] "Reserved"
 671          *                  =   0 (0x00) 000.....
 672          *    COMC[4] "Sleep Mode Enable"
 673          *                  =   0 (0x00) ...0.... "Normal mode"
 674          *    COMC[3:2] "Sensor sampling reset timing selection"
 675          *                  =   2 (0x02) ....10.. "Longer reset time"
 676          *    COMC[1:0] "Output drive current select"
 677          *                  =   0 (0x00) ......00 "Weakest"
 678          */
 679         { 0x09, 0x08 },
 680
 681         /*
 682          * 0C COMD "Common Control D"
 683          *                  =   8 (0x08) 00001000
 684          *    COMD[7] "Reserved"
 685          *                  =   0 (0x00) 0.......
 686          *    COMD[6] "Swap MSB and LSB at the output port"
 687          *                  =   0 (0x00) .0...... "False"
 688          *    COMD[5:3] "Reserved"
 689          *                  =   1 (0x01) ..001...
 690          *    COMD[2] "Output Average On Off"
 691          *                  =   0 (0x00) .....0.. "Output Normal"
 692          *    COMD[1] "Sensor precharge voltage selection"
 693          *                  =   0 (0x00) ......0. "Selects internal
 694          *                                         reference precharge
 695          *                                         voltage"
 696          *    COMD[0] "Snapshot option"
 697          *                  =   0 (0x00) .......0 "Enable live video output
 698          *                                         after snapshot sequence"
 699          */
 700         { 0x0c, 0x08 },
 701
 702         /*
 703          * 0D COME "Common Control E"
 704          *                  = 161 (0xA1) 10100001
 705          *    COME[7] "Output average option"
 706          *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 707          *    COME[6] "Anti-blooming control"
 708          *                  =   0 (0x00) .0...... "Off"
 709          *    COME[5:3] "Reserved"
 710          *                  =   4 (0x04) ..100...
 711          *    COME[2] "Clock output power down pin status"
 712          *                  =   0 (0x00) .....0.. "Tri-state data output pin
 713          *                                         on power down"
 714          *    COME[1] "Data output pin status selection at power down"
 715          *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 716          *                                         HREF, and CHSYNC pins on
 717          *                                         power down"
 718          *    COME[0] "Auto zero circuit select"
 719          *                  =   1 (0x01) .......1 "On"
 720          */
 721         { 0x0d, 0xa1 },
 722
 723         /*
 724          * 0E COMF "Common Control F"
 725          *                  = 112 (0x70) 01110000
 726          *    COMF[7] "System clock selection"
 727          *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 728          *    COMF[6:4] "Reserved"
 729          *                  =   7 (0x07) .111....
 730          *    COMF[3] "Manual auto negative offset canceling selection"
 731          *                  =   0 (0x00) ....0... "Auto detect negative
 732          *                                         offset and cancel it"
 733          *    COMF[2:0] "Reserved"
 734          *                  =   0 (0x00) .....000
 735          */
 736         { 0x0e, 0x70 },
 737
 738         /*
 739          * 0F COMG "Common Control G"
 740          *                  =  66 (0x42) 01000010
 741          *    COMG[7] "Optical black output selection"
 742          *                  =   0 (0x00) 0....... "Disable"
 743          *    COMG[6] "Black level calibrate selection"
 744          *                  =   1 (0x01) .1...... "Use optical black pixels
 745          *                                         to calibrate"
 746          *    COMG[5:4] "Reserved"
 747          *                  =   0 (0x00) ..00....
 748          *    COMG[3] "Channel offset adjustment"
 749          *                  =   0 (0x00) ....0... "Disable offset adjustment"
 750          *    COMG[2] "ADC black level calibration option"
 751          *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 752          *                                         line to calibrate each
 753          *                                         channel's black level"
 754          *    COMG[1] "Reserved"
 755          *                  =   1 (0x01) ......1.
 756          *    COMG[0] "ADC black level calibration enable"
 757          *                  =   0 (0x00) .......0 "Disable"
 758          */
 759         { 0x0f, 0x42 },
 760
 761         /*
 762          * 14 COMJ "Common Control J"
 763          *                  = 198 (0xC6) 11000110
 764          *    COMJ[7:6] "AGC gain ceiling"
 765          *                  =   3 (0x03) 11...... "8x"
 766          *    COMJ[5:4] "Reserved"
 767          *                  =   0 (0x00) ..00....
 768          *    COMJ[3] "Auto banding filter"
 769          *                  =   0 (0x00) ....0... "Banding filter is always
 770          *                                         on off depending on
 771          *                                         COMI[5] setting"
 772          *    COMJ[2] "VSYNC drop option"
 773          *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 774          *                                         data is dropped"
 775          *    COMJ[1] "Frame data drop"
 776          *                  =   1 (0x01) ......1. "Drop frame data if
 777          *                                         exposure is not within
 778          *                                         tolerance.  In AEC mode,
 779          *                                         data is normally dropped
 780          *                                         when data is out of
 781          *                                         range."
 782          *    COMJ[0] "Reserved"
 783          *                  =   0 (0x00) .......0
 784          */
 785         { 0x14, 0xc6 },
 786
 787         /*
 788          * 15 COMK "Common Control K"
 789          *                  =   2 (0x02) 00000010
 790          *    COMK[7] "CHSYNC pin output swap"
 791          *                  =   0 (0x00) 0....... "CHSYNC"
 792          *    COMK[6] "HREF pin output swap"
 793          *                  =   0 (0x00) .0...... "HREF"
 794          *    COMK[5] "PCLK output selection"
 795          *                  =   0 (0x00) ..0..... "PCLK always output"
 796          *    COMK[4] "PCLK edge selection"
 797          *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 798          *    COMK[3] "HREF output polarity"
 799          *                  =   0 (0x00) ....0... "positive"
 800          *    COMK[2] "Reserved"
 801          *                  =   0 (0x00) .....0..
 802          *    COMK[1] "VSYNC polarity"
 803          *                  =   1 (0x01) ......1. "negative"
 804          *    COMK[0] "HSYNC polarity"
 805          *                  =   0 (0x00) .......0 "positive"
 806          */
 807         { 0x15, 0x02 },
 808
 809         /*
 810          * 33 CHLF "Current Control"
 811          *                  =   9 (0x09) 00001001
 812          *    CHLF[7:6] "Sensor current control"
 813          *                  =   0 (0x00) 00......
 814          *    CHLF[5] "Sensor current range control"
 815          *                  =   0 (0x00) ..0..... "normal range"
 816          *    CHLF[4] "Sensor current"
 817          *                  =   0 (0x00) ...0.... "normal current"
 818          *    CHLF[3] "Sensor buffer current control"
 819          *                  =   1 (0x01) ....1... "half current"
 820          *    CHLF[2] "Column buffer current control"
 821          *                  =   0 (0x00) .....0.. "normal current"
 822          *    CHLF[1] "Analog DSP current control"
 823          *                  =   0 (0x00) ......0. "normal current"
 824          *    CHLF[1] "ADC current control"
 825          *                  =   0 (0x00) ......0. "normal current"
 826          */
 827         { 0x33, 0x09 },
 828
 829         /*
 830          * 34 VBLM "Blooming Control"
 831          *                  =  80 (0x50) 01010000
 832          *    VBLM[7] "Hard soft reset switch"
 833          *                  =   0 (0x00) 0....... "Hard reset"
 834          *    VBLM[6:4] "Blooming voltage selection"
 835          *                  =   5 (0x05) .101....
 836          *    VBLM[3:0] "Sensor current control"
 837          *                  =   0 (0x00) ....0000
 838          */
 839         { 0x34, 0x50 },
 840
 841         /*
 842          * 36 VCHG "Sensor Precharge Voltage Control"
 843          *                  =   0 (0x00) 00000000
 844          *    VCHG[7] "Reserved"
 845          *                  =   0 (0x00) 0.......
 846          *    VCHG[6:4] "Sensor precharge voltage control"
 847          *                  =   0 (0x00) .000....
 848          *    VCHG[3:0] "Sensor array common reference"
 849          *                  =   0 (0x00) ....0000
 850          */
 851         { 0x36, 0x00 },
 852
 853         /*
 854          * 37 ADC "ADC Reference Control"
 855          *                  =   4 (0x04) 00000100
 856          *    ADC[7:4] "Reserved"
 857          *                  =   0 (0x00) 0000....
 858          *    ADC[3] "ADC input signal range"
 859          *                  =   0 (0x00) ....0... "Input signal 1.0x"
 860          *    ADC[2:0] "ADC range control"
 861          *                  =   4 (0x04) .....100
 862          */
 863         { 0x37, 0x04 },
 864
 865         /*
 866          * 38 ACOM "Analog Common Ground"
 867          *                  =  82 (0x52) 01010010
 868          *    ACOM[7] "Analog gain control"
 869          *                  =   0 (0x00) 0....... "Gain 1x"
 870          *    ACOM[6] "Analog black level calibration"
 871          *                  =   1 (0x01) .1...... "On"
 872          *    ACOM[5:0] "Reserved"
 873          *                  =  18 (0x12) ..010010
 874          */
 875         { 0x38, 0x52 },
 876
 877         /*
 878          * 3A FREFA "Internal Reference Adjustment"
 879          *                  =   0 (0x00) 00000000
 880          *    FREFA[7:0] "Range"
 881          *                  =   0 (0x00) 00000000
 882          */
 883         { 0x3a, 0x00 },
 884
 885         /*
 886          * 3C FVOPT "Internal Reference Adjustment"
 887          *                  =  31 (0x1F) 00011111
 888          *    FVOPT[7:0] "Range"
 889          *                  =  31 (0x1F) 00011111
 890          */
 891         { 0x3c, 0x1f },
 892
 893         /*
 894          * 44 Undocumented  =   0 (0x00) 00000000
 895          *    44[7:0] "It's a secret"
 896          *                  =   0 (0x00) 00000000
 897          */
 898         { 0x44, 0x00 },
 899
 900         /*
 901          * 40 Undocumented  =   0 (0x00) 00000000
 902          *    40[7:0] "It's a secret"
 903          *                  =   0 (0x00) 00000000
 904          */
 905         { 0x40, 0x00 },
 906
 907         /*
 908          * 41 Undocumented  =   0 (0x00) 00000000
 909          *    41[7:0] "It's a secret"
 910          *                  =   0 (0x00) 00000000
 911          */
 912         { 0x41, 0x00 },
 913
 914         /*
 915          * 42 Undocumented  =   0 (0x00) 00000000
 916          *    42[7:0] "It's a secret"
 917          *                  =   0 (0x00) 00000000
 918          */
 919         { 0x42, 0x00 },
 920
 921         /*
 922          * 43 Undocumented  =   0 (0x00) 00000000
 923          *    43[7:0] "It's a secret"
 924          *                  =   0 (0x00) 00000000
 925          */
 926         { 0x43, 0x00 },
 927
 928         /*
 929          * 45 Undocumented  = 128 (0x80) 10000000
 930          *    45[7:0] "It's a secret"
 931          *                  = 128 (0x80) 10000000
 932          */
 933         { 0x45, 0x80 },
 934
 935         /*
 936          * 48 Undocumented  = 192 (0xC0) 11000000
 937          *    48[7:0] "It's a secret"
 938          *                  = 192 (0xC0) 11000000
 939          */
 940         { 0x48, 0xc0 },
 941
 942         /*
 943          * 49 Undocumented  =  25 (0x19) 00011001
 944          *    49[7:0] "It's a secret"
 945          *                  =  25 (0x19) 00011001
 946          */
 947         { 0x49, 0x19 },
 948
 949         /*
 950          * 4B Undocumented  = 128 (0x80) 10000000
 951          *    4B[7:0] "It's a secret"
 952          *                  = 128 (0x80) 10000000
 953          */
 954         { 0x4b, 0x80 },
 955
 956         /*
 957          * 4D Undocumented  = 196 (0xC4) 11000100
 958          *    4D[7:0] "It's a secret"
 959          *                  = 196 (0xC4) 11000100
 960          */
 961         { 0x4d, 0xc4 },
 962
 963         /*
 964          * 35 VREF "Reference Voltage Control"
 965          *                  =  76 (0x4c) 01001100
 966          *    VREF[7:5] "Column high reference control"
 967          *                  =   2 (0x02) 010..... "higher voltage"
 968          *    VREF[4:2] "Column low reference control"
 969          *                  =   3 (0x03) ...011.. "Highest voltage"
 970          *    VREF[1:0] "Reserved"
 971          *                  =   0 (0x00) ......00
 972          */
 973         { 0x35, 0x4c },
 974
 975         /*
 976          * 3D Undocumented  =   0 (0x00) 00000000
 977          *    3D[7:0] "It's a secret"
 978          *                  =   0 (0x00) 00000000
 979          */
 980         { 0x3d, 0x00 },
 981
 982         /*
 983          * 3E Undocumented  =   0 (0x00) 00000000
 984          *    3E[7:0] "It's a secret"
 985          *                  =   0 (0x00) 00000000
 986          */
 987         { 0x3e, 0x00 },
 988
 989         /*
 990          * 3B FREFB "Internal Reference Adjustment"
 991          *                  =  24 (0x18) 00011000
 992          *    FREFB[7:0] "Range"
 993          *                  =  24 (0x18) 00011000
 994          */
 995         { 0x3b, 0x18 },
 996
 997         /*
 998          * 33 CHLF "Current Control"
 999          *                  =  25 (0x19) 00011001
1000          *    CHLF[7:6] "Sensor current control"
1001          *                  =   0 (0x00) 00......
1002          *    CHLF[5] "Sensor current range control"
1003          *                  =   0 (0x00) ..0..... "normal range"
1004          *    CHLF[4] "Sensor current"
1005          *                  =   1 (0x01) ...1.... "double current"
1006          *    CHLF[3] "Sensor buffer current control"
1007          *                  =   1 (0x01) ....1... "half current"
1008          *    CHLF[2] "Column buffer current control"
1009          *                  =   0 (0x00) .....0.. "normal current"
1010          *    CHLF[1] "Analog DSP current control"
1011          *                  =   0 (0x00) ......0. "normal current"
1012          *    CHLF[1] "ADC current control"
1013          *                  =   0 (0x00) ......0. "normal current"
1014          */
1015         { 0x33, 0x19 },
1016
1017         /*
1018          * 34 VBLM "Blooming Control"
1019          *                  =  90 (0x5A) 01011010
1020          *    VBLM[7] "Hard soft reset switch"
1021          *                  =   0 (0x00) 0....... "Hard reset"
1022          *    VBLM[6:4] "Blooming voltage selection"
1023          *                  =   5 (0x05) .101....
1024          *    VBLM[3:0] "Sensor current control"
1025          *                  =  10 (0x0A) ....1010
1026          */
1027         { 0x34, 0x5a },
1028
1029         /*
1030          * 3B FREFB "Internal Reference Adjustment"
1031          *                  =   0 (0x00) 00000000
1032          *    FREFB[7:0] "Range"
1033          *                  =   0 (0x00) 00000000
1034          */
1035         { 0x3b, 0x00 },
1036
1037         /*
1038          * 33 CHLF "Current Control"
1039          *                  =   9 (0x09) 00001001
1040          *    CHLF[7:6] "Sensor current control"
1041          *                  =   0 (0x00) 00......
1042          *    CHLF[5] "Sensor current range control"
1043          *                  =   0 (0x00) ..0..... "normal range"
1044          *    CHLF[4] "Sensor current"
1045          *                  =   0 (0x00) ...0.... "normal current"
1046          *    CHLF[3] "Sensor buffer current control"
1047          *                  =   1 (0x01) ....1... "half current"
1048          *    CHLF[2] "Column buffer current control"
1049          *                  =   0 (0x00) .....0.. "normal current"
1050          *    CHLF[1] "Analog DSP current control"
1051          *                  =   0 (0x00) ......0. "normal current"
1052          *    CHLF[1] "ADC current control"
1053          *                  =   0 (0x00) ......0. "normal current"
1054          */
1055         { 0x33, 0x09 },
1056
1057         /*
1058          * 34 VBLM "Blooming Control"
1059          *                  =  80 (0x50) 01010000
1060          *    VBLM[7] "Hard soft reset switch"
1061          *                  =   0 (0x00) 0....... "Hard reset"
1062          *    VBLM[6:4] "Blooming voltage selection"
1063          *                  =   5 (0x05) .101....
1064          *    VBLM[3:0] "Sensor current control"
1065          *                  =   0 (0x00) ....0000
1066          */
1067         { 0x34, 0x50 },
1068
1069         /*
1070          * 12 COMH "Common Control H"
1071          *                  =  64 (0x40) 01000000
1072          *    COMH[7] "SRST"
1073          *                  =   0 (0x00) 0....... "No-op"
1074          *    COMH[6:4] "Resolution selection"
1075          *                  =   4 (0x04) .100.... "XGA"
1076          *    COMH[3] "Master slave selection"
1077          *                  =   0 (0x00) ....0... "Master mode"
1078          *    COMH[2] "Internal B/R channel option"
1079          *                  =   0 (0x00) .....0.. "B/R use same channel"
1080          *    COMH[1] "Color bar test pattern"
1081          *                  =   0 (0x00) ......0. "Off"
1082          *    COMH[0] "Reserved"
1083          *                  =   0 (0x00) .......0
1084          */
1085         { 0x12, 0x40 },
1086
1087         /*
1088          * 17 HREFST "Horizontal window start"
1089          *                  =  31 (0x1F) 00011111
1090          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1091          *                  =  31 (0x1F) 00011111
1092          */
1093         { 0x17, 0x1f },
1094
1095         /*
1096          * 18 HREFEND "Horizontal window end"
1097          *                  =  95 (0x5F) 01011111
1098          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1099          *                  =  95 (0x5F) 01011111
1100          */
1101         { 0x18, 0x5f },
1102
1103         /*
1104          * 19 VSTRT "Vertical window start"
1105          *                  =   0 (0x00) 00000000
1106          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1107          *                  =   0 (0x00) 00000000
1108          */
1109         { 0x19, 0x00 },
1110
1111         /*
1112          * 1A VEND "Vertical window end"
1113          *                  =  96 (0x60) 01100000
1114          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1115          *                  =  96 (0x60) 01100000
1116          */
1117         { 0x1a, 0x60 },
1118
1119         /*
1120          * 32 COMM "Common Control M"
1121          *                  =  18 (0x12) 00010010
1122          *    COMM[7:6] "Pixel clock divide option"
1123          *                  =   0 (0x00) 00...... "/1"
1124          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1125          *                  =   2 (0x02) ..010...
1126          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1127          *                  =   2 (0x02) .....010
1128          */
1129         { 0x32, 0x12 },
1130
1131         /*
1132          * 03 COMA "Common Control A"
1133          *                  =  74 (0x4A) 01001010
1134          *    COMA[7:4] "AWB Update Threshold"
1135          *                  =   4 (0x04) 0100....
1136          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1137          *                  =   2 (0x02) ....10..
1138          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1139          *                  =   2 (0x02) ......10
1140          */
1141         { 0x03, 0x4a },
1142
1143         /*
1144          * 11 CLKRC "Clock Rate Control"
1145          *                  = 128 (0x80) 10000000
1146          *    CLKRC[7] "Internal frequency doublers on off seclection"
1147          *                  =   1 (0x01) 1....... "On"
1148          *    CLKRC[6] "Digital video master slave selection"
1149          *                  =   0 (0x00) .0...... "Master mode, sensor
1150          *                                         provides PCLK"
1151          *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1152          *                  =   0 (0x00) ..000000
1153          */
1154         { 0x11, 0x80 },
1155
1156         /*
1157          * 12 COMH "Common Control H"
1158          *                  =   0 (0x00) 00000000
1159          *    COMH[7] "SRST"
1160          *                  =   0 (0x00) 0....... "No-op"
1161          *    COMH[6:4] "Resolution selection"
1162          *                  =   0 (0x00) .000.... "QXGA"
1163          *    COMH[3] "Master slave selection"
1164          *                  =   0 (0x00) ....0... "Master mode"
1165          *    COMH[2] "Internal B/R channel option"
1166          *                  =   0 (0x00) .....0.. "B/R use same channel"
1167          *    COMH[1] "Color bar test pattern"
1168          *                  =   0 (0x00) ......0. "Off"
1169          *    COMH[0] "Reserved"
1170          *                  =   0 (0x00) .......0
1171          */
1172         { 0x12, 0x00 },
1173
1174         /*
1175          * 12 COMH "Common Control H"
1176          *                  =  64 (0x40) 01000000
1177          *    COMH[7] "SRST"
1178          *                  =   0 (0x00) 0....... "No-op"
1179          *    COMH[6:4] "Resolution selection"
1180          *                  =   4 (0x04) .100.... "XGA"
1181          *    COMH[3] "Master slave selection"
1182          *                  =   0 (0x00) ....0... "Master mode"
1183          *    COMH[2] "Internal B/R channel option"
1184          *                  =   0 (0x00) .....0.. "B/R use same channel"
1185          *    COMH[1] "Color bar test pattern"
1186          *                  =   0 (0x00) ......0. "Off"
1187          *    COMH[0] "Reserved"
1188          *                  =   0 (0x00) .......0
1189          */
1190         { 0x12, 0x40 },
1191
1192         /*
1193          * 17 HREFST "Horizontal window start"
1194          *                  =  31 (0x1F) 00011111
1195          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1196          *                  =  31 (0x1F) 00011111
1197          */
1198         { 0x17, 0x1f },
1199
1200         /*
1201          * 18 HREFEND "Horizontal window end"
1202          *                  =  95 (0x5F) 01011111
1203          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1204          *                  =  95 (0x5F) 01011111
1205          */
1206         { 0x18, 0x5f },
1207
1208         /*
1209          * 19 VSTRT "Vertical window start"
1210          *                  =   0 (0x00) 00000000
1211          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1212          *                  =   0 (0x00) 00000000
1213          */
1214         { 0x19, 0x00 },
1215
1216         /*
1217          * 1A VEND "Vertical window end"
1218          *                  =  96 (0x60) 01100000
1219          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1220          *                  =  96 (0x60) 01100000
1221          */
1222         { 0x1a, 0x60 },
1223
1224         /*
1225          * 32 COMM "Common Control M"
1226          *                  =  18 (0x12) 00010010
1227          *    COMM[7:6] "Pixel clock divide option"
1228          *                  =   0 (0x00) 00...... "/1"
1229          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1230          *                  =   2 (0x02) ..010...
1231          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1232          *                  =   2 (0x02) .....010
1233          */
1234         { 0x32, 0x12 },
1235
1236         /*
1237          * 03 COMA "Common Control A"
1238          *                  =  74 (0x4A) 01001010
1239          *    COMA[7:4] "AWB Update Threshold"
1240          *                  =   4 (0x04) 0100....
1241          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1242          *                  =   2 (0x02) ....10..
1243          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1244          *                  =   2 (0x02) ......10
1245          */
1246         { 0x03, 0x4a },
1247
1248         /*
1249          * 02 RED "Red Gain Control"
1250          *                  = 175 (0xAF) 10101111
1251          *    RED[7] "Action"
1252          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1253          *    RED[6:0] "Value"
1254          *                  =  47 (0x2F) .0101111
1255          */
1256         { 0x02, 0xaf },
1257
1258         /*
1259          * 2D ADDVSL "VSYNC Pulse Width"
1260          *                  = 210 (0xD2) 11010010
1261          *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1262          *                  = 210 (0xD2) 11010010
1263          */
1264         { 0x2d, 0xd2 },
1265
1266         /*
1267          * 00 GAIN          =  24 (0x18) 00011000
1268          *    GAIN[7:6] "Reserved"
1269          *                  =   0 (0x00) 00......
1270          *    GAIN[5] "Double"
1271          *                  =   0 (0x00) ..0..... "False"
1272          *    GAIN[4] "Double"
1273          *                  =   1 (0x01) ...1.... "True"
1274          *    GAIN[3:0] "Range"
1275          *                  =   8 (0x08) ....1000
1276          */
1277         { 0x00, 0x18 },
1278
1279         /*
1280          * 01 BLUE "Blue Gain Control"
1281          *                  = 240 (0xF0) 11110000
1282          *    BLUE[7] "Action"
1283          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1284          *    BLUE[6:0] "Value"
1285          *                  = 112 (0x70) .1110000
1286          */
1287         { 0x01, 0xf0 },
1288
1289         /*
1290          * 10 AEC "Automatic Exposure Control"
1291          *                  =  10 (0x0A) 00001010
1292          *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1293          *                  =  10 (0x0A) 00001010
1294          */
1295         { 0x10, 0x0a },
1296
1297         { 0xe1, 0x67 },
1298         { 0xe3, 0x03 },
1299         { 0xe4, 0x26 },
1300         { 0xe5, 0x3e },
1301         { 0xf8, 0x01 },
1302         { 0xff, 0x01 },
1303 };
1304
1305 static const struct ov_i2c_regvals norm_6x20[] = {
1306         { 0x12, 0x80 }, /* reset */
1307         { 0x11, 0x01 },
1308         { 0x03, 0x60 },
1309         { 0x05, 0x7f }, /* For when autoadjust is off */
1310         { 0x07, 0xa8 },
1311         /* The ratio of 0x0c and 0x0d controls the white point */
1312         { 0x0c, 0x24 },
1313         { 0x0d, 0x24 },
1314         { 0x0f, 0x15 }, /* COMS */
1315         { 0x10, 0x75 }, /* AEC Exposure time */
1316         { 0x12, 0x24 }, /* Enable AGC */
1317         { 0x14, 0x04 },
1318         /* 0x16: 0x06 helps frame stability with moving objects */
1319         { 0x16, 0x06 },
1320 /*      { 0x20, 0x30 },  * Aperture correction enable */
1321         { 0x26, 0xb2 }, /* BLC enable */
1322         /* 0x28: 0x05 Selects RGB format if RGB on */
1323         { 0x28, 0x05 },
1324         { 0x2a, 0x04 }, /* Disable framerate adjust */
1325 /*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1326         { 0x2d, 0x85 },
1327         { 0x33, 0xa0 }, /* Color Processing Parameter */
1328         { 0x34, 0xd2 }, /* Max A/D range */
1329         { 0x38, 0x8b },
1330         { 0x39, 0x40 },
1331
1332         { 0x3c, 0x39 }, /* Enable AEC mode changing */
1333         { 0x3c, 0x3c }, /* Change AEC mode */
1334         { 0x3c, 0x24 }, /* Disable AEC mode changing */
1335
1336         { 0x3d, 0x80 },
1337         /* These next two registers (0x4a, 0x4b) are undocumented.
1338          * They control the color balance */
1339         { 0x4a, 0x80 },
1340         { 0x4b, 0x80 },
1341         { 0x4d, 0xd2 }, /* This reduces noise a bit */
1342         { 0x4e, 0xc1 },
1343         { 0x4f, 0x04 },
1344 /* Do 50-53 have any effect? */
1345 /* Toggle 0x12[2] off and on here? */
1346 };
1347
1348 static const struct ov_i2c_regvals norm_6x30[] = {
1349         { 0x12, 0x80 }, /* Reset */
1350         { 0x00, 0x1f }, /* Gain */
1351         { 0x01, 0x99 }, /* Blue gain */
1352         { 0x02, 0x7c }, /* Red gain */
1353         { 0x03, 0xc0 }, /* Saturation */
1354         { 0x05, 0x0a }, /* Contrast */
1355         { 0x06, 0x95 }, /* Brightness */
1356         { 0x07, 0x2d }, /* Sharpness */
1357         { 0x0c, 0x20 },
1358         { 0x0d, 0x20 },
1359         { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1360         { 0x0f, 0x05 },
1361         { 0x10, 0x9a },
1362         { 0x11, 0x00 }, /* Pixel clock = fastest */
1363         { 0x12, 0x24 }, /* Enable AGC and AWB */
1364         { 0x13, 0x21 },
1365         { 0x14, 0x80 },
1366         { 0x15, 0x01 },
1367         { 0x16, 0x03 },
1368         { 0x17, 0x38 },
1369         { 0x18, 0xea },
1370         { 0x19, 0x04 },
1371         { 0x1a, 0x93 },
1372         { 0x1b, 0x00 },
1373         { 0x1e, 0xc4 },
1374         { 0x1f, 0x04 },
1375         { 0x20, 0x20 },
1376         { 0x21, 0x10 },
1377         { 0x22, 0x88 },
1378         { 0x23, 0xc0 }, /* Crystal circuit power level */
1379         { 0x25, 0x9a }, /* Increase AEC black ratio */
1380         { 0x26, 0xb2 }, /* BLC enable */
1381         { 0x27, 0xa2 },
1382         { 0x28, 0x00 },
1383         { 0x29, 0x00 },
1384         { 0x2a, 0x84 }, /* 60 Hz power */
1385         { 0x2b, 0xa8 }, /* 60 Hz power */
1386         { 0x2c, 0xa0 },
1387         { 0x2d, 0x95 }, /* Enable auto-brightness */
1388         { 0x2e, 0x88 },
1389         { 0x33, 0x26 },
1390         { 0x34, 0x03 },
1391         { 0x36, 0x8f },
1392         { 0x37, 0x80 },
1393         { 0x38, 0x83 },
1394         { 0x39, 0x80 },
1395         { 0x3a, 0x0f },
1396         { 0x3b, 0x3c },
1397         { 0x3c, 0x1a },
1398         { 0x3d, 0x80 },
1399         { 0x3e, 0x80 },
1400         { 0x3f, 0x0e },
1401         { 0x40, 0x00 }, /* White bal */
1402         { 0x41, 0x00 }, /* White bal */
1403         { 0x42, 0x80 },
1404         { 0x43, 0x3f }, /* White bal */
1405         { 0x44, 0x80 },
1406         { 0x45, 0x20 },
1407         { 0x46, 0x20 },
1408         { 0x47, 0x80 },
1409         { 0x48, 0x7f },
1410         { 0x49, 0x00 },
1411         { 0x4a, 0x00 },
1412         { 0x4b, 0x80 },
1413         { 0x4c, 0xd0 },
1414         { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1415         { 0x4e, 0x40 },
1416         { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1417         { 0x50, 0xff },
1418         { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1419         { 0x55, 0xff },
1420         { 0x56, 0x12 },
1421         { 0x57, 0x81 },
1422         { 0x58, 0x75 },
1423         { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1424         { 0x5a, 0x2c },
1425         { 0x5b, 0x0f }, /* AWB chrominance levels */
1426         { 0x5c, 0x10 },
1427         { 0x3d, 0x80 },
1428         { 0x27, 0xa6 },
1429         { 0x12, 0x20 }, /* Toggle AWB */
1430         { 0x12, 0x24 },
1431 };
1432
1433 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1434  *
1435  * Register 0x0f in the 7610 has the following effects:
1436  *
1437  * 0x85 (AEC method 1): Best overall, good contrast range
1438  * 0x45 (AEC method 2): Very overexposed
1439  * 0xa5 (spec sheet default): Ok, but the black level is
1440  *      shifted resulting in loss of contrast
1441  * 0x05 (old driver setting): very overexposed, too much
1442  *      contrast
1443  */
1444 static const struct ov_i2c_regvals norm_7610[] = {
1445         { 0x10, 0xff },
1446         { 0x16, 0x06 },
1447         { 0x28, 0x24 },
1448         { 0x2b, 0xac },
1449         { 0x12, 0x00 },
1450         { 0x38, 0x81 },
1451         { 0x28, 0x24 }, /* 0c */
1452         { 0x0f, 0x85 }, /* lg's setting */
1453         { 0x15, 0x01 },
1454         { 0x20, 0x1c },
1455         { 0x23, 0x2a },
1456         { 0x24, 0x10 },
1457         { 0x25, 0x8a },
1458         { 0x26, 0xa2 },
1459         { 0x27, 0xc2 },
1460         { 0x2a, 0x04 },
1461         { 0x2c, 0xfe },
1462         { 0x2d, 0x93 },
1463         { 0x30, 0x71 },
1464         { 0x31, 0x60 },
1465         { 0x32, 0x26 },
1466         { 0x33, 0x20 },
1467         { 0x34, 0x48 },
1468         { 0x12, 0x24 },
1469         { 0x11, 0x01 },
1470         { 0x0c, 0x24 },
1471         { 0x0d, 0x24 },
1472 };
1473
1474 static const struct ov_i2c_regvals norm_7620[] = {
1475         { 0x12, 0x80 },         /* reset */
1476         { 0x00, 0x00 },         /* gain */
1477         { 0x01, 0x80 },         /* blue gain */
1478         { 0x02, 0x80 },         /* red gain */
1479         { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1480         { 0x06, 0x60 },
1481         { 0x07, 0x00 },
1482         { 0x0c, 0x24 },
1483         { 0x0c, 0x24 },
1484         { 0x0d, 0x24 },
1485         { 0x11, 0x01 },
1486         { 0x12, 0x24 },
1487         { 0x13, 0x01 },
1488         { 0x14, 0x84 },
1489         { 0x15, 0x01 },
1490         { 0x16, 0x03 },
1491         { 0x17, 0x2f },
1492         { 0x18, 0xcf },
1493         { 0x19, 0x06 },
1494         { 0x1a, 0xf5 },
1495         { 0x1b, 0x00 },
1496         { 0x20, 0x18 },
1497         { 0x21, 0x80 },
1498         { 0x22, 0x80 },
1499         { 0x23, 0x00 },
1500         { 0x26, 0xa2 },
1501         { 0x27, 0xea },
1502         { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1503         { 0x29, 0x00 },
1504         { 0x2a, 0x10 },
1505         { 0x2b, 0x00 },
1506         { 0x2c, 0x88 },
1507         { 0x2d, 0x91 },
1508         { 0x2e, 0x80 },
1509         { 0x2f, 0x44 },
1510         { 0x60, 0x27 },
1511         { 0x61, 0x02 },
1512         { 0x62, 0x5f },
1513         { 0x63, 0xd5 },
1514         { 0x64, 0x57 },
1515         { 0x65, 0x83 },
1516         { 0x66, 0x55 },
1517         { 0x67, 0x92 },
1518         { 0x68, 0xcf },
1519         { 0x69, 0x76 },
1520         { 0x6a, 0x22 },
1521         { 0x6b, 0x00 },
1522         { 0x6c, 0x02 },
1523         { 0x6d, 0x44 },
1524         { 0x6e, 0x80 },
1525         { 0x6f, 0x1d },
1526         { 0x70, 0x8b },
1527         { 0x71, 0x00 },
1528         { 0x72, 0x14 },
1529         { 0x73, 0x54 },
1530         { 0x74, 0x00 },
1531         { 0x75, 0x8e },
1532         { 0x76, 0x00 },
1533         { 0x77, 0xff },
1534         { 0x78, 0x80 },
1535         { 0x79, 0x80 },
1536         { 0x7a, 0x80 },
1537         { 0x7b, 0xe2 },
1538         { 0x7c, 0x00 },
1539 };
1540
1541 /* 7640 and 7648. The defaults should be OK for most registers. */
1542 static const struct ov_i2c_regvals norm_7640[] = {
1543         { 0x12, 0x80 },
1544         { 0x12, 0x14 },
1545 };
1546
1547 static const struct ov_regvals init_519_ov7660[] = {
1548         { 0x5d, 0x03 }, /* Turn off suspend mode */
1549         { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1550         { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1551         { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1552         { 0xa3, 0x18 },
1553         { 0xa4, 0x04 },
1554         { 0xa5, 0x28 },
1555         { 0x37, 0x00 }, /* SetUsbInit */
1556         { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1557         /* Enable both fields, YUV Input, disable defect comp (why?) */
1558         { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1559         { 0x21, 0x38 },
1560         { 0x22, 0x1d },
1561         { 0x17, 0x50 }, /* undocumented */
1562         { 0x37, 0x00 }, /* undocumented */
1563         { 0x40, 0xff }, /* I2C timeout counter */
1564         { 0x46, 0x00 }, /* I2C clock prescaler */
1565 };
1566 static const struct ov_i2c_regvals norm_7660[] = {
1567         {OV7670_R12_COM7, OV7670_COM7_RESET},
1568         {OV7670_R11_CLKRC, 0x81},
1569         {0x92, 0x00},                   /* DM_LNL */
1570         {0x93, 0x00},                   /* DM_LNH */
1571         {0x9d, 0x4c},                   /* BD50ST */
1572         {0x9e, 0x3f},                   /* BD60ST */
1573         {OV7670_R3B_COM11, 0x02},
1574         {OV7670_R13_COM8, 0xf5},
1575         {OV7670_R10_AECH, 0x00},
1576         {OV7670_R00_GAIN, 0x00},
1577         {OV7670_R01_BLUE, 0x7c},
1578         {OV7670_R02_RED, 0x9d},
1579         {OV7670_R12_COM7, 0x00},
1580         {OV7670_R04_COM1, 00},
1581         {OV7670_R18_HSTOP, 0x01},
1582         {OV7670_R17_HSTART, 0x13},
1583         {OV7670_R32_HREF, 0x92},
1584         {OV7670_R19_VSTART, 0x02},
1585         {OV7670_R1A_VSTOP, 0x7a},
1586         {OV7670_R03_VREF, 0x00},
1587         {OV7670_R0E_COM5, 0x04},
1588         {OV7670_R0F_COM6, 0x62},
1589         {OV7670_R15_COM10, 0x00},
1590         {0x16, 0x02},                   /* RSVD */
1591         {0x1b, 0x00},                   /* PSHFT */
1592         {OV7670_R1E_MVFP, 0x01},
1593         {0x29, 0x3c},                   /* RSVD */
1594         {0x33, 0x00},                   /* CHLF */
1595         {0x34, 0x07},                   /* ARBLM */
1596         {0x35, 0x84},                   /* RSVD */
1597         {0x36, 0x00},                   /* RSVD */
1598         {0x37, 0x04},                   /* ADC */
1599         {0x39, 0x43},                   /* OFON */
1600         {OV7670_R3A_TSLB, 0x00},
1601         {OV7670_R3C_COM12, 0x6c},
1602         {OV7670_R3D_COM13, 0x98},
1603         {OV7670_R3F_EDGE, 0x23},
1604         {OV7670_R40_COM15, 0xc1},
1605         {OV7670_R41_COM16, 0x22},
1606         {0x6b, 0x0a},                   /* DBLV */
1607         {0xa1, 0x08},                   /* RSVD */
1608         {0x69, 0x80},                   /* HV */
1609         {0x43, 0xf0},                   /* RSVD.. */
1610         {0x44, 0x10},
1611         {0x45, 0x78},
1612         {0x46, 0xa8},
1613         {0x47, 0x60},
1614         {0x48, 0x80},
1615         {0x59, 0xba},
1616         {0x5a, 0x9a},
1617         {0x5b, 0x22},
1618         {0x5c, 0xb9},
1619         {0x5d, 0x9b},
1620         {0x5e, 0x10},
1621         {0x5f, 0xe0},
1622         {0x60, 0x85},
1623         {0x61, 0x60},
1624         {0x9f, 0x9d},                   /* RSVD */
1625         {0xa0, 0xa0},                   /* DSPC2 */
1626         {0x4f, 0x60},                   /* matrix */
1627         {0x50, 0x64},
1628         {0x51, 0x04},
1629         {0x52, 0x18},
1630         {0x53, 0x3c},
1631         {0x54, 0x54},
1632         {0x55, 0x40},
1633         {0x56, 0x40},
1634         {0x57, 0x40},
1635         {0x58, 0x0d},                   /* matrix sign */
1636         {0x8b, 0xcc},                   /* RSVD */
1637         {0x8c, 0xcc},
1638         {0x8d, 0xcf},
1639         {0x6c, 0x40},                   /* gamma curve */
1640         {0x6d, 0xe0},
1641         {0x6e, 0xa0},
1642         {0x6f, 0x80},
1643         {0x70, 0x70},
1644         {0x71, 0x80},
1645         {0x72, 0x60},
1646         {0x73, 0x60},
1647         {0x74, 0x50},
1648         {0x75, 0x40},
1649         {0x76, 0x38},
1650         {0x77, 0x3c},
1651         {0x78, 0x32},
1652         {0x79, 0x1a},
1653         {0x7a, 0x28},
1654         {0x7b, 0x24},
1655         {0x7c, 0x04},                   /* gamma curve */
1656         {0x7d, 0x12},
1657         {0x7e, 0x26},
1658         {0x7f, 0x46},
1659         {0x80, 0x54},
1660         {0x81, 0x64},
1661         {0x82, 0x70},
1662         {0x83, 0x7c},
1663         {0x84, 0x86},
1664         {0x85, 0x8e},
1665         {0x86, 0x9c},
1666         {0x87, 0xab},
1667         {0x88, 0xc4},
1668         {0x89, 0xd1},
1669         {0x8a, 0xe5},
1670         {OV7670_R14_COM9, 0x1e},
1671         {OV7670_R24_AEW, 0x80},
1672         {OV7670_R25_AEB, 0x72},
1673         {OV7670_R26_VPT, 0xb3},
1674         {0x62, 0x80},                   /* LCC1 */
1675         {0x63, 0x80},                   /* LCC2 */
1676         {0x64, 0x06},                   /* LCC3 */
1677         {0x65, 0x00},                   /* LCC4 */
1678         {0x66, 0x01},                   /* LCC5 */
1679         {0x94, 0x0e},                   /* RSVD.. */
1680         {0x95, 0x14},
1681         {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1682                         | OV7670_COM8_AECSTEP
1683                         | OV7670_COM8_BFILT
1684                         | 0x10
1685                         | OV7670_COM8_AGC
1686                         | OV7670_COM8_AWB
1687                         | OV7670_COM8_AEC},
1688         {0xa1, 0xc8}
1689 };
1690 static const struct ov_i2c_regvals norm_9600[] = {
1691         {0x12, 0x80},
1692         {0x0c, 0x28},
1693         {0x11, 0x80},
1694         {0x13, 0xb5},
1695         {0x14, 0x3e},
1696         {0x1b, 0x04},
1697         {0x24, 0xb0},
1698         {0x25, 0x90},
1699         {0x26, 0x94},
1700         {0x35, 0x90},
1701         {0x37, 0x07},
1702         {0x38, 0x08},
1703         {0x01, 0x8e},
1704         {0x02, 0x85}
1705 };
1706
1707 /* 7670. Defaults taken from OmniVision provided data,
1708 *  as provided by Jonathan Corbet of OLPC               */
1709 static const struct ov_i2c_regvals norm_7670[] = {
1710         { OV7670_R12_COM7, OV7670_COM7_RESET },
1711         { OV7670_R3A_TSLB, 0x04 },              /* OV */
1712         { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1713         { OV7670_R11_CLKRC, 0x01 },
1714 /*
1715  * Set the hardware window.  These values from OV don't entirely
1716  * make sense - hstop is less than hstart.  But they work...
1717  */
1718         { OV7670_R17_HSTART, 0x13 },
1719         { OV7670_R18_HSTOP, 0x01 },
1720         { OV7670_R32_HREF, 0xb6 },
1721         { OV7670_R19_VSTART, 0x02 },
1722         { OV7670_R1A_VSTOP, 0x7a },
1723         { OV7670_R03_VREF, 0x0a },
1724
1725         { OV7670_R0C_COM3, 0x00 },
1726         { OV7670_R3E_COM14, 0x00 },
1727 /* Mystery scaling numbers */
1728         { 0x70, 0x3a },
1729         { 0x71, 0x35 },
1730         { 0x72, 0x11 },
1731         { 0x73, 0xf0 },
1732         { 0xa2, 0x02 },
1733 /*      { OV7670_R15_COM10, 0x0 }, */
1734
1735 /* Gamma curve values */
1736         { 0x7a, 0x20 },
1737         { 0x7b, 0x10 },
1738         { 0x7c, 0x1e },
1739         { 0x7d, 0x35 },
1740         { 0x7e, 0x5a },
1741         { 0x7f, 0x69 },
1742         { 0x80, 0x76 },
1743         { 0x81, 0x80 },
1744         { 0x82, 0x88 },
1745         { 0x83, 0x8f },
1746         { 0x84, 0x96 },
1747         { 0x85, 0xa3 },
1748         { 0x86, 0xaf },
1749         { 0x87, 0xc4 },
1750         { 0x88, 0xd7 },
1751         { 0x89, 0xe8 },
1752
1753 /* AGC and AEC parameters.  Note we start by disabling those features,
1754    then turn them only after tweaking the values. */
1755         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1756                          | OV7670_COM8_AECSTEP
1757                          | OV7670_COM8_BFILT },
1758         { OV7670_R00_GAIN, 0x00 },
1759         { OV7670_R10_AECH, 0x00 },
1760         { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1761         { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1762         { OV7670_RA5_BD50MAX, 0x05 },
1763         { OV7670_RAB_BD60MAX, 0x07 },
1764         { OV7670_R24_AEW, 0x95 },
1765         { OV7670_R25_AEB, 0x33 },
1766         { OV7670_R26_VPT, 0xe3 },
1767         { OV7670_R9F_HAECC1, 0x78 },
1768         { OV7670_RA0_HAECC2, 0x68 },
1769         { 0xa1, 0x03 }, /* magic */
1770         { OV7670_RA6_HAECC3, 0xd8 },
1771         { OV7670_RA7_HAECC4, 0xd8 },
1772         { OV7670_RA8_HAECC5, 0xf0 },
1773         { OV7670_RA9_HAECC6, 0x90 },
1774         { OV7670_RAA_HAECC7, 0x94 },
1775         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1776                         | OV7670_COM8_AECSTEP
1777                         | OV7670_COM8_BFILT
1778                         | OV7670_COM8_AGC
1779                         | OV7670_COM8_AEC },
1780
1781 /* Almost all of these are magic "reserved" values.  */
1782         { OV7670_R0E_COM5, 0x61 },
1783         { OV7670_R0F_COM6, 0x4b },
1784         { 0x16, 0x02 },
1785         { OV7670_R1E_MVFP, 0x07 },
1786         { 0x21, 0x02 },
1787         { 0x22, 0x91 },
1788         { 0x29, 0x07 },
1789         { 0x33, 0x0b },
1790         { 0x35, 0x0b },
1791         { 0x37, 0x1d },
1792         { 0x38, 0x71 },
1793         { 0x39, 0x2a },
1794         { OV7670_R3C_COM12, 0x78 },
1795         { 0x4d, 0x40 },
1796         { 0x4e, 0x20 },
1797         { OV7670_R69_GFIX, 0x00 },
1798         { 0x6b, 0x4a },
1799         { 0x74, 0x10 },
1800         { 0x8d, 0x4f },
1801         { 0x8e, 0x00 },
1802         { 0x8f, 0x00 },
1803         { 0x90, 0x00 },
1804         { 0x91, 0x00 },
1805         { 0x96, 0x00 },
1806         { 0x9a, 0x00 },
1807         { 0xb0, 0x84 },
1808         { 0xb1, 0x0c },
1809         { 0xb2, 0x0e },
1810         { 0xb3, 0x82 },
1811         { 0xb8, 0x0a },
1812
1813 /* More reserved magic, some of which tweaks white balance */
1814         { 0x43, 0x0a },
1815         { 0x44, 0xf0 },
1816         { 0x45, 0x34 },
1817         { 0x46, 0x58 },
1818         { 0x47, 0x28 },
1819         { 0x48, 0x3a },
1820         { 0x59, 0x88 },
1821         { 0x5a, 0x88 },
1822         { 0x5b, 0x44 },
1823         { 0x5c, 0x67 },
1824         { 0x5d, 0x49 },
1825         { 0x5e, 0x0e },
1826         { 0x6c, 0x0a },
1827         { 0x6d, 0x55 },
1828         { 0x6e, 0x11 },
1829         { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1830         { 0x6a, 0x40 },
1831         { OV7670_R01_BLUE, 0x40 },
1832         { OV7670_R02_RED, 0x60 },
1833         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1834                         | OV7670_COM8_AECSTEP
1835                         | OV7670_COM8_BFILT
1836                         | OV7670_COM8_AGC
1837                         | OV7670_COM8_AEC
1838                         | OV7670_COM8_AWB },
1839
1840 /* Matrix coefficients */
1841         { 0x4f, 0x80 },
1842         { 0x50, 0x80 },
1843         { 0x51, 0x00 },
1844         { 0x52, 0x22 },
1845         { 0x53, 0x5e },
1846         { 0x54, 0x80 },
1847         { 0x58, 0x9e },
1848
1849         { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1850         { OV7670_R3F_EDGE, 0x00 },
1851         { 0x75, 0x05 },
1852         { 0x76, 0xe1 },
1853         { 0x4c, 0x00 },
1854         { 0x77, 0x01 },
1855         { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1856                           | OV7670_COM13_UVSAT
1857                           | 2},         /* was 3 */
1858         { 0x4b, 0x09 },
1859         { 0xc9, 0x60 },
1860         { OV7670_R41_COM16, 0x38 },
1861         { 0x56, 0x40 },
1862
1863         { 0x34, 0x11 },
1864         { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1865         { 0xa4, 0x88 },
1866         { 0x96, 0x00 },
1867         { 0x97, 0x30 },
1868         { 0x98, 0x20 },
1869         { 0x99, 0x30 },
1870         { 0x9a, 0x84 },
1871         { 0x9b, 0x29 },
1872         { 0x9c, 0x03 },
1873         { 0x9d, 0x4c },
1874         { 0x9e, 0x3f },
1875         { 0x78, 0x04 },
1876
1877 /* Extra-weird stuff.  Some sort of multiplexor register */
1878         { 0x79, 0x01 },
1879         { 0xc8, 0xf0 },
1880         { 0x79, 0x0f },
1881         { 0xc8, 0x00 },
1882         { 0x79, 0x10 },
1883         { 0xc8, 0x7e },
1884         { 0x79, 0x0a },
1885         { 0xc8, 0x80 },
1886         { 0x79, 0x0b },
1887         { 0xc8, 0x01 },
1888         { 0x79, 0x0c },
1889         { 0xc8, 0x0f },
1890         { 0x79, 0x0d },
1891         { 0xc8, 0x20 },
1892         { 0x79, 0x09 },
1893         { 0xc8, 0x80 },
1894         { 0x79, 0x02 },
1895         { 0xc8, 0xc0 },
1896         { 0x79, 0x03 },
1897         { 0xc8, 0x40 },
1898         { 0x79, 0x05 },
1899         { 0xc8, 0x30 },
1900         { 0x79, 0x26 },
1901 };
1902
1903 static const struct ov_i2c_regvals norm_8610[] = {
1904         { 0x12, 0x80 },
1905         { 0x00, 0x00 },
1906         { 0x01, 0x80 },
1907         { 0x02, 0x80 },
1908         { 0x03, 0xc0 },
1909         { 0x04, 0x30 },
1910         { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1911         { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1912         { 0x0a, 0x86 },
1913         { 0x0b, 0xb0 },
1914         { 0x0c, 0x20 },
1915         { 0x0d, 0x20 },
1916         { 0x11, 0x01 },
1917         { 0x12, 0x25 },
1918         { 0x13, 0x01 },
1919         { 0x14, 0x04 },
1920         { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1921         { 0x16, 0x03 },
1922         { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1923         { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1924         { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1925         { 0x1a, 0xf5 },
1926         { 0x1b, 0x00 },
1927         { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1928         { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1929         { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1930         { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1931         { 0x26, 0xa2 },
1932         { 0x27, 0xea },
1933         { 0x28, 0x00 },
1934         { 0x29, 0x00 },
1935         { 0x2a, 0x80 },
1936         { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1937         { 0x2c, 0xac },
1938         { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1939         { 0x2e, 0x80 },
1940         { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1941         { 0x4c, 0x00 },
1942         { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1943         { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1944         { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1945         { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1946         { 0x63, 0xff },
1947         { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1948                          * maybe thats wrong */
1949         { 0x65, 0x00 },
1950         { 0x66, 0x55 },
1951         { 0x67, 0xb0 },
1952         { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1953         { 0x69, 0x02 },
1954         { 0x6a, 0x22 },
1955         { 0x6b, 0x00 },
1956         { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1957                          * deleting bit7 colors the first images red */
1958         { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1959         { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1960         { 0x6f, 0x01 },
1961         { 0x70, 0x8b },
1962         { 0x71, 0x00 },
1963         { 0x72, 0x14 },
1964         { 0x73, 0x54 },
1965         { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1966         { 0x75, 0x0e },
1967         { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1968         { 0x77, 0xff },
1969         { 0x78, 0x80 },
1970         { 0x79, 0x80 },
1971         { 0x7a, 0x80 },
1972         { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1973         { 0x7c, 0x00 },
1974         { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1975         { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1976         { 0x7f, 0xfb },
1977         { 0x80, 0x28 },
1978         { 0x81, 0x00 },
1979         { 0x82, 0x23 },
1980         { 0x83, 0x0b },
1981         { 0x84, 0x00 },
1982         { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1983         { 0x86, 0xc9 },
1984         { 0x87, 0x00 },
1985         { 0x88, 0x00 },
1986         { 0x89, 0x01 },
1987         { 0x12, 0x20 },
1988         { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1989 };
1990
1991 static unsigned char ov7670_abs_to_sm(unsigned char v)
1992 {
1993         if (v > 127)
1994                 return v & 0x7f;
1995         return (128 - v) | 0x80;
1996 }
1997
1998 /* Write a OV519 register */
1999 static void reg_w(struct sd *sd, u16 index, u16 value)
2000 {
2001         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2002         int ret, req = 0;
2003
2004         if (sd->gspca_dev.usb_err < 0)
2005                 return;
2006
2007         /* Avoid things going to fast for the bridge with a xhci host */
2008         udelay(150);
2009
2010         switch (sd->bridge) {
2011         case BRIDGE_OV511:
2012         case BRIDGE_OV511PLUS:
2013                 req = 2;
2014                 break;
2015         case BRIDGE_OVFX2:
2016                 req = 0x0a;
2017                 /* fall through */
2018         case BRIDGE_W9968CF:
2019                 PDEBUG(D_USBO, "SET %02x %04x %04x",
2020                                 req, value, index);
2021                 ret = usb_control_msg(sd->gspca_dev.dev,
2022                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2023                         req,
2024                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2025                         value, index, NULL, 0, 500);
2026                 goto leave;
2027         default:
2028                 req = 1;
2029         }
2030
2031         PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2032                         req, index, value);
2033         sd->gspca_dev.usb_buf[0] = value;
2034         ret = usb_control_msg(sd->gspca_dev.dev,
2035                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2036                         req,
2037                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2038                         0, index,
2039                         sd->gspca_dev.usb_buf, 1, 500);
2040 leave:
2041         if (ret < 0) {
2042                 PERR("reg_w %02x failed %d\n", index, ret);
2043                 sd->gspca_dev.usb_err = ret;
2044                 return;
2045         }
2046 }
2047
2048 /* Read from a OV519 register, note not valid for the w9968cf!! */
2049 /* returns: negative is error, pos or zero is data */
2050 static int reg_r(struct sd *sd, u16 index)
2051 {
2052         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2053         int ret;
2054         int req;
2055
2056         if (sd->gspca_dev.usb_err < 0)
2057                 return -1;
2058
2059         switch (sd->bridge) {
2060         case BRIDGE_OV511:
2061         case BRIDGE_OV511PLUS:
2062                 req = 3;
2063                 break;
2064         case BRIDGE_OVFX2:
2065                 req = 0x0b;
2066                 break;
2067         default:
2068                 req = 1;
2069         }
2070
2071         /* Avoid things going to fast for the bridge with a xhci host */
2072         udelay(150);
2073         ret = usb_control_msg(sd->gspca_dev.dev,
2074                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2075                         req,
2076                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2077                         0, index, sd->gspca_dev.usb_buf, 1, 500);
2078
2079         if (ret >= 0) {
2080                 ret = sd->gspca_dev.usb_buf[0];
2081                 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2082                         req, index, ret);
2083         } else {
2084                 PERR("reg_r %02x failed %d\n", index, ret);
2085                 sd->gspca_dev.usb_err = ret;
2086                 /*
2087                  * Make sure the result is zeroed to avoid uninitialized
2088                  * values.
2089                  */
2090                 gspca_dev->usb_buf[0] = 0;
2091         }
2092
2093         return ret;
2094 }
2095
2096 /* Read 8 values from a OV519 register */
2097 static int reg_r8(struct sd *sd,
2098                   u16 index)
2099 {
2100         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2101         int ret;
2102
2103         if (sd->gspca_dev.usb_err < 0)
2104                 return -1;
2105
2106         /* Avoid things going to fast for the bridge with a xhci host */
2107         udelay(150);
2108         ret = usb_control_msg(sd->gspca_dev.dev,
2109                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2110                         1,                      /* REQ_IO */
2111                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2112                         0, index, sd->gspca_dev.usb_buf, 8, 500);
2113
2114         if (ret >= 0) {
2115                 ret = sd->gspca_dev.usb_buf[0];
2116         } else {
2117                 PERR("reg_r8 %02x failed %d\n", index, ret);
2118                 sd->gspca_dev.usb_err = ret;
2119                 /*
2120                  * Make sure the buffer is zeroed to avoid uninitialized
2121                  * values.
2122                  */
2123                 memset(gspca_dev->usb_buf, 0, 8);
2124         }
2125
2126         return ret;
2127 }
2128
2129 /*
2130  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2131  * the same position as 1's in "mask" are cleared and set to "value". Bits
2132  * that are in the same position as 0's in "mask" are preserved, regardless
2133  * of their respective state in "value".
2134  */
2135 static void reg_w_mask(struct sd *sd,
2136                         u16 index,
2137                         u8 value,
2138                         u8 mask)
2139 {
2140         int ret;
2141         u8 oldval;
2142
2143         if (mask != 0xff) {
2144                 value &= mask;                  /* Enforce mask on value */
2145                 ret = reg_r(sd, index);
2146                 if (ret < 0)
2147                         return;
2148
2149                 oldval = ret & ~mask;           /* Clear the masked bits */
2150                 value |= oldval;                /* Set the desired bits */
2151         }
2152         reg_w(sd, index, value);
2153 }
2154
2155 /*
2156  * Writes multiple (n) byte value to a single register. Only valid with certain
2157  * registers (0x30 and 0xc4 - 0xce).
2158  */
2159 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2160 {
2161         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2162         int ret;
2163
2164         if (sd->gspca_dev.usb_err < 0)
2165                 return;
2166
2167         *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2168
2169         /* Avoid things going to fast for the bridge with a xhci host */
2170         udelay(150);
2171         ret = usb_control_msg(sd->gspca_dev.dev,
2172                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2173                         1 /* REG_IO */,
2174                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2175                         0, index,
2176                         sd->gspca_dev.usb_buf, n, 500);
2177         if (ret < 0) {
2178                 PERR("reg_w32 %02x failed %d\n", index, ret);
2179                 sd->gspca_dev.usb_err = ret;
2180         }
2181 }
2182
2183 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2184 {
2185         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2186         int rc, retries;
2187
2188         PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2189
2190         /* Three byte write cycle */
2191         for (retries = 6; ; ) {
2192                 /* Select camera register */
2193                 reg_w(sd, R51x_I2C_SADDR_3, reg);
2194
2195                 /* Write "value" to I2C data port of OV511 */
2196                 reg_w(sd, R51x_I2C_DATA, value);
2197
2198                 /* Initiate 3-byte write cycle */
2199                 reg_w(sd, R511_I2C_CTL, 0x01);
2200
2201                 do {
2202                         rc = reg_r(sd, R511_I2C_CTL);
2203                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2204
2205                 if (rc < 0)
2206                         return;
2207
2208                 if ((rc & 2) == 0) /* Ack? */
2209                         break;
2210                 if (--retries < 0) {
2211                         PDEBUG(D_USBO, "i2c write retries exhausted");
2212                         return;
2213                 }
2214         }
2215 }
2216
2217 static int ov511_i2c_r(struct sd *sd, u8 reg)
2218 {
2219         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2220         int rc, value, retries;
2221
2222         /* Two byte write cycle */
2223         for (retries = 6; ; ) {
2224                 /* Select camera register */
2225                 reg_w(sd, R51x_I2C_SADDR_2, reg);
2226
2227                 /* Initiate 2-byte write cycle */
2228                 reg_w(sd, R511_I2C_CTL, 0x03);
2229
2230                 do {
2231                         rc = reg_r(sd, R511_I2C_CTL);
2232                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2233
2234                 if (rc < 0)
2235                         return rc;
2236
2237                 if ((rc & 2) == 0) /* Ack? */
2238                         break;
2239
2240                 /* I2C abort */
2241                 reg_w(sd, R511_I2C_CTL, 0x10);
2242
2243                 if (--retries < 0) {
2244                         PDEBUG(D_USBI, "i2c write retries exhausted");
2245                         return -1;
2246                 }
2247         }
2248
2249         /* Two byte read cycle */
2250         for (retries = 6; ; ) {
2251                 /* Initiate 2-byte read cycle */
2252                 reg_w(sd, R511_I2C_CTL, 0x05);
2253
2254                 do {
2255                         rc = reg_r(sd, R511_I2C_CTL);
2256                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2257
2258                 if (rc < 0)
2259                         return rc;
2260
2261                 if ((rc & 2) == 0) /* Ack? */
2262                         break;
2263
2264                 /* I2C abort */
2265                 reg_w(sd, R511_I2C_CTL, 0x10);
2266
2267                 if (--retries < 0) {
2268                         PDEBUG(D_USBI, "i2c read retries exhausted");
2269                         return -1;
2270                 }
2271         }
2272
2273         value = reg_r(sd, R51x_I2C_DATA);
2274
2275         PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2276
2277         /* This is needed to make i2c_w() work */
2278         reg_w(sd, R511_I2C_CTL, 0x05);
2279
2280         return value;
2281 }
2282
2283 /*
2284  * The OV518 I2C I/O procedure is different, hence, this function.
2285  * This is normally only called from i2c_w(). Note that this function
2286  * always succeeds regardless of whether the sensor is present and working.
2287  */
2288 static void ov518_i2c_w(struct sd *sd,
2289                 u8 reg,
2290                 u8 value)
2291 {
2292         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2293
2294         PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2295
2296         /* Select camera register */
2297         reg_w(sd, R51x_I2C_SADDR_3, reg);
2298
2299         /* Write "value" to I2C data port of OV511 */
2300         reg_w(sd, R51x_I2C_DATA, value);
2301
2302         /* Initiate 3-byte write cycle */
2303         reg_w(sd, R518_I2C_CTL, 0x01);
2304
2305         /* wait for write complete */
2306         msleep(4);
2307         reg_r8(sd, R518_I2C_CTL);
2308 }
2309
2310 /*
2311  * returns: negative is error, pos or zero is data
2312  *
2313  * The OV518 I2C I/O procedure is different, hence, this function.
2314  * This is normally only called from i2c_r(). Note that this function
2315  * always succeeds regardless of whether the sensor is present and working.
2316  */
2317 static int ov518_i2c_r(struct sd *sd, u8 reg)
2318 {
2319         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2320         int value;
2321
2322         /* Select camera register */
2323         reg_w(sd, R51x_I2C_SADDR_2, reg);
2324
2325         /* Initiate 2-byte write cycle */
2326         reg_w(sd, R518_I2C_CTL, 0x03);
2327         reg_r8(sd, R518_I2C_CTL);
2328
2329         /* Initiate 2-byte read cycle */
2330         reg_w(sd, R518_I2C_CTL, 0x05);
2331         reg_r8(sd, R518_I2C_CTL);
2332
2333         value = reg_r(sd, R51x_I2C_DATA);
2334         PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2335         return value;
2336 }
2337
2338 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2339 {
2340         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2341         int ret;
2342
2343         if (sd->gspca_dev.usb_err < 0)
2344                 return;
2345
2346         ret = usb_control_msg(sd->gspca_dev.dev,
2347                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2348                         0x02,
2349                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2350                         (u16) value, (u16) reg, NULL, 0, 500);
2351
2352         if (ret < 0) {
2353                 PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2354                 sd->gspca_dev.usb_err = ret;
2355         }
2356
2357         PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2358 }
2359
2360 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2361 {
2362         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2363         int ret;
2364
2365         if (sd->gspca_dev.usb_err < 0)
2366                 return -1;
2367
2368         ret = usb_control_msg(sd->gspca_dev.dev,
2369                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2370                         0x03,
2371                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2372                         0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2373
2374         if (ret >= 0) {
2375                 ret = sd->gspca_dev.usb_buf[0];
2376                 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2377         } else {
2378                 PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2379                 sd->gspca_dev.usb_err = ret;
2380         }
2381
2382         return ret;
2383 }
2384
2385 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2386 {
2387         if (sd->sensor_reg_cache[reg] == value)
2388                 return;
2389
2390         switch (sd->bridge) {
2391         case BRIDGE_OV511:
2392         case BRIDGE_OV511PLUS:
2393                 ov511_i2c_w(sd, reg, value);
2394                 break;
2395         case BRIDGE_OV518:
2396         case BRIDGE_OV518PLUS:
2397         case BRIDGE_OV519:
2398                 ov518_i2c_w(sd, reg, value);
2399                 break;
2400         case BRIDGE_OVFX2:
2401                 ovfx2_i2c_w(sd, reg, value);
2402                 break;
2403         case BRIDGE_W9968CF:
2404                 w9968cf_i2c_w(sd, reg, value);
2405                 break;
2406         }
2407
2408         if (sd->gspca_dev.usb_err >= 0) {
2409                 /* Up on sensor reset empty the register cache */
2410                 if (reg == 0x12 && (value & 0x80))
2411                         memset(sd->sensor_reg_cache, -1,
2412                                 sizeof(sd->sensor_reg_cache));
2413                 else
2414                         sd->sensor_reg_cache[reg] = value;
2415         }
2416 }
2417
2418 static int i2c_r(struct sd *sd, u8 reg)
2419 {
2420         int ret = -1;
2421
2422         if (sd->sensor_reg_cache[reg] != -1)
2423                 return sd->sensor_reg_cache[reg];
2424
2425         switch (sd->bridge) {
2426         case BRIDGE_OV511:
2427         case BRIDGE_OV511PLUS:
2428                 ret = ov511_i2c_r(sd, reg);
2429                 break;
2430         case BRIDGE_OV518:
2431         case BRIDGE_OV518PLUS:
2432         case BRIDGE_OV519:
2433                 ret = ov518_i2c_r(sd, reg);
2434                 break;
2435         case BRIDGE_OVFX2:
2436                 ret = ovfx2_i2c_r(sd, reg);
2437                 break;
2438         case BRIDGE_W9968CF:
2439                 ret = w9968cf_i2c_r(sd, reg);
2440                 break;
2441         }
2442
2443         if (ret >= 0)
2444                 sd->sensor_reg_cache[reg] = ret;
2445
2446         return ret;
2447 }
2448
2449 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2450  * the same position as 1's in "mask" are cleared and set to "value". Bits
2451  * that are in the same position as 0's in "mask" are preserved, regardless
2452  * of their respective state in "value".
2453  */
2454 static void i2c_w_mask(struct sd *sd,
2455                         u8 reg,
2456                         u8 value,
2457                         u8 mask)
2458 {
2459         int rc;
2460         u8 oldval;
2461
2462         value &= mask;                  /* Enforce mask on value */
2463         rc = i2c_r(sd, reg);
2464         if (rc < 0)
2465                 return;
2466         oldval = rc & ~mask;            /* Clear the masked bits */
2467         value |= oldval;                /* Set the desired bits */
2468         i2c_w(sd, reg, value);
2469 }
2470
2471 /* Temporarily stops OV511 from functioning. Must do this before changing
2472  * registers while the camera is streaming */
2473 static inline void ov51x_stop(struct sd *sd)
2474 {
2475         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2476
2477         PDEBUG(D_STREAM, "stopping");
2478         sd->stopped = 1;
2479         switch (sd->bridge) {
2480         case BRIDGE_OV511:
2481         case BRIDGE_OV511PLUS:
2482                 reg_w(sd, R51x_SYS_RESET, 0x3d);
2483                 break;
2484         case BRIDGE_OV518:
2485         case BRIDGE_OV518PLUS:
2486                 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2487                 break;
2488         case BRIDGE_OV519:
2489                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2490                 reg_w(sd, OV519_R51_RESET1, 0x00);
2491                 reg_w(sd, 0x22, 0x00);          /* FRAR */
2492                 break;
2493         case BRIDGE_OVFX2:
2494                 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2495                 break;
2496         case BRIDGE_W9968CF:
2497                 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2498                 break;
2499         }
2500 }
2501
2502 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2503  * actually stopped (for performance). */
2504 static inline void ov51x_restart(struct sd *sd)
2505 {
2506         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2507
2508         PDEBUG(D_STREAM, "restarting");
2509         if (!sd->stopped)
2510                 return;
2511         sd->stopped = 0;
2512
2513         /* Reinitialize the stream */
2514         switch (sd->bridge) {
2515         case BRIDGE_OV511:
2516         case BRIDGE_OV511PLUS:
2517                 reg_w(sd, R51x_SYS_RESET, 0x00);
2518                 break;
2519         case BRIDGE_OV518:
2520         case BRIDGE_OV518PLUS:
2521                 reg_w(sd, 0x2f, 0x80);
2522                 reg_w(sd, R51x_SYS_RESET, 0x00);
2523                 break;
2524         case BRIDGE_OV519:
2525                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2526                 reg_w(sd, OV519_R51_RESET1, 0x00);
2527                 reg_w(sd, 0x22, 0x1d);          /* FRAR */
2528                 break;
2529         case BRIDGE_OVFX2:
2530                 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2531                 break;
2532         case BRIDGE_W9968CF:
2533                 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2534                 break;
2535         }
2536 }
2537
2538 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2539
2540 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2541  * is synchronized. Returns <0 on failure.
2542  */
2543 static int init_ov_sensor(struct sd *sd, u8 slave)
2544 {
2545         int i;
2546         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2547
2548         ov51x_set_slave_ids(sd, slave);
2549
2550         /* Reset the sensor */
2551         i2c_w(sd, 0x12, 0x80);
2552
2553         /* Wait for it to initialize */
2554         msleep(150);
2555
2556         for (i = 0; i < i2c_detect_tries; i++) {
2557                 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2558                     i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2559                         PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2560                         return 0;
2561                 }
2562
2563                 /* Reset the sensor */
2564                 i2c_w(sd, 0x12, 0x80);
2565
2566                 /* Wait for it to initialize */
2567                 msleep(150);
2568
2569                 /* Dummy read to sync I2C */
2570                 if (i2c_r(sd, 0x00) < 0)
2571                         return -1;
2572         }
2573         return -1;
2574 }
2575
2576 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2577  * and the read slave will be set to (slave + 1).
2578  * This should not be called from outside the i2c I/O functions.
2579  * Sets I2C read and write slave IDs. Returns <0 for error
2580  */
2581 static void ov51x_set_slave_ids(struct sd *sd,
2582                                 u8 slave)
2583 {
2584         switch (sd->bridge) {
2585         case BRIDGE_OVFX2:
2586                 reg_w(sd, OVFX2_I2C_ADDR, slave);
2587                 return;
2588         case BRIDGE_W9968CF:
2589                 sd->sensor_addr = slave;
2590                 return;
2591         }
2592
2593         reg_w(sd, R51x_I2C_W_SID, slave);
2594         reg_w(sd, R51x_I2C_R_SID, slave + 1);
2595 }
2596
2597 static void write_regvals(struct sd *sd,
2598                          const struct ov_regvals *regvals,
2599                          int n)
2600 {
2601         while (--n >= 0) {
2602                 reg_w(sd, regvals->reg, regvals->val);
2603                 regvals++;
2604         }
2605 }
2606
2607 static void write_i2c_regvals(struct sd *sd,
2608                         const struct ov_i2c_regvals *regvals,
2609                         int n)
2610 {
2611         while (--n >= 0) {
2612                 i2c_w(sd, regvals->reg, regvals->val);
2613                 regvals++;
2614         }
2615 }
2616
2617 /****************************************************************************
2618  *
2619  * OV511 and sensor configuration
2620  *
2621  ***************************************************************************/
2622
2623 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2624 static void ov_hires_configure(struct sd *sd)
2625 {
2626         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2627         int high, low;
2628
2629         if (sd->bridge != BRIDGE_OVFX2) {
2630                 PERR("error hires sensors only supported with ovfx2\n");
2631                 return;
2632         }
2633
2634         PDEBUG(D_PROBE, "starting ov hires configuration");
2635
2636         /* Detect sensor (sub)type */
2637         high = i2c_r(sd, 0x0a);
2638         low = i2c_r(sd, 0x0b);
2639         /* info("%x, %x", high, low); */
2640         switch (high) {
2641         case 0x96:
2642                 switch (low) {
2643                 case 0x40:
2644                         PDEBUG(D_PROBE, "Sensor is a OV2610");
2645                         sd->sensor = SEN_OV2610;
2646                         return;
2647                 case 0x41:
2648                         PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2649                         sd->sensor = SEN_OV2610AE;
2650                         return;
2651                 case 0xb1:
2652                         PDEBUG(D_PROBE, "Sensor is a OV9600");
2653                         sd->sensor = SEN_OV9600;
2654                         return;
2655                 }
2656                 break;
2657         case 0x36:
2658                 if ((low & 0x0f) == 0x00) {
2659                         PDEBUG(D_PROBE, "Sensor is a OV3610");
2660                         sd->sensor = SEN_OV3610;
2661                         return;
2662                 }
2663                 break;
2664         }
2665         PERR("Error unknown sensor type: %02x%02x\n", high, low);
2666 }
2667
2668 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2669  * the same register settings as the OV8610, since they are very similar.
2670  */
2671 static void ov8xx0_configure(struct sd *sd)
2672 {
2673         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2674         int rc;
2675
2676         PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2677
2678         /* Detect sensor (sub)type */
2679         rc = i2c_r(sd, OV7610_REG_COM_I);
2680         if (rc < 0) {
2681                 PERR("Error detecting sensor type");
2682                 return;
2683         }
2684         if ((rc & 3) == 1)
2685                 sd->sensor = SEN_OV8610;
2686         else
2687                 PERR("Unknown image sensor version: %d\n", rc & 3);
2688 }
2689
2690 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2691  * the same register settings as the OV7610, since they are very similar.
2692  */
2693 static void ov7xx0_configure(struct sd *sd)
2694 {
2695         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2696         int rc, high, low;
2697
2698         PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2699
2700         /* Detect sensor (sub)type */
2701         rc = i2c_r(sd, OV7610_REG_COM_I);
2702
2703         /* add OV7670 here
2704          * it appears to be wrongly detected as a 7610 by default */
2705         if (rc < 0) {
2706                 PERR("Error detecting sensor type\n");
2707                 return;
2708         }
2709         if ((rc & 3) == 3) {
2710                 /* quick hack to make OV7670s work */
2711                 high = i2c_r(sd, 0x0a);
2712                 low = i2c_r(sd, 0x0b);
2713                 /* info("%x, %x", high, low); */
2714                 if (high == 0x76 && (low & 0xf0) == 0x70) {
2715                         PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2716                         sd->sensor = SEN_OV7670;
2717                 } else {
2718                         PDEBUG(D_PROBE, "Sensor is an OV7610");
2719                         sd->sensor = SEN_OV7610;
2720                 }
2721         } else if ((rc & 3) == 1) {
2722                 /* I don't know what's different about the 76BE yet. */
2723                 if (i2c_r(sd, 0x15) & 1) {
2724                         PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2725                         sd->sensor = SEN_OV7620AE;
2726                 } else {
2727                         PDEBUG(D_PROBE, "Sensor is an OV76BE");
2728                         sd->sensor = SEN_OV76BE;
2729                 }
2730         } else if ((rc & 3) == 0) {
2731                 /* try to read product id registers */
2732                 high = i2c_r(sd, 0x0a);
2733                 if (high < 0) {
2734                         PERR("Error detecting camera chip PID\n");
2735                         return;
2736                 }
2737                 low = i2c_r(sd, 0x0b);
2738                 if (low < 0) {
2739                         PERR("Error detecting camera chip VER\n");
2740                         return;
2741                 }
2742                 if (high == 0x76) {
2743                         switch (low) {
2744                         case 0x30:
2745                                 PERR("Sensor is an OV7630/OV7635\n");
2746                                 PERR("7630 is not supported by this driver\n");
2747                                 return;
2748                         case 0x40:
2749                                 PDEBUG(D_PROBE, "Sensor is an OV7645");
2750                                 sd->sensor = SEN_OV7640; /* FIXME */
2751                                 break;
2752                         case 0x45:
2753                                 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2754                                 sd->sensor = SEN_OV7640; /* FIXME */
2755                                 break;
2756                         case 0x48:
2757                                 PDEBUG(D_PROBE, "Sensor is an OV7648");
2758                                 sd->sensor = SEN_OV7648;
2759                                 break;
2760                         case 0x60:
2761                                 PDEBUG(D_PROBE, "Sensor is a OV7660");
2762                                 sd->sensor = SEN_OV7660;
2763                                 break;
2764                         default:
2765                                 PERR("Unknown sensor: 0x76%02x\n", low);
2766                                 return;
2767                         }
2768                 } else {
2769                         PDEBUG(D_PROBE, "Sensor is an OV7620");
2770                         sd->sensor = SEN_OV7620;
2771                 }
2772         } else {
2773                 PERR("Unknown image sensor version: %d\n", rc & 3);
2774         }
2775 }
2776
2777 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2778 static void ov6xx0_configure(struct sd *sd)
2779 {
2780         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2781         int rc;
2782
2783         PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2784
2785         /* Detect sensor (sub)type */
2786         rc = i2c_r(sd, OV7610_REG_COM_I);
2787         if (rc < 0) {
2788                 PERR("Error detecting sensor type\n");
2789                 return;
2790         }
2791
2792         /* Ugh. The first two bits are the version bits, but
2793          * the entire register value must be used. I guess OVT
2794          * underestimated how many variants they would make. */
2795         switch (rc) {
2796         case 0x00:
2797                 sd->sensor = SEN_OV6630;
2798                 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2799                 break;
2800         case 0x01:
2801                 sd->sensor = SEN_OV6620;
2802                 PDEBUG(D_PROBE, "Sensor is an OV6620");
2803                 break;
2804         case 0x02:
2805                 sd->sensor = SEN_OV6630;
2806                 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2807                 break;
2808         case 0x03:
2809                 sd->sensor = SEN_OV66308AF;
2810                 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2811                 break;
2812         case 0x90:
2813                 sd->sensor = SEN_OV6630;
2814                 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2815                 break;
2816         default:
2817                 PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2818                 return;
2819         }
2820
2821         /* Set sensor-specific vars */
2822         sd->sif = 1;
2823 }
2824
2825 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2826 static void ov51x_led_control(struct sd *sd, int on)
2827 {
2828         if (sd->invert_led)
2829                 on = !on;
2830
2831         switch (sd->bridge) {
2832         /* OV511 has no LED control */
2833         case BRIDGE_OV511PLUS:
2834                 reg_w(sd, R511_SYS_LED_CTL, on);
2835                 break;
2836         case BRIDGE_OV518:
2837         case BRIDGE_OV518PLUS:
2838                 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2839                 break;
2840         case BRIDGE_OV519:
2841                 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2842                 break;
2843         }
2844 }
2845
2846 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2847 {
2848         struct sd *sd = (struct sd *) gspca_dev;
2849
2850         if (!sd->snapshot_needs_reset)
2851                 return;
2852
2853         /* Note it is important that we clear sd->snapshot_needs_reset,
2854            before actually clearing the snapshot state in the bridge
2855            otherwise we might race with the pkt_scan interrupt handler */
2856         sd->snapshot_needs_reset = 0;
2857
2858         switch (sd->bridge) {
2859         case BRIDGE_OV511:
2860         case BRIDGE_OV511PLUS:
2861                 reg_w(sd, R51x_SYS_SNAP, 0x02);
2862                 reg_w(sd, R51x_SYS_SNAP, 0x00);
2863                 break;
2864         case BRIDGE_OV518:
2865         case BRIDGE_OV518PLUS:
2866                 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2867                 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2868                 break;
2869         case BRIDGE_OV519:
2870                 reg_w(sd, R51x_SYS_RESET, 0x40);
2871                 reg_w(sd, R51x_SYS_RESET, 0x00);
2872                 break;
2873         }
2874 }
2875
2876 static void ov51x_upload_quan_tables(struct sd *sd)
2877 {
2878         const unsigned char yQuanTable511[] = {
2879                 0, 1, 1, 2, 2, 3, 3, 4,
2880                 1, 1, 1, 2, 2, 3, 4, 4,
2881                 1, 1, 2, 2, 3, 4, 4, 4,
2882                 2, 2, 2, 3, 4, 4, 4, 4,
2883                 2, 2, 3, 4, 4, 5, 5, 5,
2884                 3, 3, 4, 4, 5, 5, 5, 5,
2885                 3, 4, 4, 4, 5, 5, 5, 5,
2886                 4, 4, 4, 4, 5, 5, 5, 5
2887         };
2888
2889         const unsigned char uvQuanTable511[] = {
2890                 0, 2, 2, 3, 4, 4, 4, 4,
2891                 2, 2, 2, 4, 4, 4, 4, 4,
2892                 2, 2, 3, 4, 4, 4, 4, 4,
2893                 3, 4, 4, 4, 4, 4, 4, 4,
2894                 4, 4, 4, 4, 4, 4, 4, 4,
2895                 4, 4, 4, 4, 4, 4, 4, 4,
2896                 4, 4, 4, 4, 4, 4, 4, 4,
2897                 4, 4, 4, 4, 4, 4, 4, 4
2898         };
2899
2900         /* OV518 quantization tables are 8x4 (instead of 8x8) */
2901         const unsigned char yQuanTable518[] = {
2902                 5, 4, 5, 6, 6, 7, 7, 7,
2903                 5, 5, 5, 5, 6, 7, 7, 7,
2904                 6, 6, 6, 6, 7, 7, 7, 8,
2905                 7, 7, 6, 7, 7, 7, 8, 8
2906         };
2907         const unsigned char uvQuanTable518[] = {
2908                 6, 6, 6, 7, 7, 7, 7, 7,
2909                 6, 6, 6, 7, 7, 7, 7, 7,
2910                 6, 6, 6, 7, 7, 7, 7, 8,
2911                 7, 7, 7, 7, 7, 7, 8, 8
2912         };
2913
2914         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2915         const unsigned char *pYTable, *pUVTable;
2916         unsigned char val0, val1;
2917         int i, size, reg = R51x_COMP_LUT_BEGIN;
2918
2919         PDEBUG(D_PROBE, "Uploading quantization tables");
2920
2921         if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2922                 pYTable = yQuanTable511;
2923                 pUVTable = uvQuanTable511;
2924                 size = 32;
2925         } else {
2926                 pYTable = yQuanTable518;
2927                 pUVTable = uvQuanTable518;
2928                 size = 16;
2929         }
2930
2931         for (i = 0; i < size; i++) {
2932                 val0 = *pYTable++;
2933                 val1 = *pYTable++;
2934                 val0 &= 0x0f;
2935                 val1 &= 0x0f;
2936                 val0 |= val1 << 4;
2937                 reg_w(sd, reg, val0);
2938
2939                 val0 = *pUVTable++;
2940                 val1 = *pUVTable++;
2941                 val0 &= 0x0f;
2942                 val1 &= 0x0f;
2943                 val0 |= val1 << 4;
2944                 reg_w(sd, reg + size, val0);
2945
2946                 reg++;
2947         }
2948 }
2949
2950 /* This initializes the OV511/OV511+ and the sensor */
2951 static void ov511_configure(struct gspca_dev *gspca_dev)
2952 {
2953         struct sd *sd = (struct sd *) gspca_dev;
2954
2955         /* For 511 and 511+ */
2956         const struct ov_regvals init_511[] = {
2957                 { R51x_SYS_RESET,       0x7f },
2958                 { R51x_SYS_INIT,        0x01 },
2959                 { R51x_SYS_RESET,       0x7f },
2960                 { R51x_SYS_INIT,        0x01 },
2961                 { R51x_SYS_RESET,       0x3f },
2962                 { R51x_SYS_INIT,        0x01 },
2963                 { R51x_SYS_RESET,       0x3d },
2964         };
2965
2966         const struct ov_regvals norm_511[] = {
2967                 { R511_DRAM_FLOW_CTL,   0x01 },
2968                 { R51x_SYS_SNAP,        0x00 },
2969                 { R51x_SYS_SNAP,        0x02 },
2970                 { R51x_SYS_SNAP,        0x00 },
2971                 { R511_FIFO_OPTS,       0x1f },
2972                 { R511_COMP_EN,         0x00 },
2973                 { R511_COMP_LUT_EN,     0x03 },
2974         };
2975
2976         const struct ov_regvals norm_511_p[] = {
2977                 { R511_DRAM_FLOW_CTL,   0xff },
2978                 { R51x_SYS_SNAP,        0x00 },
2979                 { R51x_SYS_SNAP,        0x02 },
2980                 { R51x_SYS_SNAP,        0x00 },
2981                 { R511_FIFO_OPTS,       0xff },
2982                 { R511_COMP_EN,         0x00 },
2983                 { R511_COMP_LUT_EN,     0x03 },
2984         };
2985
2986         const struct ov_regvals compress_511[] = {
2987                 { 0x70, 0x1f },
2988                 { 0x71, 0x05 },
2989                 { 0x72, 0x06 },
2990                 { 0x73, 0x06 },
2991                 { 0x74, 0x14 },
2992                 { 0x75, 0x03 },
2993                 { 0x76, 0x04 },
2994                 { 0x77, 0x04 },
2995         };
2996
2997         PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2998
2999         write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3000
3001         switch (sd->bridge) {
3002         case BRIDGE_OV511:
3003                 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3004                 break;
3005         case BRIDGE_OV511PLUS:
3006                 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3007                 break;
3008         }
3009
3010         /* Init compression */
3011         write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3012
3013         ov51x_upload_quan_tables(sd);
3014 }
3015
3016 /* This initializes the OV518/OV518+ and the sensor */
3017 static void ov518_configure(struct gspca_dev *gspca_dev)
3018 {
3019         struct sd *sd = (struct sd *) gspca_dev;
3020
3021         /* For 518 and 518+ */
3022         const struct ov_regvals init_518[] = {
3023                 { R51x_SYS_RESET,       0x40 },
3024                 { R51x_SYS_INIT,        0xe1 },
3025                 { R51x_SYS_RESET,       0x3e },
3026                 { R51x_SYS_INIT,        0xe1 },
3027                 { R51x_SYS_RESET,       0x00 },
3028                 { R51x_SYS_INIT,        0xe1 },
3029                 { 0x46,                 0x00 },
3030                 { 0x5d,                 0x03 },
3031         };
3032
3033         const struct ov_regvals norm_518[] = {
3034                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3035                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3036                 { 0x31,                 0x0f },
3037                 { 0x5d,                 0x03 },
3038                 { 0x24,                 0x9f },
3039                 { 0x25,                 0x90 },
3040                 { 0x20,                 0x00 },
3041                 { 0x51,                 0x04 },
3042                 { 0x71,                 0x19 },
3043                 { 0x2f,                 0x80 },
3044         };
3045
3046         const struct ov_regvals norm_518_p[] = {
3047                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3048                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3049                 { 0x31,                 0x0f },
3050                 { 0x5d,                 0x03 },
3051                 { 0x24,                 0x9f },
3052                 { 0x25,                 0x90 },
3053                 { 0x20,                 0x60 },
3054                 { 0x51,                 0x02 },
3055                 { 0x71,                 0x19 },
3056                 { 0x40,                 0xff },
3057                 { 0x41,                 0x42 },
3058                 { 0x46,                 0x00 },
3059                 { 0x33,                 0x04 },
3060                 { 0x21,                 0x19 },
3061                 { 0x3f,                 0x10 },
3062                 { 0x2f,                 0x80 },
3063         };
3064
3065         /* First 5 bits of custom ID reg are a revision ID on OV518 */
3066         sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3067         PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3068
3069         write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3070
3071         /* Set LED GPIO pin to output mode */
3072         reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3073
3074         switch (sd->bridge) {
3075         case BRIDGE_OV518:
3076                 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3077                 break;
3078         case BRIDGE_OV518PLUS:
3079                 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3080                 break;
3081         }
3082
3083         ov51x_upload_quan_tables(sd);
3084
3085         reg_w(sd, 0x2f, 0x80);
3086 }
3087
3088 static void ov519_configure(struct sd *sd)
3089 {
3090         static const struct ov_regvals init_519[] = {
3091                 { 0x5a, 0x6d }, /* EnableSystem */
3092                 { 0x53, 0x9b }, /* don't enable the microcontroller */
3093                 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3094                 { 0x5d, 0x03 },
3095                 { 0x49, 0x01 },
3096                 { 0x48, 0x00 },
3097                 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3098                  * detection will fail. This deserves further investigation. */
3099                 { OV519_GPIO_IO_CTRL0,   0xee },
3100                 { OV519_R51_RESET1, 0x0f },
3101                 { OV519_R51_RESET1, 0x00 },
3102                 { 0x22, 0x00 },
3103                 /* windows reads 0x55 at this point*/
3104         };
3105
3106         write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3107 }
3108
3109 static void ovfx2_configure(struct sd *sd)
3110 {
3111         static const struct ov_regvals init_fx2[] = {
3112                 { 0x00, 0x60 },
3113                 { 0x02, 0x01 },
3114                 { 0x0f, 0x1d },
3115                 { 0xe9, 0x82 },
3116                 { 0xea, 0xc7 },
3117                 { 0xeb, 0x10 },
3118                 { 0xec, 0xf6 },
3119         };
3120
3121         sd->stopped = 1;
3122
3123         write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3124 }
3125
3126 /* set the mode */
3127 /* This function works for ov7660 only */
3128 static void ov519_set_mode(struct sd *sd)
3129 {
3130         static const struct ov_regvals bridge_ov7660[2][10] = {
3131                 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3132                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3133                  {0x25, 0x01}, {0x26, 0x00}},
3134                 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3135                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3136                  {0x25, 0x03}, {0x26, 0x00}}
3137         };
3138         static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3139                 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3140                 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3141         };
3142         static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3143                 {OV7670_R17_HSTART, 0x13},
3144                 {OV7670_R18_HSTOP, 0x01},
3145                 {OV7670_R32_HREF, 0x92},
3146                 {OV7670_R19_VSTART, 0x02},
3147                 {OV7670_R1A_VSTOP, 0x7a},
3148                 {OV7670_R03_VREF, 0x00},
3149 /*              {0x33, 0x00}, */
3150 /*              {0x34, 0x07}, */
3151 /*              {0x36, 0x00}, */
3152 /*              {0x6b, 0x0a}, */
3153         };
3154
3155         write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3156                         ARRAY_SIZE(bridge_ov7660[0]));
3157         write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3158                         ARRAY_SIZE(sensor_ov7660[0]));
3159         write_i2c_regvals(sd, sensor_ov7660_2,
3160                         ARRAY_SIZE(sensor_ov7660_2));
3161 }
3162
3163 /* set the frame rate */
3164 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3165 static void ov519_set_fr(struct sd *sd)
3166 {
3167         int fr;
3168         u8 clock;
3169         /* frame rate table with indices:
3170          *      - mode = 0: 320x240, 1: 640x480
3171          *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3172          *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3173          */
3174         static const u8 fr_tb[2][6][3] = {
3175                 {{0x04, 0xff, 0x00},
3176                  {0x04, 0x1f, 0x00},
3177                  {0x04, 0x1b, 0x00},
3178                  {0x04, 0x15, 0x00},
3179                  {0x04, 0x09, 0x00},
3180                  {0x04, 0x01, 0x00}},
3181                 {{0x0c, 0xff, 0x00},
3182                  {0x0c, 0x1f, 0x00},
3183                  {0x0c, 0x1b, 0x00},
3184                  {0x04, 0xff, 0x01},
3185                  {0x04, 0x1f, 0x01},
3186                  {0x04, 0x1b, 0x01}},
3187         };
3188
3189         if (frame_rate > 0)
3190                 sd->frame_rate = frame_rate;
3191         if (sd->frame_rate >= 30)
3192                 fr = 0;
3193         else if (sd->frame_rate >= 25)
3194                 fr = 1;
3195         else if (sd->frame_rate >= 20)
3196                 fr = 2;
3197         else if (sd->frame_rate >= 15)
3198                 fr = 3;
3199         else if (sd->frame_rate >= 10)
3200                 fr = 4;
3201         else
3202                 fr = 5;
3203         reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3204         reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3205         clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3206         if (sd->sensor == SEN_OV7660)
3207                 clock |= 0x80;          /* enable double clock */
3208         ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3209 }
3210
3211 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3212 {
3213         struct sd *sd = (struct sd *) gspca_dev;
3214
3215         i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3216 }
3217
3218 /* this function is called at probe time */
3219 static int sd_config(struct gspca_dev *gspca_dev,
3220                         const struct usb_device_id *id)
3221 {
3222         struct sd *sd = (struct sd *) gspca_dev;
3223         struct cam *cam = &gspca_dev->cam;
3224
3225         sd->bridge = id->driver_info & BRIDGE_MASK;
3226         sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3227
3228         switch (sd->bridge) {
3229         case BRIDGE_OV511:
3230         case BRIDGE_OV511PLUS:
3231                 cam->cam_mode = ov511_vga_mode;
3232                 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3233                 break;
3234         case BRIDGE_OV518:
3235         case BRIDGE_OV518PLUS:
3236                 cam->cam_mode = ov518_vga_mode;
3237                 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3238                 break;
3239         case BRIDGE_OV519:
3240                 cam->cam_mode = ov519_vga_mode;
3241                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3242                 break;
3243         case BRIDGE_OVFX2:
3244                 cam->cam_mode = ov519_vga_mode;
3245                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3246                 cam->bulk_size = OVFX2_BULK_SIZE;
3247                 cam->bulk_nurbs = MAX_NURBS;
3248                 cam->bulk = 1;
3249                 break;
3250         case BRIDGE_W9968CF:
3251                 cam->cam_mode = w9968cf_vga_mode;
3252                 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3253                 break;
3254         }
3255
3256         sd->frame_rate = 15;
3257
3258         return 0;
3259 }
3260
3261 /* this function is called at probe and resume time */
3262 static int sd_init(struct gspca_dev *gspca_dev)
3263 {
3264         struct sd *sd = (struct sd *) gspca_dev;
3265         struct cam *cam = &gspca_dev->cam;
3266
3267         switch (sd->bridge) {
3268         case BRIDGE_OV511:
3269         case BRIDGE_OV511PLUS:
3270                 ov511_configure(gspca_dev);
3271                 break;
3272         case BRIDGE_OV518:
3273         case BRIDGE_OV518PLUS:
3274                 ov518_configure(gspca_dev);
3275                 break;
3276         case BRIDGE_OV519:
3277                 ov519_configure(sd);
3278                 break;
3279         case BRIDGE_OVFX2:
3280                 ovfx2_configure(sd);
3281                 break;
3282         case BRIDGE_W9968CF:
3283                 w9968cf_configure(sd);
3284                 break;
3285         }
3286
3287         /* The OV519 must be more aggressive about sensor detection since
3288          * I2C write will never fail if the sensor is not present. We have
3289          * to try to initialize the sensor to detect its presence */
3290         sd->sensor = -1;
3291
3292         /* Test for 76xx */
3293         if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3294                 ov7xx0_configure(sd);
3295
3296         /* Test for 6xx0 */
3297         } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3298                 ov6xx0_configure(sd);
3299
3300         /* Test for 8xx0 */
3301         } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3302                 ov8xx0_configure(sd);
3303
3304         /* Test for 3xxx / 2xxx */
3305         } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3306                 ov_hires_configure(sd);
3307         } else {
3308                 PERR("Can't determine sensor slave IDs\n");
3309                 goto error;
3310         }
3311
3312         if (sd->sensor < 0)
3313                 goto error;
3314
3315         ov51x_led_control(sd, 0);       /* turn LED off */
3316
3317         switch (sd->bridge) {
3318         case BRIDGE_OV511:
3319         case BRIDGE_OV511PLUS:
3320                 if (sd->sif) {
3321                         cam->cam_mode = ov511_sif_mode;
3322                         cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3323                 }
3324                 break;
3325         case BRIDGE_OV518:
3326         case BRIDGE_OV518PLUS:
3327                 if (sd->sif) {
3328                         cam->cam_mode = ov518_sif_mode;
3329                         cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3330                 }
3331                 break;
3332         case BRIDGE_OV519:
3333                 if (sd->sif) {
3334                         cam->cam_mode = ov519_sif_mode;
3335                         cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3336                 }
3337                 break;
3338         case BRIDGE_OVFX2:
3339                 switch (sd->sensor) {
3340                 case SEN_OV2610:
3341                 case SEN_OV2610AE:
3342                         cam->cam_mode = ovfx2_ov2610_mode;
3343                         cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3344                         break;
3345                 case SEN_OV3610:
3346                         cam->cam_mode = ovfx2_ov3610_mode;
3347                         cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3348                         break;
3349                 case SEN_OV9600:
3350                         cam->cam_mode = ovfx2_ov9600_mode;
3351                         cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3352                         break;
3353                 default:
3354                         if (sd->sif) {
3355                                 cam->cam_mode = ov519_sif_mode;
3356                                 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3357                         }
3358                         break;
3359                 }
3360                 break;
3361         case BRIDGE_W9968CF:
3362                 if (sd->sif)
3363                         cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3364
3365                 /* w9968cf needs initialisation once the sensor is known */
3366                 w9968cf_init(sd);
3367                 break;
3368         }
3369
3370         /* initialize the sensor */
3371         switch (sd->sensor) {
3372         case SEN_OV2610:
3373                 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3374
3375                 /* Enable autogain, autoexpo, awb, bandfilter */
3376                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3377                 break;
3378         case SEN_OV2610AE:
3379                 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3380
3381                 /* enable autoexpo */
3382                 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3383                 break;
3384         case SEN_OV3610:
3385                 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3386
3387                 /* Enable autogain, autoexpo, awb, bandfilter */
3388                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3389                 break;
3390         case SEN_OV6620:
3391                 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3392                 break;
3393         case SEN_OV6630:
3394         case SEN_OV66308AF:
3395                 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3396                 break;
3397         default:
3398 /*      case SEN_OV7610: */
3399 /*      case SEN_OV76BE: */
3400                 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3401                 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3402                 break;
3403         case SEN_OV7620:
3404         case SEN_OV7620AE:
3405                 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3406                 break;
3407         case SEN_OV7640:
3408         case SEN_OV7648:
3409                 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3410                 break;
3411         case SEN_OV7660:
3412                 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3413                 msleep(14);
3414                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3415                 write_regvals(sd, init_519_ov7660,
3416                                 ARRAY_SIZE(init_519_ov7660));
3417                 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3418                 sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3419                 ov519_set_mode(sd);
3420                 ov519_set_fr(sd);
3421                 sd_reset_snapshot(gspca_dev);
3422                 ov51x_restart(sd);
3423                 ov51x_stop(sd);                 /* not in win traces */
3424                 ov51x_led_control(sd, 0);
3425                 break;
3426         case SEN_OV7670:
3427                 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3428                 break;
3429         case SEN_OV8610:
3430                 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3431                 break;
3432         case SEN_OV9600:
3433                 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3434
3435                 /* enable autoexpo */
3436 /*              i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3437                 break;
3438         }
3439         return gspca_dev->usb_err;
3440 error:
3441         PERR("OV519 Config failed");
3442         return -EINVAL;
3443 }
3444
3445 /* function called at start time before URB creation */
3446 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3447 {
3448         struct sd *sd = (struct sd *) gspca_dev;
3449
3450         switch (sd->bridge) {
3451         case BRIDGE_OVFX2:
3452                 if (gspca_dev->pixfmt.width != 800)
3453                         gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3454                 else
3455                         gspca_dev->cam.bulk_size = 7 * 4096;
3456                 break;
3457         }
3458         return 0;
3459 }
3460
3461 /* Set up the OV511/OV511+ with the given image parameters.
3462  *
3463  * Do not put any sensor-specific code in here (including I2C I/O functions)
3464  */
3465 static void ov511_mode_init_regs(struct sd *sd)
3466 {
3467         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3468         int hsegs, vsegs, packet_size, fps, needed;
3469         int interlaced = 0;
3470         struct usb_host_interface *alt;
3471         struct usb_interface *intf;
3472
3473         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3474         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3475         if (!alt) {
3476                 PERR("Couldn't get altsetting\n");
3477                 sd->gspca_dev.usb_err = -EIO;
3478                 return;
3479         }
3480
3481         if (alt->desc.bNumEndpoints < 1) {
3482                 sd->gspca_dev.usb_err = -ENODEV;
3483                 return;
3484         }
3485
3486         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3487         reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3488
3489         reg_w(sd, R511_CAM_UV_EN, 0x01);
3490         reg_w(sd, R511_SNAP_UV_EN, 0x01);
3491         reg_w(sd, R511_SNAP_OPTS, 0x03);
3492
3493         /* Here I'm assuming that snapshot size == image size.
3494          * I hope that's always true. --claudio
3495          */
3496         hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3497         vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3498
3499         reg_w(sd, R511_CAM_PXCNT, hsegs);
3500         reg_w(sd, R511_CAM_LNCNT, vsegs);
3501         reg_w(sd, R511_CAM_PXDIV, 0x00);
3502         reg_w(sd, R511_CAM_LNDIV, 0x00);
3503
3504         /* YUV420, low pass filter on */
3505         reg_w(sd, R511_CAM_OPTS, 0x03);
3506
3507         /* Snapshot additions */
3508         reg_w(sd, R511_SNAP_PXCNT, hsegs);
3509         reg_w(sd, R511_SNAP_LNCNT, vsegs);
3510         reg_w(sd, R511_SNAP_PXDIV, 0x00);
3511         reg_w(sd, R511_SNAP_LNDIV, 0x00);
3512
3513         /******** Set the framerate ********/
3514         if (frame_rate > 0)
3515                 sd->frame_rate = frame_rate;
3516
3517         switch (sd->sensor) {
3518         case SEN_OV6620:
3519                 /* No framerate control, doesn't like higher rates yet */
3520                 sd->clockdiv = 3;
3521                 break;
3522
3523         /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3524            for more sensors we need to do this for them too */
3525         case SEN_OV7620:
3526         case SEN_OV7620AE:
3527         case SEN_OV7640:
3528         case SEN_OV7648:
3529         case SEN_OV76BE:
3530                 if (sd->gspca_dev.pixfmt.width == 320)
3531                         interlaced = 1;
3532                 /* Fall through */
3533         case SEN_OV6630:
3534         case SEN_OV7610:
3535         case SEN_OV7670:
3536                 switch (sd->frame_rate) {
3537                 case 30:
3538                 case 25:
3539                         /* Not enough bandwidth to do 640x480 @ 30 fps */
3540                         if (sd->gspca_dev.pixfmt.width != 640) {
3541                                 sd->clockdiv = 0;
3542                                 break;
3543                         }
3544                         /* For 640x480 case */
3545                         /* fall through */
3546                 default:
3547 /*              case 20: */
3548 /*              case 15: */
3549                         sd->clockdiv = 1;
3550                         break;
3551                 case 10:
3552                         sd->clockdiv = 2;
3553                         break;
3554                 case 5:
3555                         sd->clockdiv = 5;
3556                         break;
3557                 }
3558                 if (interlaced) {
3559                         sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3560                         /* Higher then 10 does not work */
3561                         if (sd->clockdiv > 10)
3562                                 sd->clockdiv = 10;
3563                 }
3564                 break;
3565
3566         case SEN_OV8610:
3567                 /* No framerate control ?? */
3568                 sd->clockdiv = 0;
3569                 break;
3570         }
3571
3572         /* Check if we have enough bandwidth to disable compression */
3573         fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3574         needed = fps * sd->gspca_dev.pixfmt.width *
3575                         sd->gspca_dev.pixfmt.height * 3 / 2;
3576         /* 1000 isoc packets/sec */
3577         if (needed > 1000 * packet_size) {
3578                 /* Enable Y and UV quantization and compression */
3579                 reg_w(sd, R511_COMP_EN, 0x07);
3580                 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3581         } else {
3582                 reg_w(sd, R511_COMP_EN, 0x06);
3583                 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3584         }
3585
3586         reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3587         reg_w(sd, R51x_SYS_RESET, 0);
3588 }
3589
3590 /* Sets up the OV518/OV518+ with the given image parameters
3591  *
3592  * OV518 needs a completely different approach, until we can figure out what
3593  * the individual registers do. Also, only 15 FPS is supported now.
3594  *
3595  * Do not put any sensor-specific code in here (including I2C I/O functions)
3596  */
3597 static void ov518_mode_init_regs(struct sd *sd)
3598 {
3599         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3600         int hsegs, vsegs, packet_size;
3601         struct usb_host_interface *alt;
3602         struct usb_interface *intf;
3603
3604         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3605         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3606         if (!alt) {
3607                 PERR("Couldn't get altsetting\n");
3608                 sd->gspca_dev.usb_err = -EIO;
3609                 return;
3610         }
3611
3612         if (alt->desc.bNumEndpoints < 1) {
3613                 sd->gspca_dev.usb_err = -ENODEV;
3614                 return;
3615         }
3616
3617         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3618         ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3619
3620         /******** Set the mode ********/
3621         reg_w(sd, 0x2b, 0);
3622         reg_w(sd, 0x2c, 0);
3623         reg_w(sd, 0x2d, 0);
3624         reg_w(sd, 0x2e, 0);
3625         reg_w(sd, 0x3b, 0);
3626         reg_w(sd, 0x3c, 0);
3627         reg_w(sd, 0x3d, 0);
3628         reg_w(sd, 0x3e, 0);
3629
3630         if (sd->bridge == BRIDGE_OV518) {
3631                 /* Set 8-bit (YVYU) input format */
3632                 reg_w_mask(sd, 0x20, 0x08, 0x08);
3633
3634                 /* Set 12-bit (4:2:0) output format */
3635                 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3636                 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3637         } else {
3638                 reg_w(sd, 0x28, 0x80);
3639                 reg_w(sd, 0x38, 0x80);
3640         }
3641
3642         hsegs = sd->gspca_dev.pixfmt.width / 16;
3643         vsegs = sd->gspca_dev.pixfmt.height / 4;
3644
3645         reg_w(sd, 0x29, hsegs);
3646         reg_w(sd, 0x2a, vsegs);
3647
3648         reg_w(sd, 0x39, hsegs);
3649         reg_w(sd, 0x3a, vsegs);
3650
3651         /* Windows driver does this here; who knows why */
3652         reg_w(sd, 0x2f, 0x80);
3653
3654         /******** Set the framerate ********/
3655         if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3656                                               sd->sensor == SEN_OV7620AE)
3657                 sd->clockdiv = 0;
3658         else
3659                 sd->clockdiv = 1;
3660
3661         /* Mode independent, but framerate dependent, regs */
3662         /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3663         reg_w(sd, 0x51, 0x04);
3664         reg_w(sd, 0x22, 0x18);
3665         reg_w(sd, 0x23, 0xff);
3666
3667         if (sd->bridge == BRIDGE_OV518PLUS) {
3668                 switch (sd->sensor) {
3669                 case SEN_OV7620AE:
3670                         /*
3671                          * HdG: 640x480 needs special handling on device
3672                          * revision 2, we check for device revison > 0 to
3673                          * avoid regressions, as we don't know the correct
3674                          * thing todo for revision 1.
3675                          *
3676                          * Also this likely means we don't need to
3677                          * differentiate between the OV7620 and OV7620AE,
3678                          * earlier testing hitting this same problem likely
3679                          * happened to be with revision < 2 cams using an
3680                          * OV7620 and revision 2 cams using an OV7620AE.
3681                          */
3682                         if (sd->revision > 0 &&
3683                                         sd->gspca_dev.pixfmt.width == 640) {
3684                                 reg_w(sd, 0x20, 0x60);
3685                                 reg_w(sd, 0x21, 0x1f);
3686                         } else {
3687                                 reg_w(sd, 0x20, 0x00);
3688                                 reg_w(sd, 0x21, 0x19);
3689                         }
3690                         break;
3691                 case SEN_OV7620:
3692                         reg_w(sd, 0x20, 0x00);
3693                         reg_w(sd, 0x21, 0x19);
3694                         break;
3695                 default:
3696                         reg_w(sd, 0x21, 0x19);
3697                 }
3698         } else
3699                 reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3700
3701         /* FIXME: Sensor-specific */
3702         /* Bit 5 is what matters here. Of course, it is "reserved" */
3703         i2c_w(sd, 0x54, 0x23);
3704
3705         reg_w(sd, 0x2f, 0x80);
3706
3707         if (sd->bridge == BRIDGE_OV518PLUS) {
3708                 reg_w(sd, 0x24, 0x94);
3709                 reg_w(sd, 0x25, 0x90);
3710                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3711                 ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3712                 ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3713                 ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3714                 ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3715                 ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3716                 ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3717                 ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3718                 ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3719         } else {
3720                 reg_w(sd, 0x24, 0x9f);
3721                 reg_w(sd, 0x25, 0x90);
3722                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3723                 ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3724                 ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3725                 ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3726                 ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3727                 ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3728                 ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3729                 ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3730                 ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3731         }
3732
3733         reg_w(sd, 0x2f, 0x80);
3734 }
3735
3736 /* Sets up the OV519 with the given image parameters
3737  *
3738  * OV519 needs a completely different approach, until we can figure out what
3739  * the individual registers do.
3740  *
3741  * Do not put any sensor-specific code in here (including I2C I/O functions)
3742  */
3743 static void ov519_mode_init_regs(struct sd *sd)
3744 {
3745         static const struct ov_regvals mode_init_519_ov7670[] = {
3746                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3747                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3748                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3749                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3750                 { 0xa3, 0x18 },
3751                 { 0xa4, 0x04 },
3752                 { 0xa5, 0x28 },
3753                 { 0x37, 0x00 }, /* SetUsbInit */
3754                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3755                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3756                 { 0x20, 0x0c },
3757                 { 0x21, 0x38 },
3758                 { 0x22, 0x1d },
3759                 { 0x17, 0x50 }, /* undocumented */
3760                 { 0x37, 0x00 }, /* undocumented */
3761                 { 0x40, 0xff }, /* I2C timeout counter */
3762                 { 0x46, 0x00 }, /* I2C clock prescaler */
3763                 { 0x59, 0x04 }, /* new from windrv 090403 */
3764                 { 0xff, 0x00 }, /* undocumented */
3765                 /* windows reads 0x55 at this point, why? */
3766         };
3767
3768         static const struct ov_regvals mode_init_519[] = {
3769                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3770                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3771                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3772                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3773                 { 0xa3, 0x18 },
3774                 { 0xa4, 0x04 },
3775                 { 0xa5, 0x28 },
3776                 { 0x37, 0x00 }, /* SetUsbInit */
3777                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3778                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3779                 { 0x22, 0x1d },
3780                 { 0x17, 0x50 }, /* undocumented */
3781                 { 0x37, 0x00 }, /* undocumented */
3782                 { 0x40, 0xff }, /* I2C timeout counter */
3783                 { 0x46, 0x00 }, /* I2C clock prescaler */
3784                 { 0x59, 0x04 }, /* new from windrv 090403 */
3785                 { 0xff, 0x00 }, /* undocumented */
3786                 /* windows reads 0x55 at this point, why? */
3787         };
3788
3789         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3790
3791         /******** Set the mode ********/
3792         switch (sd->sensor) {
3793         default:
3794                 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3795                 if (sd->sensor == SEN_OV7640 ||
3796                     sd->sensor == SEN_OV7648) {
3797                         /* Select 8-bit input mode */
3798                         reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3799                 }
3800                 break;
3801         case SEN_OV7660:
3802                 return;         /* done by ov519_set_mode/fr() */
3803         case SEN_OV7670:
3804                 write_regvals(sd, mode_init_519_ov7670,
3805                                 ARRAY_SIZE(mode_init_519_ov7670));
3806                 break;
3807         }
3808
3809         reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.pixfmt.width >> 4);
3810         reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.pixfmt.height >> 3);
3811         if (sd->sensor == SEN_OV7670 &&
3812             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3813                 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3814         else if (sd->sensor == SEN_OV7648 &&
3815             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3816                 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3817         else
3818                 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3819         reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3820         reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3821         reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3822         reg_w(sd, OV519_R16_DIVIDER,    0x00);
3823         reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3824         reg_w(sd, 0x26,                 0x00); /* Undocumented */
3825
3826         /******** Set the framerate ********/
3827         if (frame_rate > 0)
3828                 sd->frame_rate = frame_rate;
3829
3830 /* FIXME: These are only valid at the max resolution. */
3831         sd->clockdiv = 0;
3832         switch (sd->sensor) {
3833         case SEN_OV7640:
3834         case SEN_OV7648:
3835                 switch (sd->frame_rate) {
3836                 default:
3837 /*              case 30: */
3838                         reg_w(sd, 0xa4, 0x0c);
3839                         reg_w(sd, 0x23, 0xff);
3840                         break;
3841                 case 25:
3842                         reg_w(sd, 0xa4, 0x0c);
3843                         reg_w(sd, 0x23, 0x1f);
3844                         break;
3845                 case 20:
3846                         reg_w(sd, 0xa4, 0x0c);
3847                         reg_w(sd, 0x23, 0x1b);
3848                         break;
3849                 case 15:
3850                         reg_w(sd, 0xa4, 0x04);
3851                         reg_w(sd, 0x23, 0xff);
3852                         sd->clockdiv = 1;
3853                         break;
3854                 case 10:
3855                         reg_w(sd, 0xa4, 0x04);
3856                         reg_w(sd, 0x23, 0x1f);
3857                         sd->clockdiv = 1;
3858                         break;
3859                 case 5:
3860                         reg_w(sd, 0xa4, 0x04);
3861                         reg_w(sd, 0x23, 0x1b);
3862                         sd->clockdiv = 1;
3863                         break;
3864                 }
3865                 break;
3866         case SEN_OV8610:
3867                 switch (sd->frame_rate) {
3868                 default:        /* 15 fps */
3869 /*              case 15: */
3870                         reg_w(sd, 0xa4, 0x06);
3871                         reg_w(sd, 0x23, 0xff);
3872                         break;
3873                 case 10:
3874                         reg_w(sd, 0xa4, 0x06);
3875                         reg_w(sd, 0x23, 0x1f);
3876                         break;
3877                 case 5:
3878                         reg_w(sd, 0xa4, 0x06);
3879                         reg_w(sd, 0x23, 0x1b);
3880                         break;
3881                 }
3882                 break;
3883         case SEN_OV7670:                /* guesses, based on 7640 */
3884                 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3885                                  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3886                 reg_w(sd, 0xa4, 0x10);
3887                 switch (sd->frame_rate) {
3888                 case 30:
3889                         reg_w(sd, 0x23, 0xff);
3890                         break;
3891                 case 20:
3892                         reg_w(sd, 0x23, 0x1b);
3893                         break;
3894                 default:
3895 /*              case 15: */
3896                         reg_w(sd, 0x23, 0xff);
3897                         sd->clockdiv = 1;
3898                         break;
3899                 }
3900                 break;
3901         }
3902 }
3903
3904 static void mode_init_ov_sensor_regs(struct sd *sd)
3905 {
3906         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3907         int qvga, xstart, xend, ystart, yend;
3908         u8 v;
3909
3910         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3911
3912         /******** Mode (VGA/QVGA) and sensor specific regs ********/
3913         switch (sd->sensor) {
3914         case SEN_OV2610:
3915                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3916                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3917                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3918                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3919                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3920                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3921                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3922                 return;
3923         case SEN_OV2610AE: {
3924                 u8 v;
3925
3926                 /* frame rates:
3927                  *      10fps / 5 fps for 1600x1200
3928                  *      40fps / 20fps for 800x600
3929                  */
3930                 v = 80;
3931                 if (qvga) {
3932                         if (sd->frame_rate < 25)
3933                                 v = 0x81;
3934                 } else {
3935                         if (sd->frame_rate < 10)
3936                                 v = 0x81;
3937                 }
3938                 i2c_w(sd, 0x11, v);
3939                 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3940                 return;
3941             }
3942         case SEN_OV3610:
3943                 if (qvga) {
3944                         xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3945                                 (0x1f << 4);
3946                         ystart = (776 - gspca_dev->pixfmt.height) / 2;
3947                 } else {
3948                         xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3949                                 (0x10 << 4);
3950                         ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3951                 }
3952                 xend = xstart + gspca_dev->pixfmt.width;
3953                 yend = ystart + gspca_dev->pixfmt.height;
3954                 /* Writing to the COMH register resets the other windowing regs
3955                    to their default values, so we must do this first. */
3956                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3957                 i2c_w_mask(sd, 0x32,
3958                            (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3959                            0x3f);
3960                 i2c_w_mask(sd, 0x03,
3961                            (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3962                            0x0f);
3963                 i2c_w(sd, 0x17, xstart >> 4);
3964                 i2c_w(sd, 0x18, xend >> 4);
3965                 i2c_w(sd, 0x19, ystart >> 3);
3966                 i2c_w(sd, 0x1a, yend >> 3);
3967                 return;
3968         case SEN_OV8610:
3969                 /* For OV8610 qvga means qsvga */
3970                 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3971                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3972                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3973                 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3974                 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3975                 break;
3976         case SEN_OV7610:
3977                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3978                 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3979                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3980                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3981                 break;
3982         case SEN_OV7620:
3983         case SEN_OV7620AE:
3984         case SEN_OV76BE:
3985                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3986                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3987                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3988                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3989                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3990                 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3991                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3992                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3993                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3994                 if (sd->sensor == SEN_OV76BE)
3995                         i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3996                 break;
3997         case SEN_OV7640:
3998         case SEN_OV7648:
3999                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4000                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4001                 /* Setting this undocumented bit in qvga mode removes a very
4002                    annoying vertical shaking of the image */
4003                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4004                 /* Unknown */
4005                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4006                 /* Allow higher automatic gain (to allow higher framerates) */
4007                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4008                 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4009                 break;
4010         case SEN_OV7670:
4011                 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4012                  * do we need to set anything else?
4013                  *      HSTART etc are set in set_ov_sensor_window itself */
4014                 i2c_w_mask(sd, OV7670_R12_COM7,
4015                          qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4016                          OV7670_COM7_FMT_MASK);
4017                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4018                 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4019                                 OV7670_COM8_AWB);
4020                 if (qvga) {             /* QVGA from ov7670.c by
4021                                          * Jonathan Corbet */
4022                         xstart = 164;
4023                         xend = 28;
4024                         ystart = 14;
4025                         yend = 494;
4026                 } else {                /* VGA */
4027                         xstart = 158;
4028                         xend = 14;
4029                         ystart = 10;
4030                         yend = 490;
4031                 }
4032                 /* OV7670 hardware window registers are split across
4033                  * multiple locations */
4034                 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4035                 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4036                 v = i2c_r(sd, OV7670_R32_HREF);
4037                 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4038                 msleep(10);     /* need to sleep between read and write to
4039                                  * same reg! */
4040                 i2c_w(sd, OV7670_R32_HREF, v);
4041
4042                 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4043                 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4044                 v = i2c_r(sd, OV7670_R03_VREF);
4045                 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4046                 msleep(10);     /* need to sleep between read and write to
4047                                  * same reg! */
4048                 i2c_w(sd, OV7670_R03_VREF, v);
4049                 break;
4050         case SEN_OV6620:
4051                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4052                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4053                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4054                 break;
4055         case SEN_OV6630:
4056         case SEN_OV66308AF:
4057                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4058                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4059                 break;
4060         case SEN_OV9600: {
4061                 const struct ov_i2c_regvals *vals;
4062                 static const struct ov_i2c_regvals sxga_15[] = {
4063                         {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4064                 };
4065                 static const struct ov_i2c_regvals sxga_7_5[] = {
4066                         {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4067                 };
4068                 static const struct ov_i2c_regvals vga_30[] = {
4069                         {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4070                 };
4071                 static const struct ov_i2c_regvals vga_15[] = {
4072                         {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4073                 };
4074
4075                 /* frame rates:
4076                  *      15fps / 7.5 fps for 1280x1024
4077                  *      30fps / 15fps for 640x480
4078                  */
4079                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4080                 if (qvga)
4081                         vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4082                 else
4083                         vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4084                 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4085                 return;
4086             }
4087         default:
4088                 return;
4089         }
4090
4091         /******** Clock programming ********/
4092         i2c_w(sd, 0x11, sd->clockdiv);
4093 }
4094
4095 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4096 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4097 {
4098         struct sd *sd = (struct sd *) gspca_dev;
4099
4100         if (sd->gspca_dev.streaming)
4101                 reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4102         i2c_w_mask(sd, OV7670_R1E_MVFP,
4103                 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4104                 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4105         if (sd->gspca_dev.streaming)
4106                 reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4107 }
4108
4109 static void set_ov_sensor_window(struct sd *sd)
4110 {
4111         struct gspca_dev *gspca_dev;
4112         int qvga, crop;
4113         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4114
4115         /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4116         switch (sd->sensor) {
4117         case SEN_OV2610:
4118         case SEN_OV2610AE:
4119         case SEN_OV3610:
4120         case SEN_OV7670:
4121         case SEN_OV9600:
4122                 mode_init_ov_sensor_regs(sd);
4123                 return;
4124         case SEN_OV7660:
4125                 ov519_set_mode(sd);
4126                 ov519_set_fr(sd);
4127                 return;
4128         }
4129
4130         gspca_dev = &sd->gspca_dev;
4131         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4132         crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4133
4134         /* The different sensor ICs handle setting up of window differently.
4135          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4136         switch (sd->sensor) {
4137         case SEN_OV8610:
4138                 hwsbase = 0x1e;
4139                 hwebase = 0x1e;
4140                 vwsbase = 0x02;
4141                 vwebase = 0x02;
4142                 break;
4143         case SEN_OV7610:
4144         case SEN_OV76BE:
4145                 hwsbase = 0x38;
4146                 hwebase = 0x3a;
4147                 vwsbase = vwebase = 0x05;
4148                 break;
4149         case SEN_OV6620:
4150         case SEN_OV6630:
4151         case SEN_OV66308AF:
4152                 hwsbase = 0x38;
4153                 hwebase = 0x3a;
4154                 vwsbase = 0x05;
4155                 vwebase = 0x06;
4156                 if (sd->sensor == SEN_OV66308AF && qvga)
4157                         /* HDG: this fixes U and V getting swapped */
4158                         hwsbase++;
4159                 if (crop) {
4160                         hwsbase += 8;
4161                         hwebase += 8;
4162                         vwsbase += 11;
4163                         vwebase += 11;
4164                 }
4165                 break;
4166         case SEN_OV7620:
4167         case SEN_OV7620AE:
4168                 hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4169                 hwebase = 0x2f;
4170                 vwsbase = vwebase = 0x05;
4171                 break;
4172         case SEN_OV7640:
4173         case SEN_OV7648:
4174                 hwsbase = 0x1a;
4175                 hwebase = 0x1a;
4176                 vwsbase = vwebase = 0x03;
4177                 break;
4178         default:
4179                 return;
4180         }
4181
4182         switch (sd->sensor) {
4183         case SEN_OV6620:
4184         case SEN_OV6630:
4185         case SEN_OV66308AF:
4186                 if (qvga) {             /* QCIF */
4187                         hwscale = 0;
4188                         vwscale = 0;
4189                 } else {                /* CIF */
4190                         hwscale = 1;
4191                         vwscale = 1;    /* The datasheet says 0;
4192                                          * it's wrong */
4193                 }
4194                 break;
4195         case SEN_OV8610:
4196                 if (qvga) {             /* QSVGA */
4197                         hwscale = 1;
4198                         vwscale = 1;
4199                 } else {                /* SVGA */
4200                         hwscale = 2;
4201                         vwscale = 2;
4202                 }
4203                 break;
4204         default:                        /* SEN_OV7xx0 */
4205                 if (qvga) {             /* QVGA */
4206                         hwscale = 1;
4207                         vwscale = 0;
4208                 } else {                /* VGA */
4209                         hwscale = 2;
4210                         vwscale = 1;
4211                 }
4212         }
4213
4214         mode_init_ov_sensor_regs(sd);
4215
4216         i2c_w(sd, 0x17, hwsbase);
4217         i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4218         i2c_w(sd, 0x19, vwsbase);
4219         i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4220 }
4221
4222 /* -- start the camera -- */
4223 static int sd_start(struct gspca_dev *gspca_dev)
4224 {
4225         struct sd *sd = (struct sd *) gspca_dev;
4226
4227         /* Default for most bridges, allow bridge_mode_init_regs to override */
4228         sd->sensor_width = sd->gspca_dev.pixfmt.width;
4229         sd->sensor_height = sd->gspca_dev.pixfmt.height;
4230
4231         switch (sd->bridge) {
4232         case BRIDGE_OV511:
4233         case BRIDGE_OV511PLUS:
4234                 ov511_mode_init_regs(sd);
4235                 break;
4236         case BRIDGE_OV518:
4237         case BRIDGE_OV518PLUS:
4238                 ov518_mode_init_regs(sd);
4239                 break;
4240         case BRIDGE_OV519:
4241                 ov519_mode_init_regs(sd);
4242                 break;
4243         /* case BRIDGE_OVFX2: nothing to do */
4244         case BRIDGE_W9968CF:
4245                 w9968cf_mode_init_regs(sd);
4246                 break;
4247         }
4248
4249         set_ov_sensor_window(sd);
4250
4251         /* Force clear snapshot state in case the snapshot button was
4252            pressed while we weren't streaming */
4253         sd->snapshot_needs_reset = 1;
4254         sd_reset_snapshot(gspca_dev);
4255
4256         sd->first_frame = 3;
4257
4258         ov51x_restart(sd);
4259         ov51x_led_control(sd, 1);
4260         return gspca_dev->usb_err;
4261 }
4262
4263 static void sd_stopN(struct gspca_dev *gspca_dev)
4264 {
4265         struct sd *sd = (struct sd *) gspca_dev;
4266
4267         ov51x_stop(sd);
4268         ov51x_led_control(sd, 0);
4269 }
4270
4271 static void sd_stop0(struct gspca_dev *gspca_dev)
4272 {
4273         struct sd *sd = (struct sd *) gspca_dev;
4274
4275         if (!sd->gspca_dev.present)
4276                 return;
4277         if (sd->bridge == BRIDGE_W9968CF)
4278                 w9968cf_stop0(sd);
4279
4280 #if IS_ENABLED(CONFIG_INPUT)
4281         /* If the last button state is pressed, release it now! */
4282         if (sd->snapshot_pressed) {
4283                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4284                 input_sync(gspca_dev->input_dev);
4285                 sd->snapshot_pressed = 0;
4286         }
4287 #endif
4288         if (sd->bridge == BRIDGE_OV519)
4289                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4290 }
4291
4292 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4293 {
4294         struct sd *sd = (struct sd *) gspca_dev;
4295
4296         if (sd->snapshot_pressed != state) {
4297 #if IS_ENABLED(CONFIG_INPUT)
4298                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4299                 input_sync(gspca_dev->input_dev);
4300 #endif
4301                 if (state)
4302                         sd->snapshot_needs_reset = 1;
4303
4304                 sd->snapshot_pressed = state;
4305         } else {
4306                 /* On the ov511 / ov519 we need to reset the button state
4307                    multiple times, as resetting does not work as long as the
4308                    button stays pressed */
4309                 switch (sd->bridge) {
4310                 case BRIDGE_OV511:
4311                 case BRIDGE_OV511PLUS:
4312                 case BRIDGE_OV519:
4313                         if (state)
4314                                 sd->snapshot_needs_reset = 1;
4315                         break;
4316                 }
4317         }
4318 }
4319
4320 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4321                         u8 *in,                 /* isoc packet */
4322                         int len)                /* iso packet length */
4323 {
4324         struct sd *sd = (struct sd *) gspca_dev;
4325
4326         /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4327          * byte non-zero. The EOF packet has image width/height in the
4328          * 10th and 11th bytes. The 9th byte is given as follows:
4329          *
4330          * bit 7: EOF
4331          *     6: compression enabled
4332          *     5: 422/420/400 modes
4333          *     4: 422/420/400 modes
4334          *     3: 1
4335          *     2: snapshot button on
4336          *     1: snapshot frame
4337          *     0: even/odd field
4338          */
4339         if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4340             (in[8] & 0x08)) {
4341                 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4342                 if (in[8] & 0x80) {
4343                         /* Frame end */
4344                         if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4345                             (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4346                                 PERR("Invalid frame size, got: %dx%d, requested: %dx%d\n",
4347                                         (in[9] + 1) * 8, (in[10] + 1) * 8,
4348                                         gspca_dev->pixfmt.width,
4349                                         gspca_dev->pixfmt.height);
4350                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4351                                 return;
4352                         }
4353                         /* Add 11 byte footer to frame, might be useful */
4354                         gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4355                         return;
4356                 } else {
4357                         /* Frame start */
4358                         gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4359                         sd->packet_nr = 0;
4360                 }
4361         }
4362
4363         /* Ignore the packet number */
4364         len--;
4365
4366         /* intermediate packet */
4367         gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4368 }
4369
4370 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4371                         u8 *data,                       /* isoc packet */
4372                         int len)                        /* iso packet length */
4373 {
4374         struct sd *sd = (struct sd *) gspca_dev;
4375
4376         /* A false positive here is likely, until OVT gives me
4377          * the definitive SOF/EOF format */
4378         if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4379                 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4380                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4381                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4382                 sd->packet_nr = 0;
4383         }
4384
4385         if (gspca_dev->last_packet_type == DISCARD_PACKET)
4386                 return;
4387
4388         /* Does this device use packet numbers ? */
4389         if (len & 7) {
4390                 len--;
4391                 if (sd->packet_nr == data[len])
4392                         sd->packet_nr++;
4393                 /* The last few packets of the frame (which are all 0's
4394                    except that they may contain part of the footer), are
4395                    numbered 0 */
4396                 else if (sd->packet_nr == 0 || data[len]) {
4397                         PERR("Invalid packet nr: %d (expect: %d)",
4398                                 (int)data[len], (int)sd->packet_nr);
4399                         gspca_dev->last_packet_type = DISCARD_PACKET;
4400                         return;
4401                 }
4402         }
4403
4404         /* intermediate packet */
4405         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4406 }
4407
4408 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4409                         u8 *data,                       /* isoc packet */
4410                         int len)                        /* iso packet length */
4411 {
4412         /* Header of ov519 is 16 bytes:
4413          *     Byte     Value      Description
4414          *      0       0xff    magic
4415          *      1       0xff    magic
4416          *      2       0xff    magic
4417          *      3       0xXX    0x50 = SOF, 0x51 = EOF
4418          *      9       0xXX    0x01 initial frame without data,
4419          *                      0x00 standard frame with image
4420          *      14      Lo      in EOF: length of image data / 8
4421          *      15      Hi
4422          */
4423
4424         if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4425                 switch (data[3]) {
4426                 case 0x50:              /* start of frame */
4427                         /* Don't check the button state here, as the state
4428                            usually (always ?) changes at EOF and checking it
4429                            here leads to unnecessary snapshot state resets. */
4430 #define HDRSZ 16
4431                         data += HDRSZ;
4432                         len -= HDRSZ;
4433 #undef HDRSZ
4434                         if (data[0] == 0xff || data[1] == 0xd8)
4435                                 gspca_frame_add(gspca_dev, FIRST_PACKET,
4436                                                 data, len);
4437                         else
4438                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4439                         return;
4440                 case 0x51:              /* end of frame */
4441                         ov51x_handle_button(gspca_dev, data[11] & 1);
4442                         if (data[9] != 0)
4443                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4444                         gspca_frame_add(gspca_dev, LAST_PACKET,
4445                                         NULL, 0);
4446                         return;
4447                 }
4448         }
4449
4450         /* intermediate packet */
4451         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4452 }
4453
4454 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4455                         u8 *data,                       /* isoc packet */
4456                         int len)                        /* iso packet length */
4457 {
4458         struct sd *sd = (struct sd *) gspca_dev;
4459
4460         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4461
4462         /* A short read signals EOF */
4463         if (len < gspca_dev->cam.bulk_size) {
4464                 /* If the frame is short, and it is one of the first ones
4465                    the sensor and bridge are still syncing, so drop it. */
4466                 if (sd->first_frame) {
4467                         sd->first_frame--;
4468                         if (gspca_dev->image_len <
4469                                   sd->gspca_dev.pixfmt.width *
4470                                         sd->gspca_dev.pixfmt.height)
4471                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4472                 }
4473                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4474                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4475         }
4476 }
4477
4478 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4479                         u8 *data,                       /* isoc packet */
4480                         int len)                        /* iso packet length */
4481 {
4482         struct sd *sd = (struct sd *) gspca_dev;
4483
4484         switch (sd->bridge) {
4485         case BRIDGE_OV511:
4486         case BRIDGE_OV511PLUS:
4487                 ov511_pkt_scan(gspca_dev, data, len);
4488                 break;
4489         case BRIDGE_OV518:
4490         case BRIDGE_OV518PLUS:
4491                 ov518_pkt_scan(gspca_dev, data, len);
4492                 break;
4493         case BRIDGE_OV519:
4494                 ov519_pkt_scan(gspca_dev, data, len);
4495                 break;
4496         case BRIDGE_OVFX2:
4497                 ovfx2_pkt_scan(gspca_dev, data, len);
4498                 break;
4499         case BRIDGE_W9968CF:
4500                 w9968cf_pkt_scan(gspca_dev, data, len);
4501                 break;
4502         }
4503 }
4504
4505 /* -- management routines -- */
4506
4507 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4508 {
4509         struct sd *sd = (struct sd *) gspca_dev;
4510         static const struct ov_i2c_regvals brit_7660[][7] = {
4511                 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4512                         {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4513                 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4514                         {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4515                 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4516                         {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4517                 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4518                         {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4519                 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4520                         {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4521                 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4522                         {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4523                 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4524                         {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4525         };
4526
4527         switch (sd->sensor) {
4528         case SEN_OV8610:
4529         case SEN_OV7610:
4530         case SEN_OV76BE:
4531         case SEN_OV6620:
4532         case SEN_OV6630:
4533         case SEN_OV66308AF:
4534         case SEN_OV7640:
4535         case SEN_OV7648:
4536                 i2c_w(sd, OV7610_REG_BRT, val);
4537                 break;
4538         case SEN_OV7620:
4539         case SEN_OV7620AE:
4540                 i2c_w(sd, OV7610_REG_BRT, val);
4541                 break;
4542         case SEN_OV7660:
4543                 write_i2c_regvals(sd, brit_7660[val],
4544                                 ARRAY_SIZE(brit_7660[0]));
4545                 break;
4546         case SEN_OV7670:
4547 /*win trace
4548  *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4549                 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4550                 break;
4551         }
4552 }
4553
4554 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4555 {
4556         struct sd *sd = (struct sd *) gspca_dev;
4557         static const struct ov_i2c_regvals contrast_7660[][31] = {
4558                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4559                  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4560                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4561                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4562                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4563                  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4564                  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4565                  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4566                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4567                  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4568                  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4569                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4570                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4571                  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4572                  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4573                  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4574                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4575                  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4576                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4577                  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4578                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4579                  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4580                  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4581                  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4582                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4583                  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4584                  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4585                  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4586                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4587                  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4588                  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4589                  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4590                 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4591                  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4592                  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4593                  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4594                  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4595                  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4596                  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4597                  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4598                 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4599                  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4600                  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4601                  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4602                  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4603                  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4604                  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4605                  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4606                 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4607                  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4608                  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4609                  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4610                  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4611                  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4612                  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4613                  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4614         };
4615
4616         switch (sd->sensor) {
4617         case SEN_OV7610:
4618         case SEN_OV6620:
4619                 i2c_w(sd, OV7610_REG_CNT, val);
4620                 break;
4621         case SEN_OV6630:
4622         case SEN_OV66308AF:
4623                 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4624                 break;
4625         case SEN_OV8610: {
4626                 static const u8 ctab[] = {
4627                         0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4628                 };
4629
4630                 /* Use Y gamma control instead. Bit 0 enables it. */
4631                 i2c_w(sd, 0x64, ctab[val >> 5]);
4632                 break;
4633             }
4634         case SEN_OV7620:
4635         case SEN_OV7620AE: {
4636                 static const u8 ctab[] = {
4637                         0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4638                         0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4639                 };
4640
4641                 /* Use Y gamma control instead. Bit 0 enables it. */
4642                 i2c_w(sd, 0x64, ctab[val >> 4]);
4643                 break;
4644             }
4645         case SEN_OV7660:
4646                 write_i2c_regvals(sd, contrast_7660[val],
4647                                         ARRAY_SIZE(contrast_7660[0]));
4648                 break;
4649         case SEN_OV7670:
4650                 /* check that this isn't just the same as ov7610 */
4651                 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4652                 break;
4653         }
4654 }
4655
4656 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4657 {
4658         struct sd *sd = (struct sd *) gspca_dev;
4659
4660         i2c_w(sd, 0x10, val);
4661 }
4662
4663 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4664 {
4665         struct sd *sd = (struct sd *) gspca_dev;
4666         static const struct ov_i2c_regvals colors_7660[][6] = {
4667                 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4668                  {0x53, 0x19}, {0x54, 0x23}},
4669                 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4670                  {0x53, 0x2c}, {0x54, 0x3e}},
4671                 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4672                  {0x53, 0x40}, {0x54, 0x59}},
4673                 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4674                  {0x53, 0x53}, {0x54, 0x73}},
4675                 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4676                  {0x53, 0x66}, {0x54, 0x8e}},
4677         };
4678
4679         switch (sd->sensor) {
4680         case SEN_OV8610:
4681         case SEN_OV7610:
4682         case SEN_OV76BE:
4683         case SEN_OV6620:
4684         case SEN_OV6630:
4685         case SEN_OV66308AF:
4686                 i2c_w(sd, OV7610_REG_SAT, val);
4687                 break;
4688         case SEN_OV7620:
4689         case SEN_OV7620AE:
4690                 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4691 /*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4692                 if (rc < 0)
4693                         goto out; */
4694                 i2c_w(sd, OV7610_REG_SAT, val);
4695                 break;
4696         case SEN_OV7640:
4697         case SEN_OV7648:
4698                 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4699                 break;
4700         case SEN_OV7660:
4701                 write_i2c_regvals(sd, colors_7660[val],
4702                                         ARRAY_SIZE(colors_7660[0]));
4703                 break;
4704         case SEN_OV7670:
4705                 /* supported later once I work out how to do it
4706                  * transparently fail now! */
4707                 /* set REG_COM13 values for UV sat auto mode */
4708                 break;
4709         }
4710 }
4711
4712 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4713 {
4714         struct sd *sd = (struct sd *) gspca_dev;
4715
4716         i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4717 }
4718
4719 static void setfreq_i(struct sd *sd, s32 val)
4720 {
4721         if (sd->sensor == SEN_OV7660
4722          || sd->sensor == SEN_OV7670) {
4723                 switch (val) {
4724                 case 0: /* Banding filter disabled */
4725                         i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4726                         break;
4727                 case 1: /* 50 hz */
4728                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4729                                    OV7670_COM8_BFILT);
4730                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4731                         break;
4732                 case 2: /* 60 hz */
4733                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4734                                    OV7670_COM8_BFILT);
4735                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4736                         break;
4737                 case 3: /* Auto hz - ov7670 only */
4738                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4739                                    OV7670_COM8_BFILT);
4740                         i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4741                                    0x18);
4742                         break;
4743                 }
4744         } else {
4745                 switch (val) {
4746                 case 0: /* Banding filter disabled */
4747                         i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4748                         i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4749                         break;
4750                 case 1: /* 50 hz (filter on and framerate adj) */
4751                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4752                         i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4753                         /* 20 fps -> 16.667 fps */
4754                         if (sd->sensor == SEN_OV6620 ||
4755                             sd->sensor == SEN_OV6630 ||
4756                             sd->sensor == SEN_OV66308AF)
4757                                 i2c_w(sd, 0x2b, 0x5e);
4758                         else
4759                                 i2c_w(sd, 0x2b, 0xac);
4760                         break;
4761                 case 2: /* 60 hz (filter on, ...) */
4762                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4763                         if (sd->sensor == SEN_OV6620 ||
4764                             sd->sensor == SEN_OV6630 ||
4765                             sd->sensor == SEN_OV66308AF) {
4766                                 /* 20 fps -> 15 fps */
4767                                 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4768                                 i2c_w(sd, 0x2b, 0xa8);
4769                         } else {
4770                                 /* no framerate adj. */
4771                                 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4772                         }
4773                         break;
4774                 }
4775         }
4776 }
4777
4778 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4779 {
4780         struct sd *sd = (struct sd *) gspca_dev;
4781
4782         setfreq_i(sd, val);
4783
4784         /* Ugly but necessary */
4785         if (sd->bridge == BRIDGE_W9968CF)
4786                 w9968cf_set_crop_window(sd);
4787 }
4788
4789 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4790                         struct v4l2_jpegcompression *jcomp)
4791 {
4792         struct sd *sd = (struct sd *) gspca_dev;
4793
4794         if (sd->bridge != BRIDGE_W9968CF)
4795                 return -ENOTTY;
4796
4797         memset(jcomp, 0, sizeof *jcomp);
4798         jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4799         jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4800                               V4L2_JPEG_MARKER_DRI;
4801         return 0;
4802 }
4803
4804 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4805                         const struct v4l2_jpegcompression *jcomp)
4806 {
4807         struct sd *sd = (struct sd *) gspca_dev;
4808
4809         if (sd->bridge != BRIDGE_W9968CF)
4810                 return -ENOTTY;
4811
4812         v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4813         return 0;
4814 }
4815
4816 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4817 {
4818         struct gspca_dev *gspca_dev =
4819                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4820         struct sd *sd = (struct sd *)gspca_dev;
4821
4822         gspca_dev->usb_err = 0;
4823
4824         switch (ctrl->id) {
4825         case V4L2_CID_AUTOGAIN:
4826                 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4827                 break;
4828         }
4829         return 0;
4830 }
4831
4832 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4833 {
4834         struct gspca_dev *gspca_dev =
4835                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4836         struct sd *sd = (struct sd *)gspca_dev;
4837
4838         gspca_dev->usb_err = 0;
4839
4840         if (!gspca_dev->streaming)
4841                 return 0;
4842
4843         switch (ctrl->id) {
4844         case V4L2_CID_BRIGHTNESS:
4845                 setbrightness(gspca_dev, ctrl->val);
4846                 break;
4847         case V4L2_CID_CONTRAST:
4848                 setcontrast(gspca_dev, ctrl->val);
4849                 break;
4850         case V4L2_CID_POWER_LINE_FREQUENCY:
4851                 setfreq(gspca_dev, ctrl->val);
4852                 break;
4853         case V4L2_CID_AUTOBRIGHTNESS:
4854                 if (ctrl->is_new)
4855                         setautobright(gspca_dev, ctrl->val);
4856                 if (!ctrl->val && sd->brightness->is_new)
4857                         setbrightness(gspca_dev, sd->brightness->val);
4858                 break;
4859         case V4L2_CID_SATURATION:
4860                 setcolors(gspca_dev, ctrl->val);
4861                 break;
4862         case V4L2_CID_HFLIP:
4863                 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4864                 break;
4865         case V4L2_CID_AUTOGAIN:
4866                 if (ctrl->is_new)
4867                         setautogain(gspca_dev, ctrl->val);
4868                 if (!ctrl->val && gspca_dev->exposure->is_new)
4869                         setexposure(gspca_dev, gspca_dev->exposure->val);
4870                 break;
4871         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4872                 return -EBUSY; /* Should never happen, as we grab the ctrl */
4873         }
4874         return gspca_dev->usb_err;
4875 }
4876
4877 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4878         .g_volatile_ctrl = sd_g_volatile_ctrl,
4879         .s_ctrl = sd_s_ctrl,
4880 };
4881
4882 static int sd_init_controls(struct gspca_dev *gspca_dev)
4883 {
4884         struct sd *sd = (struct sd *)gspca_dev;
4885         struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4886
4887         gspca_dev->vdev.ctrl_handler = hdl;
4888         v4l2_ctrl_handler_init(hdl, 10);
4889         if (valid_controls[sd->sensor].has_brightness)
4890                 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4891                         V4L2_CID_BRIGHTNESS, 0,
4892                         sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4893                         sd->sensor == SEN_OV7660 ? 3 : 127);
4894         if (valid_controls[sd->sensor].has_contrast) {
4895                 if (sd->sensor == SEN_OV7660)
4896                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4897                                 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4898                 else
4899                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4900                                 V4L2_CID_CONTRAST, 0, 255, 1,
4901                                 (sd->sensor == SEN_OV6630 ||
4902                                  sd->sensor == SEN_OV66308AF) ? 200 : 127);
4903         }
4904         if (valid_controls[sd->sensor].has_sat)
4905                 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4906                         V4L2_CID_SATURATION, 0,
4907                         sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4908                         sd->sensor == SEN_OV7660 ? 2 : 127);
4909         if (valid_controls[sd->sensor].has_exposure)
4910                 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4911                         V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4912         if (valid_controls[sd->sensor].has_hvflip) {
4913                 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4914                         V4L2_CID_HFLIP, 0, 1, 1, 0);
4915                 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4916                         V4L2_CID_VFLIP, 0, 1, 1, 0);
4917         }
4918         if (valid_controls[sd->sensor].has_autobright)
4919                 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920                         V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4921         if (valid_controls[sd->sensor].has_autogain)
4922                 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4923                         V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4924         if (valid_controls[sd->sensor].has_freq) {
4925                 if (sd->sensor == SEN_OV7670)
4926                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4927                                 V4L2_CID_POWER_LINE_FREQUENCY,
4928                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4929                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4930                 else
4931                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4932                                 V4L2_CID_POWER_LINE_FREQUENCY,
4933                                 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4934         }
4935         if (sd->bridge == BRIDGE_W9968CF)
4936                 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4937                         V4L2_CID_JPEG_COMPRESSION_QUALITY,
4938                         QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4939
4940         if (hdl->error) {
4941                 PERR("Could not initialize controls\n");
4942                 return hdl->error;
4943         }
4944         if (gspca_dev->autogain)
4945                 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4946         if (sd->autobright)
4947                 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4948         if (sd->hflip)
4949                 v4l2_ctrl_cluster(2, &sd->hflip);
4950         return 0;
4951 }
4952
4953 /* sub-driver description */
4954 static const struct sd_desc sd_desc = {
4955         .name = MODULE_NAME,
4956         .config = sd_config,
4957         .init = sd_init,
4958         .init_controls = sd_init_controls,
4959         .isoc_init = sd_isoc_init,
4960         .start = sd_start,
4961         .stopN = sd_stopN,
4962         .stop0 = sd_stop0,
4963         .pkt_scan = sd_pkt_scan,
4964         .dq_callback = sd_reset_snapshot,
4965         .get_jcomp = sd_get_jcomp,
4966         .set_jcomp = sd_set_jcomp,
4967 #if IS_ENABLED(CONFIG_INPUT)
4968         .other_input = 1,
4969 #endif
4970 };
4971
4972 /* -- module initialisation -- */
4973 static const struct usb_device_id device_table[] = {
4974         {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4975         {USB_DEVICE(0x041e, 0x4052),
4976                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4977         {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4978         {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4979         {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4980         {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4981         {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4982         {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4983         {USB_DEVICE(0x045e, 0x028c),
4984                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4985         {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4986         {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4987         {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4988         {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4989         {USB_DEVICE(0x05a9, 0x0519),
4990                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4991         {USB_DEVICE(0x05a9, 0x0530),
4992                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4993         {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4994         {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4995         {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4996         {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4997         {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4998         {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4999         {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5000         {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5001         {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5002         {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5003         {}
5004 };
5005
5006 MODULE_DEVICE_TABLE(usb, device_table);
5007
5008 /* -- device connect -- */
5009 static int sd_probe(struct usb_interface *intf,
5010                         const struct usb_device_id *id)
5011 {
5012         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5013                                 THIS_MODULE);
5014 }
5015
5016 static struct usb_driver sd_driver = {
5017         .name = MODULE_NAME,
5018         .id_table = device_table,
5019         .probe = sd_probe,
5020         .disconnect = gspca_disconnect,
5021 #ifdef CONFIG_PM
5022         .suspend = gspca_suspend,
5023         .resume = gspca_resume,
5024         .reset_resume = gspca_resume,
5025 #endif
5026 };
5027
5028 module_usb_driver(sd_driver);
5029
5030 module_param(frame_rate, int, 0644);
5031 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");