drivers/media/usb/gspca/ov519.c

   1 /*
   2  * OV519 driver
   3  *
   4  * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
   5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * This module is adapted from the ov51x-jpeg package, which itself
   8  * was adapted from the ov511 driver.
   9  *
  10  * Original copyright for the ov511 driver is:
  11  *
  12  * Copyright (c) 1999-2006 Mark W. McClelland
  13  * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14  * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15  * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16  * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17  * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18  *
  19  * ov51x-jpeg original copyright is:
  20  *
  21  * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22  * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23  *
  24  * This program is free software; you can redistribute it and/or modify
  25  * it under the terms of the GNU General Public License as published by
  26  * the Free Software Foundation; either version 2 of the License, or
  27  * any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32  * GNU General Public License for more details.
  33  *
  34  */
  35
  36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  37
  38 #define MODULE_NAME "ov519"
  39
  40 #include <linux/input.h>
  41 #include "gspca.h"
  42
  43 /* The jpeg_hdr is used by w996Xcf only */
  44 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  45 #define CONEX_CAM
  46 #include "jpeg.h"
  47
  48 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  49 MODULE_DESCRIPTION("OV519 USB Camera Driver");
  50 MODULE_LICENSE("GPL");
  51
  52 /* global parameters */
  53 static int frame_rate;
  54
  55 /* Number of times to retry a failed I2C transaction. Increase this if you
  56  * are getting "Failed to read sensor ID..." */
  57 static int i2c_detect_tries = 10;
  58
  59 /* ov519 device descriptor */
  60 struct sd {
  61         struct gspca_dev gspca_dev;             /* !! must be the first item */
  62
  63         struct v4l2_ctrl *jpegqual;
  64         struct v4l2_ctrl *freq;
  65         struct { /* h/vflip control cluster */
  66                 struct v4l2_ctrl *hflip;
  67                 struct v4l2_ctrl *vflip;
  68         };
  69         struct { /* autobrightness/brightness control cluster */
  70                 struct v4l2_ctrl *autobright;
  71                 struct v4l2_ctrl *brightness;
  72         };
  73
  74         u8 revision;
  75
  76         u8 packet_nr;
  77
  78         char bridge;
  79 #define BRIDGE_OV511            0
  80 #define BRIDGE_OV511PLUS        1
  81 #define BRIDGE_OV518            2
  82 #define BRIDGE_OV518PLUS        3
  83 #define BRIDGE_OV519            4               /* = ov530 */
  84 #define BRIDGE_OVFX2            5
  85 #define BRIDGE_W9968CF          6
  86 #define BRIDGE_MASK             7
  87
  88         char invert_led;
  89 #define BRIDGE_INVERT_LED       8
  90
  91         char snapshot_pressed;
  92         char snapshot_needs_reset;
  93
  94         /* Determined by sensor type */
  95         u8 sif;
  96
  97 #define QUALITY_MIN 50
  98 #define QUALITY_MAX 70
  99 #define QUALITY_DEF 50
 100
 101         u8 stopped;             /* Streaming is temporarily paused */
 102         u8 first_frame;
 103
 104         u8 frame_rate;          /* current Framerate */
 105         u8 clockdiv;            /* clockdiv override */
 106
 107         s8 sensor;              /* Type of image sensor chip (SEN_*) */
 108
 109         u8 sensor_addr;
 110         u16 sensor_width;
 111         u16 sensor_height;
 112         s16 sensor_reg_cache[256];
 113
 114         u8 jpeg_hdr[JPEG_HDR_SZ];
 115 };
 116 enum sensors {
 117         SEN_OV2610,
 118         SEN_OV2610AE,
 119         SEN_OV3610,
 120         SEN_OV6620,
 121         SEN_OV6630,
 122         SEN_OV66308AF,
 123         SEN_OV7610,
 124         SEN_OV7620,
 125         SEN_OV7620AE,
 126         SEN_OV7640,
 127         SEN_OV7648,
 128         SEN_OV7660,
 129         SEN_OV7670,
 130         SEN_OV76BE,
 131         SEN_OV8610,
 132         SEN_OV9600,
 133 };
 134
 135 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 136    the ov sensors which is already present here. When we have the time we
 137    really should move the sensor drivers to v4l2 sub drivers. */
 138 #include "w996Xcf.c"
 139
 140 /* table of the disabled controls */
 141 struct ctrl_valid {
 142         unsigned int has_brightness:1;
 143         unsigned int has_contrast:1;
 144         unsigned int has_exposure:1;
 145         unsigned int has_autogain:1;
 146         unsigned int has_sat:1;
 147         unsigned int has_hvflip:1;
 148         unsigned int has_autobright:1;
 149         unsigned int has_freq:1;
 150 };
 151
 152 static const struct ctrl_valid valid_controls[] = {
 153         [SEN_OV2610] = {
 154                 .has_exposure = 1,
 155                 .has_autogain = 1,
 156         },
 157         [SEN_OV2610AE] = {
 158                 .has_exposure = 1,
 159                 .has_autogain = 1,
 160         },
 161         [SEN_OV3610] = {
 162                 /* No controls */
 163         },
 164         [SEN_OV6620] = {
 165                 .has_brightness = 1,
 166                 .has_contrast = 1,
 167                 .has_sat = 1,
 168                 .has_autobright = 1,
 169                 .has_freq = 1,
 170         },
 171         [SEN_OV6630] = {
 172                 .has_brightness = 1,
 173                 .has_contrast = 1,
 174                 .has_sat = 1,
 175                 .has_autobright = 1,
 176                 .has_freq = 1,
 177         },
 178         [SEN_OV66308AF] = {
 179                 .has_brightness = 1,
 180                 .has_contrast = 1,
 181                 .has_sat = 1,
 182                 .has_autobright = 1,
 183                 .has_freq = 1,
 184         },
 185         [SEN_OV7610] = {
 186                 .has_brightness = 1,
 187                 .has_contrast = 1,
 188                 .has_sat = 1,
 189                 .has_autobright = 1,
 190                 .has_freq = 1,
 191         },
 192         [SEN_OV7620] = {
 193                 .has_brightness = 1,
 194                 .has_contrast = 1,
 195                 .has_sat = 1,
 196                 .has_autobright = 1,
 197                 .has_freq = 1,
 198         },
 199         [SEN_OV7620AE] = {
 200                 .has_brightness = 1,
 201                 .has_contrast = 1,
 202                 .has_sat = 1,
 203                 .has_autobright = 1,
 204                 .has_freq = 1,
 205         },
 206         [SEN_OV7640] = {
 207                 .has_brightness = 1,
 208                 .has_sat = 1,
 209                 .has_freq = 1,
 210         },
 211         [SEN_OV7648] = {
 212                 .has_brightness = 1,
 213                 .has_sat = 1,
 214                 .has_freq = 1,
 215         },
 216         [SEN_OV7660] = {
 217                 .has_brightness = 1,
 218                 .has_contrast = 1,
 219                 .has_sat = 1,
 220                 .has_hvflip = 1,
 221                 .has_freq = 1,
 222         },
 223         [SEN_OV7670] = {
 224                 .has_brightness = 1,
 225                 .has_contrast = 1,
 226                 .has_hvflip = 1,
 227                 .has_freq = 1,
 228         },
 229         [SEN_OV76BE] = {
 230                 .has_brightness = 1,
 231                 .has_contrast = 1,
 232                 .has_sat = 1,
 233                 .has_autobright = 1,
 234                 .has_freq = 1,
 235         },
 236         [SEN_OV8610] = {
 237                 .has_brightness = 1,
 238                 .has_contrast = 1,
 239                 .has_sat = 1,
 240                 .has_autobright = 1,
 241         },
 242         [SEN_OV9600] = {
 243                 .has_exposure = 1,
 244                 .has_autogain = 1,
 245         },
 246 };
 247
 248 static const struct v4l2_pix_format ov519_vga_mode[] = {
 249         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 250                 .bytesperline = 320,
 251                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 252                 .colorspace = V4L2_COLORSPACE_JPEG,
 253                 .priv = 1},
 254         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 255                 .bytesperline = 640,
 256                 .sizeimage = 640 * 480 * 3 / 8 + 590,
 257                 .colorspace = V4L2_COLORSPACE_JPEG,
 258                 .priv = 0},
 259 };
 260 static const struct v4l2_pix_format ov519_sif_mode[] = {
 261         {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 262                 .bytesperline = 160,
 263                 .sizeimage = 160 * 120 * 3 / 8 + 590,
 264                 .colorspace = V4L2_COLORSPACE_JPEG,
 265                 .priv = 3},
 266         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 267                 .bytesperline = 176,
 268                 .sizeimage = 176 * 144 * 3 / 8 + 590,
 269                 .colorspace = V4L2_COLORSPACE_JPEG,
 270                 .priv = 1},
 271         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 272                 .bytesperline = 320,
 273                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 274                 .colorspace = V4L2_COLORSPACE_JPEG,
 275                 .priv = 2},
 276         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 277                 .bytesperline = 352,
 278                 .sizeimage = 352 * 288 * 3 / 8 + 590,
 279                 .colorspace = V4L2_COLORSPACE_JPEG,
 280                 .priv = 0},
 281 };
 282
 283 /* Note some of the sizeimage values for the ov511 / ov518 may seem
 284    larger then necessary, however they need to be this big as the ov511 /
 285    ov518 always fills the entire isoc frame, using 0 padding bytes when
 286    it doesn't have any data. So with low framerates the amount of data
 287    transferred can become quite large (libv4l will remove all the 0 padding
 288    in userspace). */
 289 static const struct v4l2_pix_format ov518_vga_mode[] = {
 290         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 291                 .bytesperline = 320,
 292                 .sizeimage = 320 * 240 * 3,
 293                 .colorspace = V4L2_COLORSPACE_JPEG,
 294                 .priv = 1},
 295         {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 296                 .bytesperline = 640,
 297                 .sizeimage = 640 * 480 * 2,
 298                 .colorspace = V4L2_COLORSPACE_JPEG,
 299                 .priv = 0},
 300 };
 301 static const struct v4l2_pix_format ov518_sif_mode[] = {
 302         {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 303                 .bytesperline = 160,
 304                 .sizeimage = 70000,
 305                 .colorspace = V4L2_COLORSPACE_JPEG,
 306                 .priv = 3},
 307         {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 308                 .bytesperline = 176,
 309                 .sizeimage = 70000,
 310                 .colorspace = V4L2_COLORSPACE_JPEG,
 311                 .priv = 1},
 312         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 313                 .bytesperline = 320,
 314                 .sizeimage = 320 * 240 * 3,
 315                 .colorspace = V4L2_COLORSPACE_JPEG,
 316                 .priv = 2},
 317         {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 318                 .bytesperline = 352,
 319                 .sizeimage = 352 * 288 * 3,
 320                 .colorspace = V4L2_COLORSPACE_JPEG,
 321                 .priv = 0},
 322 };
 323
 324 static const struct v4l2_pix_format ov511_vga_mode[] = {
 325         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 326                 .bytesperline = 320,
 327                 .sizeimage = 320 * 240 * 3,
 328                 .colorspace = V4L2_COLORSPACE_JPEG,
 329                 .priv = 1},
 330         {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 331                 .bytesperline = 640,
 332                 .sizeimage = 640 * 480 * 2,
 333                 .colorspace = V4L2_COLORSPACE_JPEG,
 334                 .priv = 0},
 335 };
 336 static const struct v4l2_pix_format ov511_sif_mode[] = {
 337         {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 338                 .bytesperline = 160,
 339                 .sizeimage = 70000,
 340                 .colorspace = V4L2_COLORSPACE_JPEG,
 341                 .priv = 3},
 342         {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 343                 .bytesperline = 176,
 344                 .sizeimage = 70000,
 345                 .colorspace = V4L2_COLORSPACE_JPEG,
 346                 .priv = 1},
 347         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 348                 .bytesperline = 320,
 349                 .sizeimage = 320 * 240 * 3,
 350                 .colorspace = V4L2_COLORSPACE_JPEG,
 351                 .priv = 2},
 352         {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 353                 .bytesperline = 352,
 354                 .sizeimage = 352 * 288 * 3,
 355                 .colorspace = V4L2_COLORSPACE_JPEG,
 356                 .priv = 0},
 357 };
 358
 359 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 360         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 361                 .bytesperline = 800,
 362                 .sizeimage = 800 * 600,
 363                 .colorspace = V4L2_COLORSPACE_SRGB,
 364                 .priv = 1},
 365         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 366                 .bytesperline = 1600,
 367                 .sizeimage = 1600 * 1200,
 368                 .colorspace = V4L2_COLORSPACE_SRGB},
 369 };
 370 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 371         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 372                 .bytesperline = 640,
 373                 .sizeimage = 640 * 480,
 374                 .colorspace = V4L2_COLORSPACE_SRGB,
 375                 .priv = 1},
 376         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 377                 .bytesperline = 800,
 378                 .sizeimage = 800 * 600,
 379                 .colorspace = V4L2_COLORSPACE_SRGB,
 380                 .priv = 1},
 381         {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 382                 .bytesperline = 1024,
 383                 .sizeimage = 1024 * 768,
 384                 .colorspace = V4L2_COLORSPACE_SRGB,
 385                 .priv = 1},
 386         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 387                 .bytesperline = 1600,
 388                 .sizeimage = 1600 * 1200,
 389                 .colorspace = V4L2_COLORSPACE_SRGB,
 390                 .priv = 0},
 391         {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 392                 .bytesperline = 2048,
 393                 .sizeimage = 2048 * 1536,
 394                 .colorspace = V4L2_COLORSPACE_SRGB,
 395                 .priv = 0},
 396 };
 397 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
 398         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 399                 .bytesperline = 640,
 400                 .sizeimage = 640 * 480,
 401                 .colorspace = V4L2_COLORSPACE_SRGB,
 402                 .priv = 1},
 403         {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 404                 .bytesperline = 1280,
 405                 .sizeimage = 1280 * 1024,
 406                 .colorspace = V4L2_COLORSPACE_SRGB},
 407 };
 408
 409 /* Registers common to OV511 / OV518 */
 410 #define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 411 #define R51x_SYS_RESET                  0x50
 412         /* Reset type flags */
 413         #define OV511_RESET_OMNICE      0x08
 414 #define R51x_SYS_INIT                   0x53
 415 #define R51x_SYS_SNAP                   0x52
 416 #define R51x_SYS_CUST_ID                0x5f
 417 #define R51x_COMP_LUT_BEGIN             0x80
 418
 419 /* OV511 Camera interface register numbers */
 420 #define R511_CAM_DELAY                  0x10
 421 #define R511_CAM_EDGE                   0x11
 422 #define R511_CAM_PXCNT                  0x12
 423 #define R511_CAM_LNCNT                  0x13
 424 #define R511_CAM_PXDIV                  0x14
 425 #define R511_CAM_LNDIV                  0x15
 426 #define R511_CAM_UV_EN                  0x16
 427 #define R511_CAM_LINE_MODE              0x17
 428 #define R511_CAM_OPTS                   0x18
 429
 430 #define R511_SNAP_FRAME                 0x19
 431 #define R511_SNAP_PXCNT                 0x1a
 432 #define R511_SNAP_LNCNT                 0x1b
 433 #define R511_SNAP_PXDIV                 0x1c
 434 #define R511_SNAP_LNDIV                 0x1d
 435 #define R511_SNAP_UV_EN                 0x1e
 436 #define R511_SNAP_OPTS                  0x1f
 437
 438 #define R511_DRAM_FLOW_CTL              0x20
 439 #define R511_FIFO_OPTS                  0x31
 440 #define R511_I2C_CTL                    0x40
 441 #define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 442 #define R511_COMP_EN                    0x78
 443 #define R511_COMP_LUT_EN                0x79
 444
 445 /* OV518 Camera interface register numbers */
 446 #define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 447 #define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 448
 449 /* OV519 Camera interface register numbers */
 450 #define OV519_R10_H_SIZE                0x10
 451 #define OV519_R11_V_SIZE                0x11
 452 #define OV519_R12_X_OFFSETL             0x12
 453 #define OV519_R13_X_OFFSETH             0x13
 454 #define OV519_R14_Y_OFFSETL             0x14
 455 #define OV519_R15_Y_OFFSETH             0x15
 456 #define OV519_R16_DIVIDER               0x16
 457 #define OV519_R20_DFR                   0x20
 458 #define OV519_R25_FORMAT                0x25
 459
 460 /* OV519 System Controller register numbers */
 461 #define OV519_R51_RESET1                0x51
 462 #define OV519_R54_EN_CLK1               0x54
 463 #define OV519_R57_SNAPSHOT              0x57
 464
 465 #define OV519_GPIO_DATA_OUT0            0x71
 466 #define OV519_GPIO_IO_CTRL0             0x72
 467
 468 /*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 469
 470 /*
 471  * The FX2 chip does not give us a zero length read at end of frame.
 472  * It does, however, give a short read at the end of a frame, if
 473  * necessary, rather than run two frames together.
 474  *
 475  * By choosing the right bulk transfer size, we are guaranteed to always
 476  * get a short read for the last read of each frame.  Frame sizes are
 477  * always a composite number (width * height, or a multiple) so if we
 478  * choose a prime number, we are guaranteed that the last read of a
 479  * frame will be short.
 480  *
 481  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 482  * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 483  * to figure out why.  [PMiller]
 484  *
 485  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 486  *
 487  * It isn't enough to know the number of bytes per frame, in case we
 488  * have data dropouts or buffer overruns (even though the FX2 double
 489  * buffers, there are some pretty strict real time constraints for
 490  * isochronous transfer for larger frame sizes).
 491  */
 492 /*jfm: this value does not work for 800x600 - see isoc_init */
 493 #define OVFX2_BULK_SIZE (13 * 4096)
 494
 495 /* I2C registers */
 496 #define R51x_I2C_W_SID          0x41
 497 #define R51x_I2C_SADDR_3        0x42
 498 #define R51x_I2C_SADDR_2        0x43
 499 #define R51x_I2C_R_SID          0x44
 500 #define R51x_I2C_DATA           0x45
 501 #define R518_I2C_CTL            0x47    /* OV518(+) only */
 502 #define OVFX2_I2C_ADDR          0x00
 503
 504 /* I2C ADDRESSES */
 505 #define OV7xx0_SID   0x42
 506 #define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 507 #define OV8xx0_SID   0xa0
 508 #define OV6xx0_SID   0xc0
 509
 510 /* OV7610 registers */
 511 #define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 512 #define OV7610_REG_BLUE         0x01    /* blue channel balance */
 513 #define OV7610_REG_RED          0x02    /* red channel balance */
 514 #define OV7610_REG_SAT          0x03    /* saturation */
 515 #define OV8610_REG_HUE          0x04    /* 04 reserved */
 516 #define OV7610_REG_CNT          0x05    /* Y contrast */
 517 #define OV7610_REG_BRT          0x06    /* Y brightness */
 518 #define OV7610_REG_COM_C        0x14    /* misc common regs */
 519 #define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 520 #define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 521 #define OV7610_REG_COM_I        0x29    /* misc settings */
 522
 523 /* OV7660 and OV7670 registers */
 524 #define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 525 #define OV7670_R01_BLUE         0x01    /* blue gain */
 526 #define OV7670_R02_RED          0x02    /* red gain */
 527 #define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 528 #define OV7670_R04_COM1         0x04    /* Control 1 */
 529 /*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 530 #define OV7670_R0C_COM3         0x0c    /* Control 3 */
 531 #define OV7670_R0D_COM4         0x0d    /* Control 4 */
 532 #define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 533 #define OV7670_R0F_COM6         0x0f    /* Control 6 */
 534 #define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 535 #define OV7670_R11_CLKRC        0x11    /* Clock control */
 536 #define OV7670_R12_COM7         0x12    /* Control 7 */
 537 #define   OV7670_COM7_FMT_VGA    0x00
 538 /*#define   OV7670_COM7_YUV      0x00    * YUV */
 539 #define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 540 #define   OV7670_COM7_FMT_MASK   0x38
 541 #define   OV7670_COM7_RESET      0x80   /* Register reset */
 542 #define OV7670_R13_COM8         0x13    /* Control 8 */
 543 #define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 544 #define   OV7670_COM8_AWB        0x02   /* White balance enable */
 545 #define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 546 #define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 547 #define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 548 #define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 549 #define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 550 #define OV7670_R15_COM10        0x15    /* Control 10 */
 551 #define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 552 #define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 553 #define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 554 #define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 555 #define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 556 #define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 557 #define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 558 #define OV7670_R24_AEW          0x24    /* AGC upper limit */
 559 #define OV7670_R25_AEB          0x25    /* AGC lower limit */
 560 #define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 561 #define OV7670_R32_HREF         0x32    /* HREF pieces */
 562 #define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 563 #define OV7670_R3B_COM11        0x3b    /* Control 11 */
 564 #define   OV7670_COM11_EXP       0x02
 565 #define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 566 #define OV7670_R3C_COM12        0x3c    /* Control 12 */
 567 #define OV7670_R3D_COM13        0x3d    /* Control 13 */
 568 #define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 569 #define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 570 #define OV7670_R3E_COM14        0x3e    /* Control 14 */
 571 #define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 572 #define OV7670_R40_COM15        0x40    /* Control 15 */
 573 /*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 574 #define OV7670_R41_COM16        0x41    /* Control 16 */
 575 #define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 576 /* end of ov7660 common registers */
 577 #define OV7670_R55_BRIGHT       0x55    /* Brightness */
 578 #define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 579 #define OV7670_R69_GFIX         0x69    /* Fix gain control */
 580 /*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 581 #define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 582 #define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 583 #define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 584 #define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 585 #define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 586 #define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 587 #define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 588 #define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 589 #define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 590
 591 struct ov_regvals {
 592         u8 reg;
 593         u8 val;
 594 };
 595 struct ov_i2c_regvals {
 596         u8 reg;
 597         u8 val;
 598 };
 599
 600 /* Settings for OV2610 camera chip */
 601 static const struct ov_i2c_regvals norm_2610[] = {
 602         { 0x12, 0x80 }, /* reset */
 603 };
 604
 605 static const struct ov_i2c_regvals norm_2610ae[] = {
 606         {0x12, 0x80},   /* reset */
 607         {0x13, 0xcd},
 608         {0x09, 0x01},
 609         {0x0d, 0x00},
 610         {0x11, 0x80},
 611         {0x12, 0x20},   /* 1600x1200 */
 612         {0x33, 0x0c},
 613         {0x35, 0x90},
 614         {0x36, 0x37},
 615 /* ms-win traces */
 616         {0x11, 0x83},   /* clock / 3 ? */
 617         {0x2d, 0x00},   /* 60 Hz filter */
 618         {0x24, 0xb0},   /* normal colors */
 619         {0x25, 0x90},
 620         {0x10, 0x43},
 621 };
 622
 623 static const struct ov_i2c_regvals norm_3620b[] = {
 624         /*
 625          * From the datasheet: "Note that after writing to register COMH
 626          * (0x12) to change the sensor mode, registers related to the
 627          * sensor’s cropping window will be reset back to their default
 628          * values."
 629          *
 630          * "wait 4096 external clock ... to make sure the sensor is
 631          * stable and ready to access registers" i.e. 160us at 24MHz
 632          */
 633         { 0x12, 0x80 }, /* COMH reset */
 634         { 0x12, 0x00 }, /* QXGA, master */
 635
 636         /*
 637          * 11 CLKRC "Clock Rate Control"
 638          * [7] internal frequency doublers: on
 639          * [6] video port mode: master
 640          * [5:0] clock divider: 1
 641          */
 642         { 0x11, 0x80 },
 643
 644         /*
 645          * 13 COMI "Common Control I"
 646          *                  = 192 (0xC0) 11000000
 647          *    COMI[7] "AEC speed selection"
 648          *                  =   1 (0x01) 1....... "Faster AEC correction"
 649          *    COMI[6] "AEC speed step selection"
 650          *                  =   1 (0x01) .1...... "Big steps, fast"
 651          *    COMI[5] "Banding filter on off"
 652          *                  =   0 (0x00) ..0..... "Off"
 653          *    COMI[4] "Banding filter option"
 654          *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 655          *                                         the PLL is ON"
 656          *    COMI[3] "Reserved"
 657          *                  =   0 (0x00) ....0...
 658          *    COMI[2] "AGC auto manual control selection"
 659          *                  =   0 (0x00) .....0.. "Manual"
 660          *    COMI[1] "AWB auto manual control selection"
 661          *                  =   0 (0x00) ......0. "Manual"
 662          *    COMI[0] "Exposure control"
 663          *                  =   0 (0x00) .......0 "Manual"
 664          */
 665         { 0x13, 0xc0 },
 666
 667         /*
 668          * 09 COMC "Common Control C"
 669          *                  =   8 (0x08) 00001000
 670          *    COMC[7:5] "Reserved"
 671          *                  =   0 (0x00) 000.....
 672          *    COMC[4] "Sleep Mode Enable"
 673          *                  =   0 (0x00) ...0.... "Normal mode"
 674          *    COMC[3:2] "Sensor sampling reset timing selection"
 675          *                  =   2 (0x02) ....10.. "Longer reset time"
 676          *    COMC[1:0] "Output drive current select"
 677          *                  =   0 (0x00) ......00 "Weakest"
 678          */
 679         { 0x09, 0x08 },
 680
 681         /*
 682          * 0C COMD "Common Control D"
 683          *                  =   8 (0x08) 00001000
 684          *    COMD[7] "Reserved"
 685          *                  =   0 (0x00) 0.......
 686          *    COMD[6] "Swap MSB and LSB at the output port"
 687          *                  =   0 (0x00) .0...... "False"
 688          *    COMD[5:3] "Reserved"
 689          *                  =   1 (0x01) ..001...
 690          *    COMD[2] "Output Average On Off"
 691          *                  =   0 (0x00) .....0.. "Output Normal"
 692          *    COMD[1] "Sensor precharge voltage selection"
 693          *                  =   0 (0x00) ......0. "Selects internal
 694          *                                         reference precharge
 695          *                                         voltage"
 696          *    COMD[0] "Snapshot option"
 697          *                  =   0 (0x00) .......0 "Enable live video output
 698          *                                         after snapshot sequence"
 699          */
 700         { 0x0c, 0x08 },
 701
 702         /*
 703          * 0D COME "Common Control E"
 704          *                  = 161 (0xA1) 10100001
 705          *    COME[7] "Output average option"
 706          *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 707          *    COME[6] "Anti-blooming control"
 708          *                  =   0 (0x00) .0...... "Off"
 709          *    COME[5:3] "Reserved"
 710          *                  =   4 (0x04) ..100...
 711          *    COME[2] "Clock output power down pin status"
 712          *                  =   0 (0x00) .....0.. "Tri-state data output pin
 713          *                                         on power down"
 714          *    COME[1] "Data output pin status selection at power down"
 715          *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 716          *                                         HREF, and CHSYNC pins on
 717          *                                         power down"
 718          *    COME[0] "Auto zero circuit select"
 719          *                  =   1 (0x01) .......1 "On"
 720          */
 721         { 0x0d, 0xa1 },
 722
 723         /*
 724          * 0E COMF "Common Control F"
 725          *                  = 112 (0x70) 01110000
 726          *    COMF[7] "System clock selection"
 727          *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 728          *    COMF[6:4] "Reserved"
 729          *                  =   7 (0x07) .111....
 730          *    COMF[3] "Manual auto negative offset canceling selection"
 731          *                  =   0 (0x00) ....0... "Auto detect negative
 732          *                                         offset and cancel it"
 733          *    COMF[2:0] "Reserved"
 734          *                  =   0 (0x00) .....000
 735          */
 736         { 0x0e, 0x70 },
 737
 738         /*
 739          * 0F COMG "Common Control G"
 740          *                  =  66 (0x42) 01000010
 741          *    COMG[7] "Optical black output selection"
 742          *                  =   0 (0x00) 0....... "Disable"
 743          *    COMG[6] "Black level calibrate selection"
 744          *                  =   1 (0x01) .1...... "Use optical black pixels
 745          *                                         to calibrate"
 746          *    COMG[5:4] "Reserved"
 747          *                  =   0 (0x00) ..00....
 748          *    COMG[3] "Channel offset adjustment"
 749          *                  =   0 (0x00) ....0... "Disable offset adjustment"
 750          *    COMG[2] "ADC black level calibration option"
 751          *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 752          *                                         line to calibrate each
 753          *                                         channel's black level"
 754          *    COMG[1] "Reserved"
 755          *                  =   1 (0x01) ......1.
 756          *    COMG[0] "ADC black level calibration enable"
 757          *                  =   0 (0x00) .......0 "Disable"
 758          */
 759         { 0x0f, 0x42 },
 760
 761         /*
 762          * 14 COMJ "Common Control J"
 763          *                  = 198 (0xC6) 11000110
 764          *    COMJ[7:6] "AGC gain ceiling"
 765          *                  =   3 (0x03) 11...... "8x"
 766          *    COMJ[5:4] "Reserved"
 767          *                  =   0 (0x00) ..00....
 768          *    COMJ[3] "Auto banding filter"
 769          *                  =   0 (0x00) ....0... "Banding filter is always
 770          *                                         on off depending on
 771          *                                         COMI[5] setting"
 772          *    COMJ[2] "VSYNC drop option"
 773          *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 774          *                                         data is dropped"
 775          *    COMJ[1] "Frame data drop"
 776          *                  =   1 (0x01) ......1. "Drop frame data if
 777          *                                         exposure is not within
 778          *                                         tolerance.  In AEC mode,
 779          *                                         data is normally dropped
 780          *                                         when data is out of
 781          *                                         range."
 782          *    COMJ[0] "Reserved"
 783          *                  =   0 (0x00) .......0
 784          */
 785         { 0x14, 0xc6 },
 786
 787         /*
 788          * 15 COMK "Common Control K"
 789          *                  =   2 (0x02) 00000010
 790          *    COMK[7] "CHSYNC pin output swap"
 791          *                  =   0 (0x00) 0....... "CHSYNC"
 792          *    COMK[6] "HREF pin output swap"
 793          *                  =   0 (0x00) .0...... "HREF"
 794          *    COMK[5] "PCLK output selection"
 795          *                  =   0 (0x00) ..0..... "PCLK always output"
 796          *    COMK[4] "PCLK edge selection"
 797          *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 798          *    COMK[3] "HREF output polarity"
 799          *                  =   0 (0x00) ....0... "positive"
 800          *    COMK[2] "Reserved"
 801          *                  =   0 (0x00) .....0..
 802          *    COMK[1] "VSYNC polarity"
 803          *                  =   1 (0x01) ......1. "negative"
 804          *    COMK[0] "HSYNC polarity"
 805          *                  =   0 (0x00) .......0 "positive"
 806          */
 807         { 0x15, 0x02 },
 808
 809         /*
 810          * 33 CHLF "Current Control"
 811          *                  =   9 (0x09) 00001001
 812          *    CHLF[7:6] "Sensor current control"
 813          *                  =   0 (0x00) 00......
 814          *    CHLF[5] "Sensor current range control"
 815          *                  =   0 (0x00) ..0..... "normal range"
 816          *    CHLF[4] "Sensor current"
 817          *                  =   0 (0x00) ...0.... "normal current"
 818          *    CHLF[3] "Sensor buffer current control"
 819          *                  =   1 (0x01) ....1... "half current"
 820          *    CHLF[2] "Column buffer current control"
 821          *                  =   0 (0x00) .....0.. "normal current"
 822          *    CHLF[1] "Analog DSP current control"
 823          *                  =   0 (0x00) ......0. "normal current"
 824          *    CHLF[1] "ADC current control"
 825          *                  =   0 (0x00) ......0. "normal current"
 826          */
 827         { 0x33, 0x09 },
 828
 829         /*
 830          * 34 VBLM "Blooming Control"
 831          *                  =  80 (0x50) 01010000
 832          *    VBLM[7] "Hard soft reset switch"
 833          *                  =   0 (0x00) 0....... "Hard reset"
 834          *    VBLM[6:4] "Blooming voltage selection"
 835          *                  =   5 (0x05) .101....
 836          *    VBLM[3:0] "Sensor current control"
 837          *                  =   0 (0x00) ....0000
 838          */
 839         { 0x34, 0x50 },
 840
 841         /*
 842          * 36 VCHG "Sensor Precharge Voltage Control"
 843          *                  =   0 (0x00) 00000000
 844          *    VCHG[7] "Reserved"
 845          *                  =   0 (0x00) 0.......
 846          *    VCHG[6:4] "Sensor precharge voltage control"
 847          *                  =   0 (0x00) .000....
 848          *    VCHG[3:0] "Sensor array common reference"
 849          *                  =   0 (0x00) ....0000
 850          */
 851         { 0x36, 0x00 },
 852
 853         /*
 854          * 37 ADC "ADC Reference Control"
 855          *                  =   4 (0x04) 00000100
 856          *    ADC[7:4] "Reserved"
 857          *                  =   0 (0x00) 0000....
 858          *    ADC[3] "ADC input signal range"
 859          *                  =   0 (0x00) ....0... "Input signal 1.0x"
 860          *    ADC[2:0] "ADC range control"
 861          *                  =   4 (0x04) .....100
 862          */
 863         { 0x37, 0x04 },
 864
 865         /*
 866          * 38 ACOM "Analog Common Ground"
 867          *                  =  82 (0x52) 01010010
 868          *    ACOM[7] "Analog gain control"
 869          *                  =   0 (0x00) 0....... "Gain 1x"
 870          *    ACOM[6] "Analog black level calibration"
 871          *                  =   1 (0x01) .1...... "On"
 872          *    ACOM[5:0] "Reserved"
 873          *                  =  18 (0x12) ..010010
 874          */
 875         { 0x38, 0x52 },
 876
 877         /*
 878          * 3A FREFA "Internal Reference Adjustment"
 879          *                  =   0 (0x00) 00000000
 880          *    FREFA[7:0] "Range"
 881          *                  =   0 (0x00) 00000000
 882          */
 883         { 0x3a, 0x00 },
 884
 885         /*
 886          * 3C FVOPT "Internal Reference Adjustment"
 887          *                  =  31 (0x1F) 00011111
 888          *    FVOPT[7:0] "Range"
 889          *                  =  31 (0x1F) 00011111
 890          */
 891         { 0x3c, 0x1f },
 892
 893         /*
 894          * 44 Undocumented  =   0 (0x00) 00000000
 895          *    44[7:0] "It's a secret"
 896          *                  =   0 (0x00) 00000000
 897          */
 898         { 0x44, 0x00 },
 899
 900         /*
 901          * 40 Undocumented  =   0 (0x00) 00000000
 902          *    40[7:0] "It's a secret"
 903          *                  =   0 (0x00) 00000000
 904          */
 905         { 0x40, 0x00 },
 906
 907         /*
 908          * 41 Undocumented  =   0 (0x00) 00000000
 909          *    41[7:0] "It's a secret"
 910          *                  =   0 (0x00) 00000000
 911          */
 912         { 0x41, 0x00 },
 913
 914         /*
 915          * 42 Undocumented  =   0 (0x00) 00000000
 916          *    42[7:0] "It's a secret"
 917          *                  =   0 (0x00) 00000000
 918          */
 919         { 0x42, 0x00 },
 920
 921         /*
 922          * 43 Undocumented  =   0 (0x00) 00000000
 923          *    43[7:0] "It's a secret"
 924          *                  =   0 (0x00) 00000000
 925          */
 926         { 0x43, 0x00 },
 927
 928         /*
 929          * 45 Undocumented  = 128 (0x80) 10000000
 930          *    45[7:0] "It's a secret"
 931          *                  = 128 (0x80) 10000000
 932          */
 933         { 0x45, 0x80 },
 934
 935         /*
 936          * 48 Undocumented  = 192 (0xC0) 11000000
 937          *    48[7:0] "It's a secret"
 938          *                  = 192 (0xC0) 11000000
 939          */
 940         { 0x48, 0xc0 },
 941
 942         /*
 943          * 49 Undocumented  =  25 (0x19) 00011001
 944          *    49[7:0] "It's a secret"
 945          *                  =  25 (0x19) 00011001
 946          */
 947         { 0x49, 0x19 },
 948
 949         /*
 950          * 4B Undocumented  = 128 (0x80) 10000000
 951          *    4B[7:0] "It's a secret"
 952          *                  = 128 (0x80) 10000000
 953          */
 954         { 0x4b, 0x80 },
 955
 956         /*
 957          * 4D Undocumented  = 196 (0xC4) 11000100
 958          *    4D[7:0] "It's a secret"
 959          *                  = 196 (0xC4) 11000100
 960          */
 961         { 0x4d, 0xc4 },
 962
 963         /*
 964          * 35 VREF "Reference Voltage Control"
 965          *                  =  76 (0x4c) 01001100
 966          *    VREF[7:5] "Column high reference control"
 967          *                  =   2 (0x02) 010..... "higher voltage"
 968          *    VREF[4:2] "Column low reference control"
 969          *                  =   3 (0x03) ...011.. "Highest voltage"
 970          *    VREF[1:0] "Reserved"
 971          *                  =   0 (0x00) ......00
 972          */
 973         { 0x35, 0x4c },
 974
 975         /*
 976          * 3D Undocumented  =   0 (0x00) 00000000
 977          *    3D[7:0] "It's a secret"
 978          *                  =   0 (0x00) 00000000
 979          */
 980         { 0x3d, 0x00 },
 981
 982         /*
 983          * 3E Undocumented  =   0 (0x00) 00000000
 984          *    3E[7:0] "It's a secret"
 985          *                  =   0 (0x00) 00000000
 986          */
 987         { 0x3e, 0x00 },
 988
 989         /*
 990          * 3B FREFB "Internal Reference Adjustment"
 991          *                  =  24 (0x18) 00011000
 992          *    FREFB[7:0] "Range"
 993          *                  =  24 (0x18) 00011000
 994          */
 995         { 0x3b, 0x18 },
 996
 997         /*
 998          * 33 CHLF "Current Control"
 999          *                  =  25 (0x19) 00011001
1000          *    CHLF[7:6] "Sensor current control"
1001          *                  =   0 (0x00) 00......
1002          *    CHLF[5] "Sensor current range control"
1003          *                  =   0 (0x00) ..0..... "normal range"
1004          *    CHLF[4] "Sensor current"
1005          *                  =   1 (0x01) ...1.... "double current"
1006          *    CHLF[3] "Sensor buffer current control"
1007          *                  =   1 (0x01) ....1... "half current"
1008          *    CHLF[2] "Column buffer current control"
1009          *                  =   0 (0x00) .....0.. "normal current"
1010          *    CHLF[1] "Analog DSP current control"
1011          *                  =   0 (0x00) ......0. "normal current"
1012          *    CHLF[1] "ADC current control"
1013          *                  =   0 (0x00) ......0. "normal current"
1014          */
1015         { 0x33, 0x19 },
1016
1017         /*
1018          * 34 VBLM "Blooming Control"
1019          *                  =  90 (0x5A) 01011010
1020          *    VBLM[7] "Hard soft reset switch"
1021          *                  =   0 (0x00) 0....... "Hard reset"
1022          *    VBLM[6:4] "Blooming voltage selection"
1023          *                  =   5 (0x05) .101....
1024          *    VBLM[3:0] "Sensor current control"
1025          *                  =  10 (0x0A) ....1010
1026          */
1027         { 0x34, 0x5a },
1028
1029         /*
1030          * 3B FREFB "Internal Reference Adjustment"
1031          *                  =   0 (0x00) 00000000
1032          *    FREFB[7:0] "Range"
1033          *                  =   0 (0x00) 00000000
1034          */
1035         { 0x3b, 0x00 },
1036
1037         /*
1038          * 33 CHLF "Current Control"
1039          *                  =   9 (0x09) 00001001
1040          *    CHLF[7:6] "Sensor current control"
1041          *                  =   0 (0x00) 00......
1042          *    CHLF[5] "Sensor current range control"
1043          *                  =   0 (0x00) ..0..... "normal range"
1044          *    CHLF[4] "Sensor current"
1045          *                  =   0 (0x00) ...0.... "normal current"
1046          *    CHLF[3] "Sensor buffer current control"
1047          *                  =   1 (0x01) ....1... "half current"
1048          *    CHLF[2] "Column buffer current control"
1049          *                  =   0 (0x00) .....0.. "normal current"
1050          *    CHLF[1] "Analog DSP current control"
1051          *                  =   0 (0x00) ......0. "normal current"
1052          *    CHLF[1] "ADC current control"
1053          *                  =   0 (0x00) ......0. "normal current"
1054          */
1055         { 0x33, 0x09 },
1056
1057         /*
1058          * 34 VBLM "Blooming Control"
1059          *                  =  80 (0x50) 01010000
1060          *    VBLM[7] "Hard soft reset switch"
1061          *                  =   0 (0x00) 0....... "Hard reset"
1062          *    VBLM[6:4] "Blooming voltage selection"
1063          *                  =   5 (0x05) .101....
1064          *    VBLM[3:0] "Sensor current control"
1065          *                  =   0 (0x00) ....0000
1066          */
1067         { 0x34, 0x50 },
1068
1069         /*
1070          * 12 COMH "Common Control H"
1071          *                  =  64 (0x40) 01000000
1072          *    COMH[7] "SRST"
1073          *                  =   0 (0x00) 0....... "No-op"
1074          *    COMH[6:4] "Resolution selection"
1075          *                  =   4 (0x04) .100.... "XGA"
1076          *    COMH[3] "Master slave selection"
1077          *                  =   0 (0x00) ....0... "Master mode"
1078          *    COMH[2] "Internal B/R channel option"
1079          *                  =   0 (0x00) .....0.. "B/R use same channel"
1080          *    COMH[1] "Color bar test pattern"
1081          *                  =   0 (0x00) ......0. "Off"
1082          *    COMH[0] "Reserved"
1083          *                  =   0 (0x00) .......0
1084          */
1085         { 0x12, 0x40 },
1086
1087         /*
1088          * 17 HREFST "Horizontal window start"
1089          *                  =  31 (0x1F) 00011111
1090          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1091          *                  =  31 (0x1F) 00011111
1092          */
1093         { 0x17, 0x1f },
1094
1095         /*
1096          * 18 HREFEND "Horizontal window end"
1097          *                  =  95 (0x5F) 01011111
1098          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1099          *                  =  95 (0x5F) 01011111
1100          */
1101         { 0x18, 0x5f },
1102
1103         /*
1104          * 19 VSTRT "Vertical window start"
1105          *                  =   0 (0x00) 00000000
1106          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1107          *                  =   0 (0x00) 00000000
1108          */
1109         { 0x19, 0x00 },
1110
1111         /*
1112          * 1A VEND "Vertical window end"
1113          *                  =  96 (0x60) 01100000
1114          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1115          *                  =  96 (0x60) 01100000
1116          */
1117         { 0x1a, 0x60 },
1118
1119         /*
1120          * 32 COMM "Common Control M"
1121          *                  =  18 (0x12) 00010010
1122          *    COMM[7:6] "Pixel clock divide option"
1123          *                  =   0 (0x00) 00...... "/1"
1124          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1125          *                  =   2 (0x02) ..010...
1126          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1127          *                  =   2 (0x02) .....010
1128          */
1129         { 0x32, 0x12 },
1130
1131         /*
1132          * 03 COMA "Common Control A"
1133          *                  =  74 (0x4A) 01001010
1134          *    COMA[7:4] "AWB Update Threshold"
1135          *                  =   4 (0x04) 0100....
1136          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1137          *                  =   2 (0x02) ....10..
1138          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1139          *                  =   2 (0x02) ......10
1140          */
1141         { 0x03, 0x4a },
1142
1143         /*
1144          * 11 CLKRC "Clock Rate Control"
1145          *                  = 128 (0x80) 10000000
1146          *    CLKRC[7] "Internal frequency doublers on off seclection"
1147          *                  =   1 (0x01) 1....... "On"
1148          *    CLKRC[6] "Digital video master slave selection"
1149          *                  =   0 (0x00) .0...... "Master mode, sensor
1150          *                                         provides PCLK"
1151          *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1152          *                  =   0 (0x00) ..000000
1153          */
1154         { 0x11, 0x80 },
1155
1156         /*
1157          * 12 COMH "Common Control H"
1158          *                  =   0 (0x00) 00000000
1159          *    COMH[7] "SRST"
1160          *                  =   0 (0x00) 0....... "No-op"
1161          *    COMH[6:4] "Resolution selection"
1162          *                  =   0 (0x00) .000.... "QXGA"
1163          *    COMH[3] "Master slave selection"
1164          *                  =   0 (0x00) ....0... "Master mode"
1165          *    COMH[2] "Internal B/R channel option"
1166          *                  =   0 (0x00) .....0.. "B/R use same channel"
1167          *    COMH[1] "Color bar test pattern"
1168          *                  =   0 (0x00) ......0. "Off"
1169          *    COMH[0] "Reserved"
1170          *                  =   0 (0x00) .......0
1171          */
1172         { 0x12, 0x00 },
1173
1174         /*
1175          * 12 COMH "Common Control H"
1176          *                  =  64 (0x40) 01000000
1177          *    COMH[7] "SRST"
1178          *                  =   0 (0x00) 0....... "No-op"
1179          *    COMH[6:4] "Resolution selection"
1180          *                  =   4 (0x04) .100.... "XGA"
1181          *    COMH[3] "Master slave selection"
1182          *                  =   0 (0x00) ....0... "Master mode"
1183          *    COMH[2] "Internal B/R channel option"
1184          *                  =   0 (0x00) .....0.. "B/R use same channel"
1185          *    COMH[1] "Color bar test pattern"
1186          *                  =   0 (0x00) ......0. "Off"
1187          *    COMH[0] "Reserved"
1188          *                  =   0 (0x00) .......0
1189          */
1190         { 0x12, 0x40 },
1191
1192         /*
1193          * 17 HREFST "Horizontal window start"
1194          *                  =  31 (0x1F) 00011111
1195          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1196          *                  =  31 (0x1F) 00011111
1197          */
1198         { 0x17, 0x1f },
1199
1200         /*
1201          * 18 HREFEND "Horizontal window end"
1202          *                  =  95 (0x5F) 01011111
1203          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1204          *                  =  95 (0x5F) 01011111
1205          */
1206         { 0x18, 0x5f },
1207
1208         /*
1209          * 19 VSTRT "Vertical window start"
1210          *                  =   0 (0x00) 00000000
1211          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1212          *                  =   0 (0x00) 00000000
1213          */
1214         { 0x19, 0x00 },
1215
1216         /*
1217          * 1A VEND "Vertical window end"
1218          *                  =  96 (0x60) 01100000
1219          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1220          *                  =  96 (0x60) 01100000
1221          */
1222         { 0x1a, 0x60 },
1223
1224         /*
1225          * 32 COMM "Common Control M"
1226          *                  =  18 (0x12) 00010010
1227          *    COMM[7:6] "Pixel clock divide option"
1228          *                  =   0 (0x00) 00...... "/1"
1229          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1230          *                  =   2 (0x02) ..010...
1231          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1232          *                  =   2 (0x02) .....010
1233          */
1234         { 0x32, 0x12 },
1235
1236         /*
1237          * 03 COMA "Common Control A"
1238          *                  =  74 (0x4A) 01001010
1239          *    COMA[7:4] "AWB Update Threshold"
1240          *                  =   4 (0x04) 0100....
1241          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1242          *                  =   2 (0x02) ....10..
1243          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1244          *                  =   2 (0x02) ......10
1245          */
1246         { 0x03, 0x4a },
1247
1248         /*
1249          * 02 RED "Red Gain Control"
1250          *                  = 175 (0xAF) 10101111
1251          *    RED[7] "Action"
1252          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1253          *    RED[6:0] "Value"
1254          *                  =  47 (0x2F) .0101111
1255          */
1256         { 0x02, 0xaf },
1257
1258         /*
1259          * 2D ADDVSL "VSYNC Pulse Width"
1260          *                  = 210 (0xD2) 11010010
1261          *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1262          *                  = 210 (0xD2) 11010010
1263          */
1264         { 0x2d, 0xd2 },
1265
1266         /*
1267          * 00 GAIN          =  24 (0x18) 00011000
1268          *    GAIN[7:6] "Reserved"
1269          *                  =   0 (0x00) 00......
1270          *    GAIN[5] "Double"
1271          *                  =   0 (0x00) ..0..... "False"
1272          *    GAIN[4] "Double"
1273          *                  =   1 (0x01) ...1.... "True"
1274          *    GAIN[3:0] "Range"
1275          *                  =   8 (0x08) ....1000
1276          */
1277         { 0x00, 0x18 },
1278
1279         /*
1280          * 01 BLUE "Blue Gain Control"
1281          *                  = 240 (0xF0) 11110000
1282          *    BLUE[7] "Action"
1283          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1284          *    BLUE[6:0] "Value"
1285          *                  = 112 (0x70) .1110000
1286          */
1287         { 0x01, 0xf0 },
1288
1289         /*
1290          * 10 AEC "Automatic Exposure Control"
1291          *                  =  10 (0x0A) 00001010
1292          *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1293          *                  =  10 (0x0A) 00001010
1294          */
1295         { 0x10, 0x0a },
1296
1297         { 0xe1, 0x67 },
1298         { 0xe3, 0x03 },
1299         { 0xe4, 0x26 },
1300         { 0xe5, 0x3e },
1301         { 0xf8, 0x01 },
1302         { 0xff, 0x01 },
1303 };
1304
1305 static const struct ov_i2c_regvals norm_6x20[] = {
1306         { 0x12, 0x80 }, /* reset */
1307         { 0x11, 0x01 },
1308         { 0x03, 0x60 },
1309         { 0x05, 0x7f }, /* For when autoadjust is off */
1310         { 0x07, 0xa8 },
1311         /* The ratio of 0x0c and 0x0d controls the white point */
1312         { 0x0c, 0x24 },
1313         { 0x0d, 0x24 },
1314         { 0x0f, 0x15 }, /* COMS */
1315         { 0x10, 0x75 }, /* AEC Exposure time */
1316         { 0x12, 0x24 }, /* Enable AGC */
1317         { 0x14, 0x04 },
1318         /* 0x16: 0x06 helps frame stability with moving objects */
1319         { 0x16, 0x06 },
1320 /*      { 0x20, 0x30 },  * Aperture correction enable */
1321         { 0x26, 0xb2 }, /* BLC enable */
1322         /* 0x28: 0x05 Selects RGB format if RGB on */
1323         { 0x28, 0x05 },
1324         { 0x2a, 0x04 }, /* Disable framerate adjust */
1325 /*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1326         { 0x2d, 0x85 },
1327         { 0x33, 0xa0 }, /* Color Processing Parameter */
1328         { 0x34, 0xd2 }, /* Max A/D range */
1329         { 0x38, 0x8b },
1330         { 0x39, 0x40 },
1331
1332         { 0x3c, 0x39 }, /* Enable AEC mode changing */
1333         { 0x3c, 0x3c }, /* Change AEC mode */
1334         { 0x3c, 0x24 }, /* Disable AEC mode changing */
1335
1336         { 0x3d, 0x80 },
1337         /* These next two registers (0x4a, 0x4b) are undocumented.
1338          * They control the color balance */
1339         { 0x4a, 0x80 },
1340         { 0x4b, 0x80 },
1341         { 0x4d, 0xd2 }, /* This reduces noise a bit */
1342         { 0x4e, 0xc1 },
1343         { 0x4f, 0x04 },
1344 /* Do 50-53 have any effect? */
1345 /* Toggle 0x12[2] off and on here? */
1346 };
1347
1348 static const struct ov_i2c_regvals norm_6x30[] = {
1349         { 0x12, 0x80 }, /* Reset */
1350         { 0x00, 0x1f }, /* Gain */
1351         { 0x01, 0x99 }, /* Blue gain */
1352         { 0x02, 0x7c }, /* Red gain */
1353         { 0x03, 0xc0 }, /* Saturation */
1354         { 0x05, 0x0a }, /* Contrast */
1355         { 0x06, 0x95 }, /* Brightness */
1356         { 0x07, 0x2d }, /* Sharpness */
1357         { 0x0c, 0x20 },
1358         { 0x0d, 0x20 },
1359         { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1360         { 0x0f, 0x05 },
1361         { 0x10, 0x9a },
1362         { 0x11, 0x00 }, /* Pixel clock = fastest */
1363         { 0x12, 0x24 }, /* Enable AGC and AWB */
1364         { 0x13, 0x21 },
1365         { 0x14, 0x80 },
1366         { 0x15, 0x01 },
1367         { 0x16, 0x03 },
1368         { 0x17, 0x38 },
1369         { 0x18, 0xea },
1370         { 0x19, 0x04 },
1371         { 0x1a, 0x93 },
1372         { 0x1b, 0x00 },
1373         { 0x1e, 0xc4 },
1374         { 0x1f, 0x04 },
1375         { 0x20, 0x20 },
1376         { 0x21, 0x10 },
1377         { 0x22, 0x88 },
1378         { 0x23, 0xc0 }, /* Crystal circuit power level */
1379         { 0x25, 0x9a }, /* Increase AEC black ratio */
1380         { 0x26, 0xb2 }, /* BLC enable */
1381         { 0x27, 0xa2 },
1382         { 0x28, 0x00 },
1383         { 0x29, 0x00 },
1384         { 0x2a, 0x84 }, /* 60 Hz power */
1385         { 0x2b, 0xa8 }, /* 60 Hz power */
1386         { 0x2c, 0xa0 },
1387         { 0x2d, 0x95 }, /* Enable auto-brightness */
1388         { 0x2e, 0x88 },
1389         { 0x33, 0x26 },
1390         { 0x34, 0x03 },
1391         { 0x36, 0x8f },
1392         { 0x37, 0x80 },
1393         { 0x38, 0x83 },
1394         { 0x39, 0x80 },
1395         { 0x3a, 0x0f },
1396         { 0x3b, 0x3c },
1397         { 0x3c, 0x1a },
1398         { 0x3d, 0x80 },
1399         { 0x3e, 0x80 },
1400         { 0x3f, 0x0e },
1401         { 0x40, 0x00 }, /* White bal */
1402         { 0x41, 0x00 }, /* White bal */
1403         { 0x42, 0x80 },
1404         { 0x43, 0x3f }, /* White bal */
1405         { 0x44, 0x80 },
1406         { 0x45, 0x20 },
1407         { 0x46, 0x20 },
1408         { 0x47, 0x80 },
1409         { 0x48, 0x7f },
1410         { 0x49, 0x00 },
1411         { 0x4a, 0x00 },
1412         { 0x4b, 0x80 },
1413         { 0x4c, 0xd0 },
1414         { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1415         { 0x4e, 0x40 },
1416         { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1417         { 0x50, 0xff },
1418         { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1419         { 0x55, 0xff },
1420         { 0x56, 0x12 },
1421         { 0x57, 0x81 },
1422         { 0x58, 0x75 },
1423         { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1424         { 0x5a, 0x2c },
1425         { 0x5b, 0x0f }, /* AWB chrominance levels */
1426         { 0x5c, 0x10 },
1427         { 0x3d, 0x80 },
1428         { 0x27, 0xa6 },
1429         { 0x12, 0x20 }, /* Toggle AWB */
1430         { 0x12, 0x24 },
1431 };
1432
1433 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1434  *
1435  * Register 0x0f in the 7610 has the following effects:
1436  *
1437  * 0x85 (AEC method 1): Best overall, good contrast range
1438  * 0x45 (AEC method 2): Very overexposed
1439  * 0xa5 (spec sheet default): Ok, but the black level is
1440  *      shifted resulting in loss of contrast
1441  * 0x05 (old driver setting): very overexposed, too much
1442  *      contrast
1443  */
1444 static const struct ov_i2c_regvals norm_7610[] = {
1445         { 0x10, 0xff },
1446         { 0x16, 0x06 },
1447         { 0x28, 0x24 },
1448         { 0x2b, 0xac },
1449         { 0x12, 0x00 },
1450         { 0x38, 0x81 },
1451         { 0x28, 0x24 }, /* 0c */
1452         { 0x0f, 0x85 }, /* lg's setting */
1453         { 0x15, 0x01 },
1454         { 0x20, 0x1c },
1455         { 0x23, 0x2a },
1456         { 0x24, 0x10 },
1457         { 0x25, 0x8a },
1458         { 0x26, 0xa2 },
1459         { 0x27, 0xc2 },
1460         { 0x2a, 0x04 },
1461         { 0x2c, 0xfe },
1462         { 0x2d, 0x93 },
1463         { 0x30, 0x71 },
1464         { 0x31, 0x60 },
1465         { 0x32, 0x26 },
1466         { 0x33, 0x20 },
1467         { 0x34, 0x48 },
1468         { 0x12, 0x24 },
1469         { 0x11, 0x01 },
1470         { 0x0c, 0x24 },
1471         { 0x0d, 0x24 },
1472 };
1473
1474 static const struct ov_i2c_regvals norm_7620[] = {
1475         { 0x12, 0x80 },         /* reset */
1476         { 0x00, 0x00 },         /* gain */
1477         { 0x01, 0x80 },         /* blue gain */
1478         { 0x02, 0x80 },         /* red gain */
1479         { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1480         { 0x06, 0x60 },
1481         { 0x07, 0x00 },
1482         { 0x0c, 0x24 },
1483         { 0x0c, 0x24 },
1484         { 0x0d, 0x24 },
1485         { 0x11, 0x01 },
1486         { 0x12, 0x24 },
1487         { 0x13, 0x01 },
1488         { 0x14, 0x84 },
1489         { 0x15, 0x01 },
1490         { 0x16, 0x03 },
1491         { 0x17, 0x2f },
1492         { 0x18, 0xcf },
1493         { 0x19, 0x06 },
1494         { 0x1a, 0xf5 },
1495         { 0x1b, 0x00 },
1496         { 0x20, 0x18 },
1497         { 0x21, 0x80 },
1498         { 0x22, 0x80 },
1499         { 0x23, 0x00 },
1500         { 0x26, 0xa2 },
1501         { 0x27, 0xea },
1502         { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1503         { 0x29, 0x00 },
1504         { 0x2a, 0x10 },
1505         { 0x2b, 0x00 },
1506         { 0x2c, 0x88 },
1507         { 0x2d, 0x91 },
1508         { 0x2e, 0x80 },
1509         { 0x2f, 0x44 },
1510         { 0x60, 0x27 },
1511         { 0x61, 0x02 },
1512         { 0x62, 0x5f },
1513         { 0x63, 0xd5 },
1514         { 0x64, 0x57 },
1515         { 0x65, 0x83 },
1516         { 0x66, 0x55 },
1517         { 0x67, 0x92 },
1518         { 0x68, 0xcf },
1519         { 0x69, 0x76 },
1520         { 0x6a, 0x22 },
1521         { 0x6b, 0x00 },
1522         { 0x6c, 0x02 },
1523         { 0x6d, 0x44 },
1524         { 0x6e, 0x80 },
1525         { 0x6f, 0x1d },
1526         { 0x70, 0x8b },
1527         { 0x71, 0x00 },
1528         { 0x72, 0x14 },
1529         { 0x73, 0x54 },
1530         { 0x74, 0x00 },
1531         { 0x75, 0x8e },
1532         { 0x76, 0x00 },
1533         { 0x77, 0xff },
1534         { 0x78, 0x80 },
1535         { 0x79, 0x80 },
1536         { 0x7a, 0x80 },
1537         { 0x7b, 0xe2 },
1538         { 0x7c, 0x00 },
1539 };
1540
1541 /* 7640 and 7648. The defaults should be OK for most registers. */
1542 static const struct ov_i2c_regvals norm_7640[] = {
1543         { 0x12, 0x80 },
1544         { 0x12, 0x14 },
1545 };
1546
1547 static const struct ov_regvals init_519_ov7660[] = {
1548         { 0x5d, 0x03 }, /* Turn off suspend mode */
1549         { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1550         { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1551         { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1552         { 0xa3, 0x18 },
1553         { 0xa4, 0x04 },
1554         { 0xa5, 0x28 },
1555         { 0x37, 0x00 }, /* SetUsbInit */
1556         { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1557         /* Enable both fields, YUV Input, disable defect comp (why?) */
1558         { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1559         { 0x21, 0x38 },
1560         { 0x22, 0x1d },
1561         { 0x17, 0x50 }, /* undocumented */
1562         { 0x37, 0x00 }, /* undocumented */
1563         { 0x40, 0xff }, /* I2C timeout counter */
1564         { 0x46, 0x00 }, /* I2C clock prescaler */
1565 };
1566 static const struct ov_i2c_regvals norm_7660[] = {
1567         {OV7670_R12_COM7, OV7670_COM7_RESET},
1568         {OV7670_R11_CLKRC, 0x81},
1569         {0x92, 0x00},                   /* DM_LNL */
1570         {0x93, 0x00},                   /* DM_LNH */
1571         {0x9d, 0x4c},                   /* BD50ST */
1572         {0x9e, 0x3f},                   /* BD60ST */
1573         {OV7670_R3B_COM11, 0x02},
1574         {OV7670_R13_COM8, 0xf5},
1575         {OV7670_R10_AECH, 0x00},
1576         {OV7670_R00_GAIN, 0x00},
1577         {OV7670_R01_BLUE, 0x7c},
1578         {OV7670_R02_RED, 0x9d},
1579         {OV7670_R12_COM7, 0x00},
1580         {OV7670_R04_COM1, 00},
1581         {OV7670_R18_HSTOP, 0x01},
1582         {OV7670_R17_HSTART, 0x13},
1583         {OV7670_R32_HREF, 0x92},
1584         {OV7670_R19_VSTART, 0x02},
1585         {OV7670_R1A_VSTOP, 0x7a},
1586         {OV7670_R03_VREF, 0x00},
1587         {OV7670_R0E_COM5, 0x04},
1588         {OV7670_R0F_COM6, 0x62},
1589         {OV7670_R15_COM10, 0x00},
1590         {0x16, 0x02},                   /* RSVD */
1591         {0x1b, 0x00},                   /* PSHFT */
1592         {OV7670_R1E_MVFP, 0x01},
1593         {0x29, 0x3c},                   /* RSVD */
1594         {0x33, 0x00},                   /* CHLF */
1595         {0x34, 0x07},                   /* ARBLM */
1596         {0x35, 0x84},                   /* RSVD */
1597         {0x36, 0x00},                   /* RSVD */
1598         {0x37, 0x04},                   /* ADC */
1599         {0x39, 0x43},                   /* OFON */
1600         {OV7670_R3A_TSLB, 0x00},
1601         {OV7670_R3C_COM12, 0x6c},
1602         {OV7670_R3D_COM13, 0x98},
1603         {OV7670_R3F_EDGE, 0x23},
1604         {OV7670_R40_COM15, 0xc1},
1605         {OV7670_R41_COM16, 0x22},
1606         {0x6b, 0x0a},                   /* DBLV */
1607         {0xa1, 0x08},                   /* RSVD */
1608         {0x69, 0x80},                   /* HV */
1609         {0x43, 0xf0},                   /* RSVD.. */
1610         {0x44, 0x10},
1611         {0x45, 0x78},
1612         {0x46, 0xa8},
1613         {0x47, 0x60},
1614         {0x48, 0x80},
1615         {0x59, 0xba},
1616         {0x5a, 0x9a},
1617         {0x5b, 0x22},
1618         {0x5c, 0xb9},
1619         {0x5d, 0x9b},
1620         {0x5e, 0x10},
1621         {0x5f, 0xe0},
1622         {0x60, 0x85},
1623         {0x61, 0x60},
1624         {0x9f, 0x9d},                   /* RSVD */
1625         {0xa0, 0xa0},                   /* DSPC2 */
1626         {0x4f, 0x60},                   /* matrix */
1627         {0x50, 0x64},
1628         {0x51, 0x04},
1629         {0x52, 0x18},
1630         {0x53, 0x3c},
1631         {0x54, 0x54},
1632         {0x55, 0x40},
1633         {0x56, 0x40},
1634         {0x57, 0x40},
1635         {0x58, 0x0d},                   /* matrix sign */
1636         {0x8b, 0xcc},                   /* RSVD */
1637         {0x8c, 0xcc},
1638         {0x8d, 0xcf},
1639         {0x6c, 0x40},                   /* gamma curve */
1640         {0x6d, 0xe0},
1641         {0x6e, 0xa0},
1642         {0x6f, 0x80},
1643         {0x70, 0x70},
1644         {0x71, 0x80},
1645         {0x72, 0x60},
1646         {0x73, 0x60},
1647         {0x74, 0x50},
1648         {0x75, 0x40},
1649         {0x76, 0x38},
1650         {0x77, 0x3c},
1651         {0x78, 0x32},
1652         {0x79, 0x1a},
1653         {0x7a, 0x28},
1654         {0x7b, 0x24},
1655         {0x7c, 0x04},                   /* gamma curve */
1656         {0x7d, 0x12},
1657         {0x7e, 0x26},
1658         {0x7f, 0x46},
1659         {0x80, 0x54},
1660         {0x81, 0x64},
1661         {0x82, 0x70},
1662         {0x83, 0x7c},
1663         {0x84, 0x86},
1664         {0x85, 0x8e},
1665         {0x86, 0x9c},
1666         {0x87, 0xab},
1667         {0x88, 0xc4},
1668         {0x89, 0xd1},
1669         {0x8a, 0xe5},
1670         {OV7670_R14_COM9, 0x1e},
1671         {OV7670_R24_AEW, 0x80},
1672         {OV7670_R25_AEB, 0x72},
1673         {OV7670_R26_VPT, 0xb3},
1674         {0x62, 0x80},                   /* LCC1 */
1675         {0x63, 0x80},                   /* LCC2 */
1676         {0x64, 0x06},                   /* LCC3 */
1677         {0x65, 0x00},                   /* LCC4 */
1678         {0x66, 0x01},                   /* LCC5 */
1679         {0x94, 0x0e},                   /* RSVD.. */
1680         {0x95, 0x14},
1681         {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1682                         | OV7670_COM8_AECSTEP
1683                         | OV7670_COM8_BFILT
1684                         | 0x10
1685                         | OV7670_COM8_AGC
1686                         | OV7670_COM8_AWB
1687                         | OV7670_COM8_AEC},
1688         {0xa1, 0xc8}
1689 };
1690 static const struct ov_i2c_regvals norm_9600[] = {
1691         {0x12, 0x80},
1692         {0x0c, 0x28},
1693         {0x11, 0x80},
1694         {0x13, 0xb5},
1695         {0x14, 0x3e},
1696         {0x1b, 0x04},
1697         {0x24, 0xb0},
1698         {0x25, 0x90},
1699         {0x26, 0x94},
1700         {0x35, 0x90},
1701         {0x37, 0x07},
1702         {0x38, 0x08},
1703         {0x01, 0x8e},
1704         {0x02, 0x85}
1705 };
1706
1707 /* 7670. Defaults taken from OmniVision provided data,
1708 *  as provided by Jonathan Corbet of OLPC               */
1709 static const struct ov_i2c_regvals norm_7670[] = {
1710         { OV7670_R12_COM7, OV7670_COM7_RESET },
1711         { OV7670_R3A_TSLB, 0x04 },              /* OV */
1712         { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1713         { OV7670_R11_CLKRC, 0x01 },
1714 /*
1715  * Set the hardware window.  These values from OV don't entirely
1716  * make sense - hstop is less than hstart.  But they work...
1717  */
1718         { OV7670_R17_HSTART, 0x13 },
1719         { OV7670_R18_HSTOP, 0x01 },
1720         { OV7670_R32_HREF, 0xb6 },
1721         { OV7670_R19_VSTART, 0x02 },
1722         { OV7670_R1A_VSTOP, 0x7a },
1723         { OV7670_R03_VREF, 0x0a },
1724
1725         { OV7670_R0C_COM3, 0x00 },
1726         { OV7670_R3E_COM14, 0x00 },
1727 /* Mystery scaling numbers */
1728         { 0x70, 0x3a },
1729         { 0x71, 0x35 },
1730         { 0x72, 0x11 },
1731         { 0x73, 0xf0 },
1732         { 0xa2, 0x02 },
1733 /*      { OV7670_R15_COM10, 0x0 }, */
1734
1735 /* Gamma curve values */
1736         { 0x7a, 0x20 },
1737         { 0x7b, 0x10 },
1738         { 0x7c, 0x1e },
1739         { 0x7d, 0x35 },
1740         { 0x7e, 0x5a },
1741         { 0x7f, 0x69 },
1742         { 0x80, 0x76 },
1743         { 0x81, 0x80 },
1744         { 0x82, 0x88 },
1745         { 0x83, 0x8f },
1746         { 0x84, 0x96 },
1747         { 0x85, 0xa3 },
1748         { 0x86, 0xaf },
1749         { 0x87, 0xc4 },
1750         { 0x88, 0xd7 },
1751         { 0x89, 0xe8 },
1752
1753 /* AGC and AEC parameters.  Note we start by disabling those features,
1754    then turn them only after tweaking the values. */
1755         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1756                          | OV7670_COM8_AECSTEP
1757                          | OV7670_COM8_BFILT },
1758         { OV7670_R00_GAIN, 0x00 },
1759         { OV7670_R10_AECH, 0x00 },
1760         { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1761         { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1762         { OV7670_RA5_BD50MAX, 0x05 },
1763         { OV7670_RAB_BD60MAX, 0x07 },
1764         { OV7670_R24_AEW, 0x95 },
1765         { OV7670_R25_AEB, 0x33 },
1766         { OV7670_R26_VPT, 0xe3 },
1767         { OV7670_R9F_HAECC1, 0x78 },
1768         { OV7670_RA0_HAECC2, 0x68 },
1769         { 0xa1, 0x03 }, /* magic */
1770         { OV7670_RA6_HAECC3, 0xd8 },
1771         { OV7670_RA7_HAECC4, 0xd8 },
1772         { OV7670_RA8_HAECC5, 0xf0 },
1773         { OV7670_RA9_HAECC6, 0x90 },
1774         { OV7670_RAA_HAECC7, 0x94 },
1775         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1776                         | OV7670_COM8_AECSTEP
1777                         | OV7670_COM8_BFILT
1778                         | OV7670_COM8_AGC
1779                         | OV7670_COM8_AEC },
1780
1781 /* Almost all of these are magic "reserved" values.  */
1782         { OV7670_R0E_COM5, 0x61 },
1783         { OV7670_R0F_COM6, 0x4b },
1784         { 0x16, 0x02 },
1785         { OV7670_R1E_MVFP, 0x07 },
1786         { 0x21, 0x02 },
1787         { 0x22, 0x91 },
1788         { 0x29, 0x07 },
1789         { 0x33, 0x0b },
1790         { 0x35, 0x0b },
1791         { 0x37, 0x1d },
1792         { 0x38, 0x71 },
1793         { 0x39, 0x2a },
1794         { OV7670_R3C_COM12, 0x78 },
1795         { 0x4d, 0x40 },
1796         { 0x4e, 0x20 },
1797         { OV7670_R69_GFIX, 0x00 },
1798         { 0x6b, 0x4a },
1799         { 0x74, 0x10 },
1800         { 0x8d, 0x4f },
1801         { 0x8e, 0x00 },
1802         { 0x8f, 0x00 },
1803         { 0x90, 0x00 },
1804         { 0x91, 0x00 },
1805         { 0x96, 0x00 },
1806         { 0x9a, 0x00 },
1807         { 0xb0, 0x84 },
1808         { 0xb1, 0x0c },
1809         { 0xb2, 0x0e },
1810         { 0xb3, 0x82 },
1811         { 0xb8, 0x0a },
1812
1813 /* More reserved magic, some of which tweaks white balance */
1814         { 0x43, 0x0a },
1815         { 0x44, 0xf0 },
1816         { 0x45, 0x34 },
1817         { 0x46, 0x58 },
1818         { 0x47, 0x28 },
1819         { 0x48, 0x3a },
1820         { 0x59, 0x88 },
1821         { 0x5a, 0x88 },
1822         { 0x5b, 0x44 },
1823         { 0x5c, 0x67 },
1824         { 0x5d, 0x49 },
1825         { 0x5e, 0x0e },
1826         { 0x6c, 0x0a },
1827         { 0x6d, 0x55 },
1828         { 0x6e, 0x11 },
1829         { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1830         { 0x6a, 0x40 },
1831         { OV7670_R01_BLUE, 0x40 },
1832         { OV7670_R02_RED, 0x60 },
1833         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1834                         | OV7670_COM8_AECSTEP
1835                         | OV7670_COM8_BFILT
1836                         | OV7670_COM8_AGC
1837                         | OV7670_COM8_AEC
1838                         | OV7670_COM8_AWB },
1839
1840 /* Matrix coefficients */
1841         { 0x4f, 0x80 },
1842         { 0x50, 0x80 },
1843         { 0x51, 0x00 },
1844         { 0x52, 0x22 },
1845         { 0x53, 0x5e },
1846         { 0x54, 0x80 },
1847         { 0x58, 0x9e },
1848
1849         { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1850         { OV7670_R3F_EDGE, 0x00 },
1851         { 0x75, 0x05 },
1852         { 0x76, 0xe1 },
1853         { 0x4c, 0x00 },
1854         { 0x77, 0x01 },
1855         { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1856                           | OV7670_COM13_UVSAT
1857                           | 2},         /* was 3 */
1858         { 0x4b, 0x09 },
1859         { 0xc9, 0x60 },
1860         { OV7670_R41_COM16, 0x38 },
1861         { 0x56, 0x40 },
1862
1863         { 0x34, 0x11 },
1864         { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1865         { 0xa4, 0x88 },
1866         { 0x96, 0x00 },
1867         { 0x97, 0x30 },
1868         { 0x98, 0x20 },
1869         { 0x99, 0x30 },
1870         { 0x9a, 0x84 },
1871         { 0x9b, 0x29 },
1872         { 0x9c, 0x03 },
1873         { 0x9d, 0x4c },
1874         { 0x9e, 0x3f },
1875         { 0x78, 0x04 },
1876
1877 /* Extra-weird stuff.  Some sort of multiplexor register */
1878         { 0x79, 0x01 },
1879         { 0xc8, 0xf0 },
1880         { 0x79, 0x0f },
1881         { 0xc8, 0x00 },
1882         { 0x79, 0x10 },
1883         { 0xc8, 0x7e },
1884         { 0x79, 0x0a },
1885         { 0xc8, 0x80 },
1886         { 0x79, 0x0b },
1887         { 0xc8, 0x01 },
1888         { 0x79, 0x0c },
1889         { 0xc8, 0x0f },
1890         { 0x79, 0x0d },
1891         { 0xc8, 0x20 },
1892         { 0x79, 0x09 },
1893         { 0xc8, 0x80 },
1894         { 0x79, 0x02 },
1895         { 0xc8, 0xc0 },
1896         { 0x79, 0x03 },
1897         { 0xc8, 0x40 },
1898         { 0x79, 0x05 },
1899         { 0xc8, 0x30 },
1900         { 0x79, 0x26 },
1901 };
1902
1903 static const struct ov_i2c_regvals norm_8610[] = {
1904         { 0x12, 0x80 },
1905         { 0x00, 0x00 },
1906         { 0x01, 0x80 },
1907         { 0x02, 0x80 },
1908         { 0x03, 0xc0 },
1909         { 0x04, 0x30 },
1910         { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1911         { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1912         { 0x0a, 0x86 },
1913         { 0x0b, 0xb0 },
1914         { 0x0c, 0x20 },
1915         { 0x0d, 0x20 },
1916         { 0x11, 0x01 },
1917         { 0x12, 0x25 },
1918         { 0x13, 0x01 },
1919         { 0x14, 0x04 },
1920         { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1921         { 0x16, 0x03 },
1922         { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1923         { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1924         { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1925         { 0x1a, 0xf5 },
1926         { 0x1b, 0x00 },
1927         { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1928         { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1929         { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1930         { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1931         { 0x26, 0xa2 },
1932         { 0x27, 0xea },
1933         { 0x28, 0x00 },
1934         { 0x29, 0x00 },
1935         { 0x2a, 0x80 },
1936         { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1937         { 0x2c, 0xac },
1938         { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1939         { 0x2e, 0x80 },
1940         { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1941         { 0x4c, 0x00 },
1942         { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1943         { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1944         { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1945         { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1946         { 0x63, 0xff },
1947         { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1948                          * maybe thats wrong */
1949         { 0x65, 0x00 },
1950         { 0x66, 0x55 },
1951         { 0x67, 0xb0 },
1952         { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1953         { 0x69, 0x02 },
1954         { 0x6a, 0x22 },
1955         { 0x6b, 0x00 },
1956         { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1957                          * deleting bit7 colors the first images red */
1958         { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1959         { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1960         { 0x6f, 0x01 },
1961         { 0x70, 0x8b },
1962         { 0x71, 0x00 },
1963         { 0x72, 0x14 },
1964         { 0x73, 0x54 },
1965         { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1966         { 0x75, 0x0e },
1967         { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1968         { 0x77, 0xff },
1969         { 0x78, 0x80 },
1970         { 0x79, 0x80 },
1971         { 0x7a, 0x80 },
1972         { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1973         { 0x7c, 0x00 },
1974         { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1975         { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1976         { 0x7f, 0xfb },
1977         { 0x80, 0x28 },
1978         { 0x81, 0x00 },
1979         { 0x82, 0x23 },
1980         { 0x83, 0x0b },
1981         { 0x84, 0x00 },
1982         { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1983         { 0x86, 0xc9 },
1984         { 0x87, 0x00 },
1985         { 0x88, 0x00 },
1986         { 0x89, 0x01 },
1987         { 0x12, 0x20 },
1988         { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1989 };
1990
1991 static unsigned char ov7670_abs_to_sm(unsigned char v)
1992 {
1993         if (v > 127)
1994                 return v & 0x7f;
1995         return (128 - v) | 0x80;
1996 }
1997
1998 /* Write a OV519 register */
1999 static void reg_w(struct sd *sd, u16 index, u16 value)
2000 {
2001         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2002         int ret, req = 0;
2003
2004         if (sd->gspca_dev.usb_err < 0)
2005                 return;
2006
2007         /* Avoid things going to fast for the bridge with a xhci host */
2008         udelay(150);
2009
2010         switch (sd->bridge) {
2011         case BRIDGE_OV511:
2012         case BRIDGE_OV511PLUS:
2013                 req = 2;
2014                 break;
2015         case BRIDGE_OVFX2:
2016                 req = 0x0a;
2017                 /* fall through */
2018         case BRIDGE_W9968CF:
2019                 gspca_dbg(gspca_dev, D_USBO, "SET %02x %04x %04x\n",
2020                           req, value, index);
2021                 ret = usb_control_msg(sd->gspca_dev.dev,
2022                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2023                         req,
2024                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2025                         value, index, NULL, 0, 500);
2026                 goto leave;
2027         default:
2028                 req = 1;
2029         }
2030
2031         gspca_dbg(gspca_dev, D_USBO, "SET %02x 0000 %04x %02x\n",
2032                   req, index, value);
2033         sd->gspca_dev.usb_buf[0] = value;
2034         ret = usb_control_msg(sd->gspca_dev.dev,
2035                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2036                         req,
2037                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2038                         0, index,
2039                         sd->gspca_dev.usb_buf, 1, 500);
2040 leave:
2041         if (ret < 0) {
2042                 gspca_err(gspca_dev, "reg_w %02x failed %d\n", index, ret);
2043                 sd->gspca_dev.usb_err = ret;
2044                 return;
2045         }
2046 }
2047
2048 /* Read from a OV519 register, note not valid for the w9968cf!! */
2049 /* returns: negative is error, pos or zero is data */
2050 static int reg_r(struct sd *sd, u16 index)
2051 {
2052         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2053         int ret;
2054         int req;
2055
2056         if (sd->gspca_dev.usb_err < 0)
2057                 return -1;
2058
2059         switch (sd->bridge) {
2060         case BRIDGE_OV511:
2061         case BRIDGE_OV511PLUS:
2062                 req = 3;
2063                 break;
2064         case BRIDGE_OVFX2:
2065                 req = 0x0b;
2066                 break;
2067         default:
2068                 req = 1;
2069         }
2070
2071         /* Avoid things going to fast for the bridge with a xhci host */
2072         udelay(150);
2073         ret = usb_control_msg(sd->gspca_dev.dev,
2074                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2075                         req,
2076                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2077                         0, index, sd->gspca_dev.usb_buf, 1, 500);
2078
2079         if (ret >= 0) {
2080                 ret = sd->gspca_dev.usb_buf[0];
2081                 gspca_dbg(gspca_dev, D_USBI, "GET %02x 0000 %04x %02x\n",
2082                           req, index, ret);
2083         } else {
2084                 gspca_err(gspca_dev, "reg_r %02x failed %d\n", index, ret);
2085                 sd->gspca_dev.usb_err = ret;
2086                 /*
2087                  * Make sure the result is zeroed to avoid uninitialized
2088                  * values.
2089                  */
2090                 gspca_dev->usb_buf[0] = 0;
2091         }
2092
2093         return ret;
2094 }
2095
2096 /* Read 8 values from a OV519 register */
2097 static int reg_r8(struct sd *sd,
2098                   u16 index)
2099 {
2100         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2101         int ret;
2102
2103         if (sd->gspca_dev.usb_err < 0)
2104                 return -1;
2105
2106         /* Avoid things going to fast for the bridge with a xhci host */
2107         udelay(150);
2108         ret = usb_control_msg(sd->gspca_dev.dev,
2109                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2110                         1,                      /* REQ_IO */
2111                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2112                         0, index, sd->gspca_dev.usb_buf, 8, 500);
2113
2114         if (ret >= 0) {
2115                 ret = sd->gspca_dev.usb_buf[0];
2116         } else {
2117                 gspca_err(gspca_dev, "reg_r8 %02x failed %d\n", index, ret);
2118                 sd->gspca_dev.usb_err = ret;
2119                 /*
2120                  * Make sure the buffer is zeroed to avoid uninitialized
2121                  * values.
2122                  */
2123                 memset(gspca_dev->usb_buf, 0, 8);
2124         }
2125
2126         return ret;
2127 }
2128
2129 /*
2130  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2131  * the same position as 1's in "mask" are cleared and set to "value". Bits
2132  * that are in the same position as 0's in "mask" are preserved, regardless
2133  * of their respective state in "value".
2134  */
2135 static void reg_w_mask(struct sd *sd,
2136                         u16 index,
2137                         u8 value,
2138                         u8 mask)
2139 {
2140         int ret;
2141         u8 oldval;
2142
2143         if (mask != 0xff) {
2144                 value &= mask;                  /* Enforce mask on value */
2145                 ret = reg_r(sd, index);
2146                 if (ret < 0)
2147                         return;
2148
2149                 oldval = ret & ~mask;           /* Clear the masked bits */
2150                 value |= oldval;                /* Set the desired bits */
2151         }
2152         reg_w(sd, index, value);
2153 }
2154
2155 /*
2156  * Writes multiple (n) byte value to a single register. Only valid with certain
2157  * registers (0x30 and 0xc4 - 0xce).
2158  */
2159 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2160 {
2161         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2162         int ret;
2163
2164         if (sd->gspca_dev.usb_err < 0)
2165                 return;
2166
2167         *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2168
2169         /* Avoid things going to fast for the bridge with a xhci host */
2170         udelay(150);
2171         ret = usb_control_msg(sd->gspca_dev.dev,
2172                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2173                         1 /* REG_IO */,
2174                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2175                         0, index,
2176                         sd->gspca_dev.usb_buf, n, 500);
2177         if (ret < 0) {
2178                 gspca_err(gspca_dev, "reg_w32 %02x failed %d\n", index, ret);
2179                 sd->gspca_dev.usb_err = ret;
2180         }
2181 }
2182
2183 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2184 {
2185         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2186         int rc, retries;
2187
2188         gspca_dbg(gspca_dev, D_USBO, "ov511_i2c_w %02x %02x\n", reg, value);
2189
2190         /* Three byte write cycle */
2191         for (retries = 6; ; ) {
2192                 /* Select camera register */
2193                 reg_w(sd, R51x_I2C_SADDR_3, reg);
2194
2195                 /* Write "value" to I2C data port of OV511 */
2196                 reg_w(sd, R51x_I2C_DATA, value);
2197
2198                 /* Initiate 3-byte write cycle */
2199                 reg_w(sd, R511_I2C_CTL, 0x01);
2200
2201                 do {
2202                         rc = reg_r(sd, R511_I2C_CTL);
2203                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2204
2205                 if (rc < 0)
2206                         return;
2207
2208                 if ((rc & 2) == 0) /* Ack? */
2209                         break;
2210                 if (--retries < 0) {
2211                         gspca_dbg(gspca_dev, D_USBO, "i2c write retries exhausted\n");
2212                         return;
2213                 }
2214         }
2215 }
2216
2217 static int ov511_i2c_r(struct sd *sd, u8 reg)
2218 {
2219         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2220         int rc, value, retries;
2221
2222         /* Two byte write cycle */
2223         for (retries = 6; ; ) {
2224                 /* Select camera register */
2225                 reg_w(sd, R51x_I2C_SADDR_2, reg);
2226
2227                 /* Initiate 2-byte write cycle */
2228                 reg_w(sd, R511_I2C_CTL, 0x03);
2229
2230                 do {
2231                         rc = reg_r(sd, R511_I2C_CTL);
2232                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2233
2234                 if (rc < 0)
2235                         return rc;
2236
2237                 if ((rc & 2) == 0) /* Ack? */
2238                         break;
2239
2240                 /* I2C abort */
2241                 reg_w(sd, R511_I2C_CTL, 0x10);
2242
2243                 if (--retries < 0) {
2244                         gspca_dbg(gspca_dev, D_USBI, "i2c write retries exhausted\n");
2245                         return -1;
2246                 }
2247         }
2248
2249         /* Two byte read cycle */
2250         for (retries = 6; ; ) {
2251                 /* Initiate 2-byte read cycle */
2252                 reg_w(sd, R511_I2C_CTL, 0x05);
2253
2254                 do {
2255                         rc = reg_r(sd, R511_I2C_CTL);
2256                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2257
2258                 if (rc < 0)
2259                         return rc;
2260
2261                 if ((rc & 2) == 0) /* Ack? */
2262                         break;
2263
2264                 /* I2C abort */
2265                 reg_w(sd, R511_I2C_CTL, 0x10);
2266
2267                 if (--retries < 0) {
2268                         gspca_dbg(gspca_dev, D_USBI, "i2c read retries exhausted\n");
2269                         return -1;
2270                 }
2271         }
2272
2273         value = reg_r(sd, R51x_I2C_DATA);
2274
2275         gspca_dbg(gspca_dev, D_USBI, "ov511_i2c_r %02x %02x\n", reg, value);
2276
2277         /* This is needed to make i2c_w() work */
2278         reg_w(sd, R511_I2C_CTL, 0x05);
2279
2280         return value;
2281 }
2282
2283 /*
2284  * The OV518 I2C I/O procedure is different, hence, this function.
2285  * This is normally only called from i2c_w(). Note that this function
2286  * always succeeds regardless of whether the sensor is present and working.
2287  */
2288 static void ov518_i2c_w(struct sd *sd,
2289                 u8 reg,
2290                 u8 value)
2291 {
2292         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2293
2294         gspca_dbg(gspca_dev, D_USBO, "ov518_i2c_w %02x %02x\n", reg, value);
2295
2296         /* Select camera register */
2297         reg_w(sd, R51x_I2C_SADDR_3, reg);
2298
2299         /* Write "value" to I2C data port of OV511 */
2300         reg_w(sd, R51x_I2C_DATA, value);
2301
2302         /* Initiate 3-byte write cycle */
2303         reg_w(sd, R518_I2C_CTL, 0x01);
2304
2305         /* wait for write complete */
2306         msleep(4);
2307         reg_r8(sd, R518_I2C_CTL);
2308 }
2309
2310 /*
2311  * returns: negative is error, pos or zero is data
2312  *
2313  * The OV518 I2C I/O procedure is different, hence, this function.
2314  * This is normally only called from i2c_r(). Note that this function
2315  * always succeeds regardless of whether the sensor is present and working.
2316  */
2317 static int ov518_i2c_r(struct sd *sd, u8 reg)
2318 {
2319         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2320         int value;
2321
2322         /* Select camera register */
2323         reg_w(sd, R51x_I2C_SADDR_2, reg);
2324
2325         /* Initiate 2-byte write cycle */
2326         reg_w(sd, R518_I2C_CTL, 0x03);
2327         reg_r8(sd, R518_I2C_CTL);
2328
2329         /* Initiate 2-byte read cycle */
2330         reg_w(sd, R518_I2C_CTL, 0x05);
2331         reg_r8(sd, R518_I2C_CTL);
2332
2333         value = reg_r(sd, R51x_I2C_DATA);
2334         gspca_dbg(gspca_dev, D_USBI, "ov518_i2c_r %02x %02x\n", reg, value);
2335         return value;
2336 }
2337
2338 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2339 {
2340         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2341         int ret;
2342
2343         if (sd->gspca_dev.usb_err < 0)
2344                 return;
2345
2346         ret = usb_control_msg(sd->gspca_dev.dev,
2347                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2348                         0x02,
2349                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2350                         (u16) value, (u16) reg, NULL, 0, 500);
2351
2352         if (ret < 0) {
2353                 gspca_err(gspca_dev, "ovfx2_i2c_w %02x failed %d\n", reg, ret);
2354                 sd->gspca_dev.usb_err = ret;
2355         }
2356
2357         gspca_dbg(gspca_dev, D_USBO, "ovfx2_i2c_w %02x %02x\n", reg, value);
2358 }
2359
2360 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2361 {
2362         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2363         int ret;
2364
2365         if (sd->gspca_dev.usb_err < 0)
2366                 return -1;
2367
2368         ret = usb_control_msg(sd->gspca_dev.dev,
2369                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2370                         0x03,
2371                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2372                         0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2373
2374         if (ret >= 0) {
2375                 ret = sd->gspca_dev.usb_buf[0];
2376                 gspca_dbg(gspca_dev, D_USBI, "ovfx2_i2c_r %02x %02x\n",
2377                           reg, ret);
2378         } else {
2379                 gspca_err(gspca_dev, "ovfx2_i2c_r %02x failed %d\n", reg, ret);
2380                 sd->gspca_dev.usb_err = ret;
2381         }
2382
2383         return ret;
2384 }
2385
2386 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2387 {
2388         if (sd->sensor_reg_cache[reg] == value)
2389                 return;
2390
2391         switch (sd->bridge) {
2392         case BRIDGE_OV511:
2393         case BRIDGE_OV511PLUS:
2394                 ov511_i2c_w(sd, reg, value);
2395                 break;
2396         case BRIDGE_OV518:
2397         case BRIDGE_OV518PLUS:
2398         case BRIDGE_OV519:
2399                 ov518_i2c_w(sd, reg, value);
2400                 break;
2401         case BRIDGE_OVFX2:
2402                 ovfx2_i2c_w(sd, reg, value);
2403                 break;
2404         case BRIDGE_W9968CF:
2405                 w9968cf_i2c_w(sd, reg, value);
2406                 break;
2407         }
2408
2409         if (sd->gspca_dev.usb_err >= 0) {
2410                 /* Up on sensor reset empty the register cache */
2411                 if (reg == 0x12 && (value & 0x80))
2412                         memset(sd->sensor_reg_cache, -1,
2413                                 sizeof(sd->sensor_reg_cache));
2414                 else
2415                         sd->sensor_reg_cache[reg] = value;
2416         }
2417 }
2418
2419 static int i2c_r(struct sd *sd, u8 reg)
2420 {
2421         int ret = -1;
2422
2423         if (sd->sensor_reg_cache[reg] != -1)
2424                 return sd->sensor_reg_cache[reg];
2425
2426         switch (sd->bridge) {
2427         case BRIDGE_OV511:
2428         case BRIDGE_OV511PLUS:
2429                 ret = ov511_i2c_r(sd, reg);
2430                 break;
2431         case BRIDGE_OV518:
2432         case BRIDGE_OV518PLUS:
2433         case BRIDGE_OV519:
2434                 ret = ov518_i2c_r(sd, reg);
2435                 break;
2436         case BRIDGE_OVFX2:
2437                 ret = ovfx2_i2c_r(sd, reg);
2438                 break;
2439         case BRIDGE_W9968CF:
2440                 ret = w9968cf_i2c_r(sd, reg);
2441                 break;
2442         }
2443
2444         if (ret >= 0)
2445                 sd->sensor_reg_cache[reg] = ret;
2446
2447         return ret;
2448 }
2449
2450 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2451  * the same position as 1's in "mask" are cleared and set to "value". Bits
2452  * that are in the same position as 0's in "mask" are preserved, regardless
2453  * of their respective state in "value".
2454  */
2455 static void i2c_w_mask(struct sd *sd,
2456                         u8 reg,
2457                         u8 value,
2458                         u8 mask)
2459 {
2460         int rc;
2461         u8 oldval;
2462
2463         value &= mask;                  /* Enforce mask on value */
2464         rc = i2c_r(sd, reg);
2465         if (rc < 0)
2466                 return;
2467         oldval = rc & ~mask;            /* Clear the masked bits */
2468         value |= oldval;                /* Set the desired bits */
2469         i2c_w(sd, reg, value);
2470 }
2471
2472 /* Temporarily stops OV511 from functioning. Must do this before changing
2473  * registers while the camera is streaming */
2474 static inline void ov51x_stop(struct sd *sd)
2475 {
2476         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2477
2478         gspca_dbg(gspca_dev, D_STREAM, "stopping\n");
2479         sd->stopped = 1;
2480         switch (sd->bridge) {
2481         case BRIDGE_OV511:
2482         case BRIDGE_OV511PLUS:
2483                 reg_w(sd, R51x_SYS_RESET, 0x3d);
2484                 break;
2485         case BRIDGE_OV518:
2486         case BRIDGE_OV518PLUS:
2487                 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2488                 break;
2489         case BRIDGE_OV519:
2490                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2491                 reg_w(sd, OV519_R51_RESET1, 0x00);
2492                 reg_w(sd, 0x22, 0x00);          /* FRAR */
2493                 break;
2494         case BRIDGE_OVFX2:
2495                 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2496                 break;
2497         case BRIDGE_W9968CF:
2498                 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2499                 break;
2500         }
2501 }
2502
2503 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2504  * actually stopped (for performance). */
2505 static inline void ov51x_restart(struct sd *sd)
2506 {
2507         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2508
2509         gspca_dbg(gspca_dev, D_STREAM, "restarting\n");
2510         if (!sd->stopped)
2511                 return;
2512         sd->stopped = 0;
2513
2514         /* Reinitialize the stream */
2515         switch (sd->bridge) {
2516         case BRIDGE_OV511:
2517         case BRIDGE_OV511PLUS:
2518                 reg_w(sd, R51x_SYS_RESET, 0x00);
2519                 break;
2520         case BRIDGE_OV518:
2521         case BRIDGE_OV518PLUS:
2522                 reg_w(sd, 0x2f, 0x80);
2523                 reg_w(sd, R51x_SYS_RESET, 0x00);
2524                 break;
2525         case BRIDGE_OV519:
2526                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2527                 reg_w(sd, OV519_R51_RESET1, 0x00);
2528                 reg_w(sd, 0x22, 0x1d);          /* FRAR */
2529                 break;
2530         case BRIDGE_OVFX2:
2531                 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2532                 break;
2533         case BRIDGE_W9968CF:
2534                 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2535                 break;
2536         }
2537 }
2538
2539 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2540
2541 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2542  * is synchronized. Returns <0 on failure.
2543  */
2544 static int init_ov_sensor(struct sd *sd, u8 slave)
2545 {
2546         int i;
2547         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2548
2549         ov51x_set_slave_ids(sd, slave);
2550
2551         /* Reset the sensor */
2552         i2c_w(sd, 0x12, 0x80);
2553
2554         /* Wait for it to initialize */
2555         msleep(150);
2556
2557         for (i = 0; i < i2c_detect_tries; i++) {
2558                 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2559                     i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2560                         gspca_dbg(gspca_dev, D_PROBE, "I2C synced in %d attempt(s)\n",
2561                                   i);
2562                         return 0;
2563                 }
2564
2565                 /* Reset the sensor */
2566                 i2c_w(sd, 0x12, 0x80);
2567
2568                 /* Wait for it to initialize */
2569                 msleep(150);
2570
2571                 /* Dummy read to sync I2C */
2572                 if (i2c_r(sd, 0x00) < 0)
2573                         return -1;
2574         }
2575         return -1;
2576 }
2577
2578 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2579  * and the read slave will be set to (slave + 1).
2580  * This should not be called from outside the i2c I/O functions.
2581  * Sets I2C read and write slave IDs. Returns <0 for error
2582  */
2583 static void ov51x_set_slave_ids(struct sd *sd,
2584                                 u8 slave)
2585 {
2586         switch (sd->bridge) {
2587         case BRIDGE_OVFX2:
2588                 reg_w(sd, OVFX2_I2C_ADDR, slave);
2589                 return;
2590         case BRIDGE_W9968CF:
2591                 sd->sensor_addr = slave;
2592                 return;
2593         }
2594
2595         reg_w(sd, R51x_I2C_W_SID, slave);
2596         reg_w(sd, R51x_I2C_R_SID, slave + 1);
2597 }
2598
2599 static void write_regvals(struct sd *sd,
2600                          const struct ov_regvals *regvals,
2601                          int n)
2602 {
2603         while (--n >= 0) {
2604                 reg_w(sd, regvals->reg, regvals->val);
2605                 regvals++;
2606         }
2607 }
2608
2609 static void write_i2c_regvals(struct sd *sd,
2610                         const struct ov_i2c_regvals *regvals,
2611                         int n)
2612 {
2613         while (--n >= 0) {
2614                 i2c_w(sd, regvals->reg, regvals->val);
2615                 regvals++;
2616         }
2617 }
2618
2619 /****************************************************************************
2620  *
2621  * OV511 and sensor configuration
2622  *
2623  ***************************************************************************/
2624
2625 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2626 static void ov_hires_configure(struct sd *sd)
2627 {
2628         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2629         int high, low;
2630
2631         if (sd->bridge != BRIDGE_OVFX2) {
2632                 gspca_err(gspca_dev, "error hires sensors only supported with ovfx2\n");
2633                 return;
2634         }
2635
2636         gspca_dbg(gspca_dev, D_PROBE, "starting ov hires configuration\n");
2637
2638         /* Detect sensor (sub)type */
2639         high = i2c_r(sd, 0x0a);
2640         low = i2c_r(sd, 0x0b);
2641         /* info("%x, %x", high, low); */
2642         switch (high) {
2643         case 0x96:
2644                 switch (low) {
2645                 case 0x40:
2646                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV2610\n");
2647                         sd->sensor = SEN_OV2610;
2648                         return;
2649                 case 0x41:
2650                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV2610AE\n");
2651                         sd->sensor = SEN_OV2610AE;
2652                         return;
2653                 case 0xb1:
2654                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV9600\n");
2655                         sd->sensor = SEN_OV9600;
2656                         return;
2657                 }
2658                 break;
2659         case 0x36:
2660                 if ((low & 0x0f) == 0x00) {
2661                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV3610\n");
2662                         sd->sensor = SEN_OV3610;
2663                         return;
2664                 }
2665                 break;
2666         }
2667         gspca_err(gspca_dev, "Error unknown sensor type: %02x%02x\n",
2668                   high, low);
2669 }
2670
2671 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2672  * the same register settings as the OV8610, since they are very similar.
2673  */
2674 static void ov8xx0_configure(struct sd *sd)
2675 {
2676         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2677         int rc;
2678
2679         gspca_dbg(gspca_dev, D_PROBE, "starting ov8xx0 configuration\n");
2680
2681         /* Detect sensor (sub)type */
2682         rc = i2c_r(sd, OV7610_REG_COM_I);
2683         if (rc < 0) {
2684                 gspca_err(gspca_dev, "Error detecting sensor type\n");
2685                 return;
2686         }
2687         if ((rc & 3) == 1)
2688                 sd->sensor = SEN_OV8610;
2689         else
2690                 gspca_err(gspca_dev, "Unknown image sensor version: %d\n",
2691                           rc & 3);
2692 }
2693
2694 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2695  * the same register settings as the OV7610, since they are very similar.
2696  */
2697 static void ov7xx0_configure(struct sd *sd)
2698 {
2699         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2700         int rc, high, low;
2701
2702         gspca_dbg(gspca_dev, D_PROBE, "starting OV7xx0 configuration\n");
2703
2704         /* Detect sensor (sub)type */
2705         rc = i2c_r(sd, OV7610_REG_COM_I);
2706
2707         /* add OV7670 here
2708          * it appears to be wrongly detected as a 7610 by default */
2709         if (rc < 0) {
2710                 gspca_err(gspca_dev, "Error detecting sensor type\n");
2711                 return;
2712         }
2713         if ((rc & 3) == 3) {
2714                 /* quick hack to make OV7670s work */
2715                 high = i2c_r(sd, 0x0a);
2716                 low = i2c_r(sd, 0x0b);
2717                 /* info("%x, %x", high, low); */
2718                 if (high == 0x76 && (low & 0xf0) == 0x70) {
2719                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV76%02x\n",
2720                                   low);
2721                         sd->sensor = SEN_OV7670;
2722                 } else {
2723                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7610\n");
2724                         sd->sensor = SEN_OV7610;
2725                 }
2726         } else if ((rc & 3) == 1) {
2727                 /* I don't know what's different about the 76BE yet. */
2728                 if (i2c_r(sd, 0x15) & 1) {
2729                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7620AE\n");
2730                         sd->sensor = SEN_OV7620AE;
2731                 } else {
2732                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV76BE\n");
2733                         sd->sensor = SEN_OV76BE;
2734                 }
2735         } else if ((rc & 3) == 0) {
2736                 /* try to read product id registers */
2737                 high = i2c_r(sd, 0x0a);
2738                 if (high < 0) {
2739                         gspca_err(gspca_dev, "Error detecting camera chip PID\n");
2740                         return;
2741                 }
2742                 low = i2c_r(sd, 0x0b);
2743                 if (low < 0) {
2744                         gspca_err(gspca_dev, "Error detecting camera chip VER\n");
2745                         return;
2746                 }
2747                 if (high == 0x76) {
2748                         switch (low) {
2749                         case 0x30:
2750                                 gspca_err(gspca_dev, "Sensor is an OV7630/OV7635\n");
2751                                 gspca_err(gspca_dev, "7630 is not supported by this driver\n");
2752                                 return;
2753                         case 0x40:
2754                                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7645\n");
2755                                 sd->sensor = SEN_OV7640; /* FIXME */
2756                                 break;
2757                         case 0x45:
2758                                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7645B\n");
2759                                 sd->sensor = SEN_OV7640; /* FIXME */
2760                                 break;
2761                         case 0x48:
2762                                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7648\n");
2763                                 sd->sensor = SEN_OV7648;
2764                                 break;
2765                         case 0x60:
2766                                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV7660\n");
2767                                 sd->sensor = SEN_OV7660;
2768                                 break;
2769                         default:
2770                                 gspca_err(gspca_dev, "Unknown sensor: 0x76%02x\n",
2771                                           low);
2772                                 return;
2773                         }
2774                 } else {
2775                         gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7620\n");
2776                         sd->sensor = SEN_OV7620;
2777                 }
2778         } else {
2779                 gspca_err(gspca_dev, "Unknown image sensor version: %d\n",
2780                           rc & 3);
2781         }
2782 }
2783
2784 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2785 static void ov6xx0_configure(struct sd *sd)
2786 {
2787         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2788         int rc;
2789
2790         gspca_dbg(gspca_dev, D_PROBE, "starting OV6xx0 configuration\n");
2791
2792         /* Detect sensor (sub)type */
2793         rc = i2c_r(sd, OV7610_REG_COM_I);
2794         if (rc < 0) {
2795                 gspca_err(gspca_dev, "Error detecting sensor type\n");
2796                 return;
2797         }
2798
2799         /* Ugh. The first two bits are the version bits, but
2800          * the entire register value must be used. I guess OVT
2801          * underestimated how many variants they would make. */
2802         switch (rc) {
2803         case 0x00:
2804                 sd->sensor = SEN_OV6630;
2805                 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2806                 break;
2807         case 0x01:
2808                 sd->sensor = SEN_OV6620;
2809                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV6620\n");
2810                 break;
2811         case 0x02:
2812                 sd->sensor = SEN_OV6630;
2813                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV66308AE\n");
2814                 break;
2815         case 0x03:
2816                 sd->sensor = SEN_OV66308AF;
2817                 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV66308AF\n");
2818                 break;
2819         case 0x90:
2820                 sd->sensor = SEN_OV6630;
2821                 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2822                 break;
2823         default:
2824                 gspca_err(gspca_dev, "FATAL: Unknown sensor version: 0x%02x\n",
2825                           rc);
2826                 return;
2827         }
2828
2829         /* Set sensor-specific vars */
2830         sd->sif = 1;
2831 }
2832
2833 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2834 static void ov51x_led_control(struct sd *sd, int on)
2835 {
2836         if (sd->invert_led)
2837                 on = !on;
2838
2839         switch (sd->bridge) {
2840         /* OV511 has no LED control */
2841         case BRIDGE_OV511PLUS:
2842                 reg_w(sd, R511_SYS_LED_CTL, on);
2843                 break;
2844         case BRIDGE_OV518:
2845         case BRIDGE_OV518PLUS:
2846                 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2847                 break;
2848         case BRIDGE_OV519:
2849                 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2850                 break;
2851         }
2852 }
2853
2854 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2855 {
2856         struct sd *sd = (struct sd *) gspca_dev;
2857
2858         if (!sd->snapshot_needs_reset)
2859                 return;
2860
2861         /* Note it is important that we clear sd->snapshot_needs_reset,
2862            before actually clearing the snapshot state in the bridge
2863            otherwise we might race with the pkt_scan interrupt handler */
2864         sd->snapshot_needs_reset = 0;
2865
2866         switch (sd->bridge) {
2867         case BRIDGE_OV511:
2868         case BRIDGE_OV511PLUS:
2869                 reg_w(sd, R51x_SYS_SNAP, 0x02);
2870                 reg_w(sd, R51x_SYS_SNAP, 0x00);
2871                 break;
2872         case BRIDGE_OV518:
2873         case BRIDGE_OV518PLUS:
2874                 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2875                 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2876                 break;
2877         case BRIDGE_OV519:
2878                 reg_w(sd, R51x_SYS_RESET, 0x40);
2879                 reg_w(sd, R51x_SYS_RESET, 0x00);
2880                 break;
2881         }
2882 }
2883
2884 static void ov51x_upload_quan_tables(struct sd *sd)
2885 {
2886         static const unsigned char yQuanTable511[] = {
2887                 0, 1, 1, 2, 2, 3, 3, 4,
2888                 1, 1, 1, 2, 2, 3, 4, 4,
2889                 1, 1, 2, 2, 3, 4, 4, 4,
2890                 2, 2, 2, 3, 4, 4, 4, 4,
2891                 2, 2, 3, 4, 4, 5, 5, 5,
2892                 3, 3, 4, 4, 5, 5, 5, 5,
2893                 3, 4, 4, 4, 5, 5, 5, 5,
2894                 4, 4, 4, 4, 5, 5, 5, 5
2895         };
2896
2897         static const unsigned char uvQuanTable511[] = {
2898                 0, 2, 2, 3, 4, 4, 4, 4,
2899                 2, 2, 2, 4, 4, 4, 4, 4,
2900                 2, 2, 3, 4, 4, 4, 4, 4,
2901                 3, 4, 4, 4, 4, 4, 4, 4,
2902                 4, 4, 4, 4, 4, 4, 4, 4,
2903                 4, 4, 4, 4, 4, 4, 4, 4,
2904                 4, 4, 4, 4, 4, 4, 4, 4,
2905                 4, 4, 4, 4, 4, 4, 4, 4
2906         };
2907
2908         /* OV518 quantization tables are 8x4 (instead of 8x8) */
2909         static const unsigned char yQuanTable518[] = {
2910                 5, 4, 5, 6, 6, 7, 7, 7,
2911                 5, 5, 5, 5, 6, 7, 7, 7,
2912                 6, 6, 6, 6, 7, 7, 7, 8,
2913                 7, 7, 6, 7, 7, 7, 8, 8
2914         };
2915         static const unsigned char uvQuanTable518[] = {
2916                 6, 6, 6, 7, 7, 7, 7, 7,
2917                 6, 6, 6, 7, 7, 7, 7, 7,
2918                 6, 6, 6, 7, 7, 7, 7, 8,
2919                 7, 7, 7, 7, 7, 7, 8, 8
2920         };
2921
2922         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2923         const unsigned char *pYTable, *pUVTable;
2924         unsigned char val0, val1;
2925         int i, size, reg = R51x_COMP_LUT_BEGIN;
2926
2927         gspca_dbg(gspca_dev, D_PROBE, "Uploading quantization tables\n");
2928
2929         if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2930                 pYTable = yQuanTable511;
2931                 pUVTable = uvQuanTable511;
2932                 size = 32;
2933         } else {
2934                 pYTable = yQuanTable518;
2935                 pUVTable = uvQuanTable518;
2936                 size = 16;
2937         }
2938
2939         for (i = 0; i < size; i++) {
2940                 val0 = *pYTable++;
2941                 val1 = *pYTable++;
2942                 val0 &= 0x0f;
2943                 val1 &= 0x0f;
2944                 val0 |= val1 << 4;
2945                 reg_w(sd, reg, val0);
2946
2947                 val0 = *pUVTable++;
2948                 val1 = *pUVTable++;
2949                 val0 &= 0x0f;
2950                 val1 &= 0x0f;
2951                 val0 |= val1 << 4;
2952                 reg_w(sd, reg + size, val0);
2953
2954                 reg++;
2955         }
2956 }
2957
2958 /* This initializes the OV511/OV511+ and the sensor */
2959 static void ov511_configure(struct gspca_dev *gspca_dev)
2960 {
2961         struct sd *sd = (struct sd *) gspca_dev;
2962
2963         /* For 511 and 511+ */
2964         static const struct ov_regvals init_511[] = {
2965                 { R51x_SYS_RESET,       0x7f },
2966                 { R51x_SYS_INIT,        0x01 },
2967                 { R51x_SYS_RESET,       0x7f },
2968                 { R51x_SYS_INIT,        0x01 },
2969                 { R51x_SYS_RESET,       0x3f },
2970                 { R51x_SYS_INIT,        0x01 },
2971                 { R51x_SYS_RESET,       0x3d },
2972         };
2973
2974         static const struct ov_regvals norm_511[] = {
2975                 { R511_DRAM_FLOW_CTL,   0x01 },
2976                 { R51x_SYS_SNAP,        0x00 },
2977                 { R51x_SYS_SNAP,        0x02 },
2978                 { R51x_SYS_SNAP,        0x00 },
2979                 { R511_FIFO_OPTS,       0x1f },
2980                 { R511_COMP_EN,         0x00 },
2981                 { R511_COMP_LUT_EN,     0x03 },
2982         };
2983
2984         static const struct ov_regvals norm_511_p[] = {
2985                 { R511_DRAM_FLOW_CTL,   0xff },
2986                 { R51x_SYS_SNAP,        0x00 },
2987                 { R51x_SYS_SNAP,        0x02 },
2988                 { R51x_SYS_SNAP,        0x00 },
2989                 { R511_FIFO_OPTS,       0xff },
2990                 { R511_COMP_EN,         0x00 },
2991                 { R511_COMP_LUT_EN,     0x03 },
2992         };
2993
2994         static const struct ov_regvals compress_511[] = {
2995                 { 0x70, 0x1f },
2996                 { 0x71, 0x05 },
2997                 { 0x72, 0x06 },
2998                 { 0x73, 0x06 },
2999                 { 0x74, 0x14 },
3000                 { 0x75, 0x03 },
3001                 { 0x76, 0x04 },
3002                 { 0x77, 0x04 },
3003         };
3004
3005         gspca_dbg(gspca_dev, D_PROBE, "Device custom id %x\n",
3006                   reg_r(sd, R51x_SYS_CUST_ID));
3007
3008         write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3009
3010         switch (sd->bridge) {
3011         case BRIDGE_OV511:
3012                 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3013                 break;
3014         case BRIDGE_OV511PLUS:
3015                 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3016                 break;
3017         }
3018
3019         /* Init compression */
3020         write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3021
3022         ov51x_upload_quan_tables(sd);
3023 }
3024
3025 /* This initializes the OV518/OV518+ and the sensor */
3026 static void ov518_configure(struct gspca_dev *gspca_dev)
3027 {
3028         struct sd *sd = (struct sd *) gspca_dev;
3029
3030         /* For 518 and 518+ */
3031         static const struct ov_regvals init_518[] = {
3032                 { R51x_SYS_RESET,       0x40 },
3033                 { R51x_SYS_INIT,        0xe1 },
3034                 { R51x_SYS_RESET,       0x3e },
3035                 { R51x_SYS_INIT,        0xe1 },
3036                 { R51x_SYS_RESET,       0x00 },
3037                 { R51x_SYS_INIT,        0xe1 },
3038                 { 0x46,                 0x00 },
3039                 { 0x5d,                 0x03 },
3040         };
3041
3042         static const struct ov_regvals norm_518[] = {
3043                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3044                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3045                 { 0x31,                 0x0f },
3046                 { 0x5d,                 0x03 },
3047                 { 0x24,                 0x9f },
3048                 { 0x25,                 0x90 },
3049                 { 0x20,                 0x00 },
3050                 { 0x51,                 0x04 },
3051                 { 0x71,                 0x19 },
3052                 { 0x2f,                 0x80 },
3053         };
3054
3055         static const struct ov_regvals norm_518_p[] = {
3056                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3057                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3058                 { 0x31,                 0x0f },
3059                 { 0x5d,                 0x03 },
3060                 { 0x24,                 0x9f },
3061                 { 0x25,                 0x90 },
3062                 { 0x20,                 0x60 },
3063                 { 0x51,                 0x02 },
3064                 { 0x71,                 0x19 },
3065                 { 0x40,                 0xff },
3066                 { 0x41,                 0x42 },
3067                 { 0x46,                 0x00 },
3068                 { 0x33,                 0x04 },
3069                 { 0x21,                 0x19 },
3070                 { 0x3f,                 0x10 },
3071                 { 0x2f,                 0x80 },
3072         };
3073
3074         /* First 5 bits of custom ID reg are a revision ID on OV518 */
3075         sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3076         gspca_dbg(gspca_dev, D_PROBE, "Device revision %d\n", sd->revision);
3077
3078         write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3079
3080         /* Set LED GPIO pin to output mode */
3081         reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3082
3083         switch (sd->bridge) {
3084         case BRIDGE_OV518:
3085                 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3086                 break;
3087         case BRIDGE_OV518PLUS:
3088                 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3089                 break;
3090         }
3091
3092         ov51x_upload_quan_tables(sd);
3093
3094         reg_w(sd, 0x2f, 0x80);
3095 }
3096
3097 static void ov519_configure(struct sd *sd)
3098 {
3099         static const struct ov_regvals init_519[] = {
3100                 { 0x5a, 0x6d }, /* EnableSystem */
3101                 { 0x53, 0x9b }, /* don't enable the microcontroller */
3102                 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3103                 { 0x5d, 0x03 },
3104                 { 0x49, 0x01 },
3105                 { 0x48, 0x00 },
3106                 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3107                  * detection will fail. This deserves further investigation. */
3108                 { OV519_GPIO_IO_CTRL0,   0xee },
3109                 { OV519_R51_RESET1, 0x0f },
3110                 { OV519_R51_RESET1, 0x00 },
3111                 { 0x22, 0x00 },
3112                 /* windows reads 0x55 at this point*/
3113         };
3114
3115         write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3116 }
3117
3118 static void ovfx2_configure(struct sd *sd)
3119 {
3120         static const struct ov_regvals init_fx2[] = {
3121                 { 0x00, 0x60 },
3122                 { 0x02, 0x01 },
3123                 { 0x0f, 0x1d },
3124                 { 0xe9, 0x82 },
3125                 { 0xea, 0xc7 },
3126                 { 0xeb, 0x10 },
3127                 { 0xec, 0xf6 },
3128         };
3129
3130         sd->stopped = 1;
3131
3132         write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3133 }
3134
3135 /* set the mode */
3136 /* This function works for ov7660 only */
3137 static void ov519_set_mode(struct sd *sd)
3138 {
3139         static const struct ov_regvals bridge_ov7660[2][10] = {
3140                 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3141                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3142                  {0x25, 0x01}, {0x26, 0x00}},
3143                 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3144                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3145                  {0x25, 0x03}, {0x26, 0x00}}
3146         };
3147         static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3148                 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3149                 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3150         };
3151         static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3152                 {OV7670_R17_HSTART, 0x13},
3153                 {OV7670_R18_HSTOP, 0x01},
3154                 {OV7670_R32_HREF, 0x92},
3155                 {OV7670_R19_VSTART, 0x02},
3156                 {OV7670_R1A_VSTOP, 0x7a},
3157                 {OV7670_R03_VREF, 0x00},
3158 /*              {0x33, 0x00}, */
3159 /*              {0x34, 0x07}, */
3160 /*              {0x36, 0x00}, */
3161 /*              {0x6b, 0x0a}, */
3162         };
3163
3164         write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3165                         ARRAY_SIZE(bridge_ov7660[0]));
3166         write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3167                         ARRAY_SIZE(sensor_ov7660[0]));
3168         write_i2c_regvals(sd, sensor_ov7660_2,
3169                         ARRAY_SIZE(sensor_ov7660_2));
3170 }
3171
3172 /* set the frame rate */
3173 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3174 static void ov519_set_fr(struct sd *sd)
3175 {
3176         int fr;
3177         u8 clock;
3178         /* frame rate table with indices:
3179          *      - mode = 0: 320x240, 1: 640x480
3180          *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3181          *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3182          */
3183         static const u8 fr_tb[2][6][3] = {
3184                 {{0x04, 0xff, 0x00},
3185                  {0x04, 0x1f, 0x00},
3186                  {0x04, 0x1b, 0x00},
3187                  {0x04, 0x15, 0x00},
3188                  {0x04, 0x09, 0x00},
3189                  {0x04, 0x01, 0x00}},
3190                 {{0x0c, 0xff, 0x00},
3191                  {0x0c, 0x1f, 0x00},
3192                  {0x0c, 0x1b, 0x00},
3193                  {0x04, 0xff, 0x01},
3194                  {0x04, 0x1f, 0x01},
3195                  {0x04, 0x1b, 0x01}},
3196         };
3197
3198         if (frame_rate > 0)
3199                 sd->frame_rate = frame_rate;
3200         if (sd->frame_rate >= 30)
3201                 fr = 0;
3202         else if (sd->frame_rate >= 25)
3203                 fr = 1;
3204         else if (sd->frame_rate >= 20)
3205                 fr = 2;
3206         else if (sd->frame_rate >= 15)
3207                 fr = 3;
3208         else if (sd->frame_rate >= 10)
3209                 fr = 4;
3210         else
3211                 fr = 5;
3212         reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3213         reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3214         clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3215         if (sd->sensor == SEN_OV7660)
3216                 clock |= 0x80;          /* enable double clock */
3217         ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3218 }
3219
3220 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3221 {
3222         struct sd *sd = (struct sd *) gspca_dev;
3223
3224         i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3225 }
3226
3227 /* this function is called at probe time */
3228 static int sd_config(struct gspca_dev *gspca_dev,
3229                         const struct usb_device_id *id)
3230 {
3231         struct sd *sd = (struct sd *) gspca_dev;
3232         struct cam *cam = &gspca_dev->cam;
3233
3234         sd->bridge = id->driver_info & BRIDGE_MASK;
3235         sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3236
3237         switch (sd->bridge) {
3238         case BRIDGE_OV511:
3239         case BRIDGE_OV511PLUS:
3240                 cam->cam_mode = ov511_vga_mode;
3241                 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3242                 break;
3243         case BRIDGE_OV518:
3244         case BRIDGE_OV518PLUS:
3245                 cam->cam_mode = ov518_vga_mode;
3246                 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3247                 break;
3248         case BRIDGE_OV519:
3249                 cam->cam_mode = ov519_vga_mode;
3250                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3251                 break;
3252         case BRIDGE_OVFX2:
3253                 cam->cam_mode = ov519_vga_mode;
3254                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3255                 cam->bulk_size = OVFX2_BULK_SIZE;
3256                 cam->bulk_nurbs = MAX_NURBS;
3257                 cam->bulk = 1;
3258                 break;
3259         case BRIDGE_W9968CF:
3260                 cam->cam_mode = w9968cf_vga_mode;
3261                 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3262                 break;
3263         }
3264
3265         sd->frame_rate = 15;
3266
3267         return 0;
3268 }
3269
3270 /* this function is called at probe and resume time */
3271 static int sd_init(struct gspca_dev *gspca_dev)
3272 {
3273         struct sd *sd = (struct sd *) gspca_dev;
3274         struct cam *cam = &gspca_dev->cam;
3275
3276         switch (sd->bridge) {
3277         case BRIDGE_OV511:
3278         case BRIDGE_OV511PLUS:
3279                 ov511_configure(gspca_dev);
3280                 break;
3281         case BRIDGE_OV518:
3282         case BRIDGE_OV518PLUS:
3283                 ov518_configure(gspca_dev);
3284                 break;
3285         case BRIDGE_OV519:
3286                 ov519_configure(sd);
3287                 break;
3288         case BRIDGE_OVFX2:
3289                 ovfx2_configure(sd);
3290                 break;
3291         case BRIDGE_W9968CF:
3292                 w9968cf_configure(sd);
3293                 break;
3294         }
3295
3296         /* The OV519 must be more aggressive about sensor detection since
3297          * I2C write will never fail if the sensor is not present. We have
3298          * to try to initialize the sensor to detect its presence */
3299         sd->sensor = -1;
3300
3301         /* Test for 76xx */
3302         if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3303                 ov7xx0_configure(sd);
3304
3305         /* Test for 6xx0 */
3306         } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3307                 ov6xx0_configure(sd);
3308
3309         /* Test for 8xx0 */
3310         } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3311                 ov8xx0_configure(sd);
3312
3313         /* Test for 3xxx / 2xxx */
3314         } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3315                 ov_hires_configure(sd);
3316         } else {
3317                 gspca_err(gspca_dev, "Can't determine sensor slave IDs\n");
3318                 goto error;
3319         }
3320
3321         if (sd->sensor < 0)
3322                 goto error;
3323
3324         ov51x_led_control(sd, 0);       /* turn LED off */
3325
3326         switch (sd->bridge) {
3327         case BRIDGE_OV511:
3328         case BRIDGE_OV511PLUS:
3329                 if (sd->sif) {
3330                         cam->cam_mode = ov511_sif_mode;
3331                         cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3332                 }
3333                 break;
3334         case BRIDGE_OV518:
3335         case BRIDGE_OV518PLUS:
3336                 if (sd->sif) {
3337                         cam->cam_mode = ov518_sif_mode;
3338                         cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3339                 }
3340                 break;
3341         case BRIDGE_OV519:
3342                 if (sd->sif) {
3343                         cam->cam_mode = ov519_sif_mode;
3344                         cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3345                 }
3346                 break;
3347         case BRIDGE_OVFX2:
3348                 switch (sd->sensor) {
3349                 case SEN_OV2610:
3350                 case SEN_OV2610AE:
3351                         cam->cam_mode = ovfx2_ov2610_mode;
3352                         cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3353                         break;
3354                 case SEN_OV3610:
3355                         cam->cam_mode = ovfx2_ov3610_mode;
3356                         cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3357                         break;
3358                 case SEN_OV9600:
3359                         cam->cam_mode = ovfx2_ov9600_mode;
3360                         cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3361                         break;
3362                 default:
3363                         if (sd->sif) {
3364                                 cam->cam_mode = ov519_sif_mode;
3365                                 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3366                         }
3367                         break;
3368                 }
3369                 break;
3370         case BRIDGE_W9968CF:
3371                 if (sd->sif)
3372                         cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3373
3374                 /* w9968cf needs initialisation once the sensor is known */
3375                 w9968cf_init(sd);
3376                 break;
3377         }
3378
3379         /* initialize the sensor */
3380         switch (sd->sensor) {
3381         case SEN_OV2610:
3382                 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3383
3384                 /* Enable autogain, autoexpo, awb, bandfilter */
3385                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3386                 break;
3387         case SEN_OV2610AE:
3388                 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3389
3390                 /* enable autoexpo */
3391                 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3392                 break;
3393         case SEN_OV3610:
3394                 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3395
3396                 /* Enable autogain, autoexpo, awb, bandfilter */
3397                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3398                 break;
3399         case SEN_OV6620:
3400                 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3401                 break;
3402         case SEN_OV6630:
3403         case SEN_OV66308AF:
3404                 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3405                 break;
3406         default:
3407 /*      case SEN_OV7610: */
3408 /*      case SEN_OV76BE: */
3409                 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3410                 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3411                 break;
3412         case SEN_OV7620:
3413         case SEN_OV7620AE:
3414                 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3415                 break;
3416         case SEN_OV7640:
3417         case SEN_OV7648:
3418                 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3419                 break;
3420         case SEN_OV7660:
3421                 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3422                 msleep(14);
3423                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3424                 write_regvals(sd, init_519_ov7660,
3425                                 ARRAY_SIZE(init_519_ov7660));
3426                 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3427                 sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3428                 ov519_set_mode(sd);
3429                 ov519_set_fr(sd);
3430                 sd_reset_snapshot(gspca_dev);
3431                 ov51x_restart(sd);
3432                 ov51x_stop(sd);                 /* not in win traces */
3433                 ov51x_led_control(sd, 0);
3434                 break;
3435         case SEN_OV7670:
3436                 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3437                 break;
3438         case SEN_OV8610:
3439                 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3440                 break;
3441         case SEN_OV9600:
3442                 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3443
3444                 /* enable autoexpo */
3445 /*              i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3446                 break;
3447         }
3448         return gspca_dev->usb_err;
3449 error:
3450         gspca_err(gspca_dev, "OV519 Config failed\n");
3451         return -EINVAL;
3452 }
3453
3454 /* function called at start time before URB creation */
3455 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3456 {
3457         struct sd *sd = (struct sd *) gspca_dev;
3458
3459         switch (sd->bridge) {
3460         case BRIDGE_OVFX2:
3461                 if (gspca_dev->pixfmt.width != 800)
3462                         gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3463                 else
3464                         gspca_dev->cam.bulk_size = 7 * 4096;
3465                 break;
3466         }
3467         return 0;
3468 }
3469
3470 /* Set up the OV511/OV511+ with the given image parameters.
3471  *
3472  * Do not put any sensor-specific code in here (including I2C I/O functions)
3473  */
3474 static void ov511_mode_init_regs(struct sd *sd)
3475 {
3476         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3477         int hsegs, vsegs, packet_size, fps, needed;
3478         int interlaced = 0;
3479         struct usb_host_interface *alt;
3480         struct usb_interface *intf;
3481
3482         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3483         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3484         if (!alt) {
3485                 gspca_err(gspca_dev, "Couldn't get altsetting\n");
3486                 sd->gspca_dev.usb_err = -EIO;
3487                 return;
3488         }
3489
3490         if (alt->desc.bNumEndpoints < 1) {
3491                 sd->gspca_dev.usb_err = -ENODEV;
3492                 return;
3493         }
3494
3495         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3496         reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3497
3498         reg_w(sd, R511_CAM_UV_EN, 0x01);
3499         reg_w(sd, R511_SNAP_UV_EN, 0x01);
3500         reg_w(sd, R511_SNAP_OPTS, 0x03);
3501
3502         /* Here I'm assuming that snapshot size == image size.
3503          * I hope that's always true. --claudio
3504          */
3505         hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3506         vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3507
3508         reg_w(sd, R511_CAM_PXCNT, hsegs);
3509         reg_w(sd, R511_CAM_LNCNT, vsegs);
3510         reg_w(sd, R511_CAM_PXDIV, 0x00);
3511         reg_w(sd, R511_CAM_LNDIV, 0x00);
3512
3513         /* YUV420, low pass filter on */
3514         reg_w(sd, R511_CAM_OPTS, 0x03);
3515
3516         /* Snapshot additions */
3517         reg_w(sd, R511_SNAP_PXCNT, hsegs);
3518         reg_w(sd, R511_SNAP_LNCNT, vsegs);
3519         reg_w(sd, R511_SNAP_PXDIV, 0x00);
3520         reg_w(sd, R511_SNAP_LNDIV, 0x00);
3521
3522         /******** Set the framerate ********/
3523         if (frame_rate > 0)
3524                 sd->frame_rate = frame_rate;
3525
3526         switch (sd->sensor) {
3527         case SEN_OV6620:
3528                 /* No framerate control, doesn't like higher rates yet */
3529                 sd->clockdiv = 3;
3530                 break;
3531
3532         /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3533            for more sensors we need to do this for them too */
3534         case SEN_OV7620:
3535         case SEN_OV7620AE:
3536         case SEN_OV7640:
3537         case SEN_OV7648:
3538         case SEN_OV76BE:
3539                 if (sd->gspca_dev.pixfmt.width == 320)
3540                         interlaced = 1;
3541                 /* Fall through */
3542         case SEN_OV6630:
3543         case SEN_OV7610:
3544         case SEN_OV7670:
3545                 switch (sd->frame_rate) {
3546                 case 30:
3547                 case 25:
3548                         /* Not enough bandwidth to do 640x480 @ 30 fps */
3549                         if (sd->gspca_dev.pixfmt.width != 640) {
3550                                 sd->clockdiv = 0;
3551                                 break;
3552                         }
3553                         /* For 640x480 case */
3554                         /* fall through */
3555                 default:
3556 /*              case 20: */
3557 /*              case 15: */
3558                         sd->clockdiv = 1;
3559                         break;
3560                 case 10:
3561                         sd->clockdiv = 2;
3562                         break;
3563                 case 5:
3564                         sd->clockdiv = 5;
3565                         break;
3566                 }
3567                 if (interlaced) {
3568                         sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3569                         /* Higher then 10 does not work */
3570                         if (sd->clockdiv > 10)
3571                                 sd->clockdiv = 10;
3572                 }
3573                 break;
3574
3575         case SEN_OV8610:
3576                 /* No framerate control ?? */
3577                 sd->clockdiv = 0;
3578                 break;
3579         }
3580
3581         /* Check if we have enough bandwidth to disable compression */
3582         fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3583         needed = fps * sd->gspca_dev.pixfmt.width *
3584                         sd->gspca_dev.pixfmt.height * 3 / 2;
3585         /* 1000 isoc packets/sec */
3586         if (needed > 1000 * packet_size) {
3587                 /* Enable Y and UV quantization and compression */
3588                 reg_w(sd, R511_COMP_EN, 0x07);
3589                 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3590         } else {
3591                 reg_w(sd, R511_COMP_EN, 0x06);
3592                 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3593         }
3594
3595         reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3596         reg_w(sd, R51x_SYS_RESET, 0);
3597 }
3598
3599 /* Sets up the OV518/OV518+ with the given image parameters
3600  *
3601  * OV518 needs a completely different approach, until we can figure out what
3602  * the individual registers do. Also, only 15 FPS is supported now.
3603  *
3604  * Do not put any sensor-specific code in here (including I2C I/O functions)
3605  */
3606 static void ov518_mode_init_regs(struct sd *sd)
3607 {
3608         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3609         int hsegs, vsegs, packet_size;
3610         struct usb_host_interface *alt;
3611         struct usb_interface *intf;
3612
3613         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3614         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3615         if (!alt) {
3616                 gspca_err(gspca_dev, "Couldn't get altsetting\n");
3617                 sd->gspca_dev.usb_err = -EIO;
3618                 return;
3619         }
3620
3621         if (alt->desc.bNumEndpoints < 1) {
3622                 sd->gspca_dev.usb_err = -ENODEV;
3623                 return;
3624         }
3625
3626         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3627         ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3628
3629         /******** Set the mode ********/
3630         reg_w(sd, 0x2b, 0);
3631         reg_w(sd, 0x2c, 0);
3632         reg_w(sd, 0x2d, 0);
3633         reg_w(sd, 0x2e, 0);
3634         reg_w(sd, 0x3b, 0);
3635         reg_w(sd, 0x3c, 0);
3636         reg_w(sd, 0x3d, 0);
3637         reg_w(sd, 0x3e, 0);
3638
3639         if (sd->bridge == BRIDGE_OV518) {
3640                 /* Set 8-bit (YVYU) input format */
3641                 reg_w_mask(sd, 0x20, 0x08, 0x08);
3642
3643                 /* Set 12-bit (4:2:0) output format */
3644                 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3645                 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3646         } else {
3647                 reg_w(sd, 0x28, 0x80);
3648                 reg_w(sd, 0x38, 0x80);
3649         }
3650
3651         hsegs = sd->gspca_dev.pixfmt.width / 16;
3652         vsegs = sd->gspca_dev.pixfmt.height / 4;
3653
3654         reg_w(sd, 0x29, hsegs);
3655         reg_w(sd, 0x2a, vsegs);
3656
3657         reg_w(sd, 0x39, hsegs);
3658         reg_w(sd, 0x3a, vsegs);
3659
3660         /* Windows driver does this here; who knows why */
3661         reg_w(sd, 0x2f, 0x80);
3662
3663         /******** Set the framerate ********/
3664         if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3665                                               sd->sensor == SEN_OV7620AE)
3666                 sd->clockdiv = 0;
3667         else
3668                 sd->clockdiv = 1;
3669
3670         /* Mode independent, but framerate dependent, regs */
3671         /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3672         reg_w(sd, 0x51, 0x04);
3673         reg_w(sd, 0x22, 0x18);
3674         reg_w(sd, 0x23, 0xff);
3675
3676         if (sd->bridge == BRIDGE_OV518PLUS) {
3677                 switch (sd->sensor) {
3678                 case SEN_OV7620AE:
3679                         /*
3680                          * HdG: 640x480 needs special handling on device
3681                          * revision 2, we check for device revison > 0 to
3682                          * avoid regressions, as we don't know the correct
3683                          * thing todo for revision 1.
3684                          *
3685                          * Also this likely means we don't need to
3686                          * differentiate between the OV7620 and OV7620AE,
3687                          * earlier testing hitting this same problem likely
3688                          * happened to be with revision < 2 cams using an
3689                          * OV7620 and revision 2 cams using an OV7620AE.
3690                          */
3691                         if (sd->revision > 0 &&
3692                                         sd->gspca_dev.pixfmt.width == 640) {
3693                                 reg_w(sd, 0x20, 0x60);
3694                                 reg_w(sd, 0x21, 0x1f);
3695                         } else {
3696                                 reg_w(sd, 0x20, 0x00);
3697                                 reg_w(sd, 0x21, 0x19);
3698                         }
3699                         break;
3700                 case SEN_OV7620:
3701                         reg_w(sd, 0x20, 0x00);
3702                         reg_w(sd, 0x21, 0x19);
3703                         break;
3704                 default:
3705                         reg_w(sd, 0x21, 0x19);
3706                 }
3707         } else
3708                 reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3709
3710         /* FIXME: Sensor-specific */
3711         /* Bit 5 is what matters here. Of course, it is "reserved" */
3712         i2c_w(sd, 0x54, 0x23);
3713
3714         reg_w(sd, 0x2f, 0x80);
3715
3716         if (sd->bridge == BRIDGE_OV518PLUS) {
3717                 reg_w(sd, 0x24, 0x94);
3718                 reg_w(sd, 0x25, 0x90);
3719                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3720                 ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3721                 ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3722                 ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3723                 ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3724                 ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3725                 ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3726                 ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3727                 ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3728         } else {
3729                 reg_w(sd, 0x24, 0x9f);
3730                 reg_w(sd, 0x25, 0x90);
3731                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3732                 ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3733                 ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3734                 ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3735                 ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3736                 ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3737                 ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3738                 ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3739                 ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3740         }
3741
3742         reg_w(sd, 0x2f, 0x80);
3743 }
3744
3745 /* Sets up the OV519 with the given image parameters
3746  *
3747  * OV519 needs a completely different approach, until we can figure out what
3748  * the individual registers do.
3749  *
3750  * Do not put any sensor-specific code in here (including I2C I/O functions)
3751  */
3752 static void ov519_mode_init_regs(struct sd *sd)
3753 {
3754         static const struct ov_regvals mode_init_519_ov7670[] = {
3755                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3756                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3757                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3758                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3759                 { 0xa3, 0x18 },
3760                 { 0xa4, 0x04 },
3761                 { 0xa5, 0x28 },
3762                 { 0x37, 0x00 }, /* SetUsbInit */
3763                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3764                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3765                 { 0x20, 0x0c },
3766                 { 0x21, 0x38 },
3767                 { 0x22, 0x1d },
3768                 { 0x17, 0x50 }, /* undocumented */
3769                 { 0x37, 0x00 }, /* undocumented */
3770                 { 0x40, 0xff }, /* I2C timeout counter */
3771                 { 0x46, 0x00 }, /* I2C clock prescaler */
3772                 { 0x59, 0x04 }, /* new from windrv 090403 */
3773                 { 0xff, 0x00 }, /* undocumented */
3774                 /* windows reads 0x55 at this point, why? */
3775         };
3776
3777         static const struct ov_regvals mode_init_519[] = {
3778                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3779                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3780                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3781                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3782                 { 0xa3, 0x18 },
3783                 { 0xa4, 0x04 },
3784                 { 0xa5, 0x28 },
3785                 { 0x37, 0x00 }, /* SetUsbInit */
3786                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3787                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3788                 { 0x22, 0x1d },
3789                 { 0x17, 0x50 }, /* undocumented */
3790                 { 0x37, 0x00 }, /* undocumented */
3791                 { 0x40, 0xff }, /* I2C timeout counter */
3792                 { 0x46, 0x00 }, /* I2C clock prescaler */
3793                 { 0x59, 0x04 }, /* new from windrv 090403 */
3794                 { 0xff, 0x00 }, /* undocumented */
3795                 /* windows reads 0x55 at this point, why? */
3796         };
3797
3798         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3799
3800         /******** Set the mode ********/
3801         switch (sd->sensor) {
3802         default:
3803                 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3804                 if (sd->sensor == SEN_OV7640 ||
3805                     sd->sensor == SEN_OV7648) {
3806                         /* Select 8-bit input mode */
3807                         reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3808                 }
3809                 break;
3810         case SEN_OV7660:
3811                 return;         /* done by ov519_set_mode/fr() */
3812         case SEN_OV7670:
3813                 write_regvals(sd, mode_init_519_ov7670,
3814                                 ARRAY_SIZE(mode_init_519_ov7670));
3815                 break;
3816         }
3817
3818         reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.pixfmt.width >> 4);
3819         reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.pixfmt.height >> 3);
3820         if (sd->sensor == SEN_OV7670 &&
3821             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3822                 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3823         else if (sd->sensor == SEN_OV7648 &&
3824             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3825                 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3826         else
3827                 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3828         reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3829         reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3830         reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3831         reg_w(sd, OV519_R16_DIVIDER,    0x00);
3832         reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3833         reg_w(sd, 0x26,                 0x00); /* Undocumented */
3834
3835         /******** Set the framerate ********/
3836         if (frame_rate > 0)
3837                 sd->frame_rate = frame_rate;
3838
3839 /* FIXME: These are only valid at the max resolution. */
3840         sd->clockdiv = 0;
3841         switch (sd->sensor) {
3842         case SEN_OV7640:
3843         case SEN_OV7648:
3844                 switch (sd->frame_rate) {
3845                 default:
3846 /*              case 30: */
3847                         reg_w(sd, 0xa4, 0x0c);
3848                         reg_w(sd, 0x23, 0xff);
3849                         break;
3850                 case 25:
3851                         reg_w(sd, 0xa4, 0x0c);
3852                         reg_w(sd, 0x23, 0x1f);
3853                         break;
3854                 case 20:
3855                         reg_w(sd, 0xa4, 0x0c);
3856                         reg_w(sd, 0x23, 0x1b);
3857                         break;
3858                 case 15:
3859                         reg_w(sd, 0xa4, 0x04);
3860                         reg_w(sd, 0x23, 0xff);
3861                         sd->clockdiv = 1;
3862                         break;
3863                 case 10:
3864                         reg_w(sd, 0xa4, 0x04);
3865                         reg_w(sd, 0x23, 0x1f);
3866                         sd->clockdiv = 1;
3867                         break;
3868                 case 5:
3869                         reg_w(sd, 0xa4, 0x04);
3870                         reg_w(sd, 0x23, 0x1b);
3871                         sd->clockdiv = 1;
3872                         break;
3873                 }
3874                 break;
3875         case SEN_OV8610:
3876                 switch (sd->frame_rate) {
3877                 default:        /* 15 fps */
3878 /*              case 15: */
3879                         reg_w(sd, 0xa4, 0x06);
3880                         reg_w(sd, 0x23, 0xff);
3881                         break;
3882                 case 10:
3883                         reg_w(sd, 0xa4, 0x06);
3884                         reg_w(sd, 0x23, 0x1f);
3885                         break;
3886                 case 5:
3887                         reg_w(sd, 0xa4, 0x06);
3888                         reg_w(sd, 0x23, 0x1b);
3889                         break;
3890                 }
3891                 break;
3892         case SEN_OV7670:                /* guesses, based on 7640 */
3893                 gspca_dbg(gspca_dev, D_STREAM, "Setting framerate to %d fps\n",
3894                           (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3895                 reg_w(sd, 0xa4, 0x10);
3896                 switch (sd->frame_rate) {
3897                 case 30:
3898                         reg_w(sd, 0x23, 0xff);
3899                         break;
3900                 case 20:
3901                         reg_w(sd, 0x23, 0x1b);
3902                         break;
3903                 default:
3904 /*              case 15: */
3905                         reg_w(sd, 0x23, 0xff);
3906                         sd->clockdiv = 1;
3907                         break;
3908                 }
3909                 break;
3910         }
3911 }
3912
3913 static void mode_init_ov_sensor_regs(struct sd *sd)
3914 {
3915         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3916         int qvga, xstart, xend, ystart, yend;
3917         u8 v;
3918
3919         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3920
3921         /******** Mode (VGA/QVGA) and sensor specific regs ********/
3922         switch (sd->sensor) {
3923         case SEN_OV2610:
3924                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3925                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3926                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3927                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3928                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3929                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3930                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3931                 return;
3932         case SEN_OV2610AE: {
3933                 u8 v;
3934
3935                 /* frame rates:
3936                  *      10fps / 5 fps for 1600x1200
3937                  *      40fps / 20fps for 800x600
3938                  */
3939                 v = 80;
3940                 if (qvga) {
3941                         if (sd->frame_rate < 25)
3942                                 v = 0x81;
3943                 } else {
3944                         if (sd->frame_rate < 10)
3945                                 v = 0x81;
3946                 }
3947                 i2c_w(sd, 0x11, v);
3948                 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3949                 return;
3950             }
3951         case SEN_OV3610:
3952                 if (qvga) {
3953                         xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3954                                 (0x1f << 4);
3955                         ystart = (776 - gspca_dev->pixfmt.height) / 2;
3956                 } else {
3957                         xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3958                                 (0x10 << 4);
3959                         ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3960                 }
3961                 xend = xstart + gspca_dev->pixfmt.width;
3962                 yend = ystart + gspca_dev->pixfmt.height;
3963                 /* Writing to the COMH register resets the other windowing regs
3964                    to their default values, so we must do this first. */
3965                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3966                 i2c_w_mask(sd, 0x32,
3967                            (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3968                            0x3f);
3969                 i2c_w_mask(sd, 0x03,
3970                            (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3971                            0x0f);
3972                 i2c_w(sd, 0x17, xstart >> 4);
3973                 i2c_w(sd, 0x18, xend >> 4);
3974                 i2c_w(sd, 0x19, ystart >> 3);
3975                 i2c_w(sd, 0x1a, yend >> 3);
3976                 return;
3977         case SEN_OV8610:
3978                 /* For OV8610 qvga means qsvga */
3979                 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3980                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3981                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3982                 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3983                 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3984                 break;
3985         case SEN_OV7610:
3986                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3987                 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3988                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3989                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3990                 break;
3991         case SEN_OV7620:
3992         case SEN_OV7620AE:
3993         case SEN_OV76BE:
3994                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3995                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3996                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3997                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3998                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3999                 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
4000                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4001                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4002                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4003                 if (sd->sensor == SEN_OV76BE)
4004                         i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4005                 break;
4006         case SEN_OV7640:
4007         case SEN_OV7648:
4008                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4009                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4010                 /* Setting this undocumented bit in qvga mode removes a very
4011                    annoying vertical shaking of the image */
4012                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4013                 /* Unknown */
4014                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4015                 /* Allow higher automatic gain (to allow higher framerates) */
4016                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4017                 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4018                 break;
4019         case SEN_OV7670:
4020                 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4021                  * do we need to set anything else?
4022                  *      HSTART etc are set in set_ov_sensor_window itself */
4023                 i2c_w_mask(sd, OV7670_R12_COM7,
4024                          qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4025                          OV7670_COM7_FMT_MASK);
4026                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4027                 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4028                                 OV7670_COM8_AWB);
4029                 if (qvga) {             /* QVGA from ov7670.c by
4030                                          * Jonathan Corbet */
4031                         xstart = 164;
4032                         xend = 28;
4033                         ystart = 14;
4034                         yend = 494;
4035                 } else {                /* VGA */
4036                         xstart = 158;
4037                         xend = 14;
4038                         ystart = 10;
4039                         yend = 490;
4040                 }
4041                 /* OV7670 hardware window registers are split across
4042                  * multiple locations */
4043                 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4044                 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4045                 v = i2c_r(sd, OV7670_R32_HREF);
4046                 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4047                 msleep(10);     /* need to sleep between read and write to
4048                                  * same reg! */
4049                 i2c_w(sd, OV7670_R32_HREF, v);
4050
4051                 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4052                 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4053                 v = i2c_r(sd, OV7670_R03_VREF);
4054                 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4055                 msleep(10);     /* need to sleep between read and write to
4056                                  * same reg! */
4057                 i2c_w(sd, OV7670_R03_VREF, v);
4058                 break;
4059         case SEN_OV6620:
4060                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4061                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4062                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4063                 break;
4064         case SEN_OV6630:
4065         case SEN_OV66308AF:
4066                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4067                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4068                 break;
4069         case SEN_OV9600: {
4070                 const struct ov_i2c_regvals *vals;
4071                 static const struct ov_i2c_regvals sxga_15[] = {
4072                         {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4073                 };
4074                 static const struct ov_i2c_regvals sxga_7_5[] = {
4075                         {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4076                 };
4077                 static const struct ov_i2c_regvals vga_30[] = {
4078                         {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4079                 };
4080                 static const struct ov_i2c_regvals vga_15[] = {
4081                         {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4082                 };
4083
4084                 /* frame rates:
4085                  *      15fps / 7.5 fps for 1280x1024
4086                  *      30fps / 15fps for 640x480
4087                  */
4088                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4089                 if (qvga)
4090                         vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4091                 else
4092                         vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4093                 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4094                 return;
4095             }
4096         default:
4097                 return;
4098         }
4099
4100         /******** Clock programming ********/
4101         i2c_w(sd, 0x11, sd->clockdiv);
4102 }
4103
4104 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4105 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4106 {
4107         struct sd *sd = (struct sd *) gspca_dev;
4108
4109         if (sd->gspca_dev.streaming)
4110                 reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4111         i2c_w_mask(sd, OV7670_R1E_MVFP,
4112                 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4113                 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4114         if (sd->gspca_dev.streaming)
4115                 reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4116 }
4117
4118 static void set_ov_sensor_window(struct sd *sd)
4119 {
4120         struct gspca_dev *gspca_dev;
4121         int qvga, crop;
4122         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4123
4124         /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4125         switch (sd->sensor) {
4126         case SEN_OV2610:
4127         case SEN_OV2610AE:
4128         case SEN_OV3610:
4129         case SEN_OV7670:
4130         case SEN_OV9600:
4131                 mode_init_ov_sensor_regs(sd);
4132                 return;
4133         case SEN_OV7660:
4134                 ov519_set_mode(sd);
4135                 ov519_set_fr(sd);
4136                 return;
4137         }
4138
4139         gspca_dev = &sd->gspca_dev;
4140         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4141         crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4142
4143         /* The different sensor ICs handle setting up of window differently.
4144          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4145         switch (sd->sensor) {
4146         case SEN_OV8610:
4147                 hwsbase = 0x1e;
4148                 hwebase = 0x1e;
4149                 vwsbase = 0x02;
4150                 vwebase = 0x02;
4151                 break;
4152         case SEN_OV7610:
4153         case SEN_OV76BE:
4154                 hwsbase = 0x38;
4155                 hwebase = 0x3a;
4156                 vwsbase = vwebase = 0x05;
4157                 break;
4158         case SEN_OV6620:
4159         case SEN_OV6630:
4160         case SEN_OV66308AF:
4161                 hwsbase = 0x38;
4162                 hwebase = 0x3a;
4163                 vwsbase = 0x05;
4164                 vwebase = 0x06;
4165                 if (sd->sensor == SEN_OV66308AF && qvga)
4166                         /* HDG: this fixes U and V getting swapped */
4167                         hwsbase++;
4168                 if (crop) {
4169                         hwsbase += 8;
4170                         hwebase += 8;
4171                         vwsbase += 11;
4172                         vwebase += 11;
4173                 }
4174                 break;
4175         case SEN_OV7620:
4176         case SEN_OV7620AE:
4177                 hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4178                 hwebase = 0x2f;
4179                 vwsbase = vwebase = 0x05;
4180                 break;
4181         case SEN_OV7640:
4182         case SEN_OV7648:
4183                 hwsbase = 0x1a;
4184                 hwebase = 0x1a;
4185                 vwsbase = vwebase = 0x03;
4186                 break;
4187         default:
4188                 return;
4189         }
4190
4191         switch (sd->sensor) {
4192         case SEN_OV6620:
4193         case SEN_OV6630:
4194         case SEN_OV66308AF:
4195                 if (qvga) {             /* QCIF */
4196                         hwscale = 0;
4197                         vwscale = 0;
4198                 } else {                /* CIF */
4199                         hwscale = 1;
4200                         vwscale = 1;    /* The datasheet says 0;
4201                                          * it's wrong */
4202                 }
4203                 break;
4204         case SEN_OV8610:
4205                 if (qvga) {             /* QSVGA */
4206                         hwscale = 1;
4207                         vwscale = 1;
4208                 } else {                /* SVGA */
4209                         hwscale = 2;
4210                         vwscale = 2;
4211                 }
4212                 break;
4213         default:                        /* SEN_OV7xx0 */
4214                 if (qvga) {             /* QVGA */
4215                         hwscale = 1;
4216                         vwscale = 0;
4217                 } else {                /* VGA */
4218                         hwscale = 2;
4219                         vwscale = 1;
4220                 }
4221         }
4222
4223         mode_init_ov_sensor_regs(sd);
4224
4225         i2c_w(sd, 0x17, hwsbase);
4226         i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4227         i2c_w(sd, 0x19, vwsbase);
4228         i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4229 }
4230
4231 /* -- start the camera -- */
4232 static int sd_start(struct gspca_dev *gspca_dev)
4233 {
4234         struct sd *sd = (struct sd *) gspca_dev;
4235
4236         /* Default for most bridges, allow bridge_mode_init_regs to override */
4237         sd->sensor_width = sd->gspca_dev.pixfmt.width;
4238         sd->sensor_height = sd->gspca_dev.pixfmt.height;
4239
4240         switch (sd->bridge) {
4241         case BRIDGE_OV511:
4242         case BRIDGE_OV511PLUS:
4243                 ov511_mode_init_regs(sd);
4244                 break;
4245         case BRIDGE_OV518:
4246         case BRIDGE_OV518PLUS:
4247                 ov518_mode_init_regs(sd);
4248                 break;
4249         case BRIDGE_OV519:
4250                 ov519_mode_init_regs(sd);
4251                 break;
4252         /* case BRIDGE_OVFX2: nothing to do */
4253         case BRIDGE_W9968CF:
4254                 w9968cf_mode_init_regs(sd);
4255                 break;
4256         }
4257
4258         set_ov_sensor_window(sd);
4259
4260         /* Force clear snapshot state in case the snapshot button was
4261            pressed while we weren't streaming */
4262         sd->snapshot_needs_reset = 1;
4263         sd_reset_snapshot(gspca_dev);
4264
4265         sd->first_frame = 3;
4266
4267         ov51x_restart(sd);
4268         ov51x_led_control(sd, 1);
4269         return gspca_dev->usb_err;
4270 }
4271
4272 static void sd_stopN(struct gspca_dev *gspca_dev)
4273 {
4274         struct sd *sd = (struct sd *) gspca_dev;
4275
4276         ov51x_stop(sd);
4277         ov51x_led_control(sd, 0);
4278 }
4279
4280 static void sd_stop0(struct gspca_dev *gspca_dev)
4281 {
4282         struct sd *sd = (struct sd *) gspca_dev;
4283
4284         if (!sd->gspca_dev.present)
4285                 return;
4286         if (sd->bridge == BRIDGE_W9968CF)
4287                 w9968cf_stop0(sd);
4288
4289 #if IS_ENABLED(CONFIG_INPUT)
4290         /* If the last button state is pressed, release it now! */
4291         if (sd->snapshot_pressed) {
4292                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4293                 input_sync(gspca_dev->input_dev);
4294                 sd->snapshot_pressed = 0;
4295         }
4296 #endif
4297         if (sd->bridge == BRIDGE_OV519)
4298                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4299 }
4300
4301 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4302 {
4303         struct sd *sd = (struct sd *) gspca_dev;
4304
4305         if (sd->snapshot_pressed != state) {
4306 #if IS_ENABLED(CONFIG_INPUT)
4307                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4308                 input_sync(gspca_dev->input_dev);
4309 #endif
4310                 if (state)
4311                         sd->snapshot_needs_reset = 1;
4312
4313                 sd->snapshot_pressed = state;
4314         } else {
4315                 /* On the ov511 / ov519 we need to reset the button state
4316                    multiple times, as resetting does not work as long as the
4317                    button stays pressed */
4318                 switch (sd->bridge) {
4319                 case BRIDGE_OV511:
4320                 case BRIDGE_OV511PLUS:
4321                 case BRIDGE_OV519:
4322                         if (state)
4323                                 sd->snapshot_needs_reset = 1;
4324                         break;
4325                 }
4326         }
4327 }
4328
4329 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4330                         u8 *in,                 /* isoc packet */
4331                         int len)                /* iso packet length */
4332 {
4333         struct sd *sd = (struct sd *) gspca_dev;
4334
4335         /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4336          * byte non-zero. The EOF packet has image width/height in the
4337          * 10th and 11th bytes. The 9th byte is given as follows:
4338          *
4339          * bit 7: EOF
4340          *     6: compression enabled
4341          *     5: 422/420/400 modes
4342          *     4: 422/420/400 modes
4343          *     3: 1
4344          *     2: snapshot button on
4345          *     1: snapshot frame
4346          *     0: even/odd field
4347          */
4348         if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4349             (in[8] & 0x08)) {
4350                 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4351                 if (in[8] & 0x80) {
4352                         /* Frame end */
4353                         if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4354                             (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4355                                 gspca_err(gspca_dev, "Invalid frame size, got: %dx%d, requested: %dx%d\n",
4356                                           (in[9] + 1) * 8, (in[10] + 1) * 8,
4357                                           gspca_dev->pixfmt.width,
4358                                           gspca_dev->pixfmt.height);
4359                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4360                                 return;
4361                         }
4362                         /* Add 11 byte footer to frame, might be useful */
4363                         gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4364                         return;
4365                 } else {
4366                         /* Frame start */
4367                         gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4368                         sd->packet_nr = 0;
4369                 }
4370         }
4371
4372         /* Ignore the packet number */
4373         len--;
4374
4375         /* intermediate packet */
4376         gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4377 }
4378
4379 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4380                         u8 *data,                       /* isoc packet */
4381                         int len)                        /* iso packet length */
4382 {
4383         struct sd *sd = (struct sd *) gspca_dev;
4384
4385         /* A false positive here is likely, until OVT gives me
4386          * the definitive SOF/EOF format */
4387         if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4388                 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4389                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4390                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4391                 sd->packet_nr = 0;
4392         }
4393
4394         if (gspca_dev->last_packet_type == DISCARD_PACKET)
4395                 return;
4396
4397         /* Does this device use packet numbers ? */
4398         if (len & 7) {
4399                 len--;
4400                 if (sd->packet_nr == data[len])
4401                         sd->packet_nr++;
4402                 /* The last few packets of the frame (which are all 0's
4403                    except that they may contain part of the footer), are
4404                    numbered 0 */
4405                 else if (sd->packet_nr == 0 || data[len]) {
4406                         gspca_err(gspca_dev, "Invalid packet nr: %d (expect: %d)\n",
4407                                   (int)data[len], (int)sd->packet_nr);
4408                         gspca_dev->last_packet_type = DISCARD_PACKET;
4409                         return;
4410                 }
4411         }
4412
4413         /* intermediate packet */
4414         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4415 }
4416
4417 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4418                         u8 *data,                       /* isoc packet */
4419                         int len)                        /* iso packet length */
4420 {
4421         /* Header of ov519 is 16 bytes:
4422          *     Byte     Value      Description
4423          *      0       0xff    magic
4424          *      1       0xff    magic
4425          *      2       0xff    magic
4426          *      3       0xXX    0x50 = SOF, 0x51 = EOF
4427          *      9       0xXX    0x01 initial frame without data,
4428          *                      0x00 standard frame with image
4429          *      14      Lo      in EOF: length of image data / 8
4430          *      15      Hi
4431          */
4432
4433         if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4434                 switch (data[3]) {
4435                 case 0x50:              /* start of frame */
4436                         /* Don't check the button state here, as the state
4437                            usually (always ?) changes at EOF and checking it
4438                            here leads to unnecessary snapshot state resets. */
4439 #define HDRSZ 16
4440                         data += HDRSZ;
4441                         len -= HDRSZ;
4442 #undef HDRSZ
4443                         if (data[0] == 0xff || data[1] == 0xd8)
4444                                 gspca_frame_add(gspca_dev, FIRST_PACKET,
4445                                                 data, len);
4446                         else
4447                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4448                         return;
4449                 case 0x51:              /* end of frame */
4450                         ov51x_handle_button(gspca_dev, data[11] & 1);
4451                         if (data[9] != 0)
4452                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4453                         gspca_frame_add(gspca_dev, LAST_PACKET,
4454                                         NULL, 0);
4455                         return;
4456                 }
4457         }
4458
4459         /* intermediate packet */
4460         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4461 }
4462
4463 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4464                         u8 *data,                       /* isoc packet */
4465                         int len)                        /* iso packet length */
4466 {
4467         struct sd *sd = (struct sd *) gspca_dev;
4468
4469         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4470
4471         /* A short read signals EOF */
4472         if (len < gspca_dev->cam.bulk_size) {
4473                 /* If the frame is short, and it is one of the first ones
4474                    the sensor and bridge are still syncing, so drop it. */
4475                 if (sd->first_frame) {
4476                         sd->first_frame--;
4477                         if (gspca_dev->image_len <
4478                                   sd->gspca_dev.pixfmt.width *
4479                                         sd->gspca_dev.pixfmt.height)
4480                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4481                 }
4482                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4483                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4484         }
4485 }
4486
4487 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4488                         u8 *data,                       /* isoc packet */
4489                         int len)                        /* iso packet length */
4490 {
4491         struct sd *sd = (struct sd *) gspca_dev;
4492
4493         switch (sd->bridge) {
4494         case BRIDGE_OV511:
4495         case BRIDGE_OV511PLUS:
4496                 ov511_pkt_scan(gspca_dev, data, len);
4497                 break;
4498         case BRIDGE_OV518:
4499         case BRIDGE_OV518PLUS:
4500                 ov518_pkt_scan(gspca_dev, data, len);
4501                 break;
4502         case BRIDGE_OV519:
4503                 ov519_pkt_scan(gspca_dev, data, len);
4504                 break;
4505         case BRIDGE_OVFX2:
4506                 ovfx2_pkt_scan(gspca_dev, data, len);
4507                 break;
4508         case BRIDGE_W9968CF:
4509                 w9968cf_pkt_scan(gspca_dev, data, len);
4510                 break;
4511         }
4512 }
4513
4514 /* -- management routines -- */
4515
4516 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4517 {
4518         struct sd *sd = (struct sd *) gspca_dev;
4519         static const struct ov_i2c_regvals brit_7660[][7] = {
4520                 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4521                         {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4522                 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4523                         {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4524                 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4525                         {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4526                 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4527                         {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4528                 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4529                         {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4530                 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4531                         {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4532                 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4533                         {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4534         };
4535
4536         switch (sd->sensor) {
4537         case SEN_OV8610:
4538         case SEN_OV7610:
4539         case SEN_OV76BE:
4540         case SEN_OV6620:
4541         case SEN_OV6630:
4542         case SEN_OV66308AF:
4543         case SEN_OV7640:
4544         case SEN_OV7648:
4545                 i2c_w(sd, OV7610_REG_BRT, val);
4546                 break;
4547         case SEN_OV7620:
4548         case SEN_OV7620AE:
4549                 i2c_w(sd, OV7610_REG_BRT, val);
4550                 break;
4551         case SEN_OV7660:
4552                 write_i2c_regvals(sd, brit_7660[val],
4553                                 ARRAY_SIZE(brit_7660[0]));
4554                 break;
4555         case SEN_OV7670:
4556 /*win trace
4557  *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4558                 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4559                 break;
4560         }
4561 }
4562
4563 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4564 {
4565         struct sd *sd = (struct sd *) gspca_dev;
4566         static const struct ov_i2c_regvals contrast_7660[][31] = {
4567                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4568                  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4569                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4570                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4571                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4572                  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4573                  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4574                  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4575                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4576                  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4577                  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4578                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4579                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4580                  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4581                  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4582                  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4583                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4584                  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4585                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4586                  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4587                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4588                  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4589                  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4590                  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4591                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4592                  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4593                  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4594                  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4595                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4596                  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4597                  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4598                  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4599                 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4600                  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4601                  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4602                  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4603                  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4604                  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4605                  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4606                  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4607                 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4608                  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4609                  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4610                  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4611                  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4612                  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4613                  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4614                  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4615                 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4616                  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4617                  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4618                  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4619                  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4620                  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4621                  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4622                  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4623         };
4624
4625         switch (sd->sensor) {
4626         case SEN_OV7610:
4627         case SEN_OV6620:
4628                 i2c_w(sd, OV7610_REG_CNT, val);
4629                 break;
4630         case SEN_OV6630:
4631         case SEN_OV66308AF:
4632                 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4633                 break;
4634         case SEN_OV8610: {
4635                 static const u8 ctab[] = {
4636                         0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4637                 };
4638
4639                 /* Use Y gamma control instead. Bit 0 enables it. */
4640                 i2c_w(sd, 0x64, ctab[val >> 5]);
4641                 break;
4642             }
4643         case SEN_OV7620:
4644         case SEN_OV7620AE: {
4645                 static const u8 ctab[] = {
4646                         0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4647                         0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4648                 };
4649
4650                 /* Use Y gamma control instead. Bit 0 enables it. */
4651                 i2c_w(sd, 0x64, ctab[val >> 4]);
4652                 break;
4653             }
4654         case SEN_OV7660:
4655                 write_i2c_regvals(sd, contrast_7660[val],
4656                                         ARRAY_SIZE(contrast_7660[0]));
4657                 break;
4658         case SEN_OV7670:
4659                 /* check that this isn't just the same as ov7610 */
4660                 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4661                 break;
4662         }
4663 }
4664
4665 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4666 {
4667         struct sd *sd = (struct sd *) gspca_dev;
4668
4669         i2c_w(sd, 0x10, val);
4670 }
4671
4672 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4673 {
4674         struct sd *sd = (struct sd *) gspca_dev;
4675         static const struct ov_i2c_regvals colors_7660[][6] = {
4676                 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4677                  {0x53, 0x19}, {0x54, 0x23}},
4678                 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4679                  {0x53, 0x2c}, {0x54, 0x3e}},
4680                 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4681                  {0x53, 0x40}, {0x54, 0x59}},
4682                 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4683                  {0x53, 0x53}, {0x54, 0x73}},
4684                 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4685                  {0x53, 0x66}, {0x54, 0x8e}},
4686         };
4687
4688         switch (sd->sensor) {
4689         case SEN_OV8610:
4690         case SEN_OV7610:
4691         case SEN_OV76BE:
4692         case SEN_OV6620:
4693         case SEN_OV6630:
4694         case SEN_OV66308AF:
4695                 i2c_w(sd, OV7610_REG_SAT, val);
4696                 break;
4697         case SEN_OV7620:
4698         case SEN_OV7620AE:
4699                 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4700 /*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4701                 if (rc < 0)
4702                         goto out; */
4703                 i2c_w(sd, OV7610_REG_SAT, val);
4704                 break;
4705         case SEN_OV7640:
4706         case SEN_OV7648:
4707                 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4708                 break;
4709         case SEN_OV7660:
4710                 write_i2c_regvals(sd, colors_7660[val],
4711                                         ARRAY_SIZE(colors_7660[0]));
4712                 break;
4713         case SEN_OV7670:
4714                 /* supported later once I work out how to do it
4715                  * transparently fail now! */
4716                 /* set REG_COM13 values for UV sat auto mode */
4717                 break;
4718         }
4719 }
4720
4721 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4722 {
4723         struct sd *sd = (struct sd *) gspca_dev;
4724
4725         i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4726 }
4727
4728 static void setfreq_i(struct sd *sd, s32 val)
4729 {
4730         if (sd->sensor == SEN_OV7660
4731          || sd->sensor == SEN_OV7670) {
4732                 switch (val) {
4733                 case 0: /* Banding filter disabled */
4734                         i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4735                         break;
4736                 case 1: /* 50 hz */
4737                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4738                                    OV7670_COM8_BFILT);
4739                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4740                         break;
4741                 case 2: /* 60 hz */
4742                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4743                                    OV7670_COM8_BFILT);
4744                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4745                         break;
4746                 case 3: /* Auto hz - ov7670 only */
4747                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4748                                    OV7670_COM8_BFILT);
4749                         i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4750                                    0x18);
4751                         break;
4752                 }
4753         } else {
4754                 switch (val) {
4755                 case 0: /* Banding filter disabled */
4756                         i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4757                         i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4758                         break;
4759                 case 1: /* 50 hz (filter on and framerate adj) */
4760                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4761                         i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4762                         /* 20 fps -> 16.667 fps */
4763                         if (sd->sensor == SEN_OV6620 ||
4764                             sd->sensor == SEN_OV6630 ||
4765                             sd->sensor == SEN_OV66308AF)
4766                                 i2c_w(sd, 0x2b, 0x5e);
4767                         else
4768                                 i2c_w(sd, 0x2b, 0xac);
4769                         break;
4770                 case 2: /* 60 hz (filter on, ...) */
4771                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4772                         if (sd->sensor == SEN_OV6620 ||
4773                             sd->sensor == SEN_OV6630 ||
4774                             sd->sensor == SEN_OV66308AF) {
4775                                 /* 20 fps -> 15 fps */
4776                                 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4777                                 i2c_w(sd, 0x2b, 0xa8);
4778                         } else {
4779                                 /* no framerate adj. */
4780                                 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4781                         }
4782                         break;
4783                 }
4784         }
4785 }
4786
4787 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4788 {
4789         struct sd *sd = (struct sd *) gspca_dev;
4790
4791         setfreq_i(sd, val);
4792
4793         /* Ugly but necessary */
4794         if (sd->bridge == BRIDGE_W9968CF)
4795                 w9968cf_set_crop_window(sd);
4796 }
4797
4798 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4799                         struct v4l2_jpegcompression *jcomp)
4800 {
4801         struct sd *sd = (struct sd *) gspca_dev;
4802
4803         if (sd->bridge != BRIDGE_W9968CF)
4804                 return -ENOTTY;
4805
4806         memset(jcomp, 0, sizeof *jcomp);
4807         jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4808         jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4809                               V4L2_JPEG_MARKER_DRI;
4810         return 0;
4811 }
4812
4813 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4814                         const struct v4l2_jpegcompression *jcomp)
4815 {
4816         struct sd *sd = (struct sd *) gspca_dev;
4817
4818         if (sd->bridge != BRIDGE_W9968CF)
4819                 return -ENOTTY;
4820
4821         v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4822         return 0;
4823 }
4824
4825 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4826 {
4827         struct gspca_dev *gspca_dev =
4828                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4829         struct sd *sd = (struct sd *)gspca_dev;
4830
4831         gspca_dev->usb_err = 0;
4832
4833         switch (ctrl->id) {
4834         case V4L2_CID_AUTOGAIN:
4835                 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4836                 break;
4837         }
4838         return 0;
4839 }
4840
4841 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4842 {
4843         struct gspca_dev *gspca_dev =
4844                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4845         struct sd *sd = (struct sd *)gspca_dev;
4846
4847         gspca_dev->usb_err = 0;
4848
4849         if (!gspca_dev->streaming)
4850                 return 0;
4851
4852         switch (ctrl->id) {
4853         case V4L2_CID_BRIGHTNESS:
4854                 setbrightness(gspca_dev, ctrl->val);
4855                 break;
4856         case V4L2_CID_CONTRAST:
4857                 setcontrast(gspca_dev, ctrl->val);
4858                 break;
4859         case V4L2_CID_POWER_LINE_FREQUENCY:
4860                 setfreq(gspca_dev, ctrl->val);
4861                 break;
4862         case V4L2_CID_AUTOBRIGHTNESS:
4863                 if (ctrl->is_new)
4864                         setautobright(gspca_dev, ctrl->val);
4865                 if (!ctrl->val && sd->brightness->is_new)
4866                         setbrightness(gspca_dev, sd->brightness->val);
4867                 break;
4868         case V4L2_CID_SATURATION:
4869                 setcolors(gspca_dev, ctrl->val);
4870                 break;
4871         case V4L2_CID_HFLIP:
4872                 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4873                 break;
4874         case V4L2_CID_AUTOGAIN:
4875                 if (ctrl->is_new)
4876                         setautogain(gspca_dev, ctrl->val);
4877                 if (!ctrl->val && gspca_dev->exposure->is_new)
4878                         setexposure(gspca_dev, gspca_dev->exposure->val);
4879                 break;
4880         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4881                 return -EBUSY; /* Should never happen, as we grab the ctrl */
4882         }
4883         return gspca_dev->usb_err;
4884 }
4885
4886 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4887         .g_volatile_ctrl = sd_g_volatile_ctrl,
4888         .s_ctrl = sd_s_ctrl,
4889 };
4890
4891 static int sd_init_controls(struct gspca_dev *gspca_dev)
4892 {
4893         struct sd *sd = (struct sd *)gspca_dev;
4894         struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4895
4896         gspca_dev->vdev.ctrl_handler = hdl;
4897         v4l2_ctrl_handler_init(hdl, 10);
4898         if (valid_controls[sd->sensor].has_brightness)
4899                 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4900                         V4L2_CID_BRIGHTNESS, 0,
4901                         sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4902                         sd->sensor == SEN_OV7660 ? 3 : 127);
4903         if (valid_controls[sd->sensor].has_contrast) {
4904                 if (sd->sensor == SEN_OV7660)
4905                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4906                                 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4907                 else
4908                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4909                                 V4L2_CID_CONTRAST, 0, 255, 1,
4910                                 (sd->sensor == SEN_OV6630 ||
4911                                  sd->sensor == SEN_OV66308AF) ? 200 : 127);
4912         }
4913         if (valid_controls[sd->sensor].has_sat)
4914                 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4915                         V4L2_CID_SATURATION, 0,
4916                         sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4917                         sd->sensor == SEN_OV7660 ? 2 : 127);
4918         if (valid_controls[sd->sensor].has_exposure)
4919                 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920                         V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4921         if (valid_controls[sd->sensor].has_hvflip) {
4922                 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4923                         V4L2_CID_HFLIP, 0, 1, 1, 0);
4924                 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4925                         V4L2_CID_VFLIP, 0, 1, 1, 0);
4926         }
4927         if (valid_controls[sd->sensor].has_autobright)
4928                 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4929                         V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4930         if (valid_controls[sd->sensor].has_autogain)
4931                 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4932                         V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4933         if (valid_controls[sd->sensor].has_freq) {
4934                 if (sd->sensor == SEN_OV7670)
4935                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4936                                 V4L2_CID_POWER_LINE_FREQUENCY,
4937                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4938                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4939                 else
4940                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4941                                 V4L2_CID_POWER_LINE_FREQUENCY,
4942                                 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4943         }
4944         if (sd->bridge == BRIDGE_W9968CF)
4945                 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4946                         V4L2_CID_JPEG_COMPRESSION_QUALITY,
4947                         QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4948
4949         if (hdl->error) {
4950                 gspca_err(gspca_dev, "Could not initialize controls\n");
4951                 return hdl->error;
4952         }
4953         if (gspca_dev->autogain)
4954                 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4955         if (sd->autobright)
4956                 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4957         if (sd->hflip)
4958                 v4l2_ctrl_cluster(2, &sd->hflip);
4959         return 0;
4960 }
4961
4962 /* sub-driver description */
4963 static const struct sd_desc sd_desc = {
4964         .name = MODULE_NAME,
4965         .config = sd_config,
4966         .init = sd_init,
4967         .init_controls = sd_init_controls,
4968         .isoc_init = sd_isoc_init,
4969         .start = sd_start,
4970         .stopN = sd_stopN,
4971         .stop0 = sd_stop0,
4972         .pkt_scan = sd_pkt_scan,
4973         .dq_callback = sd_reset_snapshot,
4974         .get_jcomp = sd_get_jcomp,
4975         .set_jcomp = sd_set_jcomp,
4976 #if IS_ENABLED(CONFIG_INPUT)
4977         .other_input = 1,
4978 #endif
4979 };
4980
4981 /* -- module initialisation -- */
4982 static const struct usb_device_id device_table[] = {
4983         {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4984         {USB_DEVICE(0x041e, 0x4052),
4985                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4986         {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4987         {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4988         {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4989         {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4990         {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4991         {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4992         {USB_DEVICE(0x045e, 0x028c),
4993                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4994         {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4995         {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4996         {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4997         {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4998         {USB_DEVICE(0x05a9, 0x0519),
4999                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5000         {USB_DEVICE(0x05a9, 0x0530),
5001                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5002         {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5003         {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5004         {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5005         {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5006         {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5007         {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5008         {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5009         {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5010         {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5011         {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5012         {}
5013 };
5014
5015 MODULE_DEVICE_TABLE(usb, device_table);
5016
5017 /* -- device connect -- */
5018 static int sd_probe(struct usb_interface *intf,
5019                         const struct usb_device_id *id)
5020 {
5021         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5022                                 THIS_MODULE);
5023 }
5024
5025 static struct usb_driver sd_driver = {
5026         .name = MODULE_NAME,
5027         .id_table = device_table,
5028         .probe = sd_probe,
5029         .disconnect = gspca_disconnect,
5030 #ifdef CONFIG_PM
5031         .suspend = gspca_suspend,
5032         .resume = gspca_resume,
5033         .reset_resume = gspca_resume,
5034 #endif
5035 };
5036
5037 module_usb_driver(sd_driver);
5038
5039 module_param(frame_rate, int, 0644);
5040 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");