1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
5 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
8 #include "mxl111sf-i2c.h"
11 /* SW-I2C ----------------------------------------------------------------- */
13 #define SW_I2C_ADDR 0x1a
14 #define SW_I2C_EN 0x02
15 #define SW_SCL_OUT 0x04
16 #define SW_SDA_OUT 0x08
17 #define SW_SDA_IN 0x04
19 #define SW_I2C_BUSY_ADDR 0x2f
20 #define SW_I2C_BUSY 0x02
22 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
28 mxl_i2c("(0x%02x)", byte);
30 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
34 for (i = 0; i < 8; i++) {
36 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
38 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
39 0x10 | SW_I2C_EN | data);
43 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
44 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
48 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
49 0x10 | SW_I2C_EN | data);
54 /* last bit was 0 so we need to release SDA */
56 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
57 0x10 | SW_I2C_EN | SW_SDA_OUT);
62 /* CLK high for ACK readback */
63 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
64 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
68 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
72 /* drop the CLK after getting ACK, SDA will go high right away */
73 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
74 0x10 | SW_I2C_EN | SW_SDA_OUT);
84 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
95 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
96 0x10 | SW_I2C_EN | SW_SDA_OUT);
100 for (i = 0; i < 8; i++) {
101 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
103 SW_SCL_OUT | SW_SDA_OUT);
107 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
111 if (data & SW_SDA_IN)
114 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
115 0x10 | SW_I2C_EN | SW_SDA_OUT);
124 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
130 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
131 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
135 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
136 0x10 | SW_I2C_EN | SW_SCL_OUT);
140 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
141 0x10 | SW_I2C_EN); /* start */
147 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
153 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
154 0x10 | SW_I2C_EN); /* stop */
158 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
159 0x10 | SW_I2C_EN | SW_SCL_OUT);
163 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
164 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
168 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
169 0x10 | SW_SCL_OUT | SW_SDA_OUT);
175 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
182 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
186 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
192 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
193 0x10 | SW_I2C_EN | SW_SCL_OUT);
197 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
198 0x10 | SW_I2C_EN | SW_SDA_OUT);
204 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
210 /* SDA high to signal last byte read from slave */
211 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
212 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
216 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
217 0x10 | SW_I2C_EN | SW_SDA_OUT);
223 /* ------------------------------------------------------------------------ */
225 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
232 if (msg->flags & I2C_M_RD) {
234 ret = mxl111sf_i2c_start(state);
238 ret = mxl111sf_i2c_bitbang_sendbyte(state,
239 (msg->addr << 1) | 0x01);
241 mxl111sf_i2c_stop(state);
245 for (i = 0; i < msg->len; i++) {
246 ret = mxl111sf_i2c_bitbang_recvbyte(state,
249 mxl111sf_i2c_stop(state);
253 if (i < msg->len - 1)
254 mxl111sf_i2c_ack(state);
257 mxl111sf_i2c_nack(state);
259 ret = mxl111sf_i2c_stop(state);
265 ret = mxl111sf_i2c_start(state);
269 ret = mxl111sf_i2c_bitbang_sendbyte(state,
270 (msg->addr << 1) & 0xfe);
272 mxl111sf_i2c_stop(state);
276 for (i = 0; i < msg->len; i++) {
277 ret = mxl111sf_i2c_bitbang_sendbyte(state,
280 mxl111sf_i2c_stop(state);
285 /* FIXME: we only want to do this on the last transaction */
286 mxl111sf_i2c_stop(state);
292 /* HW-I2C ----------------------------------------------------------------- */
294 #define USB_WRITE_I2C_CMD 0x99
295 #define USB_READ_I2C_CMD 0xdd
296 #define USB_END_I2C_CMD 0xfe
298 #define USB_WRITE_I2C_CMD_LEN 26
299 #define USB_READ_I2C_CMD_LEN 24
301 #define I2C_MUX_REG 0x30
302 #define I2C_CONTROL_REG 0x00
303 #define I2C_SLAVE_ADDR_REG 0x08
304 #define I2C_DATA_REG 0x0c
305 #define I2C_INT_STATUS_REG 0x10
307 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
310 int ret = mxl111sf_ctrl_msg(state, wdata[0],
311 &wdata[1], 25, NULL, 0);
317 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
318 u8 index, u8 *wdata, u8 *rdata)
320 int ret = mxl111sf_ctrl_msg(state, wdata[0],
321 &wdata[1], 25, rdata, 24);
327 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
334 buf[0] = USB_READ_I2C_CMD;
337 buf[2] = I2C_INT_STATUS_REG;
341 buf[5] = USB_END_I2C_CMD;
343 mxl111sf_i2c_get_data(state, 0, buf, buf);
351 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
358 buf[0] = USB_READ_I2C_CMD;
361 buf[2] = I2C_MUX_REG;
365 buf[5] = I2C_INT_STATUS_REG;
368 buf[8] = USB_END_I2C_CMD;
370 mxl111sf_i2c_get_data(state, 0, buf, buf);
372 if (0x08 == (buf[1] & 0x08))
375 if ((buf[5] & 0x02) == 0x02)
376 mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
381 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
390 mxl_i2c("read %d bytes", count);
392 while ((fifo_status == 0) && (i++ < 5))
393 fifo_status = mxl111sf_i2c_check_fifo(state);
395 i2c_w_data[0] = 0xDD;
396 i2c_w_data[1] = 0x00;
398 for (i = 2; i < 26; i++)
399 i2c_w_data[i] = 0xFE;
401 for (i = 0; i < count; i++) {
402 i2c_w_data[2+(i*3)] = 0x0C;
403 i2c_w_data[3+(i*3)] = 0x00;
404 i2c_w_data[4+(i*3)] = 0x00;
407 mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
409 /* Check for I2C NACK status */
410 if (mxl111sf_i2c_check_status(state) == 1) {
413 for (i = 0; i < count; i++) {
414 rbuf[i] = i2c_r_data[(i*3)+1];
415 mxl_i2c("%02x\t %02x",
417 i2c_r_data[(i*3)+2]);
427 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
440 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
441 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
442 (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
444 for (index = 0; index < 26; index++)
445 buf[index] = USB_END_I2C_CMD;
447 /* command to indicate data payload is destined for I2C interface */
448 buf[0] = USB_WRITE_I2C_CMD;
451 /* enable I2C interface */
452 buf[2] = I2C_MUX_REG;
456 /* enable I2C interface */
457 buf[5] = I2C_MUX_REG;
461 /* set Timeout register on I2C interface */
466 /* enable Interrupts on I2C interface */
475 ret = mxl111sf_i2c_send_data(state, 0, buf);
477 /* write data on I2C bus */
478 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
479 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
481 /* control register on I2C interface to initialize I2C bus */
482 buf[2] = I2C_CONTROL_REG;
484 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
486 /* I2C Slave device Address */
487 buf[5] = I2C_SLAVE_ADDR_REG;
488 buf[6] = (msg->addr);
490 buf[8] = USB_END_I2C_CMD;
491 ret = mxl111sf_i2c_send_data(state, 0, buf);
493 /* check for slave device status */
494 if (mxl111sf_i2c_check_status(state) == 1) {
495 mxl_i2c("NACK writing slave address %02x",
497 /* if NACK, stop I2C bus and exit */
498 buf[2] = I2C_CONTROL_REG;
500 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
505 /* I2C interface can do I2C operations in block of 8 bytes of
506 I2C data. calculation to figure out number of blocks of i2c
507 data required to program */
508 block_len = (msg->len / 8);
509 left_over_len = (msg->len % 8);
511 mxl_i2c("block_len %d, left_over_len %d",
512 block_len, left_over_len);
514 for (index = 0; index < block_len; index++) {
515 for (i = 0; i < 8; i++) {
516 /* write data on I2C interface */
517 buf[2+(i*3)] = I2C_DATA_REG;
518 buf[3+(i*3)] = msg->buf[(index*8)+i];
522 ret = mxl111sf_i2c_send_data(state, 0, buf);
524 /* check for I2C NACK status */
525 if (mxl111sf_i2c_check_status(state) == 1) {
526 mxl_i2c("NACK writing slave address %02x",
529 /* if NACK, stop I2C bus and exit */
530 buf[2] = I2C_CONTROL_REG;
532 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
540 for (k = 0; k < 26; k++)
541 buf[k] = USB_END_I2C_CMD;
546 for (i = 0; i < left_over_len; i++) {
547 buf[2+(i*3)] = I2C_DATA_REG;
548 buf[3+(i*3)] = msg->buf[(index*8)+i];
549 mxl_i2c("index = %d %d data %d",
550 index, i, msg->buf[(index*8)+i]);
553 ret = mxl111sf_i2c_send_data(state, 0, buf);
555 /* check for I2C NACK status */
556 if (mxl111sf_i2c_check_status(state) == 1) {
557 mxl_i2c("NACK writing slave address %02x",
560 /* if NACK, stop I2C bus and exit */
561 buf[2] = I2C_CONTROL_REG;
563 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
570 /* issue I2C STOP after write */
571 buf[2] = I2C_CONTROL_REG;
573 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
577 /* read data from I2C bus */
578 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
579 mxl_i2c("read buf len %d", msg->len);
581 /* command to indicate data payload is
582 destined for I2C interface */
583 buf[2] = I2C_CONTROL_REG;
585 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
587 /* I2C xfer length */
589 buf[6] = (msg->len & 0xFF);
592 /* I2C slave device Address */
593 buf[8] = I2C_SLAVE_ADDR_REG;
596 buf[11] = USB_END_I2C_CMD;
597 ret = mxl111sf_i2c_send_data(state, 0, buf);
599 /* check for I2C NACK status */
600 if (mxl111sf_i2c_check_status(state) == 1) {
601 mxl_i2c("NACK reading slave address %02x",
604 /* if NACK, stop I2C bus and exit */
605 buf[2] = I2C_CONTROL_REG;
607 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
612 /* I2C interface can do I2C operations in block of 8 bytes of
613 I2C data. calculation to figure out number of blocks of
614 i2c data required to program */
615 block_len = ((msg->len) / 8);
616 left_over_len = ((msg->len) % 8);
619 mxl_i2c("block_len %d, left_over_len %d",
620 block_len, left_over_len);
622 /* command to read data from I2C interface */
623 buf[0] = USB_READ_I2C_CMD;
626 for (index = 0; index < block_len; index++) {
627 /* setup I2C read request packet on I2C interface */
628 for (i = 0; i < 8; i++) {
629 buf[2+(i*3)] = I2C_DATA_REG;
634 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
636 /* check for I2C NACK status */
637 if (mxl111sf_i2c_check_status(state) == 1) {
638 mxl_i2c("NACK reading slave address %02x",
641 /* if NACK, stop I2C bus and exit */
642 buf[2] = I2C_CONTROL_REG;
644 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
649 /* copy data from i2c data payload to read buffer */
650 for (i = 0; i < 8; i++) {
651 rd_status[i] = i2c_r_data[(i*3)+2];
653 if (rd_status[i] == 0x04) {
655 mxl_i2c("i2c fifo empty! @ %d",
657 msg->buf[(index*8)+i] =
661 mxl111sf_i2c_readagain(
664 if (ret_status == 1) {
669 msg->buf[(index*8)+(k+i+1)] =
671 mxl_i2c("read data: %02x\t %02x",
672 msg->buf[(index*8)+(k+i)],
674 mxl_i2c("read data: %02x\t %02x",
675 msg->buf[(index*8)+(k+i+1)],
681 mxl_i2c("readagain ERROR!");
684 msg->buf[(index*8)+i] =
688 msg->buf[(index*8)+i] =
698 for (k = 0; k < 26; k++)
699 buf[k] = USB_END_I2C_CMD;
704 for (i = 0; i < left_over_len; i++) {
705 buf[2+(i*3)] = I2C_DATA_REG;
709 ret = mxl111sf_i2c_get_data(state, 0, buf,
712 /* check for I2C NACK status */
713 if (mxl111sf_i2c_check_status(state) == 1) {
714 mxl_i2c("NACK reading slave address %02x",
717 /* if NACK, stop I2C bus and exit */
718 buf[2] = I2C_CONTROL_REG;
720 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
725 for (i = 0; i < left_over_len; i++) {
726 msg->buf[(block_len*8)+i] =
728 mxl_i2c("read data: %02x\t %02x",
730 i2c_r_data[(i*3)+2]);
734 /* indicate I2C interface to issue NACK
735 after next I2C read op */
736 buf[0] = USB_WRITE_I2C_CMD;
739 /* control register */
740 buf[2] = I2C_CONTROL_REG;
742 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
744 buf[5] = USB_END_I2C_CMD;
745 ret = mxl111sf_i2c_send_data(state, 0, buf);
747 /* control register */
748 buf[2] = I2C_CONTROL_REG;
750 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
754 /* STOP and disable I2C MUX */
755 buf[0] = USB_WRITE_I2C_CMD;
758 /* de-initilize I2C BUS */
759 buf[5] = USB_END_I2C_CMD;
760 mxl111sf_i2c_send_data(state, 0, buf);
762 /* Control Register */
763 buf[2] = I2C_CONTROL_REG;
767 /* disable I2C interface */
768 buf[5] = I2C_MUX_REG;
772 /* de-initilize I2C BUS */
773 buf[8] = USB_END_I2C_CMD;
774 mxl111sf_i2c_send_data(state, 0, buf);
776 /* disable I2C interface */
777 buf[2] = I2C_MUX_REG;
781 /* disable I2C interface */
782 buf[5] = I2C_MUX_REG;
786 /* disable I2C interface */
787 buf[8] = I2C_MUX_REG;
791 buf[11] = USB_END_I2C_CMD;
792 mxl111sf_i2c_send_data(state, 0, buf);
797 /* ------------------------------------------------------------------------ */
799 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
800 struct i2c_msg msg[], int num)
802 struct dvb_usb_device *d = i2c_get_adapdata(adap);
803 struct mxl111sf_state *state = d->priv;
804 int hwi2c = (state->chip_rev > MXL111SF_V6);
807 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
810 for (i = 0; i < num; i++) {
812 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
813 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
815 mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x",
817 (msg[i].flags & I2C_M_RD) ?
819 msg[i].len, msg[i].addr);
825 mutex_unlock(&d->i2c_mutex);
827 return i == num ? num : -EREMOTEIO;