2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/i2c.h>
18 #include <linux/types.h>
19 #include <linux/videodev2.h>
20 #include "tuner-i2c.h"
23 static DEFINE_MUTEX(mxl5007t_list_mutex);
24 static LIST_HEAD(hybrid_tuner_instance_list);
26 static int mxl5007t_debug;
27 module_param_named(debug, mxl5007t_debug, int, 0644);
28 MODULE_PARM_DESC(debug, "set debug level");
30 /* ------------------------------------------------------------------------- */
32 #define mxl_printk(kern, fmt, arg...) \
33 printk(kern "%s: " fmt "\n", __func__, ##arg)
35 #define mxl_err(fmt, arg...) \
36 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
38 #define mxl_warn(fmt, arg...) \
39 mxl_printk(KERN_WARNING, fmt, ##arg)
41 #define mxl_info(fmt, arg...) \
42 mxl_printk(KERN_INFO, fmt, ##arg)
44 #define mxl_debug(fmt, arg...) \
47 mxl_printk(KERN_DEBUG, fmt, ##arg); \
50 #define mxl_fail(ret) \
55 mxl_printk(KERN_ERR, "error %d on line %d", \
60 /* ------------------------------------------------------------------------- */
66 MxL_MODE_CABLE = 0x10,
69 enum mxl5007t_chip_version {
70 MxL_UNKNOWN_ID = 0x00,
71 MxL_5007_V1_F1 = 0x11,
72 MxL_5007_V1_F2 = 0x12,
74 MxL_5007_V2_100_F1 = 0x21,
75 MxL_5007_V2_100_F2 = 0x22,
76 MxL_5007_V2_200_F1 = 0x23,
77 MxL_5007_V2_200_F2 = 0x24,
85 /* ------------------------------------------------------------------------- */
87 static struct reg_pair_t init_tab[] = {
92 { 0x2e, 0x15 }, /* OVERRIDE */
93 { 0x30, 0x10 }, /* OVERRIDE */
94 { 0x45, 0x58 }, /* OVERRIDE */
95 { 0x48, 0x19 }, /* OVERRIDE */
96 { 0x52, 0x03 }, /* OVERRIDE */
97 { 0x53, 0x44 }, /* OVERRIDE */
98 { 0x6a, 0x4b }, /* OVERRIDE */
99 { 0x76, 0x00 }, /* OVERRIDE */
100 { 0x78, 0x18 }, /* OVERRIDE */
101 { 0x7a, 0x17 }, /* OVERRIDE */
102 { 0x85, 0x06 }, /* OVERRIDE */
103 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
107 static struct reg_pair_t init_tab_cable[] = {
115 { 0x2e, 0x15 }, /* OVERRIDE */
116 { 0x30, 0x10 }, /* OVERRIDE */
117 { 0x45, 0x58 }, /* OVERRIDE */
118 { 0x48, 0x19 }, /* OVERRIDE */
119 { 0x52, 0x03 }, /* OVERRIDE */
120 { 0x53, 0x44 }, /* OVERRIDE */
121 { 0x6a, 0x4b }, /* OVERRIDE */
122 { 0x76, 0x00 }, /* OVERRIDE */
123 { 0x78, 0x18 }, /* OVERRIDE */
124 { 0x7a, 0x17 }, /* OVERRIDE */
125 { 0x85, 0x06 }, /* OVERRIDE */
126 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
130 /* ------------------------------------------------------------------------- */
132 static struct reg_pair_t reg_pair_rftune[] = {
133 { 0x0f, 0x00 }, /* abort tune */
137 { 0x1f, 0x87 }, /* OVERRIDE */
138 { 0x20, 0x1f }, /* OVERRIDE */
139 { 0x21, 0x87 }, /* OVERRIDE */
140 { 0x22, 0x1f }, /* OVERRIDE */
141 { 0x80, 0x01 }, /* freq dependent */
142 { 0x0f, 0x01 }, /* start tune */
146 /* ------------------------------------------------------------------------- */
148 struct mxl5007t_state {
149 struct list_head hybrid_tuner_instance_list;
150 struct tuner_i2c_props i2c_props;
154 struct mxl5007t_config *config;
156 enum mxl5007t_chip_version chip_id;
158 struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
159 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
160 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
162 enum mxl5007t_if_freq if_freq;
168 /* ------------------------------------------------------------------------- */
170 /* called by _init and _rftun to manipulate the register arrays */
172 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
176 while (reg_pair[i].reg || reg_pair[i].val) {
177 if (reg_pair[i].reg == reg) {
178 reg_pair[i].val &= ~mask;
179 reg_pair[i].val |= val;
187 static void copy_reg_bits(struct reg_pair_t *reg_pair1,
188 struct reg_pair_t *reg_pair2)
194 while (reg_pair1[i].reg || reg_pair1[i].val) {
195 while (reg_pair2[j].reg || reg_pair2[j].val) {
196 if (reg_pair1[i].reg != reg_pair2[j].reg) {
200 reg_pair2[j].val = reg_pair1[i].val;
208 /* ------------------------------------------------------------------------- */
210 static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
211 enum mxl5007t_mode mode,
212 s32 if_diff_out_level)
216 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
219 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
222 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
225 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
226 set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
227 8 - if_diff_out_level);
228 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
236 static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
237 enum mxl5007t_if_freq if_freq,
249 case MxL_IF_4_57_MHZ:
255 case MxL_IF_5_38_MHZ:
261 case MxL_IF_6_28_MHZ:
264 case MxL_IF_9_1915_MHZ:
267 case MxL_IF_35_25_MHZ:
270 case MxL_IF_36_15_MHZ:
280 set_reg_bits(state->tab_init, 0x02, 0x0f, val);
282 /* set inverted IF or normal IF */
283 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
285 state->if_freq = if_freq;
290 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
291 enum mxl5007t_xtal_freq xtal_freq)
294 case MxL_XTAL_16_MHZ:
295 /* select xtal freq & ref freq */
296 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
297 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
299 case MxL_XTAL_20_MHZ:
300 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
301 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
303 case MxL_XTAL_20_25_MHZ:
304 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
305 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
307 case MxL_XTAL_20_48_MHZ:
308 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
309 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
311 case MxL_XTAL_24_MHZ:
312 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
313 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
315 case MxL_XTAL_25_MHZ:
316 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
317 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
319 case MxL_XTAL_25_14_MHZ:
320 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
321 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
323 case MxL_XTAL_27_MHZ:
324 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
325 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
327 case MxL_XTAL_28_8_MHZ:
328 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
329 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
331 case MxL_XTAL_32_MHZ:
332 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
333 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
335 case MxL_XTAL_40_MHZ:
336 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
337 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
339 case MxL_XTAL_44_MHZ:
340 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
341 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
343 case MxL_XTAL_48_MHZ:
344 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
345 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
347 case MxL_XTAL_49_3811_MHZ:
348 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
349 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
359 static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
360 enum mxl5007t_mode mode)
362 struct mxl5007t_config *cfg = state->config;
364 memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
365 memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
367 mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
368 mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
369 mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
371 set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
372 set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
374 if (mode >= MxL_MODE_CABLE) {
375 copy_reg_bits(state->tab_init, state->tab_init_cable);
376 return state->tab_init_cable;
378 return state->tab_init;
381 /* ------------------------------------------------------------------------- */
383 enum mxl5007t_bw_mhz {
389 static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
390 enum mxl5007t_bw_mhz bw)
396 val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
397 * and DIG_MODEINDEX_CSF */
409 set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
415 reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
416 u32 rf_freq, enum mxl5007t_bw_mhz bw)
420 u32 frac_divider = 1000000;
423 memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));
425 mxl5007t_set_bw_bits(state, bw);
427 /* Convert RF frequency into 16 bits =>
428 * 10 bit integer (MHz) + 6 bit fraction */
429 dig_rf_freq = rf_freq / MHz;
431 temp = rf_freq % MHz;
433 for (i = 0; i < 6; i++) {
436 if (temp > frac_divider) {
437 temp -= frac_divider;
442 /* add to have shift center point by 7.8124 kHz */
446 set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
447 set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
449 if (rf_freq >= 333000000)
450 set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
452 return state->tab_rftune;
455 /* ------------------------------------------------------------------------- */
457 static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
459 u8 buf[] = { reg, val };
460 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
461 .buf = buf, .len = 2 };
464 ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
472 static int mxl5007t_write_regs(struct mxl5007t_state *state,
473 struct reg_pair_t *reg_pair)
478 while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
479 ret = mxl5007t_write_reg(state,
480 reg_pair[i].reg, reg_pair[i].val);
486 static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
488 u8 buf[2] = { 0xfb, reg };
489 struct i2c_msg msg[] = {
490 { .addr = state->i2c_props.addr, .flags = 0,
491 .buf = buf, .len = 2 },
492 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
493 .buf = val, .len = 1 },
497 ret = i2c_transfer(state->i2c_props.adap, msg, 2);
505 static int mxl5007t_soft_reset(struct mxl5007t_state *state)
508 struct i2c_msg msg = {
509 .addr = state->i2c_props.addr, .flags = 0,
512 int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
521 static int mxl5007t_tuner_init(struct mxl5007t_state *state,
522 enum mxl5007t_mode mode)
524 struct reg_pair_t *init_regs;
527 /* calculate initialization reg array */
528 init_regs = mxl5007t_calc_init_regs(state, mode);
530 ret = mxl5007t_write_regs(state, init_regs);
538 static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
539 enum mxl5007t_bw_mhz bw)
541 struct reg_pair_t *rf_tune_regs;
544 /* calculate channel change reg array */
545 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
547 ret = mxl5007t_write_regs(state, rf_tune_regs);
555 /* ------------------------------------------------------------------------- */
557 static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
558 int *rf_locked, int *ref_locked)
566 ret = mxl5007t_read_reg(state, 0xd8, &d);
570 if ((d & 0x0c) == 0x0c)
573 if ((d & 0x03) == 0x03)
579 /* ------------------------------------------------------------------------- */
581 static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
583 struct mxl5007t_state *state = fe->tuner_priv;
584 int rf_locked, ref_locked, ret;
588 if (fe->ops.i2c_gate_ctrl)
589 fe->ops.i2c_gate_ctrl(fe, 1);
591 ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
594 mxl_debug("%s%s", rf_locked ? "rf locked " : "",
595 ref_locked ? "ref locked" : "");
597 if ((rf_locked) || (ref_locked))
598 *status |= TUNER_STATUS_LOCKED;
600 if (fe->ops.i2c_gate_ctrl)
601 fe->ops.i2c_gate_ctrl(fe, 0);
606 /* ------------------------------------------------------------------------- */
608 static int mxl5007t_set_params(struct dvb_frontend *fe)
610 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
611 u32 delsys = c->delivery_system;
612 struct mxl5007t_state *state = fe->tuner_priv;
613 enum mxl5007t_bw_mhz bw;
614 enum mxl5007t_mode mode;
616 u32 freq = c->frequency;
620 mode = MxL_MODE_ATSC;
623 case SYS_DVBC_ANNEX_B:
624 mode = MxL_MODE_CABLE;
629 mode = MxL_MODE_DVBT;
630 switch (c->bandwidth_hz) {
645 mxl_err("modulation type not supported!");
649 if (fe->ops.i2c_gate_ctrl)
650 fe->ops.i2c_gate_ctrl(fe, 1);
652 mutex_lock(&state->lock);
654 ret = mxl5007t_tuner_init(state, mode);
658 ret = mxl5007t_tuner_rf_tune(state, freq, bw);
662 state->frequency = freq;
663 state->bandwidth = c->bandwidth_hz;
665 mutex_unlock(&state->lock);
667 if (fe->ops.i2c_gate_ctrl)
668 fe->ops.i2c_gate_ctrl(fe, 0);
673 /* ------------------------------------------------------------------------- */
675 static int mxl5007t_init(struct dvb_frontend *fe)
677 struct mxl5007t_state *state = fe->tuner_priv;
680 if (fe->ops.i2c_gate_ctrl)
681 fe->ops.i2c_gate_ctrl(fe, 1);
683 /* wake from standby */
684 ret = mxl5007t_write_reg(state, 0x01, 0x01);
687 if (fe->ops.i2c_gate_ctrl)
688 fe->ops.i2c_gate_ctrl(fe, 0);
693 static int mxl5007t_sleep(struct dvb_frontend *fe)
695 struct mxl5007t_state *state = fe->tuner_priv;
698 if (fe->ops.i2c_gate_ctrl)
699 fe->ops.i2c_gate_ctrl(fe, 1);
701 /* enter standby mode */
702 ret = mxl5007t_write_reg(state, 0x01, 0x00);
704 ret = mxl5007t_write_reg(state, 0x0f, 0x00);
707 if (fe->ops.i2c_gate_ctrl)
708 fe->ops.i2c_gate_ctrl(fe, 0);
713 /* ------------------------------------------------------------------------- */
715 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
717 struct mxl5007t_state *state = fe->tuner_priv;
718 *frequency = state->frequency;
722 static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
724 struct mxl5007t_state *state = fe->tuner_priv;
725 *bandwidth = state->bandwidth;
729 static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
731 struct mxl5007t_state *state = fe->tuner_priv;
735 switch (state->if_freq) {
737 *frequency = 4000000;
740 *frequency = 4500000;
742 case MxL_IF_4_57_MHZ:
743 *frequency = 4570000;
746 *frequency = 5000000;
748 case MxL_IF_5_38_MHZ:
749 *frequency = 5380000;
752 *frequency = 6000000;
754 case MxL_IF_6_28_MHZ:
755 *frequency = 6280000;
757 case MxL_IF_9_1915_MHZ:
758 *frequency = 9191500;
760 case MxL_IF_35_25_MHZ:
761 *frequency = 35250000;
763 case MxL_IF_36_15_MHZ:
764 *frequency = 36150000;
767 *frequency = 44000000;
773 static void mxl5007t_release(struct dvb_frontend *fe)
775 struct mxl5007t_state *state = fe->tuner_priv;
777 mutex_lock(&mxl5007t_list_mutex);
780 hybrid_tuner_release_state(state);
782 mutex_unlock(&mxl5007t_list_mutex);
784 fe->tuner_priv = NULL;
787 /* ------------------------------------------------------------------------- */
789 static const struct dvb_tuner_ops mxl5007t_tuner_ops = {
791 .name = "MaxLinear MxL5007T",
793 .init = mxl5007t_init,
794 .sleep = mxl5007t_sleep,
795 .set_params = mxl5007t_set_params,
796 .get_status = mxl5007t_get_status,
797 .get_frequency = mxl5007t_get_frequency,
798 .get_bandwidth = mxl5007t_get_bandwidth,
799 .release = mxl5007t_release,
800 .get_if_frequency = mxl5007t_get_if_frequency,
803 static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
809 ret = mxl5007t_read_reg(state, 0xd9, &id);
815 name = "MxL5007.v1.f1";
818 name = "MxL5007.v1.f2";
820 case MxL_5007_V2_100_F1:
821 name = "MxL5007.v2.100.f1";
823 case MxL_5007_V2_100_F2:
824 name = "MxL5007.v2.100.f2";
826 case MxL_5007_V2_200_F1:
827 name = "MxL5007.v2.200.f1";
829 case MxL_5007_V2_200_F2:
830 name = "MxL5007.v2.200.f2";
833 name = "MxL5007T.v4";
837 printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
841 mxl_info("%s detected @ %d-%04x", name,
842 i2c_adapter_id(state->i2c_props.adap),
843 state->i2c_props.addr);
846 mxl_warn("unable to identify device @ %d-%04x",
847 i2c_adapter_id(state->i2c_props.adap),
848 state->i2c_props.addr);
850 state->chip_id = MxL_UNKNOWN_ID;
854 struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
855 struct i2c_adapter *i2c, u8 addr,
856 struct mxl5007t_config *cfg)
858 struct mxl5007t_state *state = NULL;
861 mutex_lock(&mxl5007t_list_mutex);
862 instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
863 hybrid_tuner_instance_list,
864 i2c, addr, "mxl5007t");
869 /* new tuner instance */
872 mutex_init(&state->lock);
874 if (fe->ops.i2c_gate_ctrl)
875 fe->ops.i2c_gate_ctrl(fe, 1);
877 ret = mxl5007t_get_chip_id(state);
879 if (fe->ops.i2c_gate_ctrl)
880 fe->ops.i2c_gate_ctrl(fe, 0);
882 /* check return value of mxl5007t_get_chip_id */
887 /* existing tuner instance */
891 if (fe->ops.i2c_gate_ctrl)
892 fe->ops.i2c_gate_ctrl(fe, 1);
894 ret = mxl5007t_soft_reset(state);
896 if (fe->ops.i2c_gate_ctrl)
897 fe->ops.i2c_gate_ctrl(fe, 0);
902 if (fe->ops.i2c_gate_ctrl)
903 fe->ops.i2c_gate_ctrl(fe, 1);
905 ret = mxl5007t_write_reg(state, 0x04,
906 state->config->loop_thru_enable);
908 if (fe->ops.i2c_gate_ctrl)
909 fe->ops.i2c_gate_ctrl(fe, 0);
914 fe->tuner_priv = state;
916 mutex_unlock(&mxl5007t_list_mutex);
918 memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
919 sizeof(struct dvb_tuner_ops));
923 mutex_unlock(&mxl5007t_list_mutex);
925 mxl5007t_release(fe);
928 EXPORT_SYMBOL_GPL(mxl5007t_attach);
929 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
930 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
931 MODULE_LICENSE("GPL");
932 MODULE_VERSION("0.2");